An electromyographic data recognition system and method applied to DDR3 memory

Abstract

The application discloses an electromyography data recognition system and method applied to DDR3 memory, and the system comprises an ADC reading module, an IIR filter module, a DDR3 control module, a neural network inference control module and a UART sending module. The ADC reading module is used for collecting electromyography data; the IIR filter module is used for filtering the electromyography data; the DDR3 control module is connected with a plurality of DDR3 memory blocks, and the DDR3 control module is used for reading and writing control of the plurality of DDR3 memory blocks; the neural network inference control module is used for neural network calculation; the electromyography data classification result is obtained; and the UART sending module is used for sending the electromyography data classification result to an upper computer to form a control signal. According to the hardware characteristics of the DDR3 memory, the neural network with less reading and writing times is designed, the calculation speed of the neural network and the reading and writing speed of the DDR3 memory can be balanced, the accuracy can be ensured, the recognition speed can be improved as much as possible, and the power consumption can be reduced.

Description

Technical Field

[0001] This invention relates to the field of electromyography (EMG) data recognition, and in particular to an EMG data recognition system and method for use with DDR3 memory. Background Technology

[0002] Electromyography (EMG) data refers to the measurement of electrical signals that trigger muscle contraction. It can anticipate the degree of muscle contraction in response to limb movements and is widely used in many applied scientific fields such as medicine, rehabilitation, and sports science.

[0003] Existing electromyography (EMG) data recognition systems typically use a host computer as the computing platform, resulting in bulky and power-consuming devices. Due to the size of the equipment, implantable or wearable EMG data recognition systems are difficult to implement.

[0004] DDR3 memory (Double Data Rate SDRAM) is a small, lightweight dynamic random access memory that can be used in implantable or wearable electromyography (EMG) data recognition systems for reading and writing data. However, due to the numerous read / write conflicts inherent in traditional DDR3 memory and its poor multi-channel simultaneous read / write control capabilities, applying DDR3 memory to implantable or wearable EMG data recognition systems results in long computation times, high resource consumption, and long data read / write times. Summary of the Invention

[0005] In view of this, embodiments of the present invention provide an electromyography data recognition system and method applied to DDR3 memory.

[0006] The first aspect of the present invention provides an electromyography data recognition system for DDR3 memory, including an ADC reading module, an IIR filter module, a DDR3 control module, a neural network inference control module, and a UART transmission module;

[0007] The ADC readout module is used to acquire electromyographic data;

[0008] The IIR filter module is used to filter electromyographic data to obtain frequency domain information and quantization coefficients of the electromyographic data;

[0009] The DDR3 control module connects to multiple DDR3 memory blocks. It controls the read and write operations of these blocks, writing frequency domain information into them. Once the frequency domain information recorded in the DDR3 memory blocks reaches a preset length, it is input into the neural network inference control module. The frequency domain information recorded in the DDR3 memory blocks has a sequential relationship.

[0010] The neural network inference control module is used to perform neural network calculations on the frequency domain information based on the quantization coefficients to obtain electromyography data classification results.

[0011] The UART transmitting module is used to send the electromyography data classification results to the host computer to form control signals.

[0012] Furthermore, the ADC readout module adopts an 8-channel analog-to-digital converter as its main structure, and adds a right-side drive circuit to the 8-channel analog-to-digital converter to suppress common-mode signals in electromyographic data.

[0013] Furthermore, the IIR filter module employs a second-order 50Hz band-stop filter for filtering, and completes the filtering of electromyographic data through the following steps:

[0014] Electromyography data is imported into the shift buffer of the IIR filter module, and the shift buffer contains a number of preset quantization coefficients;

[0015] The frequency domain information of the electromyography (EMG) data is obtained by performing a fast Fourier transform on the EMG data.

[0016] The corresponding quantization coefficients are selected in the shift buffer based on the frequency domain information.

[0017] Furthermore, it also includes an SD card read / write module; before the DDR3 control module inputs frequency domain information into the neural network inference control module, the DDR3 control module also performs the following steps:

[0018] The DDR3 control module reads preset weight data through the SD card read / write module and writes the weight data sequentially into the DDR3 memory block;

[0019] According to the order of frequency domain information recorded in the DDR3 memory block, the corresponding weight data is read and set in the neural network inference control module for neural network calculation.

[0020] Furthermore, the neural network inference control module performs neural network calculations through a Lenet neural network, which includes convolutional layers, pooling layers, and fully connected layers.

[0021] The convolutional layer contains 8 convolutional operation units, each consisting of 9 9×8 DSP units and 4 3ALU units. Each 3ALU unit has 3 inputs and 1 output. The 3 inputs of one 3ALU unit are connected to the outputs of the other 3 3ALU units respectively, and the output is the convolutional layer output. The inputs of each of the remaining 3ALU units are connected to a DSP unit. The convolutional layer performs 8 convolutional operations at a time. After obtaining the convolutional layer output, the output is temporarily stored in a DDR3 memory block.

[0022] The pooling layer includes a 2×2 max convolution pooling layer; the pooling layer reads the output results of the convolutional layers from the DDR3 memory block, calculates the maximum value of the output results of each convolutional layer in a first-in-first-out manner, and writes the maximum value back to the corresponding position of the output results of the convolutional layers in the DDR3 memory block;

[0023] The matrix parameters of the fully connected layer are set according to the weight data corresponding to the frequency domain information. After the convolutional layer operation is completed, the fully connected layer reads out all the output results of the convolutional layer in the DDR3 memory block according to the writing order and loads them into the matrix. Multiple feature values ​​are calculated and the multiple feature values ​​are accumulated to obtain the final feature value.

[0024] The fully connected layer is also used to multiply the final feature value by a bias coefficient to obtain the final output result as the electromyography data classification result; wherein, the bias coefficient is obtained through the quantization coefficient.

[0025] Furthermore, when the convolution operation unit performs convolution operation, the 3ALU unit executes the following steps:

[0026] Set up a three-line buffer interval to cache the first three lines of output results from the DSP unit in the buffer interval;

[0027] The output results in the cache are updated in a first-in, first-out manner. If the output result to be written is already cached in the cache, the output result will not be written.

[0028] Arithmetic and logical operations are performed based on the output results in the cached range.

[0029] Furthermore, the activation function of the convolution operation unit is the LeakyReLU function, and the activation parameter Alpha is set to 0.125.

[0030] A second aspect of the present invention provides a method for recognizing electromyographic data applied to DDR3 memory, comprising the following steps:

[0031] Collect electromyography data;

[0032] Filtering the electromyography (EMG) data yields the frequency domain information and quantization coefficients.

[0033] Multiple DDR3 memory blocks are read and written, frequency domain information is written into the DDR3 memory blocks, and after the frequency domain information recorded in the DDR3 memory blocks reaches a preset length, the frequency domain information is input into the neural network inference control module; the frequency domain information recorded in the DDR3 memory blocks has an ordered relationship;

[0034] Based on the quantization coefficients, neural network calculations are performed on the frequency domain information to obtain electromyography data classification results.

[0035] The electromyography data classification results are sent to the host computer to generate control signals.

[0036] Furthermore, prior to the step of inputting frequency domain information into the neural network inference control module, the following steps are also included:

[0037] Read the preset weight data and write the weight data sequentially into the DDR3 memory block;

[0038] The weight data is read according to the order of frequency domain information recorded in the DDR3 memory block, and the weight data is used for neural network calculation.

[0039] Furthermore, the neural network computation is specifically performed through a Lenet neural network, which includes convolutional layers, pooling layers, and fully connected layers.

[0040] The convolutional layer contains 8 convolutional operation units, each consisting of 9 9×8 DSP units and 4 3ALU units. Each 3ALU unit has 3 inputs and 1 output. The 3 inputs of one 3ALU unit are connected to the outputs of the other 3 3ALU units respectively, and the output is the convolutional layer output. The inputs of each of the remaining 3ALU units are connected to a DSP unit. The convolutional layer performs 8 convolutional operations at a time. After obtaining the convolutional layer output, the output is temporarily stored in a DDR3 memory block.

[0041] The pooling layer includes a 2×2 max convolution pooling layer; the pooling layer reads the output results of the convolutional layers from the DDR3 memory block, calculates the maximum value of the output results of each convolutional layer in a first-in-first-out manner, and writes the maximum value back to the corresponding position of the output results of the convolutional layers in the DDR3 memory block;

[0042] The matrix parameters of the fully connected layer are set according to the weight data corresponding to the frequency domain information. After the convolutional layer operation is completed, the fully connected layer reads out all the output results of the convolutional layer in the DDR3 memory block according to the writing order and loads them into the matrix. Multiple feature values ​​are calculated and the multiple feature values ​​are accumulated to obtain the final feature value.

[0043] The fully connected layer is also used to multiply the final feature value by a bias coefficient to obtain the final output result as the electromyography data classification result; wherein, the bias coefficient is obtained through the quantization coefficient.

[0044] The embodiments of the present invention have the following beneficial effects: The electromyography data recognition system and method of the present invention applied to DDR3 memory are designed with a neural network that has fewer read and write cycles based on the hardware characteristics of DDR3 memory. This can balance the calculation speed of the neural network and the read and write speed of DDR3 memory, ensuring accuracy while maximizing recognition speed and reducing power consumption.

[0045] Additional aspects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description or may be learned by practice of the invention. Attached Figure Description

[0046] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 This is a system structure diagram of an electromyography data recognition system and method applied to DDR3 memory according to the present invention;

[0048] Figure 2 This is a state flowchart of the DDR3 control module of an electromyography data recognition system and method applied to DDR3 memory according to the present invention.

[0049] Figure 3 This is a structural diagram of the convolution operation unit of an electromyography data recognition system and method applied to DDR3 memory according to the present invention;

[0050] Figure 4 This is a data loading structure diagram of an electromyography data recognition system and method applied to DDR3 memory according to the present invention;

[0051] Figure 5 This is a diagram illustrating the convolution calculation steps of an electromyography data recognition system and method applied to DDR3 memory according to the present invention. Detailed Implementation

[0052] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0053] Example 1

[0054] This embodiment discloses an electromyography (EMG) data recognition system applied to DDR3 memory, such as... Figure 1As shown, the system includes an ADC readout module, an IIR filter module, a DDR3 control module, a neural network inference control module, and a UART transmission module. Regarding the hardware implementation, this embodiment focuses primarily on the neural network control module, convolution operation module, pooling module, and fully connected module. For the software, the focus is mainly on leveraging the hardware's computational advantages to improve the neural network.

[0055] The functions of each module are described in detail below:

[0056] ADC Readout Module: The ADC readout module is mainly used to acquire electromyography (EMG) data. In this embodiment, the ADC readout module uses an 8-channel analog-to-digital converter (ADC) with an integrated analog front-end amplifier to acquire EMG data and sends the acquired data to the IIR filter module via a parallel interface. Specifically, in this embodiment, the ADC readout module also integrates a right leg drive circuit to suppress common-mode signals in the EMG data and improve the common-mode rejection ratio (CMRR). The ADC also integrates a configurable low-pass digital filter with a minimum settable cutoff frequency of 1 kHz.

[0057] IIR Filter Module: The IIR filter module is mainly used to filter electromyography (EMG) data to obtain its frequency domain information and quantization coefficients. In this embodiment, the IIR filter is a second-order 50Hz band-stop filter. The filtering of the EMG data is completed through the following steps:

[0058] The electromyography data is imported into the shift buffer of the IIR filter module, and several quantization coefficients are preset in the shift buffer;

[0059] The frequency domain information of the electromyography (EMG) data is obtained by performing a fast Fourier transform on the EMG data.

[0060] The corresponding quantization coefficients are selected in the shift buffer based on the frequency domain information.

[0061] The Fast Fourier Transform (FFT) is a fast algorithm for converting data from the time domain to the transform domain for processing. In this embodiment, the frequency domain information obtained from the electromyography (EMG) data transformation includes integrated EMG and median frequency (MF). Integrated EMG represents the total firing rate of motor neurons in the muscle within a preset time period. Integrated EMG can reflect the number of motor neurons and the firing magnitude of each motor neuron to some extent, thus analyzing the muscle's convergence per unit time. Median frequency (MF) represents the median firing frequency of the muscle during contraction, which can reflect the degree of muscle fatigue to some extent.

[0062] DDR3 Controller Module: The DDR3 controller module connects to multiple DDR3 memory blocks, such as... Figure 2 As shown, in this embodiment, the DDR3 control module is mainly used for overall working state transition, that is, to control the read and write of multiple DDR3 memory blocks, write frequency domain information into the DDR3 memory blocks, and input the frequency domain information into the neural network inference control module after the frequency domain information recorded in the DDR3 memory blocks reaches a preset length. In this embodiment, the frequency domain information recorded in the DDR3 memory blocks has a sequential relationship. This is because the DDR3 control module needs to control the length of the frequency domain information. In this embodiment, the preset length is set to 1024 bytes. That is, when the length of the frequency domain information stored in the DDR3 memory block reaches 1024 bytes, the DDR3 control module inputs the frequency domain information into the neural network inference control module; otherwise, it continues to collect electromyographic data from the ADC reading module.

[0063] Specifically, the electromyography data recognition system applied to DDR3 memory in this embodiment also includes an SD card read / write module; before the DDR3 control module inputs frequency domain information into the neural network inference control module, the DDR3 control module also performs the following steps:

[0064] The DDR3 control module reads preset weight data through the SD card read / write module and writes the weight data sequentially into the DDR3 memory block;

[0065] According to the order of frequency domain information recorded in the DDR3 memory block, the corresponding weight data is read and set in the neural network inference control module for neural network calculation.

[0066] The preset weight data is mainly used for weight allocation in the fully connected layer matrix of the neural network. In this embodiment, the weight data is first stored in a fixed address by the host computer, and then the data is read out sequentially and written into the DDR3 memory block using the SD card read / write module. Subsequently, the neural network directly calls the weight data from the DDR3 memory block.

[0067] Neural Network Inference Control Module: In this embodiment, the neural network inference control module is used to perform neural network calculations on frequency domain information based on quantization coefficients to obtain electromyography (EMG) data classification results. Due to the small scale and low power consumption of the circuit implementation in this embodiment, setting up an inter-layer pipeline structure is difficult; therefore, only an intra-layer pipeline structure can be designed. Experiments show that using a Lenet neural network for neural network calculations is the optimal design for the neural network inference control module. Simultaneously, using the LeakyReLU function as the activation function of the neural network, and setting the value of α in LeakyReLU to 0.125, can match the 8-channel input, reducing data read / write operations.

[0068]

[0069] Meanwhile, since neural networks involve a large number of floating-point operations, they will occupy a significant amount of circuit area. Therefore, this embodiment introduces INT8 quantization operations to convert the floating-point multiplication process into an int8 integer multiplication process, which greatly saves computation time, resource consumption, and data read / write time.

[0070] The Lenet neural network includes convolutional layers, pooling layers, and fully connected layers.

[0071] A convolutional layer contains 8 convolutional operation units, such as... Figure 3 As shown, each convolutional operation unit consists of nine 9×8 DSP units and four 3ALU units, all with a stride of 1. Each 3ALU unit has three inputs and one output. The three inputs of one 3ALU unit are connected to the outputs of the other three 3ALU units, and the output is the convolutional layer output. The inputs of each of the remaining 3ALU units are connected to a DSP unit. The convolutional layer performs eight convolutional operations at a time. After obtaining the convolutional layer output, the output is temporarily stored in a DDR3 memory block. This system is a structure composed of eight convolutional operation units. According to the convolutional layer structure of a neural network, the structure of each data point requires 3*3*8n multiplications and summation. Therefore, the output value of each convolution only needs to be calculated n times by this structure and summed to obtain the structure.

[0072] In some embodiments, when the convolution operation unit performs a convolution operation, the 3ALU unit performs the following steps:

[0073] Set up a three-line buffer interval to cache the first three lines of output results from the DSP unit in the buffer interval;

[0074] The output results in the cache are updated in a first-in, first-out manner. If the output result to be written is already cached in the cache, the output result will not be written.

[0075] Arithmetic and logical operations are performed based on the output results in the cached range.

[0076] like Figure 4 As shown, since the stride of the convolution operation unit is uniformly 1, the input data required in each adjacent result is 6 / 9 = 66.7% the same. In order to avoid repeated reading and writing of data and increase the DDR3 read and write pressure, this embodiment sets up three rows of cache RAM. After each calculation, the data below is transferred upward through FIFO (first in first out) to quickly complete the update of input data.

[0077] The overall calculation steps of the convolutional layer are as follows: Figure 5As shown, when the input data size is a*a, the output size is (a-2)*(a-2). Furthermore, in order to avoid repeated reading of input data, the frequency domain data at the forefront is calculated first, so that the frequency domain data does not need to be changed in each subsequent calculation, thereby reducing the number of reads and writes to the DDR3 memory. After the calculation is completed, the output result of the convolutional layer is temporarily cached in the DDR3 memory block; thus, each output channel requires (a-2)*(a-2)*n operations.

[0078] The pooling layer includes a 2×2 maximum convolution pooling layer; the pooling layer reads the output result of the convolutional layer from the DDR3 memory block, calculates the maximum value of the output result of each convolutional layer in a first-in first-out manner, and writes the maximum value back to the corresponding position of the output result of the convolutional layer in the DDR3 memory block. After all frequency domain data calculations are completed, the output results of the convolutional layer need to be accumulated according to depth; at this time, the result of the first row is calculated first, and then the data is cached in the DDR3 memory block. After the data of the second row is calculated, comparison can start, and the maximum value obtained from the comparison is written back to DDR3; by this analogy, the convolution and pooling operations can be completed in a pipeline.

[0079] The matrix parameters of the fully connected layer are set according to the weight data in the corresponding order of frequency domain information; after the convolution layer operation is completed, the fully connected layer reads out all the output results of the convolutional layer from the DDR3 memory block according to the writing order and loads them into the matrix, calculates a plurality of eigenvalues and accumulates the plurality of eigenvalues to obtain the final eigenvalue. The fully connected layer is also configured to multiply the final eigenvalue by a bias coefficient to obtain a final output result as the classification result of the electromyographic data, wherein the bias coefficient is obtained through a quantization coefficient.

[0080] In this embodiment, since each weight in the multiplier matrix of the fully connected layer is different, it is only necessary to sequentially read out the output results of the convolutional layer stored in the DDR3 memory block, sequentially read out the weight parameters, load them into the multiplier matrix circuit, and then accumulate all the values. Due to the quantization of the neural network, the final output result also needs to add a bias and multiply by a quantization coefficient M (0<M<1). Here, M is set as a 32-bit fixed-point decimal, and the multiplication is implemented by means of shift addition.

[0081] UART transmitting module: In this embodiment, the UART transmitting module mainly sends the electromyographic data classification result to the upper computer in the form of asynchronous transceiving to form a control signal, and the control signal is used for information decoding to control a prosthesis and the like.

[0082] This embodiment specifically designs a convolutional operation network based on the hardware characteristics of DDR3 memory, fully optimizes the circuitry for operating large-scale convolutional layers, and implements pipelined computation of convolution + activation + pooling. By designing a regularized circuit structure, a balance is achieved between the computational speed of the neural network and the read / write speed of DDR3 memory, resulting in higher operating frequencies.

[0083] Example 2

[0084] This embodiment discloses a method for recognizing electromyographic data applied to DDR3 memory, including the following steps:

[0085] S1. Collect electromyographic data;

[0086] S2. Filter the electromyography (EMG) data to obtain the frequency domain information and quantization coefficients of the EMG data;

[0087] S3. Perform read / write control on multiple DDR3 memory blocks, write frequency domain information into the DDR3 memory blocks, and input the frequency domain information into the neural network inference control module after the frequency domain information recorded in the DDR3 memory blocks reaches a preset length; the frequency domain information recorded in the DDR3 memory blocks has an ordered relationship;

[0088] S4. Perform neural network calculations on the frequency domain information based on the quantization coefficients to obtain the electromyography data classification results;

[0089] S5. Send the electromyography data classification results to the host computer to generate control signals.

[0090] Specifically, before step S3, which involves inputting frequency domain information into the neural network inference control module, the following steps are also included:

[0091] S3-1. Read the preset weight data and write the weight data sequentially into the DDR3 memory block;

[0092] S3-2. Read the weight data in the corresponding order according to the order of frequency domain information recorded in the DDR3 memory block, and use the weight data for neural network calculation.

[0093] The neural network calculation in step S4 is specifically performed using a Lenet neural network, which includes convolutional layers, pooling layers, and fully connected layers.

[0094] The convolutional layer contains 8 convolutional operation units, each consisting of 9 9×8 DSP units and 4 3ALU units. Each 3ALU unit has 3 inputs and 1 output. The 3 inputs of one 3ALU unit are connected to the outputs of the other 3 3ALU units respectively, and the output is the output result of the convolutional layer. The inputs of each of the remaining 3ALU units are connected to one DSP unit. The convolutional layer performs 8 convolutional operations at a time. After obtaining the output result of the convolutional layer at each time, the output result is temporarily stored in the DDR3 memory block.

[0095] The pooling layer contains a 2×2 max-convolution pooling layer; the pooling layer reads the output results of the convolutional layers from the DDR3 memory block, calculates the maximum value of the output results of each convolutional layer in a first-in-first-out manner, and writes the maximum value back to the corresponding position of the output results of the convolutional layers in the DDR3 memory block;

[0096] The matrix parameters of the fully connected layer are set according to the weight data corresponding to the frequency domain information. After the convolutional layer operation is completed, the fully connected layer reads out all the output results of the convolutional layer in the DDR3 memory block according to the writing order and loads them into the matrix. It calculates multiple eigenvalues ​​and accumulates the multiple eigenvalues ​​to obtain the final eigenvalue.

[0097] The fully connected layer is also used to multiply the final feature value by the bias coefficient to obtain the final output result as the electromyography data classification result; the bias coefficient is obtained by quantization coefficient.

[0098] This invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions to cause the computer device to operate. Figure 1 The image shows an electromyography (EMG) data recognition system applied to DDR3 memory.

[0099] In some alternative embodiments, the functions / operations mentioned in the block diagrams may not occur in the order shown in the operation diagrams. For example, depending on the functions / operations involved, two consecutively shown blocks may actually be executed substantially simultaneously, or the blocks may sometimes be executed in reverse order. Furthermore, the embodiments presented and described in the flowcharts of this invention are provided by way of example to provide a more comprehensive understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is altered and sub-operations described as part of a larger operation are executed independently.

[0100] Furthermore, although the invention has been described in the context of functional modules, it should be understood that, unless otherwise stated, one or more of the described functions and / or features may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in a separate physical device or software module. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the invention. Rather, given the properties, functions, and internal relationships of the various functional modules in the apparatus disclosed herein, the actual implementation of the module will be understood within the scope of conventional skill of an engineer. Therefore, those skilled in the art can implement the invention as set forth in the claims using ordinary techniques without excessive experimentation. It is also understood that the specific concepts disclosed are merely illustrative and not intended to limit the scope of the invention, which is determined by the full scope of the appended claims and their equivalents.

[0101] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0102] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

[0103] The above is a detailed description of the preferred embodiments of the present invention, but the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and these equivalent modifications or substitutions are all included within the scope defined by the claims of this application.

Claims

1. An electromyography (EMG) data recognition system for DDR3 memory, characterized in that, It includes an ADC readout module, an IIR filter module, a DDR3 control module, a neural network inference control module, and a UART transmission module; The ADC readout module is used to acquire electromyographic data; The IIR filter module is used to filter electromyographic data to obtain frequency domain information and quantization coefficients of the electromyographic data; The DDR3 control module connects to multiple DDR3 memory blocks. It controls the read and write operations of these blocks, writing frequency domain information into them. Once the frequency domain information recorded in the DDR3 memory blocks reaches a preset length, it is input into the neural network inference control module. The frequency domain information recorded in the DDR3 memory blocks has a sequential relationship. The neural network inference control module is used to perform neural network calculations on the frequency domain information based on the quantization coefficients to obtain electromyography data classification results. The UART transmitting module is used to send the electromyography data classification results to the host computer to form control signals; The system also includes an SD card read / write module; before the DDR3 control module inputs frequency domain information into the neural network inference control module, the DDR3 control module also performs the following steps: The DDR3 control module reads preset weight data through the SD card read / write module and writes the weight data sequentially into the DDR3 memory block; According to the order of frequency domain information recorded in the DDR3 memory block, the corresponding weight data is read and set in the neural network inference control module for neural network calculation; The neural network inference control module performs neural network calculations through a Lenet neural network, which includes convolutional layers, pooling layers, and fully connected layers. The convolutional layer contains 8 convolutional operation units, each consisting of 9 9×8 DSP units and 4 3ALU units. Each 3ALU unit has 3 inputs and 1 output. The 3 inputs of one 3ALU unit are connected to the outputs of the other 3 3ALU units respectively, and the output is the convolutional layer output. The inputs of each of the remaining 3ALU units are connected to a DSP unit. The convolutional layer performs 8 convolutional operations at a time. After obtaining the convolutional layer output, the output is temporarily stored in a DDR3 memory block. The pooling layer includes a 2×2 max convolution pooling layer; the pooling layer reads the output results of the convolutional layers from the DDR3 memory block and calculates the maximum value of the output results of each convolutional layer in a first-in-first-out manner; Write the maximum value back to the corresponding position of the convolutional layer output in the DDR3 memory block; The matrix parameters of the fully connected layer are set according to the weight data corresponding to the frequency domain information. After the convolutional layer operation is completed, the fully connected layer reads out all the output results of the convolutional layer in the DDR3 memory block according to the writing order and loads them into the matrix. Multiple feature values ​​are calculated and the multiple feature values ​​are accumulated to obtain the final feature value. The fully connected layer is also used to multiply the final feature value by a bias coefficient to obtain the final output result as the electromyography data classification result; wherein, the bias coefficient is obtained through the quantization coefficient; When the convolution operation unit performs a convolution operation, the 3ALU unit executes the following steps: Set up a three-line buffer interval to cache the first three lines of output results from the DSP unit in the buffer interval; The output results in the cache are updated in a first-in, first-out manner. If the output result to be written is already cached in the cache, the output result will not be written. Perform arithmetic and logical operations based on the output results in the cache interval; The activation function of the convolution operation unit is the LeakyReLU function, and the activation parameter Alpha is set to 0.

125.

2. The electromyography data recognition system for DDR3 memory according to claim 1, characterized in that, The ADC readout module adopts an 8-channel analog-to-digital converter as its main structure, and a right-side drive circuit is added to the 8-channel analog-to-digital converter to suppress common-mode signals in electromyography data.

3. The electromyography data recognition system applied to DDR3 memory according to claim 1, characterized in that, The IIR filter module uses a second-order 50Hz band-stop filter for filtering, and the filtering of electromyography data is completed through the following steps: Electromyography data is imported into the shift buffer of the IIR filter module, and the shift buffer contains a number of preset quantization coefficients; The frequency domain information of the electromyography (EMG) data is obtained by performing a fast Fourier transform on the EMG data. The corresponding quantization coefficients are selected in the shift buffer based on the frequency domain information.

4. A method for recognizing electromyographic data applied to DDR3 memory, characterized in that, Includes the following steps: Collect electromyography data; Filtering the electromyography (EMG) data yields the frequency domain information and quantization coefficients. Multiple DDR3 memory blocks are read and written, frequency domain information is written into the DDR3 memory blocks, and after the frequency domain information recorded in the DDR3 memory blocks reaches a preset length, the frequency domain information is input into the neural network inference control module; the frequency domain information recorded in the DDR3 memory blocks has an ordered relationship; Based on the quantization coefficients, neural network calculations are performed on the frequency domain information to obtain electromyography data classification results. The electromyography data classification results are sent to the host computer to generate control signals; Before the step of inputting frequency domain information into the neural network inference control module, the following steps are also included: Read the preset weight data and write the weight data sequentially into the DDR3 memory block; The weight data is read according to the order of frequency domain information recorded in the DDR3 memory block, and the weight data is used for neural network calculation. The neural network computation is specifically performed through a Lenet neural network, which includes convolutional layers, pooling layers, and fully connected layers. The convolutional layer contains 8 convolutional operation units, each consisting of 9 9×8 DSP units and 4 3ALU units. Each 3ALU unit has 3 inputs and 1 output. The 3 inputs of one 3ALU unit are connected to the outputs of the other 3 3ALU units respectively, and the output is the convolutional layer output. The inputs of each of the remaining 3ALU units are connected to a DSP unit. The convolutional layer performs 8 convolutional operations at a time. After obtaining the convolutional layer output, the output is temporarily stored in a DDR3 memory block. The pooling layer includes a 2×2 max convolution pooling layer; the pooling layer reads the output results of the convolutional layers from the DDR3 memory block, calculates the maximum value of the output results of each convolutional layer in a first-in-first-out manner, and writes the maximum value back to the corresponding position of the output results of the convolutional layers in the DDR3 memory block; The matrix parameters of the fully connected layer are set according to the weight data corresponding to the frequency domain information. After the convolutional layer operation is completed, the fully connected layer reads out all the output results of the convolutional layer in the DDR3 memory block according to the writing order and loads them into the matrix. Multiple feature values ​​are calculated and the multiple feature values ​​are accumulated to obtain the final feature value. The fully connected layer is also used to multiply the final feature value by a bias coefficient to obtain the final output result as the electromyography data classification result; wherein, the bias coefficient is obtained through the quantization coefficient; When the convolution operation unit performs convolution operation, the method further includes: Set up a three-line buffer interval to cache the first three lines of output results from the DSP unit in the buffer interval; The output results in the cache are updated in a first-in, first-out manner. If the output result to be written is already cached in the cache, the output result will not be written. Perform arithmetic and logical operations based on the output results in the cache interval; The activation function of the convolution operation unit is the LeakyReLU function, and the activation parameter Alpha is set to 0.125.

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