Method and device for on-line monitoring of capacitance parameters, terminal and storage medium

Abstract

The application provides an online monitoring method and device for a capacitance parameter, a terminal and a storage medium. The method comprises the following steps: obtaining current values and voltage values of a to-be-tested capacitance at multiple sampling moments based on a preset sampling frequency; calculating a capacitance value and a theoretical equivalent resistance of the to-be-tested capacitance in a current state according to the current values and the voltage values of the to-be-tested capacitance at the multiple sampling moments based on the first Kirchhoff law; and correcting the theoretical equivalent resistance based on the capacitance value in the current state and the preset sampling frequency, so as to obtain an actual equivalent resistance of the to-be-tested capacitance in the current state. Through the above scheme, the application can reduce errors introduced by data sampling, thereby improving the calculation accuracy of the equivalent resistance of the capacitance.

Description

Technical Field

[0001] This invention relates to the field of circuit technology, and in particular to an online monitoring method, device, terminal, and storage medium for capacitance parameters. Background Technology

[0002] An uninterruptible power supply (UPS) system is a system that can continuously supply power to a load and maintain its normal operation in the event of a power grid failure (such as a power outage, undervoltage, interference, or surge). A UPS failure can have extremely serious consequences. This failure is usually caused by internal components, especially the capacitors within the UPS, whose performance condition has a significant impact on the reliability and stability of the power supply. Therefore, accurate monitoring of capacitor parameters is crucial.

[0003] Currently, the performance of a capacitor is mainly reflected by its capacitance and equivalent resistance. The equivalent resistance is mainly calculated from the current and voltage values ​​of the capacitor. However, since sampling the current and voltage introduces certain errors, there will be a certain deviation between the calculated equivalent resistance and the actual equivalent resistance. Summary of the Invention

[0004] In view of this, the present invention provides an online monitoring method, device, terminal and storage medium for capacitance parameters, which can solve the problem of low accuracy in equivalent resistance calculation.

[0005] In a first aspect, embodiments of the present invention provide an online monitoring method for capacitance parameters, comprising:

[0006] The current and voltage values ​​of the capacitor under test are obtained at multiple sampling times based on a preset sampling frequency.

[0007] Based on Kirchhoff's first law and the current and voltage values ​​of the capacitor under test at multiple sampling times, calculate the equivalent capacitance and theoretical equivalent resistance of the capacitor under test in the current state.

[0008] Based on the equivalent capacitance and the preset sampling frequency in the current state, the theoretical equivalent resistance is corrected to obtain the actual equivalent resistance of the capacitor under test in the current state.

[0009] Secondly, embodiments of the present invention provide an online monitoring device for capacitance parameters, comprising:

[0010] The data acquisition module is used to acquire the current and voltage values ​​of the capacitor under test at multiple sampling times based on a preset sampling frequency;

[0011] The capacitor theoretical parameter acquisition module is used to calculate the equivalent capacitance and theoretical equivalent resistance of the capacitor under test in the current state based on Kirchhoff's first law and the current and voltage values ​​of the capacitor under test at multiple sampling times.

[0012] An equivalent resistance correction module is used to correct the theoretical equivalent resistance based on the equivalent capacitance in the current state and the preset sampling frequency, so as to obtain the actual equivalent resistance of the capacitor under test in the current state.

[0013] Thirdly, embodiments of the present invention provide a terminal, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the method as described in any possible implementation of the first aspect above.

[0014] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method as described in any possible implementation of the first aspect above.

[0015] The beneficial effects of the embodiments of the present invention compared with the prior art are as follows:

[0016] This invention first acquires the current and voltage values ​​of the capacitor under test at multiple sampling times based on a preset sampling frequency. Then, according to Kirchhoff's first law and the current and voltage values ​​of the capacitor under test at the multiple sampling times, it calculates the equivalent capacitance and theoretical equivalent resistance of the capacitor under test in the current state. Finally, based on the equivalent capacitance in the current state and the preset sampling frequency, it corrects the theoretical equivalent resistance to obtain the actual equivalent resistance of the capacitor under test in the current state. Through the above scheme, this embodiment can reduce the error introduced by data sampling, thereby improving the accuracy of the calculation of the capacitor's equivalent resistance. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a flowchart illustrating the implementation of the online monitoring method for capacitance parameters provided in this embodiment of the invention.

[0019] Figure 2 This is a schematic diagram of the switching power supply provided in an embodiment of the present invention;

[0020] Figure 3 This is an equivalent circuit diagram of the capacitor under test provided in an embodiment of the present invention;

[0021] Figure 4 This is a schematic diagram of the structure of the online monitoring device for capacitance parameters provided in an embodiment of the present invention;

[0022] Figure 5 This is a schematic diagram of the terminal provided in an embodiment of the present invention;

[0023] Figure 6 This is a circuit diagram of the inverter module provided in an embodiment of the present invention;

[0024] Figure 7 This is a circuit diagram of the rectifier module provided in an embodiment of the present invention. Detailed Implementation

[0025] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of the invention with unnecessary detail.

[0026] To make the objectives, technical solutions, and advantages of the present invention clearer, specific embodiments will be described below in conjunction with the accompanying drawings.

[0027] See Figure 1 The flowchart illustrating the implementation of the online monitoring method for capacitance parameters provided in this embodiment of the invention is described in detail below:

[0028] S101: Obtain the current and voltage values ​​of the capacitor under test at multiple sampling times based on a preset sampling frequency.

[0029] In one possible implementation, Figure 2 A schematic diagram of the switching power supply is shown, such as... Figure 2 As shown, the capacitor under test is the DC bus capacitor C1 in the switching power supply; the switching power supply includes a rectifier module and an inverter module; the rectifier module is connected to the inverter module via the DC bus; the specific implementation process of S101 includes:

[0030] S201: Obtain the three-phase inductor current of the rectifier module and the three-phase inductor current of the inverter module.

[0031] In one possible implementation, the specific process for obtaining the three-phase inductor current of the rectifier module in S201 includes:

[0032] The three-phase high-frequency inductor current and three-phase low-frequency inductor current of the rectifier module are obtained, and the high-frequency inductor current and low-frequency inductor current of the same phase are added together to obtain the inductor current of that phase of the rectifier module.

[0033] In this embodiment, when the capacitor under test is a DC bus capacitor, since the real-time parameters of the capacitor are significantly affected by ripple and the magnitude of the ripple current differs greatly from that of the low-frequency component, and considering the limitations of the AD sampling range and resolution, the current value monitoring of the DC bus capacitor is divided into two parts: low frequency and high frequency. The high-frequency current and the low-frequency current are collected by Hall sensors respectively, and then added together to obtain the overall current.

[0034] In one possible implementation, the specific process for obtaining the three-phase inductor current of the inverter module in step S201 includes:

[0035] The three-phase high-frequency inductor current and three-phase low-frequency inductor current of the inverter module are obtained, and the high-frequency inductor current and low-frequency inductor current of the same phase are added together to obtain the inductor current of that phase of the inverter module.

[0036] S202: Obtain the three-phase switch status of the rectifier module and the three-phase switch status of the inverter module.

[0037] In this embodiment, Figure 7 A circuit diagram of the rectifier module provided in this embodiment is shown, as follows: Figure 7 As shown, the switching state of each phase in the rectifier module can be determined based on the sign of the voltage across the corresponding branch in the rectifier module. For example, taking phase a as an example, the switching state of phase a can be determined based on the sign of the voltage across the branch containing switching transistors S1 and S4. Similarly, the switching state of each phase in the inverter module can be determined based on the sign of the voltage across the corresponding phase branch in the inverter module. The switching state values ​​include (-1, 0, 1).

[0038] In addition, the switching state of each phase in the rectifier module can be determined based on the input voltage of the corresponding phase, and the switching state of each phase in the inverter module can be determined based on the output voltage of the corresponding phase.

[0039] Since the voltage ripple component has a relatively small impact on the output voltage of the rectifier module and the input voltage of the inverter module, only the low-frequency portion of the output voltage of both modules can be used. Specifically, the output voltage of the rectifier module is sequentially low-pass filtered, reduced by an operational amplifier, sampled by an analog-to-digital converter (ADC), and then restored to obtain the low-frequency component. Similarly, the input voltage of the inverter module can be obtained using the same method.

[0040] S203: Based on formula Determine the output current of the rectifier module and the input current of the inverter module;

[0041] Where k∈{1,2}, k=1 represents the rectifier module, k=2 represents the inverter module, and i dc,1 i represents the output current of the rectifier module. dc,2 This represents the input current of the inverter module; S a,k S represents the a-phase switch state of the k-th module. b,k S represents the b-phase switch state of the k-th module. c,k Indicates the c-phase switch state of the k-th module, i a,k i represents the phase a inductor current of the k-th module. b,k i represents the b-phase inductor current of the k-th module. c,k This represents the c-phase inductor current of the k-th module.

[0042] S204: The output current i dc,1 Subtract the input current i dc,2 The current value i of the capacitor under test is obtained. C .

[0043] In this embodiment, since the magnitude of the ripple voltage of the capacitor under test is much smaller than the DC component of the capacitor voltage under test, the voltage value of the capacitor under test is directly collected in this embodiment.

[0044] In one possible implementation, the capacitor under test is the AC output capacitor in the inverter module; the AC side of the inverter module is connected to the load; the specific implementation process of S101 includes:

[0045] Obtain the three-phase output current and three-phase load current of the inverter module;

[0046] Subtract the load current of the corresponding phase from the three-phase output current of the inverter module to obtain the current value of the AC output capacitor of the corresponding phase.

[0047] Specifically, such as Figure 6 As shown, the AC output capacitors of the inverter module are Cr1, Cr2, and Cr3. The three-phase output current of the inverter module is specifically the current on the left side of the AC output capacitors. The three-phase load current is the current at the final output terminal of the entire inverter module. Taking Cr1 as an example, the corresponding output current of the inverter module is i. o1 The corresponding load current is i o2 Then the current value of the AC output capacitor Cr1 is i Cr1 =i o1 -i o2 .

[0048] The load current is obtained based on the Hall sensor.

[0049] In one possible implementation, the AC output capacitor voltage can be the low-frequency portion of the AC output capacitor voltage. Specifically, the acquired AC output capacitor voltage is sequentially low-pass filtered, downsampled, sampled by an analog-to-digital converter (AD), and restored to obtain the low-frequency portion of the AC output capacitor voltage.

[0050] S102: Based on Kirchhoff's first law and the current and voltage values ​​of the capacitor under test at multiple sampling times, calculate the equivalent capacitance and theoretical equivalent resistance of the capacitor under test in the current state.

[0051] Specifically, the equivalent resistance of the capacitor under test includes the equivalent series resistance and the equivalent parallel resistance. This embodiment mainly calculates the equivalent series resistance of the capacitor under test.

[0052] In one possible implementation, the specific implementation process of S102 includes:

[0053] Based on formula Calculate the theoretical equivalent resistance of the capacitor under test in the current state;

[0054] Based on formula Calculate the equivalent capacitance of the capacitor under test in the current state;

[0055] Among them, i C (t0) represents the current value flowing through the capacitor under test at time t0, i C (t1) represents the current value flowing through the capacitor under test at time t1, i C (t2) represents the current flowing through the capacitor under test at time t2; u0(t0) represents the voltage across the capacitor under test at time t0; u0(t1) represents the voltage across the capacitor under test at time t1; u0(t2) represents the voltage across the capacitor under test at time t2; ESR0 represents the theoretical equivalent resistance of the capacitor under test in the current state; and C represents the equivalent capacitance of the capacitor under test in the current state.

[0056] In this embodiment, Figure 3 A schematic diagram of the capacitor equivalent circuit is shown, such as... Figure 3 As shown, the KVL equation for the capacitor equivalent circuit can be expressed as: ESR × i C (t)+u C (t)=u o (t); where u C (t) represents the ideal voltage across the capacitor under test at time t.

[0057] The current-voltage relationship of an ideal capacitor is: Where u C (t0)=u o (t0)-ESR×i C(t0). Substituting into the above equation, we obtain the relationship between ESR and capacitor voltage and capacitor current at any time t:

[0058]

[0059] As can be seen from the above equation, if the voltage u0 and current iC across the capacitor under test are measured to obtain the voltage and current values ​​at a certain initial time t0 and at any two times t1 and t2 after the initial time t0, the equivalent resistance ESR0 and equivalent capacitance C of the capacitor under test can be obtained by solving the system of equations.

[0060] S103: Based on the equivalent capacitance and the preset sampling frequency in the current state, correct the theoretical equivalent resistance to obtain the actual equivalent resistance of the capacitor under test in the current state.

[0061] In one possible implementation, the specific implementation process of S103 includes:

[0062] Based on formula The theoretical equivalent resistance is corrected to obtain the actual equivalent resistance of the capacitor under test in the current state;

[0063] Wherein, ESR represents the actual equivalent resistance of the capacitor under test in the current state, ESR0 represents the theoretical equivalent resistance of the capacitor under test in the current state, C represents the equivalent capacitance of the capacitor under test in the current state, and Fs represents the preset sampling frequency.

[0064] This embodiment not only improves data acquisition accuracy through the above-described solution, but also reduces errors introduced by sampling, thereby improving the accuracy of calculating the equivalent resistance of the capacitor. Furthermore, this application does not require removing the capacitor under test when monitoring the parameters of the capacitor under test, enabling online monitoring of the capacitor under test, thus improving the applicability of the capacitor parameter monitoring method.

[0065] Specifically, after determining the equivalent capacitance and equivalent resistance of a capacitor, the aging degree of the capacitor can be determined based on these indicators. Existing technologies typically use equivalent resistance or equivalent capacitance separately to determine the aging degree of a capacitor. However, multiple indicators are often not conducive to users determining the health status of a capacitor, and a single indicator often misses some fault information of the device. Therefore, this embodiment can evaluate the health of the capacitor under test based on its equivalent resistance and equivalent capacitance, as detailed below:

[0066] Calculate the Mahalanobis distance between the equivalent capacitance and the equivalent resistance in the current state;

[0067] The overall health of the capacitor under test is determined based on the Mahalanobis distance.

[0068] In one possible implementation, the specific process for calculating the Mahalanobis distance between the equivalent capacitance and the equivalent resistance in the current state includes:

[0069] Based on formula The equivalent capacitance and equivalent resistance in the current state are standardized;

[0070] The standardized equivalent capacitance and equivalent resistance are input into the Mahalanobis distance calculation formula to obtain the Mahalanobis distance between the equivalent capacitance and equivalent resistance in the current state.

[0071] The formula for calculating Mahalanobis distance is:

[0072]

[0073] Among them, X ij Let m represent the value of the i-th sample of the j-th index, where the index includes equivalent capacitance and equivalent resistance, i.e., m = 2; S represents the mean of the j-th indicator. j Z represents the standard deviation of the j-th indicator. ij MD represents the standardized value of the i-th sample for the j-th indicator; i The Mahalanobis distance between the equivalent capacitance and the equivalent resistance corresponding to the i-th sample is represented.

[0074] Specifically, a sample represents the equivalent capacitance and equivalent resistance of the capacitor under test at a given sampling time. Multiple samples are taken to calculate the mean and standard deviation, thereby standardizing the equivalent capacitance and equivalent resistance. The Mahalanobis distance is then calculated from the standardized equivalent capacitance and equivalent resistance.

[0075] Specifically, Mahalanobis distance represents the covariance distance of data. It can effectively calculate the nearest distance between a sample and the centroid of a sample set, or calculate the similarity between two unknown sample sets. The Mahalanobis distance between two points is independent of the unit of measurement of the original data, so it is unaffected by dimensions. Moreover, because it takes into account the correlation between various feature parameters, the given distance value can well measure the difference between the measured data samples.

[0076] In one possible implementation, the specific process for determining the overall health of the capacitor under test based on the Mahalanobis distance includes:

[0077] According to the formula Calculate the overall health status of the capacitor under test;

[0078] Among them, SOH MD The overall health status, MD CMD0 represents the Mahalanobis distance of the capacitor under test in its current state, and MD0 represents the rated Mahalanobis distance of the capacitor under test. EOL This represents the Mahalanobis distance of the capacitor under test at the end of its lifespan.

[0079] After obtaining the overall health score, the overall health status is determined based on the overall health score value. Specifically, the health status of the capacitor under test can be divided into: healthy, good, degraded, and severely degraded; the corresponding SOH value ranges are (0.9,1), (0.8,0.92), (0.70,0.82), [0,0.72). The purpose of setting the value ranges with overlap is to avoid the situation where the health status regresses due to normal fluctuations in data after the capacitor's health status changes.

[0080] After obtaining the health status of the capacitor under test, the terminal can display the health status on the screen. The four health statuses, namely healthy, good, degraded, and severely degraded, correspond to green, yellow-green, yellow, and red, respectively, so that users can more intuitively determine the health status of the capacitor under test.

[0081] The above method can comprehensively assess the overall health of the capacitor under test by combining its equivalent capacitance and equivalent resistance, thereby improving the accuracy of the assessment.

[0082] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0083] The following are device embodiments of the present invention. For details not described in detail, please refer to the corresponding method embodiments described above.

[0084] Figure 4 A schematic diagram of the online monitoring device for capacitance parameters provided in an embodiment of the present invention is shown. For ease of explanation, only the parts related to the embodiment of the present invention are shown, and are described in detail below:

[0085] like Figure 4 As shown, the online monitoring device 100 for capacitance parameters includes:

[0086] The data acquisition module 110 is used to acquire the current and voltage values ​​of the capacitor under test at multiple sampling times based on a preset sampling frequency;

[0087] The capacitor theoretical parameter acquisition module 120 is used to calculate the equivalent capacitance and theoretical equivalent resistance of the capacitor under test in the current state based on Kirchhoff's first law and the current and voltage values ​​of the capacitor under test at multiple sampling times.

[0088] The equivalent resistance correction module 130 is used to correct the theoretical equivalent resistance based on the equivalent capacitance in the current state and the preset sampling frequency, so as to obtain the actual equivalent resistance of the capacitor under test in the current state.

[0089] In one possible implementation, the capacitance theoretical parameter acquisition module 120 includes:

[0090] Based on formula Calculate the theoretical equivalent resistance of the capacitor under test in the current state;

[0091] Based on formula Calculate the equivalent capacitance of the capacitor under test in the current state;

[0092] Among them, i C (t0) represents the current value flowing through the capacitor under test at time t0, i C (t1) represents the current value flowing through the capacitor under test at time t1, i C (t2) represents the current flowing through the capacitor under test at time t2; u0(t0) represents the voltage across the capacitor under test at time t0; u0(t1) represents the voltage across the capacitor under test at time t1; u0(t2) represents the voltage across the capacitor under test at time t2; ESR0 represents the theoretical equivalent resistance of the capacitor under test in the current state; and C represents the equivalent capacitance of the capacitor under test in the current state.

[0093] In one possible implementation, the equivalent resistance correction module 130 includes:

[0094] Based on formula The theoretical equivalent resistance is corrected to obtain the actual equivalent resistance of the capacitor under test in the current state;

[0095] Wherein, ESR represents the actual equivalent resistance of the capacitor under test in the current state, ESR0 represents the theoretical equivalent resistance of the capacitor under test in the current state, C represents the equivalent capacitance of the capacitor under test in the current state, and Fs represents the preset sampling frequency.

[0096] In one possible implementation, the capacitor under test is the DC bus capacitor in a switching power supply; the switching power supply includes a rectifier module and an inverter module; the rectifier module is connected to the inverter module via a DC bus; the data acquisition module 110 includes:

[0097] An inductor current acquisition unit is used to acquire the three-phase inductor current of the rectifier module and the three-phase inductor current of the inverter module.

[0098] A switch status acquisition unit is used to acquire the three-phase switch status of the rectifier module and the three-phase switch status of the inverter module.

[0099] Current calculation unit, used for formula-based calculation Determine the output current of the rectifier module and the input current of the inverter module;

[0100] The capacitor current calculation unit is used to subtract the input current from the output current to obtain the current value of the capacitor under test;

[0101] Where k∈{1,2}, k=1 represents the rectifier module, k=2 represents the inverter module, and i dc,1 i represents the output current of the rectifier module. dc,2 This represents the input current of the inverter module; S a,k S represents the a-phase switch state of the k-th module. b,k S represents the b-phase switch state of the k-th module. c,k Indicates the c-phase switch state of the k-th module, i a,k i represents the phase a inductor current of the k-th module. b,k i represents the b-phase inductor current of the k-th module. c,k This represents the c-phase inductor current of the k-th module.

[0102] In one possible implementation, the inductor current acquisition unit includes:

[0103] The three-phase high-frequency inductor current and three-phase low-frequency inductor current of the rectifier module are obtained, and the high-frequency inductor current and low-frequency inductor current of the same phase are added together to obtain the inductor current of that phase of the rectifier module.

[0104] In one possible implementation, the capacitor under test is the AC output capacitor in the inverter module; the AC side of the inverter module is connected to the load; the data acquisition module 110 includes:

[0105] Obtain the three-phase output current and three-phase load current of the inverter module;

[0106] Subtract the load current of the corresponding phase from the three-phase output current of the inverter module to obtain the current value of the AC output capacitor of the corresponding phase.

[0107] In one possible implementation, the online monitoring device further includes a comprehensive health assessment:

[0108] Calculate the Mahalanobis distance between the equivalent capacitance and the actual equivalent resistance in the current state;

[0109] The overall health of the capacitor under test is determined based on the Mahalanobis distance.

[0110] The online monitoring device for capacitance parameters provided in this embodiment can be used to execute the online monitoring method embodiment for capacitance parameters described above. Its implementation principle and technical effect are similar, and will not be repeated here.

[0111] Figure 5 This is a schematic diagram of a terminal provided in an embodiment of the present invention. For example... Figure 5 As shown, the terminal 5 in this embodiment includes: a processor 50, a memory 51, and a computer program 52 stored in the memory 51 and executable on the processor 50. When the processor 50 executes the computer program 52, it implements the steps in the above-described online monitoring method embodiments for various capacitance parameters, for example... Figure 1 Steps 101 to 103 are shown. Alternatively, when the processor 50 executes the computer program 52, it implements the functions of each module / unit in the above-described device embodiments, for example... Figure 4 The functions of modules 110 to 130 are shown.

[0112] For example, the computer program 52 may be divided into one or more modules / units, which are stored in the memory 51 and executed by the processor 50 to complete the present invention. The one or more modules / units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program 52 in the terminal 5.

[0113] The terminal 5 can be a computing device such as a desktop computer, laptop, handheld computer, or cloud server. The terminal 5 may include, but is not limited to, a processor 50 and a memory 51. Those skilled in the art will understand that... Figure 5 This is merely an example of terminal 5 and does not constitute a limitation on terminal 5. It may include more or fewer components than shown, or combine certain components, or different components. For example, the terminal may also include input / output devices, network access devices, buses, etc.

[0114] The processor 50 may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0115] The memory 51 can be an internal storage unit of the terminal 5, such as a hard disk or memory of the terminal 5. The memory 51 can also be an external storage device of the terminal 5, such as a plug-in hard disk, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the terminal 5. Furthermore, the memory 51 can include both internal storage units and external storage devices of the terminal 5. The memory 51 is used to store the computer program and other programs and data required by the terminal. The memory 51 can also be used to temporarily store data that has been output or will be output.

[0116] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0117] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0118] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0119] In the embodiments provided by this invention, it should be understood that the disclosed devices / terminals and methods can be implemented in other ways. For example, the device / terminal embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0120] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0121] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0122] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the above embodiments of the online monitoring method for various capacitance parameters. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc. It should be noted that the content contained in the computer-readable medium may be appropriately added to or subtracted from the content as required by the legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium may not include electrical carrier signals and telecommunication signals.

[0123] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A method for online monitoring of capacitance parameters, characterized in that, include: The current and voltage values ​​of the capacitor under test are obtained at multiple sampling times based on a preset sampling frequency. Based on Kirchhoff's first law and the current and voltage values ​​of the capacitor under test at multiple sampling times, calculate the equivalent capacitance and theoretical equivalent resistance of the capacitor under test in the current state. Based on formula The theoretical equivalent resistance is corrected to obtain the actual equivalent resistance of the capacitor under test in the current state; in, ESR This represents the actual equivalent resistance of the capacitor under test in the current state. ESR 0 represents the theoretical equivalent resistance of the capacitor under test in the current state. C This represents the equivalent capacitance of the capacitor under test in the current state. Fs This indicates the preset sampling frequency.

2. The online monitoring method for capacitance parameters according to claim 1, characterized in that, The calculation of the equivalent capacitance and theoretical equivalent resistance of the capacitor under test in the current state, based on Kirchhoff's first law and the current and voltage values ​​of the capacitor under test at multiple sampling times, includes: Based on formula Calculate the theoretical equivalent resistance of the capacitor under test in the current state; Based on formula Calculate the equivalent capacitance of the capacitor under test in the current state; in, express t The current value flowing through the capacitor under test at time 0. express t The current value flowing through the capacitor under test at time 1. express t The current value flowing through the capacitor under test at time 2; express t The voltage value across the capacitor under test at time 0. express t The voltage value across the capacitor under test at time 1. express t The voltage value across the capacitor under test at time 2. ESR 0 represents the theoretical equivalent resistance of the capacitor under test in the current state. C This represents the equivalent capacitance of the capacitor under test in the current state.

3. The online monitoring method for capacitance parameters according to claim 1, characterized in that, The capacitor under test is the DC bus capacitor in the switching power supply; the switching power supply includes a rectifier module and an inverter module. The rectifier module is connected to the inverter module via a DC bus; The current values ​​of the capacitor under test are obtained at multiple sampling times based on a preset sampling frequency, including: Obtain the three-phase inductor current of the rectifier module and the three-phase inductor current of the inverter module; Obtain the three-phase switch status of the rectifier module and the three-phase switch status of the inverter module; Based on formula Determine the output current of the rectifier module and the input current of the inverter module; Subtract the input current from the output current to obtain the current value of the capacitor under test; in, , k =1 indicates a rectifier module. k =2 indicates the inverter module. This indicates the output current of the rectifier module. This represents the input current of the inverter module; Indicates the first k Each module a Phase switch status, Indicates the first k Each module b Phase switch status, Indicates the first k Each module c Phase switch status, Indicates the first k Each module a Phase inductor current, Indicates the first k Each module b Phase inductor current, Indicates the first k Each module c Phase inductance current.

4. The online monitoring method for capacitance parameters according to claim 3, characterized in that, The step of obtaining the three-phase inductor current of the rectifier module includes: The three-phase high-frequency inductor current and three-phase low-frequency inductor current of the rectifier module are obtained, and the high-frequency inductor current and low-frequency inductor current of the same phase are added together to obtain the inductor current of that phase of the rectifier module.

5. The online monitoring method for capacitance parameters according to claim 1, characterized in that, The capacitor under test is the AC output capacitor in the inverter module; the AC side of the inverter module is connected to the load. The current values ​​of the capacitor under test are obtained at multiple sampling times based on a preset sampling frequency, including: Obtain the three-phase output current and three-phase load current of the inverter module; Subtract the load current of the corresponding phase from the three-phase output current of the inverter module to obtain the current value of the AC output capacitor of the corresponding phase.

6. The online monitoring method for capacitance parameters according to claim 1, characterized in that, After obtaining the actual equivalent resistance of the capacitor under test in the current state, the method further includes: Calculate the Mahalanobis distance between the equivalent capacitance and the actual equivalent resistance in the current state; The overall health of the capacitor under test is determined based on the Mahalanobis distance.

7. An online monitoring device for capacitance parameters, characterized in that, include: The data acquisition module is used to acquire the current and voltage values ​​of the capacitor under test at multiple sampling times based on a preset sampling frequency; The capacitor theoretical parameter acquisition module is used to calculate the equivalent capacitance and theoretical equivalent resistance of the capacitor under test in the current state based on Kirchhoff's first law and the current and voltage values ​​of the capacitor under test at multiple sampling times. Equivalent resistance correction module, used for formula-based correction. The theoretical equivalent resistance is corrected to obtain the actual equivalent resistance of the capacitor under test in the current state; in, ESR This represents the actual equivalent resistance of the capacitor under test in the current state. ESR 0 represents the theoretical equivalent resistance of the capacitor under test in the current state. C This represents the equivalent capacitance of the capacitor under test in the current state. Fs This indicates the preset sampling frequency.

8. A terminal, characterized in that, It includes a processor and a memory, the memory being used to store a computer program, and the processor being used to call and run the computer program stored in the memory to perform the method as described in any one of claims 1 to 6.

9. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 6 above.

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