Display backplane, display backplane assembly, display device, detection device and method
Patent Information
- Application Number
- CN202210011103.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-05
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2042-01-05
AI Technical Summary
[0005]鉴于上述现有技术的不足,本申请的目的在于提供显示背板、显示背板组件、显示装置、检测装置及检测方法,旨在解决更换坏点的操作过于复杂的问题
[0050]本发明中,在显示背板上增设压电部件,使得相应的显示背板组件能够成为利用自身结构进行坏点检测的自测组件,可以在发光芯片的电极与显示背板的接触电极键合前或者在焊料未彻底凝固前,就进行坏点检测,无需像解除焊料就能更换坏点处的发光芯片,坏点更换的操作更简单。
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Figure CN116454107B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and more particularly to display backplanes, display backplane assemblies, display devices, testing devices, and testing methods. Background Technology
[0002] With the continuous advancement of semiconductor and integrated circuit technology, the size of electronic components such as diodes, transistors, sensors, and actuators is becoming increasingly smaller, even reaching the level of less than 100 micrometers. When manufacturing electronic devices using these microdevices, they need to be soldered to corresponding positions on circuit boards, ensuring that the electrodes of the microdevices correspond to the contact electrodes on the circuit board. Due to the low yield of microdevices and unstable soldering, defects may exist in the finished product.
[0003] In existing testing technologies, all microdevices need to be bonded to the corresponding contact electrodes on the circuit board before defect detection can be performed. If a defect is detected, the operation of replacing the defective device is very complicated because the microdevice has already been bonded to the corresponding contact electrodes on the circuit board.
[0004] Therefore, reducing the complexity of replacing defective pixels is an urgent problem to be solved. Summary of the Invention
[0005] In view of the shortcomings of the prior art, the purpose of this application is to provide a display back panel, a display back panel assembly, a display device, a testing device and a testing method, in order to solve the problem that the operation of replacing dead pixels is too complicated.
[0006] Therefore, this application provides a display back panel, comprising:
[0007] The circuit board is provided with a first contact electrode and a second contact electrode; and
[0008] A piezoelectric component is disposed on the circuit board. The piezoelectric component has a first pressure-bearing surface and a second pressure-bearing surface. The first pressure-bearing surface is in ohmic contact with the first contact electrode, and the second pressure-bearing surface is in ohmic contact with the second contact electrode. The first pressure-bearing surface faces away from the circuit board, and the second pressure-bearing surface faces the circuit board.
[0009] The piezoelectric component is used to generate charges of opposite polarity on the first and second pressure-bearing surfaces when subjected to pressure deformation.
[0010] Optionally, the piezoelectric component includes:
[0011] The piezoelectric main body structure has a first pressure-bearing surface and a second pressure-bearing surface;
[0012] A first conductive connector is electrically connected to the first contact electrode and the first pressure-bearing surface, respectively; and
[0013] The second conductive connector is electrically connected to the second contact electrode and the second pressure-bearing surface, respectively.
[0014] The piezoelectric main structure is disposed in the space between the first contact electrode and the second contact electrode.
[0015] Optionally, the piezoelectric body structure includes:
[0016] A piezoelectric material layer having a first pressure-bearing surface and a second pressure-bearing surface;
[0017] A first electrode layer covers the first pressure-bearing surface; and
[0018] The second electrode layer covers the second pressure-bearing surface.
[0019] Optionally, the first conductive connector is a bent component, and there is a gap between the first conductive connector and the second electrode layer, the gap being filled with insulating material.
[0020] Optionally, the first conductive connector is a first conductive sheet, and the first conductive connector is provided with a first through hole for the first contact electrode to pass through. The first contact electrode is welded to the first conductive connector by welding material.
[0021] The second conductive connector is a second conductive sheet. The second conductive connector has a second through hole through which the second contact electrode passes. The second contact electrode is welded to the second conductive connector by welding material.
[0022] Optionally, the first conductive connector is a first conductive sheet, which is disposed on the first electrode layer and covers the first electrode layer;
[0023] The second conductive connector is a second conductive sheet, which is disposed on the second electrode layer and covers the second electrode layer.
[0024] Optionally, the first conductive connector is a bent component, and the first conductive connector includes:
[0025] The first bent section is connected to the first contact electrode;
[0026] The second bent section is connected to the second contact electrode; and
[0027] The intermediate bend is located between the first bend and the second bend, and is situated in the space between the piezoelectric main body structure and the first contact electrode.
[0028] Optionally, each part of the second conductive connector is attached to the surface of the circuit board.
[0029] Based on the same inventive concept, the present invention also provides a display back panel assembly, comprising:
[0030] Display back panel, wherein the display back panel is any of the display back panels described above; and
[0031] A light-emitting chip is disposed on the display back panel. The light-emitting chip includes an epitaxial structure, a first electrode, and a second electrode. The first electrode is in contact with a first contact electrode, and the second electrode is in contact with the second contact electrode. The piezoelectric component is disposed between the circuit board and the epitaxial structure.
[0032] Optionally, the thickness of the piezoelectric component is equal to the spacing between the epitaxial structure and the circuit board.
[0033] Optionally, the epitaxial structure includes:
[0034] Type 1 semiconductor layer;
[0035] Second type semiconductor layer; and
[0036] A light-emitting layer is formed between the first type of semiconductor layer and the second type of semiconductor layer;
[0037] The first electrode is connected to the first type of semiconductor layer, and the second electrode is connected to the second type of semiconductor layer.
[0038] Based on the same inventive concept, the present invention also provides a display device, including a housing and a display back panel assembly disposed within the housing, wherein the display back panel assembly is any of the display back panel assemblies described above.
[0039] Based on the same inventive concept, the present invention also provides a defect detection device, comprising:
[0040] Self-testing component, wherein the self-testing component is any of the above-described display back panel components;
[0041] A transparent plate is used to apply pressure from the side of the epitaxial structure opposite to the circuit substrate towards the light-emitting chip, thereby deforming the piezoelectric component; and
[0042] An image acquisition device is located on the side of the transparent plate facing away from the circuit board. The image acquisition device is used to capture and acquire detection images, which are images of the transparent plate applying pressure to the light-emitting chip.
[0043] Based on the same inventive concept, the present invention also provides a method for detecting defective pixels, comprising:
[0044] A display back panel assembly is provided, wherein the display back panel assembly is any of the display back panel assemblies described above;
[0045] Provide a transparent panel;
[0046] An image acquisition device is provided, the image acquisition device being used to acquire detection images;
[0047] The transparent plate is used to apply pressure from the side of the epitaxial structure opposite to the circuit substrate toward the light-emitting chip, so that the piezoelectric component is pressed and the light-emitting chip in normal state is lit.
[0048] The image acquisition device is used to capture a detection image from the side of the transparent plate facing away from the circuit board.
[0049] Based on the detected image, it is determined whether each of the light-emitting chips emits light; a light-emitting chip that does not emit light is a dead pixel.
[0050] In this invention, a piezoelectric component is added to the display back panel, enabling the corresponding display back panel assembly to become a self-testing component that uses its own structure to detect defects. Defect detection can be performed before the electrodes of the light-emitting chip are bonded to the contact electrodes of the display back panel or before the solder has completely solidified. Unlike removing the solder, the light-emitting chip at the defective point can be replaced, making the defect replacement operation simpler. Attached Figure Description
[0051] Figure 1 This is an exemplary schematic diagram showing the back panel assembly in a top view.
[0052] Figure 2 This is a schematic diagram of an exemplary display back panel assembly partially cut open in the front view direction;
[0053] Figure 3 This is a schematic diagram of an exemplary display back panel;
[0054] Figure 4 for Figure 3 Schematic diagram of the structure of the medium piezoelectric material layer;
[0055] Figure 5 A schematic diagram of an exemplary structure of a single light-emitting chip and a display backplane assembly;
[0056] Figure 6 This is another exemplary structural schematic diagram of a single light-emitting chip and a display backplane assembly;
[0057] Figure 7 for Figure 6 Distribution diagram of the first conductive connector in the top view;
[0058] Figure 8This refers to the working mode of piezoelectric materials in mode d31.
[0059] Figure 9 This refers to the working mode of piezoelectric materials in d33 mode;
[0060] Figure 10 This is yet another exemplary structural schematic diagram of a single light-emitting chip and a display backplane assembly;
[0061] Figure 11 This is another exemplary structural schematic diagram of a single light-emitting chip and a display backplane assembly;
[0062] Figure 12 To show another exemplary schematic diagram of the back panel assembly in a top view;
[0063] Figure 13 This is an exemplary structural diagram of a defect detection device.
[0064] Explanation of reference numerals in the attached figures:
[0065] 100 - Display backplate; 110 - Circuit board; 120 - First contact electrode; 130 - Second contact electrode; 140 - Piezoelectric component; 140a - First pressure-bearing surface; 140b - Second pressure-bearing surface;
[0066] 111-Substrate; 112-Circuit layer; 113-Planarization layer; 1121-Buffer layer; 1122-Gate insulating layer; 1123-Interlayer insulating layer; 1124-Gate line contact; 1125-Active layer; 1126-Gate; 1127-Source; 1128-Drain
[0067] 141-Piezoelectric main structure; 1411-Piezoelectric material layer; 1412-First electrode layer; 1413-Second electrode layer;
[0068] 142-First conductive connector; 1421-First bent section; 1422-Intermediate bent section; 1423-Second bent section;
[0069] 143 - Second conductive connector;
[0070] 200 - Light-emitting chip; 210 - Epitaxial structure; 220 - First electrode; 230 - Second electrode;
[0071] 211 - First type semiconductor layer; 212 - Light-emitting layer; 213 - Second type semiconductor layer; 21 - First insulating layer 4;
[0072] 300-Transparent Plate;
[0073] 400 - Image acquisition device. Detailed Implementation
[0074] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.
[0075] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.
[0076] The problem with the existing solution is that if a dead pixel is detected in the electronic device, the operation of replacing the dead pixel is very complicated because the light-emitting chip and other micro-devices are already bonded to the corresponding contact electrodes on the circuit board.
[0077] Therefore, this application aims to provide a solution that can solve the above-mentioned technical problems, the details of which will be described in subsequent embodiments.
[0078] It should be noted that the defects referred to in this specification include both damage to the light-emitting chip itself and poor contact caused by the light-emitting chip. The light-emitting chip in the following embodiments is a light-emitting diode (LED), which can be a micro-LED with a size of less than 100 micrometers. See also... Figures 3 to 7 An embodiment of the present invention provides a display back panel 100, which includes a circuit board 110. A first contact electrode 120 and a second contact electrode 130 are disposed on the circuit board 110. In addition, the display back panel 100 further includes an additional piezoelectric component 140 disposed on the circuit board 110. The piezoelectric component 140 has a first pressure-bearing surface 140a and a second pressure-bearing surface 140b. The first pressure-bearing surface 140a is in ohmic contact with the first contact electrode 120, and the second pressure-bearing surface 140b is in ohmic contact with the second contact electrode 130. The first pressure-bearing surface 140a faces away from the circuit board 110, and the second pressure-bearing surface 140b faces the circuit board 110.
[0079] It should be noted that the "ohmic contact" described in this application includes both direct and indirect contact.
[0080] Accordingly, see also Figure 1-11An embodiment of the present invention also provides a display backplane assembly, including the display backplane 100 and a light-emitting chip 200. The light-emitting chip 200 is disposed on the display backplane 100. The light-emitting chip includes an epitaxial structure 210, a first electrode 220 and a second electrode 230. The first electrode 220 is in contact with a first contact electrode 120, and the second electrode 230 is in contact with a second contact electrode 130. The piezoelectric component 410 is disposed between the circuit board 110 and the epitaxial structure 210. At this time, the first pressure-bearing surface 140a faces the light-emitting chip 200, and the light-emitting chip 200 adopts a flip-chip structure.
[0081] It should be noted that the first electrode 220 and the first contact electrode 120 are in contact, and the second electrode 230 and the second contact electrode 130 are in contact. This can mean that the paired first contact electrode and the second contact electrode are in contact with the paired first electrode and the second electrode on the light-emitting chip respectively, but are not fixedly connected; it can also mean that the paired first contact electrode and the second contact electrode are welded to the paired first electrode and the second electrode on the light-emitting chip respectively.
[0082] Before assembling the display backplane assembly, each light-emitting chip 200 is transferred to the display backplane 100 via mass transfer, so that the electrodes on each light-emitting chip 200 make corresponding contact with the corresponding contact electrodes on the display backplane 100. After that, the characteristic that piezoelectric materials can generate opposite charges at both ends of the pressure when deformed by pressure can be used to detect defective pixels.
[0083] During testing, the light-emitting chip 200 is driven to press the piezoelectric component 140 in the direction of the circuit board 110. The piezoelectric component 140 is deformed by the pressure between the circuit board 110 and the epitaxial structure 210, and charges of opposite polarities are generated on the first pressure surface 140a and the second pressure surface 140b. That is, a positive charge is generated on one pressure surface and a negative charge is generated on the other pressure surface. At this time, whether the light-emitting chip 200 is lit can be used to determine whether it is a dead pixel. Specifically, if the first contact electrode 120 and the first electrode 220 are in normal contact, the second contact electrode 130 and the second electrode 230 are in normal contact, and the light-emitting chip 200 is a normal light-emitting chip (the light-emitting chip is not damaged); since the first pressure-bearing surface 140a is connected to the first electrode 220 through the first contact electrode 120, and the second pressure-bearing surface 140b is connected to the second electrode 230 through the second contact electrode 130, a momentary current will pass through the light-emitting chip 200, and it will be momentarily lit; conversely, whether there is poor contact between the electrode on the light-emitting chip 200 and the contact electrode of the display back panel 100, or the light-emitting chip itself is damaged, the light-emitting chip 200 will not be lit, and thus it can be determined that the unlit light-emitting chip is a dead pixel.
[0084] The display backplane assembly of this invention is a self-testing assembly. It can detect defective pixels using its own structure. In practical applications, before the electrodes of the light-emitting chip 200 are bonded to the electrodes on the display backplane 100, or before the solder has completely solidified, pressure is applied to the light-emitting chip 200 to compress the piezoelectric component 140. This allows the light-emitting chip 200 to perform a self-test by checking whether it is lit. The light-emitting chip 200 at the defective pixel can be replaced without first removing the solder, making the replacement operation simpler. Furthermore, some existing defective pixel detection devices perform detection before mass transfer is complete, acting as standalone devices. These devices can only detect whether the light-emitting chip 200 is damaged, but cannot detect poor contact after mass transfer. The display backplane assembly of this invention performs detection after mass transfer, enabling more comprehensive defect detection. Accordingly, the display backplane 100, as a component of this display backplane assembly, achieves its self-testing function by adding the piezoelectric component 140.
[0085] It should be noted that the epitaxial structure 210 in this invention, like conventional epitaxial structures, inherently possesses a first insulating layer 214, see [link to relevant documentation]. Figure 5 , Figure 6 In this invention, the first insulating layer 214 separates the piezoelectric component 140 from the conductive structure inside the epitaxial structure 210; the circuit board 110 in this invention also has a second insulating layer, which separates the piezoelectric component 140 from the conductive structure inside the circuit board 110, just like a conventional circuit board 110.
[0086] It should be noted that in this invention, the first electrode 220 and the first contact electrode 120 can be bonded by welding, and the second electrode 230 and the second contact electrode 130 can also be bonded by welding. The first electrode 220, the second electrode 230, the first contact electrode 120 and the second contact electrode 130 are all made of metallic conductive materials, such as aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum, titanium (Ti), tungsten (W) or copper (Cu).
[0087] It should also be noted that, based on the different stress directions of the piezoelectric material, piezoelectric materials are mainly classified into two types of operating modes: d31 mode and d33 mode. For example... Figure 9 As shown, the d31 mode is the operating mode in which the stress F or strain direction of the piezoelectric material is perpendicular to the direction of the voltage or electric field it generates. This operating mode utilizes the upper and lower surfaces of the piezoelectric layer as positive and negative electrodes to collect charge; for example... Figure 8As shown, the working mode in which the stress or strain direction of the piezoelectric material is consistent with the direction of the voltage or electric field it generates is the d33 mode. The piezoelectric material used in this scheme is the d33 mode, which enables the first pressure-bearing surface 140a and the second pressure-bearing surface 140b to act as pressure-bearing surfaces. When deformation occurs under pressure, opposite charges can be generated on the first pressure-bearing surface 140a and the second pressure-bearing surface 140b.
[0088] In some embodiments, see reference Figure 2 , Figure 5 , Figure 6 The epitaxial structure 210 includes a first type semiconductor layer 211, a second type semiconductor layer 213, and a light-emitting layer 212, wherein the light-emitting layer 212 is formed between the first type semiconductor layer 211 and the second type semiconductor layer 213; wherein the first electrode 220 is connected to the first type semiconductor layer 211, and the second electrode 230 is connected to the second type semiconductor layer 213.
[0089] In some embodiments, the first type semiconductor layer 211 is an N-type semiconductor layer, the second type semiconductor layer 213 is a P-type semiconductor layer, and the light-emitting layer 212 includes a quantum well layer. In other embodiments, the first type semiconductor layer 211 is a P-type semiconductor layer, the second type semiconductor layer 213 is an N-type semiconductor layer, and the light-emitting layer 212 includes a quantum well layer.
[0090] When the piezoelectric component 140 is subjected to pressure changes, electrons in the N-type semiconductor layer and holes in the P-type semiconductor layer collide and recombine violently in the light-emitting layer 212 to generate photons, which emit energy in the form of photons, enabling the light-emitting chip 200 in its normal state to be lit.
[0091] In some embodiments, the N-type semiconductor layer may be an N-type doped GaN layer, and the P-type semiconductor layer may be a P-type doped GaN layer.
[0092] In some embodiments, see reference Figure 2 , Figure 4 The thickness of the piezoelectric component 140 is equal to the distance D between the epitaxial structure 210 and the circuit board 110. This ensures that when the light-emitting chip 200 is transferred to the corresponding position on the display backplate 100, the epitaxial structure 210 and the piezoelectric component 140 are in contact, and the piezoelectric component 140 is also in contact with the circuit board 110. Thus, when pressure is applied to the light-emitting chip 200, the piezoelectric component 140 is also subjected to pressure, causing the piezoelectric material layer 1411 to deform. This helps ensure that the normally functioning light-emitting chip 200 is illuminated under pressure changes, improving detection reliability.
[0093] The display backplane will be described in detail below. The display backplanes of the following embodiments can all be applied to the display backplane assembly of this application.
[0094] In some embodiments, see reference Figures 3 to 5 The piezoelectric component 140 includes a piezoelectric main structure 141, a first conductive connector 142, and a second conductive connector 143. The first pressure-bearing surface 140a and the second pressure-bearing surface 140b are disposed on the piezoelectric main structure 141. The first conductive connector 142 makes ohmic contact with the first contact electrode 120 and the first pressure-bearing surface 140a, respectively. The second conductive connector 143 makes ohmic contact with the second contact electrode 130 and the second pressure-bearing surface 140b, respectively. The piezoelectric main structure 141 is disposed within the space between the first contact electrode 120 and the second contact electrode 130, which is equivalent to the piezoelectric main structure 141 being disposed within the space between the first electrode 220 and the second electrode 230. This method is beneficial for controlling the size of the light-emitting device, thus avoiding an increase in the size of the light-emitting chip 200 due to the addition of the piezoelectric component 140, and also facilitates more uniform force distribution on the surface of the piezoelectric component 140. In other embodiments, the arrangement position of the piezoelectric main structure 141 is different; see [reference needed]. Figure 6 , Figure 7 The area between the first contact electrode 120 and the second contact electrode 130 is the central region, and the piezoelectric main body structure 141 is located on the periphery of this central region, avoiding the first contact electrode 120 and the second contact electrode 130.
[0095] In some embodiments, see reference Figures 3 to 6 The piezoelectric main structure 141 includes a piezoelectric material layer 1411, a first electrode layer 1412, and a second electrode layer 1413. The first pressure-bearing surface 140a and the second pressure-bearing surface 140b are disposed on the piezoelectric material layer 1411. The first electrode layer 1412 covers the first pressure-bearing surface 140a, and the second electrode layer 1413 covers the second pressure-bearing surface 140b. The placement of the first electrode layer 1412 and the second electrode layer 1413 helps to make the surface of the piezoelectric main structure 141 flatter, which in turn helps to allow the first pressure-bearing surface 140a and the second pressure-bearing surface 140b to be subjected to pressure over a larger area and more uniformly. This facilitates the generation of sufficient charge on the first pressure-bearing surface 140a and the second pressure-bearing surface 140b, ensuring that the normally lit light-emitting chip 200 is illuminated, thus improving detection reliability.
[0096] In some embodiments, see Figure 3 , Figure 5 , Figure 6The first conductive connector 142 is a bent component, and there is a gap M between the first conductive connector 142 and the second electrode layer 1413. This gap M is filled with insulating material, which helps to prevent short circuits between the first electrode layer 1412 and the second electrode layer 1413 of the piezoelectric material layer 1411. For example, the insulating material can be insulating adhesive.
[0097] In some embodiments, see Figure 3 The first conductive connector 142 is a first conductive sheet, and the second conductive connector 143 is a second conductive sheet. Of course, in actual implementation, the first conductive connector 142 and the second conductive connector 143 can be conductive wires.
[0098] In some embodiments, see Figure 3 The first conductive connector 142 has a first through hole a through which the first contact electrode 120 passes, and the first contact electrode 120 is welded to the first conductive connector 142 integrally by solder. The second conductive connector 143 has a second through hole b through which the second contact electrode 130 passes, and the second contact electrode 130 is welded to the second conductive connector 143 integrally by solder. This structure of the conductive connectors does not damage the original structure of the display back panel and facilitates a more reliable connection between each conductive connector and its corresponding contact electrode, ensuring detection reliability.
[0099] In some embodiments, see reference Figure 2 , Figure 3 The first conductive connector 142 is a first conductive sheet, disposed on and covering the first electrode layer 1412; the second conductive connector 143 is a second conductive sheet, disposed on and covering the second electrode layer 1413. With this structure, when the piezoelectric component 140 is under pressure, the first conductive connector 142 can fully contact the epitaxial structure 210, and the second conductive connector 143 can fully contact the circuit board 110. This facilitates large-area and uniform pressure on the first pressure-bearing surface 140a and the second pressure-bearing surface 140b, thus ensuring reliable detection.
[0100] In some embodiments, see reference Figures 3 to 6The first conductive connector 142 is a bent component, which includes a first bent section 1421, an intermediate bent section 1422, and a second bent section 1423. The first bent section 1421 is connected to the first contact electrode 120; the second bent section 1423 is connected to the second contact electrode 130; the intermediate bent section 1422 is located between the first bent section 1421 and the second bent section 1423, and is located in the space between the piezoelectric main body structure 141 and the first contact electrode 220.
[0101] In some embodiments, see Figure 3 , Figure 5 , Figure 6 All portions of the second conductive connector 143 are attached to the surface of the circuit board 110. Of course, in actual implementation, the second conductive connector 143 may not be completely attached to the surface of the circuit board 110.
[0102] In some embodiments, see Figure 10 The circuit board 110 includes a substrate 111, a circuit layer 112 formed on the substrate 111, and a planarization layer 113 formed above the circuit layer 112; the first contact electrode 120 and the second contact electrode 130 are disposed on the surface of the planarization layer 113. The planarization layer 113 here is typically made of an insulating material, which can serve as the aforementioned second insulating layer, separating the piezoelectric component 140 and the circuit layer 112.
[0103] The substrate 111 may include a transparent glass material, such as silicon dioxide (SiO2). The substrate 111 may also include a transparent plastic material, such as polyethersulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene terephthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide, polycarbonate (PC), cellulose triacetate (TAC), or cellulose propionate (CAP), etc.
[0104] The circuit layer 112 includes driving circuits for driving the light-emitting chip 200, such as thin-film transistors (TFTs), gate lines, signal lines, etc.
[0105] The planarization layer 113 covers the circuit layer 112, eliminating step differences on the circuit layer 112 and making it planar. The planarization layer 113 may include organic materials such as polymethyl methacrylate (PMMA) or polystyrene (PS), polymer derivatives with phenolic groups, propylene polymers, imide polymers, aryl ether polymers, amide polymers, fluoropolymers, p-xylyl polymers, vinyl alcohol polymers, or any combination thereof.
[0106] The planarization layer 113 has vias, and the first contact electrode 120 and the second contact electrode 130 can be connected to the signal lines and gate lines (which can send on / off signals to the thin-film transistor TFT) in the circuit layer 112 through the filling material in the vias. The materials of the first contact electrode 120, the second contact electrode 130, the filling material in the vias, the signal lines, and the gate lines can be any one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum, titanium (Ti), tungsten (W), or copper (Cu).
[0107] In some embodiments, see reference Figure 10 , Figure 11 The circuit layer 112 may specifically include: a buffer layer 1121, a gate insulating layer 1122, an interlayer insulating layer 1123, a TFT, and a gate line contact 1124, etc.
[0108] The buffer layer 1121 is disposed above the substrate 111, providing a substantially flat surface above the substrate 111 to reduce or prevent foreign matter or moisture from penetrating the substrate. The buffer layer 1121 may include inorganic materials such as silicon oxide (SiO2), silicon nitride (SiNx), silicon oxynitride (SiON), aluminum oxide (Al2O3), aluminum nitride (AlN), titanium oxide (TiO2), or titanium nitride (TiN). The buffer layer 1121 may also include organic materials such as polyimide, polyester, or propylene.
[0109] The thin-film transistor (TFT) may include an active layer 1125, a gate 1126, a source 1127, and a drain 1128. Figure 11 In this design, the thin-film transistor (TFT) is a top-gate thin-film transistor (TFT can also be a bottom-gate thin-film transistor). The active layer 1125 may include semiconductor materials, such as amorphous silicon or polycrystalline silicon. The active layer 1125 may also include other materials, such as organic semiconductor materials or oxide semiconductor materials.
[0110] The materials used for the gate 1126 / source 1127 / drain 1128 may include low-resistance metal materials, such as: aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), or copper (Cu), etc.
[0111] The gate insulating layer 1122 is used to insulate the gate 1126 and the active layer 1125. The material used may include inorganic materials, such as SiO2, SiNx, SiON, Al2O3, TiO2, tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO2).
[0112] The interlayer insulating layer 1123 is used between the source electrode 1127 and the gate electrode 1126, and between the drain electrode 1128 and the gate electrode 1126. The material used for the interlayer insulating layer 1123 may include inorganic materials, such as: SiO2, SiNx, SiON, Al2O3, TiO2, tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2), etc.
[0113] The gate line contact 1124 can be formed on one of a plurality of insulating films disposed below the planarization layer 113. It can be formed on the interlayer insulating layer 1123 / gate insulating layer 1122.
[0114] Based on the same inventive concept, the present invention also provides a display device, including a housing (not shown) and a display back panel assembly disposed within the housing, wherein the display back panel assembly is any of the display back panel assemblies described above.
[0115] Based on the same inventive concept, and referring to [see also...] Figure 12 The present invention also provides a defect detection device, including a self-testing component, a transparent plate 300, and an image acquisition device 400; the self-testing component is any of the display backplane components described above; the transparent plate 300 is used to apply pressure from the side of the epitaxial structure 210 facing away from the circuit substrate 110 toward the direction of the light-emitting chip 200, so as to deform the piezoelectric component 140; the image acquisition device 400 is located on the side of the transparent plate 300 facing away from the circuit substrate 110, and the image acquisition device 400 is used to capture and acquire a detection image, the detection image being the image when the transparent plate 300 applies pressure to the light-emitting device.
[0116] The defect detection device adds a transparent plate 300 to the above-mentioned display back panel assembly. The transparent plate 300 can apply pressure to each of the 200 light-emitting chips in batches to achieve rapid detection.
[0117] For example, see Figure 12 The display backplane assembly includes a display backplane 100 and light-emitting chips 200 disposed on the display backplane 100. The display backplane assembly has an array of several pixel areas S, each pixel area S corresponding to red, green, and blue light-emitting chips. Ignoring the colors of the various light-emitting chips, this is equivalent to several light-emitting chips 200 arranged in a row on the display backplane 100 (see [reference]). Figure 1After the mass transfer of 200 light-emitting chips is complete, see [link / details]. Figure 12 By pressing down on each light-emitting chip 200 using the transparent plate 300, pressure can be applied to the light-emitting chips 200 on the display back panel 100 in batches.
[0118] Based on the same inventive concept, the present invention also provides a method for detecting defective pixels, comprising:
[0119] S101. A display back panel assembly is provided, wherein the display back panel assembly is any of the above-described display back panel assemblies;
[0120] S103, Provide a transparent plate 300;
[0121] S105. Provide an image acquisition device 400, the image acquisition device 400 being used to acquire detection images;
[0122] S300: Using the transparent plate 300, pressure is applied from the side of the epitaxial structure opposite to the circuit board 110 toward the direction of the light-emitting chip 200, so that the piezoelectric component 140 is pressed and the light-emitting chip 200 in normal state is lit.
[0123] S500: The detection image is captured by the image acquisition device 400 from the side of the transparent plate 300 facing away from the circuit board 110.
[0124] S700: Determine whether each of the light-emitting chips emits light based on the detected image; light-emitting chips that do not emit light are considered defective. For example, Figure 11 In the diagram, a crossed-out light-emitting device corresponds to a defective pixel.
[0125] In actual implementation, the image acquisition device 400 can be either a camera or a webcam.
[0126] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.
Claims
1. A display back panel, characterized in that, include: The circuit board is provided with a first contact electrode and a second contact electrode; as well as A piezoelectric component is disposed on the circuit board. The piezoelectric component has a first pressure-bearing surface and a second pressure-bearing surface. The first pressure-bearing surface is in ohmic contact with the first contact electrode, and the second pressure-bearing surface is in ohmic contact with the second contact electrode. The first pressure-bearing surface faces away from the circuit board, and the second pressure-bearing surface faces the circuit board. The piezoelectric component includes a piezoelectric main structure, which has a first pressure-bearing surface and a second pressure-bearing surface, and is disposed in the space between the first contact electrode and the second contact electrode. The first contact electrode is used to contact the first electrode of the light-emitting chip, the second contact electrode is used to contact the second electrode of the light-emitting chip, and the piezoelectric component is used to generate charges of opposite polarities on the first pressure-bearing surface and the second pressure-bearing surface when it is squeezed and deformed by the epitaxial structure of the light-emitting chip.
2. The display back panel according to claim 1, characterized in that: The piezoelectric component also includes: A first conductive connector is electrically connected to the first contact electrode and the first pressure-bearing surface, respectively; and The second conductive connector is electrically connected to the second contact electrode and the second pressure-bearing surface, respectively.
3. The display back panel according to claim 2, characterized in that, The piezoelectric main body structure includes: A piezoelectric material layer having a first pressure-bearing surface and a second pressure-bearing surface; A first electrode layer covers the first pressure-bearing surface; and The second electrode layer covers the second pressure-bearing surface.
4. The display back panel according to claim 3, characterized in that: The first conductive connector is a bent component, and there is a gap between the first conductive connector and the second electrode layer, which is filled with insulating material.
5. The display back panel according to claim 3, characterized in that: The first conductive connector is a first conductive sheet, which is disposed on the first electrode layer and covers the first electrode layer; The second conductive connector is a second conductive sheet, which is disposed on the second electrode layer and covers the second electrode layer.
6. The display back panel according to claim 2, characterized in that: The first conductive connector is a first conductive sheet, and the first conductive connector is provided with a first through hole for the first contact electrode to pass through. The first contact electrode is welded to the first conductive connector by welding material. The second conductive connector is a second conductive sheet. The second conductive connector has a second through hole through which the second contact electrode passes. The second contact electrode is welded to the second conductive connector by welding material.
7. The display back panel according to claim 2, characterized in that: The first conductive connector is a bent component, and the first conductive connector includes: The first bent section is connected to the first contact electrode; The second bent section is connected to the second contact electrode; and The intermediate bend is located between the first bend and the second bend, and is situated in the space between the piezoelectric main body structure and the first contact electrode.
8. The display back panel according to claim 2, characterized in that: Each part of the second conductive connector is attached to the surface of the circuit board.
9. A display back panel assembly, characterized in that, include: The display back panel is the display back panel according to any one of claims 1-8; as well as A light-emitting chip is disposed on the display back panel, and the light-emitting chip includes an epitaxial structure, a first electrode, and a second electrode; The first electrode is in contact with the first contact electrode, the second electrode is in contact with the second contact electrode, and the piezoelectric component is disposed between the circuit board and the light-emitting chip.
10. The display backplane assembly according to claim 9, characterized in that: The thickness of the piezoelectric component is equal to the distance between the epitaxial structure and the circuit board.
11. A detection device, characterized in that, include: The self-testing component is the display back panel assembly as described in any one of claims 9-10; A transparent plate is used to apply pressure from the side of the epitaxial structure opposite to the circuit board towards the light-emitting chip to deform the piezoelectric component. as well as An image acquisition device is located on the side of the transparent plate facing away from the circuit board. The image acquisition device is used to capture and acquire detection images, which are images of the transparent plate applying pressure to the light-emitting chip.
12. A display device, characterized in that: The device includes a housing and a display back panel assembly disposed within the housing, wherein the display back panel assembly is the display back panel assembly as described in any one of claims 9-10.
13. A detection method, characterized in that, include: A display back panel assembly is provided, wherein the display back panel assembly is the display back panel assembly according to any one of claims 9-10; Provide a transparent panel; An image acquisition device is provided, the image acquisition device being used to acquire detection images; The transparent plate is used to apply pressure from the side of the epitaxial structure opposite to the circuit substrate toward the light-emitting chip, so that the piezoelectric component is pressed and the light-emitting chip in normal state is lit. The image acquisition device is used to capture a detection image from the side of the transparent plate facing away from the circuit board. Based on the detected image, it is determined whether each of the light-emitting chips emits light; a light-emitting chip that does not emit light is a dead pixel.
Citation Information
Patent Citations
Display panel, preparation method thereof and display device
CN113013209A