Amplifier system and power converter

Abstract

The present application provides an amplifier system, including an audio amplifier and a power converter. The audio amplifier is powered by at least a first power voltage and a second power voltage, and the audio amplifier is configured to receive an audio signal to generate an output signal. The power converter includes only one inductor and is configured to generate the first power voltage and the second power voltage according to an input voltage. The present application can reduce the form factor and manufacturing cost of the power converter.

Description

Technical Field

[0001] This disclosure generally relates to amplification (e.g., audio amplification) techniques, and more specifically, to an amplifier system and a power converter. Background Technology

[0002] In traditional audio amplifiers, two or more power supply voltages are required to process digital input audio signals to produce analog output audio signals. To generate two or more power supply voltages, the power converter is typically designed with two or more inductors, which increases the form factor and manufacturing cost. Summary of the Invention

[0003] Therefore, the object of the present invention is to provide an amplifier system and related power converter, wherein the power converter can use only one inductor to generate two or three power supply voltages for the amplifier, thus having a smaller form factor and lower manufacturing cost.

[0004] According to one embodiment of the present invention, an amplifier system including an amplifier and a power converter is disclosed. The amplifier is powered by at least a first power supply voltage and a second power supply voltage, and is configured to receive an input signal (e.g., an audio signal) to generate an output signal. The power converter includes only one inductor and is configured to generate the first power supply voltage and the second power supply voltage according to the input voltage.

[0005] In some embodiments, the first power supply voltage and the second power supply voltage are power supply voltages that vary according to the input signal or a derived signal of the input signal.

[0006] In some embodiments, the power converter includes: an inductor, a first terminal of which is selectively coupled to the input voltage or the first power supply voltage, and a second terminal of which is selectively coupled to the second power supply voltage.

[0007] In some embodiments, during a first time period, the input voltage is input to the inductor, and the inductor current increases; during a second time period following the first time period, the input voltage is disconnected from the inductor, and the second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases; and during a third time period following the second time period, the input voltage, the first power supply voltage, and the second power supply voltage are all disconnected from the inductor.

[0008] In some embodiments, the power converter further includes: a first switch for selectively connecting the input voltage to a first terminal of the inductor; a second switch for selectively connecting the second terminal of the inductor to ground; a third switch for selectively connecting the second terminal of the inductor to a second power supply voltage; a fourth switch for selectively connecting the first terminal of the inductor to the first power supply voltage; and a fifth switch for selectively connecting the first terminal of the inductor to ground.

[0009] In some embodiments, during a first time period, the first and second switches are on, the third, fourth, and fifth switches are off, the input voltage is input to the inductor, and the inductor current increases; during a second time period following the first time period, the third and fourth switches are on, the first, second, and fifth switches are off, the second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases; and during a third time period following the second time period, the second and fifth switches are on, and the first, third, and fourth switches are off.

[0010] In some embodiments, the second switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the width*length of the channel of the large switch is greater than the width*length of the channel of the small switch, the large switch is configured to selectively connect the second terminal of the inductor to the ground voltage, and the small switch is configured to selectively connect the second terminal of the inductor to the ground voltage; and, in the third period following the second period, only the small switch of the second switch is turned on while the large switch is turned off.

[0011] In some embodiments, the fifth switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the width*length of the channel of the large switch is greater than the width*length of the channel of the small switch, the large switch is configured to selectively connect the first terminal of the inductor to the ground voltage, and the small switch is configured to selectively connect the first terminal of the inductor to the ground voltage; and, in the third time period following the second time period, only the small switch of the fifth switch is turned on while the large switch is turned off.

[0012] In some embodiments, the amplifier is powered by the first power supply voltage, the second power supply voltage, and the negative power supply voltage, and the power converter is configured to generate the first power supply voltage, the second power supply voltage, and the negative power supply voltage according to the input voltage, wherein the first power supply voltage and the second power supply voltage are power supply voltages that vary according to the input signal or a derived signal of the input signal, and the negative power supply voltage is expected to have a fixed voltage level.

[0013] In some embodiments, the power converter includes: an inductor having a first terminal and a second terminal;

[0014] A first switch is used to selectively connect the input voltage to the first terminal of the inductor; a second switch is used to selectively connect the second terminal of the inductor to ground; a third switch is used to selectively connect the first terminal of the inductor to the first power supply voltage; a fourth switch is used to selectively connect the second terminal of the inductor to the second power supply voltage; a fifth switch is used to selectively connect the first terminal of the inductor to the negative power supply voltage; and a sixth switch is used to selectively connect the first terminal of the inductor to ground.

[0015] In some embodiments, during a first time period, the first and second switches are on, the third, fourth, fifth, and sixth switches are off, the input voltage is input to the inductor, and the inductor current increases; during a second time period following the first time period, the third and fourth switches are on, the first, second, fifth, and sixth switches are off, the second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases; during a third time period following the second time period, the second and sixth switches are on, and the first, third, fourth, and fifth switches are off.

[0016] In some embodiments, during a first time period, the first and second switches are on, the third, fourth, fifth, and sixth switches are off, the input voltage is input to the inductor, and the inductor current increases; during a second time period following the first time period, the third and fifth switches are on, the first, second, fourth, and sixth switches are off, the third power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases; during a third time period following the second time period, the second and sixth switches are on, and the first, third, fourth, and fifth switches are off.

[0017] In some embodiments, the on-resistance of the large switch is less than that of the small switch.

[0018] In some embodiments, the amplifier is an audio amplifier, and the input signal is an audio signal input to the audio amplifier.

[0019] According to an embodiment of the present invention, a power converter is also disclosed. The power converter is configured to receive an input voltage to generate a first power supply voltage, a second power supply voltage, and a third power supply voltage. The power converter includes an inductor, a first switch, a second switch, a third switch, a fourth switch, a fifth switch, and a sixth switch. The inductor has a first terminal and a second terminal. The first switch is configured to selectively connect the input voltage to the first terminal of the inductor. The second switch is configured to selectively connect the second terminal of the inductor to ground. The third switch is configured to selectively connect the second terminal of the inductor to the first power supply voltage. The fourth switch is configured to selectively connect the first terminal of the inductor to the second power supply voltage; the fifth switch is configured to selectively connect the first terminal of the inductor to the third power supply voltage; and the sixth switch is configured to selectively connect the first terminal of the inductor to ground.

[0020] In some embodiments, during a first time period, the first and second switches are on, the third, fourth, fifth, and sixth switches are off, the input voltage is input to the inductor, and the inductor current increases; during a second time period following the first time period, the third and fourth switches are on, the first, second, fifth, and sixth switches are off, the second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases; during a third time period following the second time period, the second and sixth switches are on, and the first, third, fourth, and fifth switches are off.

[0021] In some embodiments, the sixth switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the width*length of the channel of the large switch is greater than the width*length of the channel of the small switch. The large switch is configured to selectively connect the first terminal of the inductor to the ground voltage, and the small switch is configured to selectively connect the first terminal of the inductor to the ground voltage. In a third time period following the second time period, only the small switch of the sixth switch is turned on, while the large switch is turned off.

[0022] In some embodiments, the second switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the width*length of the channel of the large switch is greater than the width*length of the channel of the small switch. The large switch is configured to selectively connect the second terminal of the inductor to the ground voltage, and the small switch is configured to selectively connect the second terminal of the inductor to the ground voltage. In a third time period following the second time period, only the small switch is turned on while the large switch is turned off.

[0023] In some embodiments, the first power supply voltage, the second power supply voltage, and the third power supply voltage are used to power the amplifier, the third power supply voltage being a negative power supply voltage, wherein the first power supply voltage and the second power supply voltage are power supply voltages that vary according to the input signal of the amplifier or a derived signal of the input signal, and the negative power supply voltage is expected to have a fixed voltage level.

[0024] In some embodiments, the on-resistance of the large switch is less than that of the small switch.

[0025] These and other objects of the invention will be readily understood by those skilled in the art upon reading the following detailed description of the preferred embodiments illustrated in the accompanying drawings. A detailed description will be given in the following embodiments with reference to the accompanying drawings. Attached Figure Description

[0026] A more complete understanding of the invention can be obtained by reading the following detailed description and referring to the examples given in the accompanying drawings, wherein:

[0027] Figure 1 A schematic diagram of an amplifier system is shown according to an embodiment of the present invention.

[0028] Figure 2 The power supply voltages of the audio amplifiers are shown for Class G and Class H amplifiers.

[0029] Figure 3 A schematic diagram of a power converter is shown according to an embodiment of the present invention.

[0030] Figure 4 A control method for a power converter is shown according to an embodiment of the present invention.

[0031] Figure 5 An embodiment of the present invention illustrates the inductor current in a power converter.

[0032] Figure 6 A control method for a power converter is shown according to an embodiment of the present invention.

[0033] Figure 7 A schematic diagram of another power converter is shown according to an embodiment of the present invention.

[0034] In the following detailed description, numerous specific details are set forth for illustrative purposes so that those skilled in the art can more thoroughly understand the embodiments of the invention. However, it will be apparent that one or more embodiments may be practiced without these specific details, and different embodiments may be combined as needed, and should not be limited to the embodiments illustrated in the accompanying drawings. Detailed Implementation

[0035] The following description illustrates preferred embodiments of the present invention and is intended only to exemplify the technical features of the invention, not to limit the scope of the invention. Throughout this specification and claims, certain terms are used to refer to specific elements. Those skilled in the art should understand that manufacturers may use different names for the same element. Therefore, this specification and claims do not distinguish elements by differences in name, but rather by differences in function. The terms "element," "system," and "device" used in this invention can refer to computer-related entities, where the computer can be hardware, software, or a combination of hardware and software. The terms "comprising" and "including" as used in the following description and claims are open-ended terms and should be interpreted as "comprising, but not limited to...". Furthermore, the term "coupled" refers to an indirect or direct electrical connection. Therefore, if a device is described as coupled to another device, it means that the device can be directly electrically connected to the other device, or indirectly electrically connected to the other device through other devices or connection means.

[0036] Unless otherwise indicated, the corresponding numbers and symbols in the various figures generally refer to the corresponding parts. The figures are drawn to clearly illustrate the relevant parts of the embodiments and are not necessarily drawn to scale.

[0037] The terms "basically" or "roughly" as used in this document mean that, within an acceptable range, a person skilled in the art can solve the technical problem to be solved and basically achieve the desired technical effect. For example, "roughly equal to" means a method that a person skilled in the art can accept with a certain margin of error from "exactly equal to" without affecting the correctness of the result.

[0038] Figure 1 This is a schematic diagram of an amplifier system 100 according to an embodiment of the present invention. Figure 1 The illustrated embodiment uses an audio amplifier system 100 as an example for explanation. However, the embodiments of the present invention are not limited to audio systems. Any amplifier system that requires two or three power supply voltages can employ the technology provided by the embodiments of the present invention. Therefore, the present invention should not be limited to audio applications / systems. Thus, in some variant embodiments, Figure 1 The descriptions of the audio signal and audio amplifier 110 shown can be replaced with descriptions of the input signal and amplifier 110 accordingly. For example... Figure 1As shown, the amplifier system 100 includes an audio amplifier 110 and a power converter 120. The audio amplifier 110 includes a low dropout regulator (LDO) 112, a digital-to-analog converter (DAC) 114, a regulator 116, and a power amplifier 118. LDO 112 and regulator 116 are configured to provide a supply voltage (also described as "power supply voltage") to DAC 114 so that DAC 114 can perform a digital-to-analog conversion on the audio signal to generate an analog signal. Power amplifier 118 amplifies this analog signal and generates an output signal Vout to drive a speaker (resistor RL is considered as the load or equivalent resistance of the speaker). That is, the analog signal generated by DAC 114 and the output signal Vout generated by power amplifier 118 (e.g., an analog output signal) are related to the input audio signal (e.g., a digital audio signal). Understandably, the analog signal generated by DAC 114 and the output signal Vout generated by power amplifier 118 can be considered as derivative signals of the input audio signal. The desired levels of the supply voltages PVDD and PVSS are related to the input signal of amplifier 110 and / or derivative signals of the input signal (e.g., in...). Figure 1 In the illustrated embodiment, it can be the input audio signal, the intermediate generated analog signal, and the output signal Vout (understandably, all three signals are related to the signal processed by amplifier 110). In this embodiment, the amplifier system 100 is powered by four different supply voltages (e.g., ...). Figure 1 The voltages VI, VN, PVDD, and PVSS shown are supplied, wherein the input voltage VI is provided to LDO 112, the negative supply voltage VN is provided to regulator 116, and the supply voltages PVDD and PVSS are provided to power amplifier 118. Furthermore, power converter 120 is configured to receive the input voltage VI to generate the other supply voltages PVDD, PVSS, and VN.

[0039] In one embodiment, the negative supply voltage VN has a fixed voltage level (also described as a "voltage level" or "level"), and the supply voltages PVDD and PVSS are signal-dependent supply voltages, for example, PVDD and PVSS change according to an audio signal. That is, in embodiments of the invention, the supply voltages PVDD and PVSS are variable supply voltages based on the input signal of amplifier 110 or a derived signal of the input signal. Specifically, in an example embodiment, PVDD is a variable positive supply voltage, PVSS is a variable negative supply voltage, and VN is expected to be a fixed negative supply voltage. For example, refer to... Figure 2 ,exist Figure 2 In the example, power amplifier 118 is a Class-G or Class-H amplifier (but the invention is not limited to this example), which supports being powered by multiple power rails with different voltage levels, and the power supply voltage PVDD / PVSS level of at least one power rail is controlled based on information from the audio signal. For example, in some embodiments, the power supply voltage VN is determined to have a fixed desired voltage level, and the desired levels of the power supply voltages PVDD and PVSS are determined based on either the input signal of amplifier 110 (e.g., the input audio signal) or a derived signal of the input signal (e.g., an intermediate signal generated from the input signal, or the output signal Vout generated by amplifier 110). For ease of understanding and illustration, Figure 2 The example below uses the output signal Vout (i.e., a derivative signal of the input signal of amplifier 110) as an example for illustration. Figure 2 As shown, the desired voltage levels of the power supply voltages PVDD and PVSS change according to the signal Vout. For example, taking a Class G amplifier, the power supply voltages PVDD and PVSS can each have two desired voltage levels (also described as "voltage levels"). More specifically, the absolute values ​​of the positive power supply voltage PVDD and the negative power supply voltage PVSS are equal, but the invention is not limited thereto. Furthermore, in Figure 2 In the example curve of the Class G amplifier, when the absolute value of the signal Vout is within a preset value, PVDD is expected to have a first voltage level; when the absolute value of the signal Vout is greater than the preset value, PVDD is expected to have a second voltage level. For example, in... Figure 2 In the example curve of the Class H amplifier, when the absolute value of the signal Vout is within a preset value, PVDD is expected to be at a first voltage level; when the absolute value of the signal Vout is greater than the preset value, the voltage level of PVDD is expected to track the waveform of the signal Vout (e.g., slightly greater than the voltage value of the signal Vout). Figure 2 It can be seen that the desired levels of the power supply voltages PVDD and PVSS determined based on the signals processed by amplifier 110 (e.g., the input signal or a derivative signal of the input signal) are different. It should be noted that this invention does not impose any restrictions on how the desired levels of the power supply voltages PVDD, PVSS, and VN are specifically set, but rather focuses on how to control the power supply voltages PVDD, PVSS, and VN to maintain them at their respective desired levels.

[0040] Figure 3 This is a schematic diagram of a power converter 120 according to an embodiment of the present invention. Figure 3 As shown, the power converter 120 includes an input capacitor C1, an inductor L, three output capacitors C2-C4, and multiple switches SW1-SW6. Input capacitor C1 is coupled between node N1 and ground voltage; output capacitor C2 is coupled between node N4 and ground voltage; output capacitor C3 is coupled between node N5 and ground voltage; and output capacitor C4 is coupled between node N6 and ground voltage. Switch SW1 is coupled between node N1 and node N2, and is configured to selectively connect the input voltage (i.e., the power supply voltage VI) to a first terminal of inductor L. Switch SW6 is coupled between node N2 and ground voltage, and is configured to selectively connect the first terminal of inductor L to ground voltage. Switch SW3 is coupled between node N3 and node N4, and is configured to selectively connect the second terminal of inductor L to node N4 to adjust the voltage level of the power supply voltage PVDD. Switch SW2 is coupled between node N3 and ground, and is configured to selectively connect the second terminal of inductor L to ground. Switch SW4 is coupled between node N2 and node N5, and is configured to selectively connect the first terminal of inductor L to node N5 to adjust the voltage level of the power supply voltage PVSS. Switch SW5 is coupled between node N2 and node N6, and is configured to selectively connect the first terminal of inductor L to node N6 to stabilize the voltage level of the negative power supply voltage VN.

[0041] exist Figure 3In the power converter 120 shown, since only one inductor L is used to generate the power supply voltages PVDD, PVSS, and the negative power supply voltage VN, the size and manufacturing cost of the power converter 120 can be reduced. Furthermore, the control of switches SW1-SW6 is based on the desired levels of the power supply voltages PVDD, PVSS, and VN, as well as their actual voltage levels. By controlling the current of inductor L through switches SW1-SW6 to generate power supply voltages PVDD, PVSS, and VN with appropriate voltage levels (ideally the same as the desired voltage levels), the power converter 120 will have higher efficiency. Details are described below.

[0042] For example, when Figure 1 When the load RL shown is a full-bridge load, there is a current path through the load RL between the supply voltages PVDD and PVSS. Therefore, the level of the positive supply voltage PVDD will drop, and the level of the negative supply voltage PVSS will rise. Additionally, there is a current path between the negative supply voltage VN and ground through the regulator and the DAC, causing the voltage level of the negative supply voltage VN to rise. In other words, over time, the supply voltages PVDD, PVSS, and VN will gradually deviate from the desired voltage levels. To achieve more efficient desired voltage levels for the supply voltages PVDD and PVSS, and to regulate the negative supply voltage VN to its desired level, [further steps are needed]. Figure 4 A control method for switches SW1-SW6 is illustrated according to an embodiment of the present invention. (See also:) Figure 4 and Figure 5 For example, in one exemplary embodiment, when at least one of the power supply voltages PVDD, PVSS, and VN is below its desired level (e.g., when the power supply voltage PVDD is below the desired level), the power converter 120 enters a first period of control (e.g., the duration of the first period can be set by a timer). During the first period, switches SW1 and SW2 are enabled (also described as "on" or "off"), while switches SW3-SW6 are disabled (also described as "off" or "closed"). At this time, current flows from node N1 through switch SW1, node N2, inductor L, node N3, and switch SW2 to ground voltage, and the inductor current I... LIncrease (i.e., rise). After the first period, when the positive supply voltage PVDD is lower than the desired level of PVDD and the negative supply voltage PVSS is higher than the desired level of PVSS, the control enters the second period. In the second period following the first period, switches SW4 and SW3 are enabled, and switches SW1, SW2, SW5, and SW6 are disabled. At this time, current flows from node N5 through switch SW4, node N2, inductor L, node N3, and switch SW3 to node N4, and the inductor current I... L The current decreases (i.e., drops). During the second time period, since the positive power supply voltage PVDD is coupled to the negative power supply voltage PVSS through inductor L, the inductor current I... L The current will decrease due to the voltage difference across inductor L. For example, the slope of the inductor current decrease is equal to...

[0043] refer to Figure 5 In the first and second time periods, the conduction power loss of the switch can be expressed by the following formula:

[0044]

[0045] Among them, “P” cond "For conduction power loss, "I pk "I is the inductor current" L The peak value, "T" ON "Pointer to inductor current I" L The time of rise, "T" OFF "Pointer to inductor current I" L The time of descent (drop), "T" SW "R" refers to the switching period, for example, the sum of the times represented by the first, second, and third time periods. on " is the on-resistance of each switch (assuming the on-resistance of each switch is the same). Since the slope of the inductor current drop in this embodiment is greater than that of the conventional control method (e.g., in which only switches SW6 and SW3 are turned on in the second period to raise the power supply voltage PVDD level, or in which only switches SW4 and SW2 are turned on in the second period to lower the power supply voltage PVSS level), the parameter "T" in formula (1) is OFF The value of " will be smaller than that of traditional control methods, thereby resulting in lower conduction power loss of the switches in the power converter 120.

[0046] Furthermore, during the second time period, the power supply voltage PVDD increases and the power supply voltage PVSS decreases, thus improving the efficiency of the power converter 120.

[0047] When the inductor current I L When the voltage drops to zero, power converter 120 switches from the second period to the third period. In the third period, following the second period, switches SW6 and SW2 are enabled, while switches SW1 and SW3-SW5 are disabled. At this time, the terminals of inductor L are connected to ground, causing the inductor current I to... L The voltage remains zero. After the third period, the desired and actual voltage levels of the power supply voltages PVDD, PVSS, and the negative power supply voltage VN can be used to control switches SW1–SW6. For example, the power converter 120 can again perform the operations corresponding to the first to third periods described above. It is understood that, in another variant embodiment, the power converter 120 may also enter the state as follows when the positive power supply voltage PVDD is lower than the desired level of PVDD and the negative power supply voltage PVSS is higher than the desired level of PVSS. Figure 4 The control of the first, second, and third time periods is shown.

[0048] In another embodiment, when the level of the power supply voltage PVDD is lower than the desired level of PVDD and the negative power supply voltage VN is higher than the desired level of VN, Figure 6 A control method for switches SW1-SW6 is shown according to an embodiment of the present invention. Please refer to... Figure 6 When at least one of the power supply voltages PVDD, PVSS, and VN falls below its desired level (e.g., when the power supply voltage PVDD falls below the desired level), the power converter 120 enters a first period of control (e.g., the duration of the first period can be set by a timer). During the first period, switches SW1 and SW2 are enabled / turned on, while switches SW3 to SW6 are disabled / opened. At this time, current flows from node N1 through switch SW1, node N2, inductor L, node N3, and switch SW2 to ground voltage, and the inductor current I... L Increase. After the first period, when the power supply voltage PVDD is lower than the desired level of PVDD and the negative power supply voltage VN is higher than the desired level of VN, the second period of control begins. In the second period following the first period, switches SW5 and SW3 are enabled / turned on, while switches SW1, SW2, SW4, and SW6 are disabled / opened. At this time, current flows from node N6 through switch SW5, node N2, inductor L, node N3, and switch SW3 to node N4, and the inductor current I... L The current decreases. During the second time period, since the positive power supply voltage PVDD is coupled to the negative power supply voltage VN through inductor L, the inductor current I... LThe current will decrease due to the voltage difference across inductor L. Referring to equation (1) above, since the slope of the inductor current decrease is relatively large in this embodiment, the parameter "T" in equation (1) will decrease. OFF "It will have a smaller value, thus making the switch in the power converter 120 have lower conduction power loss."

[0049] When the inductor current I L When the voltage drops to zero, the power converter 120 switches from the second period to the third period. In the third period following the second period, switches SW6 and SW2 are enabled / turned on, while switches SW1, SW3-SW5 are disabled / opened. At this time, the terminals of inductor L are connected to ground, causing the inductor current I to... L The voltage becomes zero. After the third time period, switches SW1–SW6 can be controlled based on the desired and actual voltage levels of the power supply voltages PVDD, PVSS, and the negative power supply voltage VN. For example, the power converter 120 can again perform the operations corresponding to the first to third time periods described above. It is understood that in other embodiments, the power converter 120 may also perform the following operations when the positive power supply voltage PVDD is lower than the desired level of PVDD and the negative power supply voltage VN is higher than the desired level of VN. Figure 6 The control of the first, second, and third time periods is shown.

[0050] In another example scenario, when the positive power supply voltage PVDD is lower than the desired level of PVDD and both the negative power supply voltages PVSS and VN are higher than their respective desired levels, switches SW4 and SW3 can be turned on during the second time period described above, or switches SW5 and SW3 can be turned on while the other switches are turned off. For example, one of the power supply voltages (e.g., VN) can be coupled to PVDD based on the importance or priority of the power supply voltages PVSS and VN. In another example scenario, when the negative power supply voltage PVSS is higher than the desired level of PVSS but both power supply voltages PVDD and VN are at their desired levels, the negative power supply voltage PVSS can be reduced by turning on switches SW4 and SW2. Correspondingly, when the negative power supply voltage VN is higher than the desired level of VN but both power supply voltages PVDD and PVSS are at their desired levels, the negative power supply voltage VN can be reduced by turning on switches SW5 and SW2.

[0051] exist Figures 4 to 6 In the above embodiments, by connecting the power supply voltage PVSS to the power supply voltage PVDD or connecting the negative power supply voltage VN to the power supply voltage PVDD during the second time period, the power converter 120 can reduce conduction power loss and improve efficiency. However, since the power converter 120 of this embodiment has a relatively large number of switching operations, for example, Figure 4 or Figure 6The six time periods shown involve eleven switching operations; therefore, the power converter 120 may exhibit high switching power loss. To address this issue, each of switches SW2 and SW6 can be implemented using transistors, such as P-channel metal-oxide-semiconductor (PMOS) transistors or N-channel metal-oxide-semiconductor (NMOS) transistors. Furthermore, each of switches SW2 and SW6 can be designed to have a large-size switch (also described as a "large switch") and a small-size switch (also described as a "small switch"), wherein the switching power loss of the small-size switch is less than that of the large-size switch. In the third time period, only the small-size switch in SW2 and SW6 is activated to reduce switching power loss. It should be noted that in the embodiments of the present invention, a large-size switch refers to a switch with a larger channel width (W) * length (L), and a small-size switch refers to a switch with a smaller channel width (W) * length (L). For example, the channel width-length product of a large-size switch (i.e., channel width * length) is greater than that of a small-size switch. The applicant recognizes that if the width * length of a transistor channel is larger, the gate capacitance Cg of the transistor is larger, and thus, the switching power loss when the transistor is used as a switch is greater; conversely, the smaller the width * length of a transistor channel, the smaller the switching power loss when the transistor is used as a switch. In one example, the channel length (L) of the large-size switch and the small-size switch is the same. By setting different channel widths (W), the switch sizes are different. Therefore, the channel width-to-length ratio (W / L) of the large-size switch is greater than that of the small-size switch. Consequently, in this example, the on-resistance of the large-size switch is less than that of the small-size switch. However, the relationship between the on-resistances of the large-size switch and the small-size switch is not limited to this example. Specifically, please refer to Figure 7 , Figure 3 The switch SW6 shown can be implemented using a large switch SW6L and a small switch SW6S. The large switch SW6L is coupled between node N2 and ground, and the small switch SW6S is coupled between node N2 and ground. In this embodiment, the large switch SW6L has a large size (i.e., channel width * length), and optionally, a low resistance when turned on; the small switch SW6S has a small size (i.e., channel width * length), and optionally, a high resistance when turned on. Similarly, Figure 3The switch SW2 shown can be implemented using a large switch SW2L and a small switch SW2S. The large switch SW2L is coupled between node N2 and ground voltage, and the small switch SW2S is coupled between node N2 and ground voltage. In this embodiment, the large switch SW2L is large in size and, optionally, has low resistance when turned on; the small switch SW2S is small in size and, optionally, has high resistance when turned on.

[0052] exist Figure 7 In the illustrated embodiment, when the power supply voltage PVDD is lower than the desired level of PVDD and the power supply voltage PVSS is higher than the desired level of PVSS, during a first time period (e.g., a predetermined duration that may have a timer setting), switches SW1 and SW2 are enabled (in switch SW2, at least the large switch SW2L is enabled), and switches SW3-SW6 are disabled. At this time, current flows from node N1 through switch SW1, node N2, inductor L, node N3, and switch SW2 to ground voltage, and the inductor current I... L Increase. In the second period following the first period, switches SW4 and SW3 are enabled, while switches SW1, SW2, SW5, and SW6 are disabled. At this time, current flows from node N5 through switch SW4, node N2, inductor L, node N3, and switch SW3 to node N4, and the inductor current I... L The voltage decreases. In the third period following the second period, only small switches SW6S and SW2S are enabled, while switches S1, SW3-SW5, and large switches SW6L and SW2L are disabled. At this time, the terminals of inductor L are connected to ground voltage to reduce the inductor current I. L The voltage level changes to zero. After the third time period, switches SW1–SW6 can be controlled based on the audio signal, power supply voltages PVDD, PVSS, and the negative power supply voltage VN. For example, the power converter 120 can again perform the operations corresponding to the first to third time periods described above.

[0053] exist Figure 7 In another embodiment shown, when the supply voltage PVDD is lower than the desired level of PVDD and the negative supply voltage VN is higher than the desired level of VN, during a first time period (e.g., a predetermined duration that may have a timer setting), switches SW1 and SW2 are enabled (in switch SW2, at least the large switch SW2L is enabled), and switches SW3-SW6 are disabled. At this time, current flows from node N1 through switch SW1, node N2, inductor L, node N3, and switch SW2 to ground voltage, and the inductor current I... LIncrease. In the second period following the first period, switches SW5 and SW3 are enabled, and switches SW1, SW2, SW4, and SW6 are disabled. At this time, current flows from node N6 through switch SW5, node N2, inductor L, node N3, and switch SW3 to node N4, and the inductor current I... L The voltage decreases. In the third period following the second period, only small switches SW6S and SW2S are enabled, while switches S1, SW3-SW5, and large switches SW6L and SW2L are disabled. At this time, the terminals of inductor L are connected to ground voltage to reduce the inductor current I. L The voltage becomes zero. After the third period, switches SW1–SW6 can be controlled based on the desired and actual voltage levels of the power supply voltages PVDD, PVSS, and the negative power supply voltage VN. For example, the power converter 120 can again perform the operations corresponding to the first to third periods described above.

[0054] In the two embodiments described above, due to the inductor current I L In the third time period mentioned above, the on-resistance is zero. Therefore, although the on-resistance of small switches SW6S and SW2S is large, no on-power loss occurs. In addition, since the switching power loss of small switches SW6S and SW2S is low, by enabling only small switches SW6S and SW2S in the third time period, the overall switching power loss can be effectively reduced.

[0055] In the above embodiments, the power converter 120 is configured to receive an input voltage VI to generate three power supply voltages PVDD, PVSS, and VN. In another embodiment, the switch SW5 and the output capacitor C4 can be removed from the power converter 120, i.e., the power converter 120 is configured to receive an input voltage VI to generate two power supply voltages PVDD and PVSS. This alternative design should also fall within the scope of the invention. That is, although the figures show a structure that generates three power supply voltages PVDD, PVSS, and VN from the input power supply voltage VI using a single inductor, in variant embodiments, it is also possible to generate two of these power supply voltages, and should not be limited to the specific example of generating three power supply voltages shown in the figures. Thus, in variant embodiments, the corresponding switches and output capacitors are optional (i.e., they can be removed, for example, by removing the switch SW5 and the output capacitor C4, thereby generating two power supply voltages PVDD and PVSS). Since the principle of the variant embodiments is similar to that of the above embodiments, the description of these variant embodiments in this invention will not be repeated one by one.

[0056] In summary, in the power converter of the amplifier system of the present invention, only one inductor is used to generate two or three power supply voltages, thus reducing the manufacturing cost of the power converter. Furthermore, by using the specific switching control method / structure proposed in the embodiments of the present invention, the efficiency of the power converter can be improved, and the conduction power loss and switching power loss can be reduced.

[0057] The use of ordinal terms such as “first,” “second,” and “third” in the claims to modify claim elements does not in itself indicate any priority, precedence, or order of one claim element relative to another claim element, or the chronological order of the execution of method actions. Rather, it is merely used as a marker to distinguish one claim element with the same name from another element with the same name.

[0058] While the embodiments and advantages of the present invention have been described in detail, it should be understood that various changes, substitutions, and modifications can be made to the present invention without departing from the spirit and scope defined by the claims. For example, new embodiments can be derived by combining several parts of different embodiments. The described embodiments are for illustrative purposes only and are not intended to limit the invention. The scope of protection of the present invention is defined by the appended claims. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present invention.

[0059] While the invention has been described by way of example and according to preferred embodiments, it should be understood that the invention is not limited to the disclosed embodiments. Rather, it is intended to cover various variations and similar structures (as will be apparent to those skilled in the art), such as combinations or substitutions of different features in different embodiments. Therefore, the scope of the appended claims should be given the broadest interpretation to cover all such variations and similar structures.

Claims

1. An amplifier system, characterized in that, The amplifier system includes: An amplifier powered by at least a first power supply voltage and a second power supply voltage is configured to receive an input signal to generate an output signal; and, A power converter having only one inductor is configured to generate the first power supply voltage and the second power supply voltage based on the input voltage; and An inductor, wherein a first terminal of the inductor is selectively coupled to the input voltage or the first power supply voltage, and a second terminal of the inductor is selectively coupled to the second power supply voltage; During the first time period, the input voltage is input to the inductor, and the inductor current increases; during the second time period following the first time period, the input voltage is disconnected from the inductor and the second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases; and during the third time period following the second time period, the input voltage, the first power supply voltage, and the second power supply voltage are all disconnected from the inductor.

2. The amplifier system as claimed in claim 1, characterized in that, The first power supply voltage and the second power supply voltage are power supply voltages that can vary according to the input signal or a derivative signal of the input signal.

3. The amplifier system as described in claim 1, characterized in that, The power converter also includes: A first switch is used to selectively connect the input voltage to the first terminal of the inductor; A second switch is used to selectively connect the second terminal of the inductor to ground voltage; A third switch is used to selectively connect the second terminal of the inductor to the second power supply voltage; A fourth switch is used to selectively connect the first terminal of the inductor to the first power supply voltage; and, The fifth switch is used to selectively connect the first terminal of the inductor to the ground voltage.

4. The amplifier system as described in claim 3, characterized in that, During the first time period, the first and second switches are on, while the third, fourth, and fifth switches are off. The input voltage is applied to the inductor, and the inductor current increases. During the second time period following the first, the third and fourth switches are on, while the first, second, and fifth switches are off. The second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases. During the third period following the second period, the second and fifth switches are on, while the first, third, and fourth switches are off.

5. The amplifier system as claimed in claim 4, characterized in that, The second switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the width*length of the channel of the large switch is greater than the width*length of the channel of the small switch. The large switch is configured to selectively connect the second terminal of the inductor to the ground voltage, and the small switch is configured to selectively connect the second terminal of the inductor to the ground voltage. In the third time period following the second time period, only the small switch of the second switch is turned on while the large switch is turned off.

6. The amplifier system as claimed in claim 4, characterized in that, The fifth switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the width*length of the channel of the large switch is greater than the width*length of the channel of the small switch. The large switch is configured to selectively connect the first terminal of the inductor to the ground voltage, and the small switch is configured to selectively connect the first terminal of the inductor to the ground voltage. In the third time period following the second time period, only the small switch of the fifth switch is turned on while the large switch is turned off.

7. The amplifier system as described in claim 5 or 6, characterized in that, The on-resistance of the large switch is less than that of the small switch.

8. The amplifier system as claimed in claim 1, characterized in that, The amplifier is an audio amplifier, and the input signal is an audio signal input to the audio amplifier.

9. An amplifier system, characterized in that, The amplifier system includes: An amplifier powered by at least a first power supply voltage and a second power supply voltage is configured to receive an input signal to generate an output signal; and, A power converter having only one inductor is configured to generate the first power supply voltage and the second power supply voltage based on the input voltage; The amplifier is powered by the first power supply voltage, the second power supply voltage, and the negative power supply voltage. The power converter is configured to generate the first power supply voltage, the second power supply voltage, and the negative power supply voltage according to the input voltage. The first power supply voltage and the second power supply voltage are power supply voltages that are variable according to the input signal or a derivative signal of the input signal. The negative power supply voltage is expected to have a fixed voltage level.

10. The amplifier system as claimed in claim 9, characterized in that, The power converter includes: an inductor having a first terminal and a second terminal; A first switch is used to selectively connect the input voltage to the first terminal of the inductor; A second switch is used to selectively connect the second terminal of the inductor to ground voltage; A third switch is used to selectively connect the first terminal of the inductor to the first power supply voltage; A fourth switch is used to selectively connect the second terminal of the inductor to the second power supply voltage; A fifth switch is used to selectively connect the first terminal of the inductor to the negative power supply voltage; and, A sixth switch is used to selectively connect the first terminal of the inductor to the ground voltage.

11. The amplifier system as claimed in claim 10, characterized in that, In the first time period, the first and second switches are on, and the third, fourth, fifth, and sixth switches are off. The input voltage is input to the inductor, and the inductor current increases. In the second time period following the first time period, the third and fourth switches are on, and the first, second, fifth, and sixth switches are off. The second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases. In the third time period following the second time period, the second and sixth switches are on, and the first, third, fourth, and fifth switches are off.

12. The amplifier system as claimed in claim 10, characterized in that, In the first time period, the first and second switches are on, and the third, fourth, fifth, and sixth switches are off. The input voltage is input to the inductor, and the inductor current increases. In the second time period following the first time period, the third and fifth switches are on, and the first, second, fourth, and sixth switches are off. The third power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases. In the third time period following the second time period, the second and sixth switches are on, and the first, third, fourth, and fifth switches are off.

13. A power converter, characterized in that, The power converter is configured to receive an input voltage to generate a first power supply voltage, a second power supply voltage, and a third power supply voltage. The power converter includes: An inductor having a first terminal and a second terminal; A first switch is used to selectively connect the input voltage to the first terminal of the inductor; A second switch is used to selectively connect the second terminal of the inductor to ground voltage; A third switch is used to selectively connect the second terminal of the inductor to the first power supply voltage; A fourth switch is used to selectively connect the first terminal of the inductor to the second power supply voltage; A fifth switch is used to selectively connect the first terminal of the inductor to the third power supply voltage; and, A sixth switch is used to selectively connect the first terminal of the inductor to the ground voltage; In the first time period, the first and second switches are on, and the third, fourth, fifth, and sixth switches are off. The input voltage is input to the inductor, and the inductor current increases. In the second time period following the first time period, the third and fourth switches are on, and the first, second, fifth, and sixth switches are off. The second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases. In the third time period following the second time period, the second and sixth switches are on, and the first, third, fourth, and fifth switches are off.

14. The power converter as claimed in claim 13, characterized in that, The sixth switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the channel width* length of the large switch is greater than the channel width* length of the small switch. The large switch is configured to selectively connect the first terminal of the inductor to the ground voltage, and the small switch is configured to selectively connect the first terminal of the inductor to the ground voltage. In the third time period after the second time period, only the small switch of the sixth switch is turned on, while the large switch is turned off.

15. The power converter as claimed in claim 13, characterized in that, The second switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the width*length of the channel of the large switch is greater than the width*length of the channel of the small switch. The large switch is configured to selectively connect the second terminal of the inductor to the ground voltage, and the small switch is configured to selectively connect the second terminal of the inductor to the ground voltage. In a third time period following the second time period, only the small switch is turned on while the large switch is turned off.

16. The power converter as claimed in claim 14 or 15, characterized in that, The on-resistance of the large switch is less than that of the small switch.

17. A power converter, characterized in that, The power converter is configured to receive an input voltage to generate a first power supply voltage, a second power supply voltage, and a third power supply voltage. The power converter includes: An inductor having a first terminal and a second terminal; A first switch is used to selectively connect the input voltage to the first terminal of the inductor; A second switch is used to selectively connect the second terminal of the inductor to ground voltage; A third switch is used to selectively connect the second terminal of the inductor to the first power supply voltage; A fourth switch is used to selectively connect the first terminal of the inductor to the second power supply voltage; A fifth switch is used to selectively connect the first terminal of the inductor to the third power supply voltage; and, A sixth switch is used to selectively connect the first terminal of the inductor to the ground voltage; The first power supply voltage, the second power supply voltage, and the third power supply voltage are used to power the amplifier. The third power supply voltage is a negative power supply voltage. The first power supply voltage and the second power supply voltage are variable power supply voltages based on the input signal of the amplifier or a derived signal of the input signal. The negative power supply voltage is expected to have a fixed voltage level.

Images