A method for demodulating a DPSK communication modulated signal
By employing peak-valley comparison and simple calculation methods in DPSK communication modulation signal demodulation, the problem of high complexity in DPSK baseband signal demodulation is solved, achieving efficient demodulation on ordinary computing devices and reducing hardware costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIAN TIANHE SEA DEFENSE INTELLIGENT TECH CO LTD
- Filing Date
- 2023-03-29
- Publication Date
- 2026-07-21
AI Technical Summary
Existing DPSK baseband signal demodulation methods are complex, costly to implement, and have low receiver sensitivity, making them difficult to implement on ordinary computing devices.
A demodulation method for DPSK communication modulation signals is adopted. By searching the synchronization header, decoding the data segment, and verifying the data, and by using peak-valley comparison and simple calculation steps, the DPSK code is converted into normal data.
The method is simple and efficient, applicable to ordinary computers and portable devices, reducing hardware requirements and costs, and achieving a low-complexity demodulation process.
Smart Images

Figure CN116455716B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of communication technology, and more specifically to a demodulation method for DPSK communication modulated signals. Technical Background
[0002] Digital modulation and demodulation technology, with its excellent noise immunity and bit error rate performance, has been widely used in modern wireless communication systems. It typically employs three methods: Amplitude Shift Keying (ASK), Frequency Shift Keying (FSK), and Phase Shift Keying (PSK). These correspond to transmitting digital baseband signals using the amplitude, frequency, and phase of a carrier wave (sine wave), respectively. Among these, Differential Phase Shift Keying (DPSK) technology is widely used in wireless communication systems due to its advantages such as high transmission efficiency and strong anti-interference capability.
[0003] The methods for demodulating DPSK baseband signals are generally divided into two types: polarity comparison method and phase comparison method.
[0004] The polarity comparison demodulation method is highly complex and has a high implementation cost.
[0005] The phase comparison demodulation method only demodulates based on the phase of adjacent symbols, resulting in low receiver sensitivity. Summary of the Invention
[0006] In view of this, in order to overcome the shortcomings of existing methods for demodulating DPSK baseband signals, the present invention provides a method for demodulating DPSK communication modulated signals. This method is simple, easy to implement, has low computational load, and low hardware requirements, and can be implemented on handheld devices including conventional laptops and tablets.
[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows:
[0008] A method for demodulating DPSK communication modulated signals, characterized by comprising the following steps:
[0009] 1) Search for the synchronization header;
[0010] 2) Data segment decoding;
[0011] 3) Data validation;
[0012] 4) Convert the DPSK code to normal data.
[0013] The specific method is as follows:
[0014] The specific method for step 1) is as follows:
[0015] By comparing the standard synchronization header with the positions of the peaks and valleys of the currently measured signal to check the degree of coincidence, the starting point of the synchronization header is determined, which is specifically divided into the following three steps:
[0016] 1-1) Determine the peak and valley positions of the standard synchronization header
[0017] According to the signal parameters of the standard synchronization header, the position sequence numbers P0[m] and V0[n] where all corresponding peaks and valleys appear are determined in advance, m = 1, 2, …, M, n = 1, 2, …, N, where M and N respectively represent the numbers of peaks and valleys;
[0018] If the synchronization header is a sine signal (initial phase is 0) with a frequency of F H , a sampling data length of L, a starting point set to 0, and a sampling frequency of Fs, then the sampling data sine period length L T = Fs / F H , and the sequence numbers of the peak and valley positions of the standard synchronization header are respectively:
[0019] P0[m] = m*L T / 4 - 1, m = 1, 2, 3, …, M (M = L / L T );
[0020] V0[n] = 3*n*L T / 4 - 1, n = 1, 2, 3, …, N (N = L / L T );
[0021] 1-2) Calculate the peak and valley positions of the currently measured data
[0022] Starting from the serial number K in the sampling data, a continuous signal x[i] (i = K, K + 1, K + 2, …, K + L1 - 1) with a length of L1 (L1 >= L) is taken, and M peak position sequences P[m] and N valley position sequences V[n] are selected according to the following rules:
[0023] When i = 0, if x[i] >= x[i + 1] and x[i] > x[i + 2], then the subscript i is considered the peak position;
[0024] When i = 0, if x[i] <= x[i + 1] and x[i] < x[i + 2], then the subscript i is considered the valley position;
[0025] When i = 1, if x[i] >= x[i + 1] and x[i] > x[i + 2] and x[i] >= x[i - 1], then the subscript i is considered the peak position;
[0026] When i = 1, if x[i] <= x[i + 1] and x[i] < x[i + 2] and x[i] <= x[i - 1], then the subscript i is considered the valley position;
[0027] When i > 1, if x[i] >= x[i + 1] and x[i] > x[i + 2] and x[i] >= x[i - 1] and x[i] > x[i - 2], then the subscript i is considered the peak position;
[0028] When i > 1, if x[i] <= x[i + 1] and x[i] < x[i + 2] and x[i] <= x[i - 1] && x[i] < x[i - 2], then the subscript i is considered the valley position;
[0029] 1 - 3) Calculate the differences between the peak and valley positions of the standard sync header and those of the measured sync header, and accumulate the deviation E:
[0030] E = |P0[m] - P[m]| + |V0[n] - V[n]|;
[0031] Where, P0[m] is the sequence of peak positions of the standard sync header; V0[n] is the sequence of valley positions of the standard sync header; P[m] is the sequence of peak positions of the sync header in the measured data; V[n] is the sequence of valley positions of the sync header in the measured data;
[0032] 1 - 4) Determine the starting position of the sync header
[0033] If E <= ε, then it is determined that the best starting position of the sync header is K, and proceed to step (2) to perform the decoding operation on the data segment; otherwise, the sampled data slides backward by 1 point, i.e., K = K + 1, and repeat the above steps from (2) - (3), where the deviation threshold ε:
[0034] ε = 2 * L / L T ;
[0035] Where, L is the length of the standard sync header data; L T is the sine period length of the standard sync header;
[0036] The specific method of step 2) is as follows:
[0037] Starting from the starting point of the data area determined from the sync header position obtained in step 1, extract the data area x[i] with a length of L2 (i = K + L1, K + L1 + 1, K + L1 + 2,..., K + L1 + L2 - 1), and perform data decoding. The specific steps are as follows:
[0038] Divide the data area x[i] into A data segment sequences d[Q] at equal intervals Q, where both Q and A are positive integers, and each data segment d[Q] represents a DPSK symbol;
[0039] 2-1) Code data fragment partitioning Q:
[0040]
[0041] Where L2 is the length of the data area; A is the number of DPSK symbols;
[0042] 2-2) DPSK decoding symbol judgment
[0043] The rules for distinguishing between 0 and 1 in DPSK symbols are as follows:
[0044] If the data segment d[Q] shows an upward trend, it indicates that the code element is 0. The discrimination rule is:
[0045] d[0] <d[j],(j=1,2,3,…,J;J<Q / 2);
[0046] If the data segment d[Q] shows a decreasing trend, it indicates code element 1. The discrimination rule is:
[0047] d[0]>d[j],(j=1,2,3,…,J;J
[0048] The DPSK symbol sequence b[A] can then be obtained;
[0049] The specific method for step 3) is as follows:
[0050] In the DPSK decoding meta-sequence b[A], b[0] and b[1] are check bits, and b[2] to b[A-1] are data bits. The data bits b[2] to b[A-1] are summed to obtain the double-byte check data S. The lower two bits S0 and S1 of the data S are judged: if S0 = b[0] and S1 = b[1], the data frame check is successful; otherwise, slide one sampling point backward and repeat the calculation of the peak and trough positions of the current measured data from step 1) to decode.
[0051] The specific method for step 4) is as follows:
[0052] The data bits of the DPSK decoded metasequence b[A] are XORed every 8 bits to obtain the normal data bit[A-2]. Bit[A-2] is then ORed every 8 bits to obtain the real data array Data[n-1], where n = (A-2) / 8. The array is then slid backward for a continuous length of L+L2. The peak and trough positions of the current measured data are calculated repeatedly from steps 1-2) in step 1) until the decoding ends or the decoding process is actively exited.
[0053] Compared with the prior art, the present invention has the following advantages and effects:
[0054] 1) The method of the present invention is simple and efficient, with very low hardware requirements. The entire process can be carried out by ordinary computers (including desktop computers, laptops, PADs and other desktop or handheld devices), eliminating the need for traditional special instruments and equipment. This not only saves costs, but also makes the implementation simple and efficient, and provides convenience for future product upgrades and performance improvements.
[0055] 2) The method of the present invention uses a portable device such as a regular computer, laptop or PAD with a microphone input or an external sound card to demodulate the signal into PCM audio encoding format, store it in lossless file format (.wav), and then demodulate the DPSK signal using the decoding method of the present invention.
[0056] 3) The method of this invention uses software decoding, and the decoding method is simple. Compared with the currently popular decoding algorithms, it has low computational complexity and saves hardware costs, without the need for additional decoding hardware circuits; it is also replicable and portable. Attached Figure Description
[0057] Figure 1 This is a flowchart of the decoding process of the present invention;
[0058] Figure 2 This is a data frame diagram. Detailed Implementation
[0059] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0060] Based on in-depth research of numerous measured signals and distortion characteristics, this invention proposes a robust demodulation method for DPSK modulated signals, comprising the following steps: Figure 1 As shown:
[0061] 1) Search synchronization header
[0062] The starting point of the synchronization head is determined by comparing the positions of the peaks and troughs of the standard synchronization head with those of the current measured signal to check the degree of match. This involves the following three steps:
[0063] 1-1) Determine the peak and trough positions of the standard synchro head.
[0064] Based on the standard synchronization head signal parameters, the position sequence numbers P0[m] and V0[n] of all corresponding peaks and troughs are determined in advance, m = 1, 2, ..., M, n = 1, 2, ..., N, where M and N represent the number of peaks and troughs, respectively;
[0065] If the synchronization head has a frequency of F H, for a sine signal with a sampling data length of L (initial phase is 0), starting point set to 0, and sampling frequency of Fs, the length of the sine period L of the sampling data is T = Fs / F H , the sequence numbers of the peaks and troughs of the standard synchronization header can be obtained as follows:
[0066] P0[m] = m * L T / 4 - 1, m = 1, 2, 3,..., M (M = L / L T );
[0067] V0[n] = 3 * n * L T / 4 - 1, n = 1, 2, 3,..., N (N = L / L T );
[0068] 1 - 2) Calculate the peak and trough positions of the current measured data
[0069] Starting from the sequence number K in the sampling data, take a continuous signal x[i] (i = K, K + 1, K + 2,..., K + L1 - 1) with a length of L1 (L1 >= L), and select M peak position sequences P[m] and N trough position sequences V[n] according to the following rules:
[0070] When i = 0, if x[i] >= x[i + 1] and x[i] > x[i + 2], then the subscript i is considered the peak position;
[0071] When i = 0, if x[i] <= x[i + 1] and x[i] < x[i + 2], then the subscript i is considered the trough position;
[0072] When i = 1, if x[i] >= x[i + 1] and x[i] > x[i + 2] and x[i] >= x[i - 1], then the subscript i is considered the peak position;
[0073] When i = 1, if x[i] <= x[i + 1] and x[i] < x[i + 2] and x[i] <= x[i - 1], then the subscript i is considered the trough position;
[0074] When i > 1, if x[i] >= x[i + 1] and x[i] > x[i + 2] and x[i] >= x[i - 1] and x[i] > x[i - 2], then the subscript i is considered the peak position;
[0075] When i > 1, if x[i] <= x[i + 1] and x[i] < x[i + 2] and x[i] <= x[i - 1] && x[i] < x[i - 2], then the subscript i is considered the trough position;
[0076] 1-3) Calculate the difference between the standard synchronization head peak and trough positions and the measured synchronization head peak and trough positions, and the cumulative deviation E:
[0077] E=|P0[m]-P[m]|+|V0[n]-V[n]|;
[0078] Wherein, P0[m] is the standard synchronization head peak position sequence; V0[n] is the standard synchronization head trough position sequence; P[m] is the measured data synchronization head peak position sequence; V[n] is the measured data synchronization head trough position sequence;
[0079] 1-4) Determine the starting position of the synchronization head
[0080] If E <= ε, then the optimal starting position of the synchronization header is determined to be K, and step (5) is performed to decode the data segment; otherwise, the sampled data is moved backward by 1 point, i.e., K = K + 1, and the steps from (2) to (3) above are repeated, where the deviation threshold ε is:
[0081] ε=2*L / L T ;
[0082] Where L is the standard synchronization header data length; L T The standard synchronizing head sine cycle length;
[0083] 2) Data segment decoding
[0084] Starting from the synchronization header position obtained in step 2, determine the starting point of the data area position, extract the data area x[i] (i = K+L1, K+L1+1, K+L1+2, ..., K+L1+L2-1) of length L2, and perform data decoding. The specific steps are as follows:
[0085] Divide the data region x[i] into A data segment sequences d[Q] at equal intervals Q, where Q and A are both positive integers, and each data segment d[Q] represents a DPSK symbol;
[0086] 2-1) Code data fragment partitioning Q:
[0087]
[0088] Where L2 is the length of the data area; A is the number of DPSK symbols;
[0089] 2-3) DPSK code element judgment
[0090] The rules for distinguishing between 0 and 1 in DPSK symbols are as follows:
[0091] If the data segment d[Q] shows an upward trend, it indicates that the code element is 0. The discrimination rule is:
[0092] d[0] <d[j],(j=1,2,3,…,J;J<Q / 2);
[0093] If the data segment d[Q] shows a decreasing trend, it indicates code element 1. The discrimination rule is:
[0094] d[0]>d[j],(j=1,2,3,…,J;J
[0095] The DPSK symbol sequence b[A] can then be obtained;
[0096] 3) Data validation
[0097] In the DPSK decoding meta-sequence b[A], b[0] and b[1] are check bits, and b[2] to b[A-1] are data bits. The data bits b[2] to b[A-1] are summed to obtain the double-byte check data S. The lower two bits S0 and S1 of the data S are judged: if S0 = b[0] and S1 = b[1], the data frame check is successful; otherwise, slide one sampling point backward and repeat the calculation of the peak and trough positions of the current measured data from step 1) to decode.
[0098] 4) Convert DPSK code to normal data
[0099] The data bits of the DPSK decoded metasequence b[A] are XORed every 8 bits to obtain the normal data bit[A-2]. Bit[A-2] is then ORed every 8 bits to obtain the real data array Data[n-1], where n = (A-2) / 8. The array is then slid backward for a continuous length of L+L2. The peak and trough positions of the current measured data are calculated repeatedly from steps 1-2) in step 1) until the decoding ends or the decoding process is actively exited.
[0100] Example:
[0101] In this implementation, real-time data acquisition is performed using the computer's microphone. The data content is 6 bytes, with 2 parity bits, totaling 50 code bits. The DPSK modulation frequency is F. H =800Hz and F L =400Hz, signal transmission period is 100ms, audio sampling frequency at the receiving end is 16kHz, single-channel acquisition is performed to obtain lossless digital audio raw data, which is saved in .wav format. According to the standard sync header signal parameters, L can be obtained as follows: T =16000 / 800=20.
[0102] Plot the amplitude curve of the sampled data; from the graph, you can find the periodic complete data frames, such as... Figure 2 As shown, the data length of a complete period frame is 1600 (40ms synchronization header, i.e., frame header data L = 600, 60ms data area data L2 = 1000).
[0103] Determine the trough and peak positions of the standard synchro head:
[0104] In this implementation, L = 600, and the standard synchronization head trough position array V0
[29] and peak position P0
[29] are set:
[0105] V0
[29] ={4,24,44,64,
[0106] 84,104,124,144,164,184,204,224,244,264,284,304,324
[0107] 344,364,384,404,424,444,464,484,504,524,544,564,584}
[0108] P0
[29] =
[0109] {14,34,54,74,94,114,134,154,174,194,214,234,254,274,294,314,334,
[0110] 354,374,394,414,434,454,474,494,514,534,554,574,594}
[0111] Calculate the peak and trough positions of the current measured data:
[0112] The valley and peak position arrays V
[29] and P
[29] of the actual synchronization head are obtained by using the continuous sampling data length L1 (L1>600) according to the above valley and peak judgment method.
[0113] Calculate the differences between the peak and trough positions of the standard synchronization head and the measured peak and trough positions of the synchronization head:
[0114] Take K = 0, and obtain the cumulative deviation E0 = |P0
[29] - P
[29] | + |V0
[29] - V
[29] |.
[0115] Determine the start position of the synchronization header:
[0116] From the above method, we know that ε = 60. When E0 <= 60, the synchronization header start position K is found. Otherwise, K = K + 1, and steps 5 and 6 are repeated.
[0117] Code metadata fragment partitioning:
[0118] Starting from position K, take 1600 consecutive samples. The starting position of the data area is i = K + 600, and the length is L2 = 1000 samples. According to the symbol division method, Q = 1000 / 50 = 20.
[0119] DPSK raw code decoding:
[0120] Nine consecutive sampling points are used for judgment. When d[0] is successively less than d[1], d[2], ..., d[8], that is, the sine curve shows an upward trend, then the DPSK symbol is considered to be 0. Otherwise, the sine curve shows a downward trend, and the DPSK symbol is considered to be 1. After the data area is decoded, the DPSK symbol array b
[49] can be obtained.
[0121] Data validation:
[0122] calculate Take the two lowest bits S0 and S1 and compare them with the check bit. When S0 = b[0] and S1 = b[1], the data frame check is successful. Otherwise, let K = K+1 and return to step 5 to start finding the synchronization header again.
[0123] DPSK symbol conversion to normal data symbol
[0124] The original DPSK symbol array b[2]~b
[49] is XORed with every 8 symbols to obtain the real data symbol array bit
[47] . Bit
[47] is then ORed with every 8 symbols to obtain the real data array Data[5].
[0125] Slide the sampled audio data backward by 1600 sampling points, return to step 5 to start finding the synchronization header again, and perform the decoding of the second frame of data until the audio data decoding is completed or the decoding process is actively exited.
[0126] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention.
Claims
1. A demodulation method for DPSK communication modulated signals, characterized in that, It includes the following steps: 1) Search for the synchronization header; 2) Decode the data segment; 3) Data verification; 4) Convert the DPSK code into normal data; The specific method is as follows: The specific method for step 1) is as follows: By comparing the standard synchronization header with the positions of the peaks and valleys of the currently measured signal to check the degree of coincidence, the starting point of the synchronization header is determined. It is specifically divided into the following three steps: 1-1) Determine the peak and valley positions of the standard synchronization header According to the signal parameters of the standard synchronization header, determine in advance all the corresponding position serial numbers P0[m] and V0[n] where the peaks and valleys appear, m = 1, 2, …, M, n = 1, 2, …, N, where M and N respectively represent the numbers of peaks and valleys; If the synchronization head has a frequency of F H Given a sinusoidal signal with a sampling data length of L, an initial phase of 0, a starting point of 0, and a sampling frequency of Fs, the sinusoidal period length of the sampling data is L. T = Fs / F H The sequence numbers for the peak and trough positions of the standard synchronization header are as follows: P0[m] = m*L T / 4-1, m = 1,2,3,…,M (M=L / L T ); V0[n] = 3*n*L T / 4-1, n = 1,2,3,…,N (N=L / L T ); 1-2) Calculate the peak and valley positions of the currently measured data Take the continuous signal x[i] (i = K, K + 1, K + 2, …, K + L1 - 1) starting from the serial number K and with a length of L1 from the sampled data, L1 ≥ L. Select the M peak position sequences P[m] and the N valley position sequences V[n] according to the following rules: When i = 0, if x[i] ≥ x[i + 1] and x[i] > x[i + 2], then the subscript i is considered the peak position; When i = 0, if x[i] ≤ x[i + 1] and x[i] < x[i + 2], then the subscript i is considered the valley position; When i = 1, if x[i] ≥ x[i + 1] and x[i] > x[i + 2] and x[i] ≥ x[i - 1], then the subscript i is considered the peak position; When i = 1, if x[i] ≤ x[i + 1] and x[i] < x[i + 2] and x[i] ≤ x[i - 1], then the subscript i is considered the valley position; When i > 1, if x[i] ≥ x[i + 1] and x[i] > x[i + 2] and x[i] ≥ x[i - 1] and x[i] > x[i - 2], then the subscript i is considered the peak position; When i > 1, if x[i] ≤ x[i + 1] and x[i] < x[i + 2] and x[i] ≤ x[i - 1] && x[i] < x[i - 2], then the subscript i is considered the valley position; 1-3) Calculate the differences between the peak and valley positions of the standard synchronization header and the peak and valley positions of the measured synchronization header, and accumulate the deviation E: E = |P0[m] - P[m]| + |V0[n] - V[n]|; Among them, P0[m] is the peak position sequence of the standard synchronization header; V0[n] is the valley position sequence of the standard synchronization header; P[m] is the peak position sequence of the measured data synchronization header; V[n] is the valley position sequence of the measured data synchronization header; 1-4) Determine the starting position of the synchronization header If E ≤ ε, it is determined that the best starting position of the synchronization header is K, and step 2) is entered to perform the decoding operation of the data segment; otherwise, the sampled data slides backward by 1 point, that is, K = K + 1, and repeat steps 1-2) and 1-3) above, where the deviation threshold ε: ε=2*L / L T ; Where L is the standard synchronization header data length; L T The standard synchronizing head sine cycle length; The specific method for step 2) is as follows: Starting from the synchronization header position obtained in step 1, determine the starting point of the data area position, extract the data area x[i] of length L2 (i=K+L1,K+L1+1,K+L1+2,…,K+L1+L2-1), and perform data decoding. The specific steps are as follows: Divide the data region x[i] into A data segment sequences d[Q] at equal intervals Q, where Q and A are both positive integers, and each data segment d[Q] represents a DPSK symbol; 2-1) Code data fragment partitioning Q: Q = A≥10; Where L2 is the length of the data area; A is the number of DPSK symbols; 2-2) DPSK decoding symbol judgment The rules for distinguishing between 0 and 1 in DPSK symbols are as follows: If the data segment d[Q] shows an upward trend, it indicates that the code element is 0. The discrimination rule is: d[0] <d[j], (j=1,2,3,…,J; J<Q / 2); If the data segment d[Q] shows a decreasing trend, it indicates code element 1. The discrimination rule is: d[0]>d[j], (j=1,2,3,…,J; J can be used to obtain the DPSK symbol sequence b[A]; The specific method for step 3) is as follows: In the DPSK decoding meta-sequence b[A], b[0] and b[1] are check bits, and b[2] to b[A-1] are data bits. The data bits b[2] to b[A-1] are summed to obtain the double-byte check data S. The lower two bits S0 and S1 of the data S are judged: if S0=b[0] and S1=b[1], the data frame check is successful; otherwise, slide one sampling point backward and repeat steps 1-2) in step 1) to calculate the peak and trough positions of the current measured data for decoding. The specific method for step 4) is as follows: The data bits of the DPSK decoded metasequence b[A] are XORed every 8 bits to obtain the normal data bit[A-2]. Bit[A-2] is then ORed every 8 bits to obtain the real data array Data[n-1], where n = (A-2) / 8. The array is then slid forward for a continuous length of L+L2. Steps 1-2 in step 1) are repeated to calculate the peak and trough positions of the current measured data until the decoding ends or the decoding process is actively exited.