Method for eliminating 8T global shutter CIS horizontal row crosstalk

Abstract

The application belongs to the technical field of image sensors, and particularly relates to a method for eliminating horizontal row crosstalk of 8T global shutter CIS; the method comprises the following steps: when the global shutter CIS is reading the nth frame of image data, if the global control signal TX is converted from a high level to a low level, and the global charge transfer switch TG is disconnected, the (n+1)th frame of image starts to be exposed, at this time, valid data reading of the nth frame of image data is suspended, and an invalid row is inserted in the reading timing, the invalid row data is received outside the chip and discarded, and the horizontal row crosstalk is eliminated; the application eliminates the horizontal row crosstalk, improves the imaging quality of the global shutter CIS, and can be applied to high-speed imaging application of the global shutter CIS, and has high practicability.

Description

Technical Field

[0001] This invention belongs to the field of image sensor technology, specifically relating to a method for eliminating horizontal line crosstalk in an 8T global shutter CIS. Background Technology

[0002] With the development of modern information society, image sensors are being used more and more widely in people's lives, and their performance is becoming increasingly powerful. CMOS image sensors (CIS) integrate photosensitive units on a semiconductor substrate to form a pixel array, used to acquire image information. Based on the photoelectric conversion effect, reflected light from external objects illuminates the pixel array, and the corresponding pixel units convert the light signal into an electrical signal, which is then processed and stored according to their positional relationship.

[0003] Global shutter CIS refers to a CMOS image sensor where all pixels are exposed at the same time, starting and ending exposure simultaneously. Traditional rolling shutter CIS, because each row of pixels starts and ends exposure at different times, results in inconsistent exposure times for each row. This can cause significant distortion in images of fast-moving objects, failing to accurately represent the subject. Global shutter CIS, on the other hand, ensures identical exposure times for each row of pixels, eliminating distortion and providing a more accurate representation of the subject, making it highly desirable for user applications. However, because all pixels start and end exposure simultaneously, the pulse signal controlling the transfer grid within each pixel is a high-load global signal. Signal level transitions can cause crosstalk to the currently sampled signal, leading to row data defects and reduced image quality.

[0004] In existing technologies, to eliminate or reduce line signal crosstalk caused by global exposure, signal processing is typically performed at the board level to discard the crosstalked valid data to improve image quality. This method not only results in the loss of valid data but also requires additional memory to cache it, increasing costs. Furthermore, the location of defective data varies depending on the exposure time during CIS operation, necessitating readjustment of the exposure pause time each time, making the implementation complex. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention, based on the application requirements of global shutter imaging in motion shooting and high-speed imaging, proposes a method to eliminate horizontal line signal crosstalk caused by the global control signal of the pixel transfer gate to improve image quality, namely, a method for eliminating horizontal line crosstalk in 8T global shutter CIS. This method includes:

[0006] The global shutter CIS includes an M×N pixel array. The M rows of pixels share N column buses to output pixel data. Each row of pixels shares one row drive bus. Each column bus connects to a set of column-level circuits. Each set of column-level circuits includes a PGA sampling circuit, a column-level AD conversion circuit, and a digital signal synchronization output circuit. The global control signal TX of the pixel transfer gate controls the working timing of the M×N pixels through the M row drive buses. When the global shutter CIS is reading the nth frame of image data, the global control signal TX changes from high level to low level, the global charge transfer switch TG is turned off, and the n+1th frame of image begins to be exposed. During the exposure time, the effective data reading of the nth frame of image data is paused, and invalid rows are inserted into the readout timing. The invalid row data is received off-chip and discarded to eliminate horizontal crosstalk.

[0007] Preferably, the time when an invalid row is inserted is the time when the exposure begins.

[0008] Preferably, the number of invalid rows to be inserted is determined by the level transition time of the global control signal TX.

[0009] Preferably, the process of receiving invalid line data off-chip and discarding it includes: pausing the line address count or setting the line address to an invalid address, and setting the data synchronization signal and the line synchronization signal to remain at a low level.

[0010] Preferably, the process of the global shutter CIS reading image data includes: the signal stored in the pixel is output to the column-level processing circuit through the column bus; after the signal enters the column-level processing circuit, it is output to the off-chip after passing through the PGA sampling circuit, the column-level AD conversion circuit, and the synchronous output interface circuit.

[0011] The beneficial effects of this invention are as follows: This invention uses the insertion of invalid rows while simultaneously adjusting the row address and synchronization signal to control the timing, eliminating the horizontal line crosstalk problem caused by the global switch. This invention eliminates horizontal line crosstalk and improves the imaging quality of global shutter CIS; at the same time, this invention requires less circuitry, consumes less power, has minimal impact on frame rate, is easy to implement, and does not lose effective data, making it suitable for high-speed imaging applications of global shutter CIS and highly practical. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the pixel structure of the global shutter CIS in this invention;

[0013] Figure 2 This is the timing diagram for the control of inserting invalid rows in this invention;

[0014] Figure 3 This is an overall exposure timing diagram of a preferred embodiment of the present invention. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] This invention proposes a method for eliminating horizontal line crosstalk in an 8T global shutter CIS, the method comprising the following:

[0017] like Figure 1 As shown, the pixel structure of the global shutter CIS used in this invention includes: photodiode PD, charge transfer gate TG, charge storage node FD, reset switch RST, first source follower SF1, source follower bias PC, sample and hold switch S1, capacitor C1, second source follower SF2, sample and hold switch S2, capacitor C2, and row selection switch RS.

[0018] The global shutter CIS consists of an M×N pixel array with M row drive buses and N column buses. The M rows of pixels share the N column buses to output pixel data. Each row of pixels shares one row drive bus. Each column bus connects to a set of column-level circuits. Each set of column-level circuits includes a PGA sampling circuit, a column-level AD conversion circuit, and a digital signal synchronization output circuit. The global control signal TX of the pixel transfer gate controls the working timing of the M×N pixels through the M row drive buses.

[0019] like Figure 2 As shown, TX is the global control signal of the pixel transfer gate. When the global shutter image sensor is working in continuous frame readout mode, the global shutter CIS is reading the nth frame image data. When TX changes from high level to low level, the global charge transfer switch TG is turned off, and the n+1th frame image begins to be exposed.

[0020] The global shutter CIS of this invention uses a method of exposing all pixels together and reading out image data line by line. When the TX level changes, the entire line of data being sampled will be affected by crosstalk, causing the sampled data to be too bright or too dark. Since TX is a global signal with a large load, the TX level change time will also be long, especially for large-area CIS, where the TX level change will cause crosstalk to one or more lines of data. To solve the problem of crosstalk caused by the global control signal TX to the signal being read out, this invention pauses the reading out of valid data of the nth frame of image data during the exposure time and inserts invalid lines into the readout sequence. The invalid line data is received off-chip and discarded, thereby eliminating horizontal line crosstalk.

[0021] The insertion of invalid lines occurs at the start of exposure, and the number of invalid lines inserted is determined by the level transition time of the global control signal TX. Specifically, invalid lines are inserted at the beginning of the lines where the global control signal will undergo level transition, and insertion of invalid lines stops at the beginning of the line following the line where the global control signal ends level transition.

[0022] The off-chip data acquisition output of this invention is controlled by synchronization signals. Specifically, the synchronization signals of this invention include a frame synchronization signal FVAL, a line synchronization signal LVAL, and a data synchronization signal DVAL. The output data is valid when the synchronization signal is high, and the output data is invalid when both the data synchronization signal and the line synchronization signal are low.

[0023] The process of receiving invalid line data off-chip and discarding it includes: pausing the line address count or setting the line address to an invalid address, and setting the data synchronization signal and the line synchronization signal to keep them at a low level.

[0024] The process of the global shutter CIS reading image data includes: which row of data the global shutter CIS reads is determined by the row address, the row selection signal selects the corresponding row according to the row address, and the signal stored in the pixels of that row is output to the column-level processing circuit through the column bus; after the signal enters the column-level processing circuit, it passes through the PGA sampling circuit, the column-level AD conversion circuit, and the synchronous output interface circuit before being output to the off-chip. Among them, the PGA sampling, column-level AD conversion, and synchronous output interface work in a pipeline manner.

[0025] In some preferred embodiments, such as Figure 3 As shown, the image sensor operates in continuous frame readout mode, with M rows read out and P exposure times, where P is less than M. The overall exposure timing is as follows: Figure 2 As shown. At the start of exposure, the TX signal level begins to drop, and line L is being read out. L is generally equal to MP, but may fluctuate between lines before and after depending on the frame blanking time. The TX level drop time is K lines, and the sampled signals during these K lines may be affected by crosstalk.

[0026] After the (L-1)th read is completed, an invalid row is inserted into the read timing sequence, and the data read during the TX signal conversion period is discarded. Specifically: if the row address count is paused, the invalid row will be read again as the (L-1)th row, and only the data acquired in the first acquisition is taken when the data is acquired off-chip; or the row address is set to an invalid value other than the valid address, in which case no row is selected, and the invalid row will output invalid data.

[0027] When digital signals from row L to row L+K-1 are read synchronously, the row synchronization signal LVAL and the data synchronization signal DVAL remain low, and off-chip data acquisition is paused. When row L+K data is read, the row address is restored to L+1 and counting continues until row M is reached. When digital signals from row L+K are read synchronously, LVAL and DVAL return to high. The values ​​of L and K are configured through registers and can be modified through the communication interface.

[0028] By employing the method of the present invention, all valid data of MXN pixels in the above embodiment are output completely, eliminating line crosstalk caused by the global control signal.

[0029] The above-described embodiments further illustrate the purpose, technical solution, and advantages of the present invention. It should be understood that the above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made to the present invention within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for eliminating horizontal line crosstalk in an 8T global shutter CIS, characterized in that, include: The global shutter CIS includes an M×N pixel array. The M rows of pixels share N column buses to output pixel data. Each row of pixels shares one row drive bus. Each column bus connects to a set of column-level circuits. Each set of column-level circuits includes a PGA sampling circuit, a column-level AD conversion circuit, and a digital signal synchronization output circuit. The global control signal TX of the pixel transfer gate controls the working timing of the M×N pixels through the M row drive buses. When the global shutter CIS is reading the nth frame image data, if the global control signal TX changes from high level to low level and the global charge transfer switch TG is turned off, the n+1th frame image begins to be exposed. At this time, the effective data reading of the nth frame image data is paused and an invalid line is inserted into the readout timing. The invalid line data is received off-chip and discarded to eliminate horizontal line crosstalk.

2. The method for eliminating horizontal line crosstalk in an 8T global shutter CIS according to claim 1, characterized in that, The moment an invalid line is inserted is the moment the exposure begins.

3. The method for eliminating horizontal line crosstalk in an 8T global shutter CIS according to claim 1, characterized in that, The number of invalid rows to be inserted is determined by the level transition time of the global control signal TX.

4. The method for eliminating horizontal line crosstalk in an 8T global shutter CIS according to claim 1, characterized in that, The process of receiving invalid line data off-chip and discarding it includes: pausing the line address count or setting the line address to an invalid address, and setting the data synchronization signal and the line synchronization signal to keep them at a low level.

5. The method for eliminating horizontal line crosstalk in an 8T global shutter CIS according to claim 1, characterized in that, The process of the global shutter CIS reading image data includes: the signal stored in the pixel is output to the column-level processing circuit through the column bus; after the signal enters the column-level processing circuit, it is output to the external circuit after passing through the PGA sampling circuit, the column-level AD conversion circuit, and the synchronous output interface circuit.

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