CMOS图像传感器的列总线信号自适应加速电路
By employing a sampling circuit consisting of sampling capacitors and resistors in the CMOS image sensor, combined with a comparator and a tail current source, the working state of the tail current source is adaptively controlled, thus solving the problem of slow column bus signal establishment speed and improving frame rate and imaging quality.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIAN UNIV OF TECH
- Filing Date
- 2023-04-23
- Publication Date
- 2026-07-17
AI Technical Summary
In CMOS image sensors, the parasitic effect of metal traces causes the column bus signal to establish too slowly, affecting the frame rate. In particular, the limitation of the discharge current of the tail current source on the parasitic capacitance further slows down the establishment speed of the integral signal. Moreover, existing current enhancement techniques have problems such as system instability and high requirements for operational amplifier parameters.
A sampling circuit consisting of a sampling capacitor and a sampling resistor is used, combined with a comparator and a tail current source. By adaptively controlling the working state of the tail current source, the parasitic capacitance is quickly discharged to accelerate the establishment of the column bus signal.
It improves the setup speed of the column bus signal, increases the frame rate of the CMOS image sensor, maintains the consistency of imaging quality and readout circuitry, and does not increase additional power consumption.
Smart Images
Figure CN116456211B_ABST