Fast response control loop for LLC resonant switching controller

Abstract

The application relates to a fast response control loop for an LLC resonant switch controller, which comprises a detection capacitor Cc1, a detection capacitor Cc2, a high-side charging current source Icp1, a low-side charging current source Icp2, an output feedback voltage detection circuit, a loop discrimination comparison circuit and a high-speed output driving circuit. In order to improve the response speed of the LLC half-bridge resonant controller, the application first adopts an LLC current output SW node characteristic proportional copying circuit to pre-judge the resonant cavity characteristics before the SW node current output, so as to avoid the slow response speed problem caused by the delay of the feedback voltage signal FB and the current detection signal CS in the existing LLC resonant controller; in addition, the high-speed output driving circuit is adopted to reduce the internal signal delay by reducing the internal signal swing, so that faster loop response is realized.

Description

Technical Field

[0001] This invention relates to a fast-response control loop for an LLC resonant switch controller, belonging to the field of integrated circuit technology. Background Technology

[0002] With breakthroughs in materials physics and power device technology, resonant converters with soft-switching characteristics have gained a significant market share in the lithium battery charger field due to their substantial advantages such as light weight, small size, and high energy efficiency. Among the various types of resonant soft-switching converters, LLC resonant converters, which simultaneously possess strong no-load operating capability and the ability to reflect load weight with resonant current, have been widely used.

[0003] Figure 1 This is a topology diagram of a typical LLC half-bridge resonant converter system. In the resonant converter system, the gate control signals for the main switches MOSFETs S1 and S2 are HG and LG, respectively, generated by the LLC resonant controller chip 200 based on the states of the converter output feedback voltage signal FB, current detection signal CS, and frequency control signal FSET. The current output node SW of the resonant controller chip 200 is connected to drive the LLC resonant cavity. The half-bridge driver outputs two switching signals with a 50% duty cycle and a frequency f, with a 180° phase difference, controlling the main switches MOSFETs S1 and S2 to conduct alternately. The resonant cavity is composed of the resonant capacitor Cr, the magnetizing inductor Lm, and the resonant inductor Lr. Diodes D1 and D2, along with the output capacitor Co, form a rectifier and filter circuit. The load is a lithium battery pack. In the above system, the S1 and S2 drive signals are provided by the LLC half-bridge resonant controller 200. The dead time between the S1 and S2 drive signals must be set appropriately to create conditions for zero-voltage turn-on. If the dead time is not set properly, the MOSFET will not be able to achieve ZVS turn-on. Therefore, the converter needs to have a fast response speed to achieve a more accurate soft switching range.

[0004] To further improve the response speed of the LLC resonant controller chip 200, this invention introduces a novel fast compensation control loop, such as... Figure 2 As shown. The present invention is in Figure 1 The system shown introduces resonant signal detection capacitors Cc1 and Cc2 on the basis of traditional LLC resonant current detection CS to detect the voltage state of the LLC resonant circuit and feeds back the detected signal VLC to the LLC resonant controller chip 200. By adding a fast control loop inside the LLC resonant controller chip 200, precise control of the voltage and current state of the LLC resonant system is achieved. This scheme has a significant effect on improving the speed and stability of the LLC resonant control chip and the resonant switch controller. Summary of the Invention

[0005] Based on existing technology, this invention provides a fast-response control loop for LLC resonant switch controllers, improving the overall efficiency and response speed of the controller.

[0006] The fast response control loop provided by this invention includes a detection capacitor Cc1, a detection capacitor Cc2, a high-side charging current source Icp1, a low-side charging current source Icp2, an output feedback voltage detection circuit, a loop discrimination and comparison circuit, a first high-speed output drive circuit, and a second high-speed output drive circuit.

[0007] The lower end of the detection capacitor Cc2 is connected to the ground terminal of the resonant capacitor in the LLC half-bridge resonant converter power supply system. The upper end of the detection capacitor Cc1 is connected to the non-grounded terminal Vlcbus of the resonant capacitor in the LLC half-bridge resonant converter power supply system. The lower end of the detection capacitor Cc1 is connected to the upper end of the detection capacitor Cc2, the lower end of the high-side charging current source Icp1, and the upper end of the low-side charging current source Icp2. This circuit connection node generates a resonant voltage detection signal VLC, which is connected to the resonant voltage detection port of the loop discrimination and comparison circuit. The upper end of the high-side charging current source Icp1 is connected to the power supply voltage VCC, and the lower end of the low-side charging current source Icp2 is grounded. The output feedback voltage detection circuit is used to detect the voltage signal FB output by the LLC half-bridge resonant converter power supply system and outputs a feedback voltage signal Vfb, which is connected to the feedback voltage input of the loop discrimination and comparison circuit. The loop discrimination and comparison circuit determines the high-side output voltage Voh and the low-side output voltage Vol based on the states of the feedback voltage signal Vfb, the resonant voltage detection signal VLC, and the reference voltage signal Vcm. The high-side output voltage Voh is connected to the input of the first high-speed output drive circuit and is also used to control the on and off of the high-side charging current source Icp1. The low-side output voltage Vol is connected to the input of the second high-speed output drive circuit and is also used to control the on and off of the low-side charging current source Icp2. The first high-speed output drive circuit and the second high-speed output drive circuit respectively buffer drive the high-side output voltage Voh and the low-side output voltage Vol, and output the high-side output drive signal HG and the low-side output drive signal LG. The first high-speed output drive circuit and the second high-speed output drive circuit use the same output drive circuit.

[0008] The detection capacitors Cc1 and Cc2, the high-side charging current source Icp1, and the low-side charging current source Icp2 constitute a resonant cavity characteristic proportional replication circuit, which is used to perform real-time and rapid detection of the voltage and current characteristics of the Vlcbus terminal. The high-side charging current source Icp1 and the low-side charging current source Icp2 strictly replicate the voltage and current characteristics of the Vlcbus terminal according to the charging and discharging characteristics of the detection capacitors Cc1 and Cc2, that is, the currents of the high-side charging current source Icp1 and the low-side charging current source Icp2 must be the same, and this current is in a fixed ratio with the first high-speed output drive circuit and the second high-speed output drive circuit.

[0009] Specifically, the output feedback voltage detection circuit includes: PMOS transistors M41, M42, M46, M47, M410, M411, M412, NMOS transistors M43, M44, M45, M48, M49, M413, M414, M415, M416, M417, M418, inverters Inv41 and Inv42;

[0010] The inverter Inv41 has its input connected to the control signal OEN, and its output connected to the input of inverter Inv42 and the gate of NMOS transistor M418. The output of inverter Inv42 is connected to the gates of PMOS transistors M41, M42, and M43. The drain of NMOS transistor M43 is connected to current source Ib4, and its source is connected to the drain and gate of NMOS transistors M413, M414, M415, and NMOS transistor M418. The gates of transistors M416 and M417 are connected; the gate of NMOS transistor M44 serves as one signal input, connected to the reference voltage Vref; the gate of NMOS transistor M45 serves as another signal input, connected to the voltage signal FB; the source of NMOS transistor M44 is connected to the drain of NMOS transistor M414 and the gate of NMOS transistor M49; the source of NMOS transistor M45 is connected to the drain of NMOS transistor M415 and the gate of NMOS transistor M48; the drain of PMOS transistor M41 is connected to the gates of PMOS transistors M46, M47, and M410. The drains of PMOS transistors M46 and M48 are connected; the drain of PMOS transistor M47 is connected to the drains of NMOS transistors M49, M411, M42, and M412; the source of NMOS transistor M48 is connected to the source of NMOS transistor M49 and the drain of NMOS transistor M416; the drains of PMOS transistors M410 and M411 are connected; the drain of PMOS transistor M412 is connected to the drain of NMOS transistors M417, M411, and M418, and serves as an inverted... The output node of the feed voltage signal Vfb; the drain of NMOS transistor M44, the drain of NMOS transistor M45, the source of PMOS transistor M41, the source of PMOS transistor M42, the source of PMOS transistor M46, the source of PMOS transistor M47, the source of PMOS transistor M410, and the source of PMOS transistor M412 are all connected to the power supply voltage VCC; the source of NMOS transistor M413, the source of NMOS transistor M414, the source of NMOS transistor M415, the source of NMOS transistor M416, the source of NMOS transistor M417, and the source of NMOS transistor M418 are all connected to the ground voltage GND;

[0011] In this circuit, NMOS transistors M44 and M414 form a source follower, NMOS transistors M45 and M415 form another source follower, and PMOS transistors M46, M47, M48, M49, M416, M412, and M417 form a two-stage operational amplifier circuit. PMOS transistors M41, M42, M43, and M418 are the control switches of the circuit. When OEN is "0", the feedback voltage signal Vfb output by the output feedback voltage detection circuit is locked. When OEN is "1", the feedback voltage signal Vfb output by the output feedback voltage detection circuit is determined by the magnitude of the feedback voltage signal FB and the reference voltage Vref.

[0012] Specifically, the loop discrimination and comparison circuit includes: a fully differential operational amplifier OTA5, comparators cmp51 and cmp52, resistors R51, R52, R53, and R54; the left end of resistor R51 is connected to the feedback voltage signal Vfb, the left end of resistor R52 is connected to the reference voltage signal Vcm, the right end of resistor R51 is connected to the positive input terminal of the fully differential operational amplifier OTA5 and the left end of resistor R53, and the right end of resistor R52 is connected to the negative input terminal of the fully differential operational amplifier OTA5 and the reference voltage signal Vcm. The left end of resistor R54 and the right end of resistor R53 are connected to the negative output of the fully differential operational amplifier OTA5 and the positive input of comparator cmp51. The right end of resistor R54 is connected to the positive output of the fully differential operational amplifier OTA5 and the negative input of comparator cmp52. The positive input of comparator cmp52 and the negative input of comparator cmp51 are simultaneously connected to the resonant voltage detection signal VLC. Comparator cmp52 outputs a high-side output voltage Voh, and comparator cmp51 outputs a low-side output voltage Vol.

[0013] Specifically, the output driving circuit includes: a P-terminal inverter chain, an N-terminal inverter chain, a high-side output PMOS transistor M61, a low-side output NMOS transistor M62, a level shifting circuit, and a signal swing control circuit. Both the P-terminal and N-terminal inverter chains are composed of several inverters connected in series with progressively larger sizes. The input terminals of the output driving circuit are connected to the input terminals of the level shifting circuit and the N-terminal inverter chain, respectively. The level shifting circuit outputs a P-terminal input signal Vin, which is connected to the input terminal of the P-terminal inverter chain. The P-terminal inverter chain outputs a P-terminal gate control signal Vgh, which is connected to the gate of the high-side output PMOS transistor M61. The N-terminal inverter chain outputs an N-terminal gate control signal Vgl, which is connected to the gate of the low-side output NMOS transistor M62. The control signals Vgh and Vgl are used to control the high-side output driving P-terminal inverter chain. The MOS transistor M61 and the low-side output drive NMOS transistor M62 are turned on and off; the source terminal of the high-side output drive PMOS transistor M61 is connected to the power supply voltage VCC, and the drain terminal of the high-side output drive PMOS transistor M61 is connected to the drain terminal of the low-side output drive NMOS transistor M62, serving as the drive signal output terminal of the output drive circuit; the source of the low-side output drive NMOS transistor M62 is grounded; the signal swing control circuit is used to generate the floating power supply voltage Vssh and the low-voltage power supply voltage Vssl, where Vssh = VCC - Vssl; the power supply terminals of the inverters inside the P-side inverter chain are all connected to the power supply voltage VCC, and their ground terminals are all connected to the floating power supply voltage Vssh; the power supply terminals of the inverters inside the N-side inverter chain are all connected to the low-voltage power supply voltage Vssl, and their ground terminals are all connected to ground.

[0014] Specifically, the signal swing control circuit includes: PMOS transistors M301, M302, M303, M304, M305, M306, NMOS transistors M307, M308, M309, M310, M311, M312, M313, M314, M315, M316, M317, M318, and NMOS transistors M309. OS transistor M319, NMOS transistor M320, NMOS transistor M321, NMOS transistor M322, NMOS transistor M323, NMOS transistor M324, NMOS transistor M325, NMOS transistor M326, PMOS transistor M327, PMOS transistor M328, PMOS transistor M329, NMOS transistor M330, NMOS transistor M331, NMOS transistor M332, resistors R31, R32, R33, R34, R35, R36, R37, R38, R39 and R310;

[0015] Specifically, the gate of M301 is connected to the gates of M302 and M303, the drain of M304, and the drain of M307. The drain of M301 is connected to the source of M304, the drain of M302 is connected to the source of M305, and the drain of M303 is connected to the source of M306. The gate of M307 is connected to the reference voltage Vref. The drain of M305 is connected to the drain of M308 and the gate of M309. The source of M307 is connected to the source of M308 and the upper end of resistor R31. The drain of M306 is connected to the drain of M309 and the gate of M310. The drain of M310 is connected to the upper end of resistor R32. The connection point outputs the reference voltage Vrot, which is connected to the gate of M313, the gate of M312, the source of M312, the upper end of resistor R34, and the NMOS transistor M. Gate 332; the lower end of resistor R32 is connected to the upper end of resistor R33 and the gate of M308; the lower end of R34 is connected to the gate of M311, the drain of M311, and the gate of M314; the drain of M312 is connected to the source of M313 and the drain of M314; the gate of M315 is connected to the drain of M315, the gate of M316, and the source of M317; the gate of M317 is connected to the drain of M317, the gate of M318, and the drain of M313; the drain of M316 is connected to the source of M318, and the drain of M318 is connected to the drain of M319, the gate of M319, the gate of M320, and the gate of M322; the source of M319 is connected to the upper end of resistor R35, the source of M320, and the drain of M320; the lower end of resistor R35 is connected to the upper end of R36 and the gate of M323. The lower end of R36 is connected to the gate and drain of M321; the source of M322 is connected to the drain of M323 and the upper end of resistor R37, and the connection point outputs a low-voltage power supply voltage Vssl; the source of M326 is connected to the upper end of resistor R38, the lower end of R38 is connected to the upper end of resistor R39 and the gate of M327, the lower end of R39 is connected to the source of M328, the drain of M324, the source of M324, and the gate of M325; the gate of M328 is connected to the drain of M328, the gate of M329, the drain of M330, the drain of M325, and the source of M325; the gate of M330 is connected to the gate of M331; the source of M330 is connected to the drain of M332; the drain of M327 is connected to the source of M329 and the lower end of resistor R310, and the connection point outputs a floating voltage. The power supply voltage is Vssh; the sources of PMOS transistors M301, M302, M303, M304, M315, and M316, the drain of NMOS transistors M322, the gate of M324, M326, and M327, as well as the upper end of resistor R310, are all connected to the power supply voltage VCC; the lower ends of resistors R31 and R33, the sources of NMOS transistors M311, M314, M321, and M323, the lower end of resistor R37, and the sources of NMOS transistors M331 and M332 are all connected to ground.

[0016] In the above circuit, PMOS transistors M301, M302, M303, M304, M305, M306, NMOS transistors M307, M308, M309, and M310, along with resistors R31, R32, and R33, form an input buffer LDO circuit that converts the input reference voltage Vref into a reference voltage Vrot with voltage drive capability.

[0017] The NMOS transistors M311, M312, M313, M314, M315, M316, M317, M318, M319, M320, M321, M322, and M323, along with resistors R34, R35, R36, and R37, form a step-down circuit used to generate a floating power supply voltage Vssh = VCC - Vssl based on the reference voltage Vrot.

[0018] The NMOS transistors M325, M326, M327, M328, M329, M330, M331, and M332, along with resistors R38, R39, and R310, form a low-voltage power supply generation circuit. This circuit generates a low-voltage power supply with a voltage of Vssl based on the reference voltage Vrot.

[0019] The advantages of this invention are as follows: To improve the response speed of the LLC half-bridge resonant controller, this invention first employs a proportional replication circuit of the LLC current output SW node characteristics. This circuit predicts the resonant cavity characteristics before the SW node current output, avoiding the slow response speed problem caused by the delay of the feedback voltage signal FB and current detection signal CS in existing LLC resonant controllers. Furthermore, this invention uses a high-speed output drive circuit, reducing the internal signal delay by decreasing the internal signal swing, thereby achieving a faster loop response. The solution of this invention can be widely applied to various LLC resonant converter power supply systems. Attached Figure Description

[0020] Figure 1 This is a topology diagram of a typical LLC half-bridge resonant converter system.

[0021] Figure 2 The diagram shows the topology of the LLC half-bridge resonant converter system using the present invention.

[0022] Figure 3 This is a circuit structure block diagram of the present invention.

[0023] Figure 4 This is a schematic diagram of the output feedback voltage detection circuit of the present invention.

[0024] Figure 5 This is a schematic diagram of the loop discrimination and comparison circuit of the present invention.

[0025] Figure 6 This is an embodiment of the high-speed output drive circuit of the present invention.

[0026] Figure 7 This is an embodiment of the signal swing control circuit of the present invention.

[0027] Figure 8 This is an application example of the present invention in an LLC half-bridge resonant converter. Detailed Implementation

[0028] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments.

[0029] like Figure 3 As shown, the fast response control loop for an LLC resonant switch controller according to the present invention includes: a detection capacitor Cc1, a detection capacitor Cc2, a high-side charging current source Icp1, a low-side charging current source Icp2, an output feedback voltage detection circuit 1, a loop discrimination and comparison circuit 2, a first high-speed output drive circuit 3, and a second high-speed output drive circuit 4.

[0030] The lower end of the detection capacitor Cc2 is connected to the ground terminal of the resonant capacitor in the LLC half-bridge resonant converter power supply system. The upper end of the detection capacitor Cc1 is connected to the non-ground terminal Vlcbus of the resonant capacitor Cr in the LLC half-bridge resonant converter power supply system. The lower end of the detection capacitor Cc1 is connected to the upper end of the detection capacitor Cc2, the lower end of the high-side charging current source Icp1, and the upper end of the low-side charging current source Icp2. The circuit connection node generates a resonant voltage detection signal VLC, which is connected to the resonant voltage detection port of the loop discrimination and comparison circuit (2). The upper end of the high-side charging current source Icp1 is connected to the power supply voltage VCC. The lower ends of the detection capacitor Cc2 and the lower ends of the low-side charging current source Icp2 are both grounded to the ground voltage GND.

[0031] The output feedback voltage detection circuit 1 is used to detect the voltage signal FB output by the power supply system of the LLC half-bridge resonant converter and output a feedback voltage signal Vfb, which is connected to the feedback voltage input port of the loop discrimination and comparison circuit 2.

[0032] The loop discrimination and comparison circuit 2 determines the high-side output voltage Voh and the low-side output voltage Vol based on the states of the feedback voltage signal Vfb, the resonant voltage detection signal VLC, and the reference voltage signal Vcm. The high-side output voltage Voh is connected to the input terminal of the first high-speed output drive circuit 3 and is also used to control the switching on and off of the high-side charging current source Icp1; the low-side output voltage Vol is connected to the input terminal of the second high-speed output drive circuit 4 and is also used to control the switching on and off of the low-side charging current source Icp2.

[0033] The first high-speed output drive circuit 3 and the second high-speed output drive circuit 4 respectively buffer and drive the high-side output voltage Voh and the low-side output voltage Vol to obtain the high-side output drive signal HG and the low-side output drive signal LG. The first high-speed output drive circuit 3 and the second high-speed output drive circuit 4 are implemented using the same high-speed output drive circuit.

[0034] Figure 3 The detection capacitors Cc1 and Cc2, the high-side charging current source Icp1, and the low-side charging current source Icp2 constitute a resonant cavity characteristic proportional replication circuit, which is used to perform real-time and rapid detection of the voltage and current characteristics of the current output SW node of the resonant controller chip 200 (which is also reflected in the voltage and current characteristics of the non-grounded Vlcbus node of the resonant capacitor Cr). The charging and discharging characteristics of the detection capacitors Cc1 and Cc2 by the high-side charging current source Icp1 and the low-side charging current source Icp2 need to strictly replicate the voltage and current characteristics of the non-grounded Vlcbus node of the resonant capacitor Cr in proportion. That is, the currents of the high-side charging current source Icp1 and the low-side charging current source Icp2 must be the same, and the currents are in a fixed proportion to the first high-speed output drive circuit 3 and the second high-speed output drive circuit 4. For example, if the currents of the high-side charging current source Icp1 and the low-side charging current source Icp2 are 1% of those of the first high-speed output drive circuit 3 and the second high-speed output drive circuit 4, then the values ​​of the detection capacitors Cc1 and Cc2 should be 1% of the resonant capacitor Cr of the SW node. Therefore, the driving capability of the high-side output voltage Voh and the low-side output voltage Vol is only 1% of that of the first high-speed output drive circuit 3 and the second high-speed output drive circuit 4. The LLC resonant voltage detection signal VLC will replicate the characteristics of the SW node with a current amplitude of 1%. Therefore, in the fast-response control loop proposed in this invention, the high-side output drive signal HG and the low-side output drive signal LG will quickly respond to the characteristics of the SW node.

[0035] Figure 1In the conventional LLC resonant switch controller shown, the high-side output drive signal HG and the low-side output drive signal LG are only controlled by the feedback of the voltage signal FB and the current signal CS output by the LLC half-bridge resonant converter power system. However, both the voltage signal FB and the current signal CS can only be obtained after the resonant controller chip 200's current output SW node drives the resonant cavity to resonate. Therefore, in the conventional LLC resonant switch controller, the feedback control signals required for the high-side output drive signal HG and the low-side output drive signal LG lag behind the transient changes of the resonant controller chip 200's current output SW node in time. The control loop proposed in this invention can detect and determine the characteristics of the resonant controller chip 200's current output SW node before the resonant cavity is driven to resonate, thus achieving a faster response speed.

[0036] Figure 4 for Figure 3 The schematic diagram of the output feedback voltage detection circuit 1 is shown. The circuit includes: PMOS transistors M41, M42, M46, M47, M410, M411, M412, NMOS transistors M43, M44, M45, M48, M49, M413, M414, M415, M416, M417, M418, inverters Inv41 and Inv42.

[0037] The inverter Inv41 has its input connected to the control signal OEN, and its output connected to both the input of inverter Inv42 and the gate of NMOS transistor M418. Inverter Inv42 has its output connected to the gates of PMOS transistors M41, M42, and M43. The drain of NMOS transistor M43 is connected to current source Ib4, and its source is connected to the drain and gate of NMOS transistors M413, M414, M415, and M416, as well as the gate of NMOS transistor M418. The gate of transistor M7 is connected to the reference voltage Vref as the signal input terminal; the gate of transistor M44 is connected to the voltage signal FB output by the power supply system of the LLC half-bridge resonant converter as another signal input terminal; the source of transistor M44 is connected to the drain of transistor M414 and also to the gate of transistor M49; the source of transistor M45 is connected to the drain of transistor M415 and also to the gate of transistor M48; the drain of transistor M41 is connected to the gates of transistors M46, M47, and M410. The drain of PMOS transistor M46 and the drain of PMOS transistor M48 are connected to the drain of PMOS transistor M47, which is also connected to the drain of NMOS transistor M49, the drain of PMOS transistor M411, the drain of PMOS transistor M42, and the gate of PMOS transistor M412. The source of NMOS transistor M48 is connected to the source of NMOS transistor M49, and also connected to the drain of NMOS transistor M416. The drain of PMOS transistor M410 is connected to the source of PMOS transistor M411. The drain of PMOS transistor M412 is connected to the drain of NMOS transistor M417, and also connected to the gate of PMOS transistor M411 and the gate of NMOS transistor M418. The drain of the transistor also serves as the output node for the feedback voltage signal Vfb; the drains of NMOS transistors M44 and M45, the sources of PMOS transistors M41, M42, M46, M47, M410, and M412 are all connected to the power supply voltage VCC; the sources of NMOS transistors M413, M414, M415, M416, M417, and M418 are all connected to the ground voltage GND.

[0038] In the above circuit, NMOS transistors M44 and M414 form a source follower, and NMOS transistors M45 and M415 form another source follower. PMOS transistors M46, M47, M48, M49, M416, M412, and M417 form a two-stage operational amplifier circuit. PMOS transistors M41, M42, M43, and M418 are the circuit's on / off control switches. When OEN is "0", the output Vfb signal of the output feedback voltage detection circuit 1 is locked; when OEN is "1", the output Vfb signal of the output feedback voltage detection circuit 1 is determined by the voltage signal FB and the reference voltage Vref.

[0039] Figure 5 for Figure 3 The schematic diagram of the middle loop discrimination and comparison circuit 2 shows that this circuit mainly determines the high-side output voltage Voh and the low-side output voltage Vol based on the states of the feedback voltage signal Vfb, the resonant voltage detection signal VLC, and the reference voltage signal Vcm. The middle loop discrimination and comparison circuit 2 includes: a fully differential operational amplifier OTA5, comparators cmp51 and cmp52, resistors R51, R52, R53, and R54. The left end of resistor R51 is connected to the feedback voltage signal Vfb, the left end of resistor R52 is connected to the reference voltage signal Vcm, the right end of resistor R51 is connected to the positive input terminal of the fully differential operational amplifier OTA5 and the left end of resistor R53, the right end of resistor R52 is connected to the negative input terminal of the fully differential operational amplifier OTA5 and the left end of resistor R54, the right end of resistor R53 is connected to the negative output terminal of the fully differential operational amplifier OTA5 and the positive input terminal of comparator cmp51, the right end of resistor R54 is connected to the positive output terminal of the fully differential operational amplifier OTA5 and the negative input terminal of comparator cmp52, the positive input terminal of comparator cmp52 and the negative input terminal of comparator cmp51 are simultaneously connected to the resonant voltage detection signal VLC, and the outputs of comparator cmp52 and comparator cmp51 are the high-side output voltage Voh and the low-side output voltage Vol, respectively.

[0040] In the circuit described above, the fully differential operational amplifier OTA5, resistors R51, R52, R53, and R54 constitute a differential proportional amplifier circuit, which amplifies the difference between the feedback voltage signal Vfb and the reference voltage signal Vcm. Then, the difference is compared with the resonant voltage detection signal VLC by comparators cmp51 and cmp52 to obtain the high-side output voltage Voh and the low-side output voltage Vol.

[0041] Figure 6 for Figure 3The diagram shows the output drive circuits used in the first high-speed output drive circuit 3 and the second high-speed output drive circuit 4. The signals in the diagram are labeled using the input and output signals of the high-side first high-speed output drive circuit 3 as an example. This output drive circuit includes: a P-side inverter chain 63, an N-side inverter chain 64, a high-side output PMOS transistor M61, a low-side output NMOS transistor M62, a level shifting circuit 62, and a signal swing control circuit 61. Both the P-side inverter chain 63 and the N-side inverter chain 64 are composed of several inverters connected in series with progressively larger sizes.

[0042] The circuit connections are as follows: the input signal Voh enters the level shifter circuit 62 to obtain the P-terminal input signal Vin. Vin enters the P-terminal inverter chain 63 to obtain the P-terminal gate control signal Vgh. The input signal Voh enters the N-terminal inverter chain 64 to obtain the N-terminal gate control signal Vgl. Vgh and Vgl are used to control the on and off states of the high-side output drive PMOS transistor M61 and the low-side output drive NMOS transistor M62, respectively. The source terminal of the high-side output drive PMOS transistor M61 is connected to the power supply voltage VCC, and the drain terminal of the high-side output drive PMOS transistor M61 is connected to the drain terminal of the low-side output drive NMOS transistor M62 and the drive signal output terminal of the output drive circuit. The source terminal of the low-side output drive NMOS transistor M62 is grounded to GND.

[0043] The power supply terminals of all inverters in the P-terminal inverter chain 63 are connected to the power supply voltage VCC, and the ground terminals of all inverters are connected to the floating power supply voltage Vssh.

[0044] The power supply terminals of all inverters inside the N-terminal inverter chain 64 are connected to the low-voltage power supply voltage Vssl, and the ground terminals of all inverters are connected to the ground voltage GND.

[0045] The floating power supply voltage Vssh and the low-voltage power supply voltage Vssl are both provided by the signal swing control circuit 61, and satisfy the relationship Vssh=VCC-Vssl.

[0046] Figure 6 In the circuit shown, the source-drain and gate-source breakdown voltages of all PMOS and NMOS transistors within the P-side and N-side inverter chains are Vssl. The gate-source breakdown voltages of the high-side output driver PMOS transistor M61 and the low-side output driver NMOS transistor M62 are also Vssl. The source-drain breakdown voltages of the high-side output driver PMOS transistor M61 and the low-side output driver NMOS transistor M62 are VCC. Figure 6In the given circuit, the input and output voltage amplitudes of the internal circuits of the P-side inverter chain and the N-side inverter chain are reduced from the original VCC to Vssl. The signal swings of Vgh and Vgl are both Vssl, which effectively shortens the charging and discharging time of the gate equivalent capacitance of the high-side output driving PMOS transistor M61 and the low-side output driving NMOS transistor M62, thereby improving the driving speed of the entire circuit.

[0047] Figure 7 for Figure 6 One implementation of the signal swing control circuit 61. This circuit consists of PMOS transistors M301, M302, M303, M304, M305, M306, NMOS transistors M307, M308, M309, M310, M311, M312, M313, M314, M315, M316, M317, M318, and M319. It consists of NMOS transistors M320, M321, M322, M323, M324, M325, M326, PMOS transistors M327, M328, M329, M330, M331, and M332, and resistors R31, R32, R33, R34, R35, R36, R37, R38, R39, and R310.

[0048] In this configuration, the gates of M301, M302, and M303, the drain of M304, and the drain of M307 are connected. The drain of M301 is connected to the source of M304, the drain of M302 is connected to the source of M305, and the drain of M303 is connected to the source of M306. The gate of M307 serves as the input terminal for the reference voltage Vref. The drain of M305 is connected to the drain of M308 and also to the gate of M309. The source of M307 is connected to the source of M308 and also to the upper end of resistor R31. The drain of M306 is connected to the drain of M309 and also to the gate of M310. The upper end of resistor R32 is connected to the gate of M308, which also serves as the output terminal of the reference voltage Vrot. The lower end of resistor R32 is connected to the upper end of resistor R33, and also to the gate of M308. The gates and sources of M313 and M312 are connected together, and also connected to the upper end of resistor R34 and the input terminal of voltage Vrot. The gates and drains of M311 and M314 are connected together. The drain of M312, the source of M313, and the drain of M314 are connected together. The gates and drains of M315 and M316 are connected together. The gates and drains of M317 and M318 are connected together. The drains of M313 are connected together; the drain of M316 is connected to the source of M318, and the drain of M318 is connected to the drain of M319, also connecting to the gates of M319, M320, and M322; the source of M319 is connected to the upper end of resistor R35, and also connecting to the source and drain of M320; the lower end of resistor R35 is connected to the upper end of R36 and the gate of M323, and the lower end of R36 is connected to the gate and drain of M321; the source of M322 is connected to the drain of M323 and the upper end of resistor R37, also serving as the output terminal of the low-voltage power supply voltage Vssl; the source of M326 is connected to the upper end of resistor R38, R3... The lower end of resistor 8 is connected to the upper end of resistor R39 and the gate of M327. ​​The lower end of R39 is connected to the source of M328, and also to the drain and source of M324, as well as the gate of M325. The gate and drain of M328, the gate of M329, and the drain of M330 are connected together, and also to the drain and source of M325. The gate of M330 is connected to the gate of M331. The source of M330 is connected to the drain of M332, and the gate of M332 is connected to the reference voltage Vrot. The drain of M327 is connected to the source of M329, and also to the lower end of resistor R310, serving as the output terminal of the floating power supply voltage Vssh.The sources of PMOS transistors M301, M302, M303, M304, M315, and M316, the drain of NMOS transistor M322, the gate of M324, the drain and gate of M326, the source of M327, and the upper terminal of resistor R310 are all connected to the power supply voltage VCC. The lower terminals of resistors R31 and R33, the sources of NMOS transistors M311, M314, M321, and M323, the lower terminal of resistor R37, the source of NMOS transistors M331 and M332, are all connected to ground voltage GND.

[0049] Figure 7 The circuit shown includes several functional modules:

[0050] 1. PMOS transistors M301, M302, M303, M304, M305, M306, NMOS transistors M307, M308, M309, and M310, along with resistors R31, R32, and R33, form an input buffer LDO circuit that converts the input reference voltage Vref into a reference voltage Vrot with a certain voltage drive capability.

[0051] 2. NMOS transistors M311, M312, M313, M314, M315, M316, M317, M318, M319, M320, M321, M322, and M323, along with resistors R34, R35, R36, and R37, form a step-down circuit to generate a floating power supply voltage Vssh = VCC - Vssl based on the reference voltage Vrot.

[0052] 3. NMOS transistors M325, M326, M327, M328, M329, M330, M331, and M332, along with resistors R38, R39, and R310, form a low-voltage power supply generation circuit. This circuit generates a low-voltage power supply with a voltage of Vssl based on the reference voltage Vrot.

[0053] Figure 8This paper demonstrates the application effect of the present invention in an existing LLC half-bridge resonant switch controller. The LLC half-bridge resonant switch controller using this invention includes: a current detection circuit, an oscillation clock generation circuit, a current follower detection circuit, a comprehensive control logic circuit, an input buffer circuit, a feedback voltage detection circuit, a programmable dead time generation circuit, a level shifting circuit, an over-temperature protection circuit (OTP), an over-current protection circuit (OCP), and the fast-response control loop of the present invention for the LLC resonant switch controller. Figure 8 In this invention, the fast-response control loop is divided into two modules and applied in an LLC half-bridge resonant switch controller system. The detection capacitors Cc1 and Cc2, high-side charging current source Icp1, low-side charging current source Icp2, output feedback voltage detection circuit, and loop discrimination comparison circuit are used separately and are shown below. The high-speed output drive circuit is shown as a separate module on the right. The high-side output voltage Voh and low-side output voltage Vol output by the loop discrimination comparison circuit first enter the programmable dead-time generation circuit to generate a high-side output switch control signal Dho and a low-side output switch control signal Dllo with dead-time protection. The high-side output switch control signal Dho enters the level shifting circuit to generate a high-side output signal Dhho, which then passes through the first high-speed output drive circuit 3 to generate a high-side gate drive signal HG. The low-side output switch control signal Dllo enters the second high-speed output drive circuit 4 to generate a low-side gate drive signal LG.

[0054] Figure 8 The illustrated LLC half-bridge resonant switch controller circuit implementation using this invention first detects the state of the current signal CS output by the LLC half-bridge resonant converter power system at different times, and then adaptively adjusts the dead time to minimize the switching losses of the LLC half-bridge resonant converter power system, achieving optimal soft-switching characteristics. Additionally, the voltage signal FB output by the LLC half-bridge resonant converter power system is detected by the feedback voltage detection circuit and generates an output voltage detection signal Dfb. The input buffer circuit generates an input frequency control signal Ifset based on the external frequency control signal FSET. The output current detection signal Ics and the input frequency control signal Ifset enter the oscillation clock generation circuit to adjust the clock frequencies of the reference clock OSC, current sampling control clock Ckcs, current following control clock Ckcom, and dead time control clock Ckdt. In the above control process, the feedback control signal lags behind the transient changes of the current output SW node of the resonant controller chip 200. The fast response control loop proposed in this invention can detect the characteristics of the current output SW node of the resonant controller chip 200 before the resonant cavity is driven to resonate by detecting the state of the VLC signal.

[0055] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A fast-response control loop for an LLC resonant switching controller, characterized in that, It includes detection capacitor Cc1, detection capacitor Cc2, high-side charging current source Icp1, low-side charging current source Icp2, output feedback voltage detection circuit (1), loop discrimination comparison circuit (2), first high-speed output drive circuit (3) and second high-speed output drive circuit (4); The lower end of the detection capacitor Cc2 is connected to the ground terminal of the resonant capacitor in the LLC half-bridge resonant converter power supply system. The upper end of the detection capacitor Cc1 is connected to the non-grounded terminal Vlcbus of the resonant capacitor in the LLC half-bridge resonant converter power supply system. The lower end of the detection capacitor Cc1 is connected to the upper end of the detection capacitor Cc2, the lower end of the high-side charging current source Icp1, and the upper end of the low-side charging current source Icp2. The circuit connection node generates a resonant voltage detection signal VLC, which is connected to the resonant voltage detection port of the loop discrimination and comparison circuit (2). The upper end of the high-side charging current source Icp1 is connected to the power supply voltage VCC, and the lower end of the low-side charging current source Icp2 is grounded. The output feedback voltage detection circuit (1) is used to detect the voltage signal FB output by the LLC half-bridge resonant converter power supply system and output a feedback voltage signal Vfb, which is connected to the feedback voltage input port of the loop discrimination and comparison circuit (2). The comparison circuit (2) determines the high-side output voltage Voh and the low-side output voltage Vol based on the state of the feedback voltage signal Vfb, the resonant voltage detection signal VLC and the reference voltage signal Vcm. The high-side output voltage Voh is connected to the input terminal of the first high-speed output drive circuit (3) and is also used to control the opening and closing of the high-side charging current source Icp1. The low-side output voltage Vol is connected to the input terminal of the second high-speed output drive circuit (4) and is also used to control the opening and closing of the low-side charging current source Icp2. The first high-speed output drive circuit (3) and the second high-speed output drive circuit (4) respectively buffer drive the high-side output voltage Voh and the low-side output voltage Vol, and output the high-side output drive signal HG and the low-side output drive signal LG. The first high-speed output drive circuit (3) and the second high-speed output drive circuit (4) use the same output drive circuit.

2. The fast-response control loop for an LLC resonant switch controller according to claim 1, characterized in that, The detection capacitors Cc1 and Cc2, the high-side charging current source Icp1 and the low-side charging current source Icp2 constitute a resonant cavity characteristic proportional replication circuit, which is used to perform real-time and rapid detection of the voltage and current characteristics of the Vlcbus terminal. The high-side charging current source Icp1 and the low-side charging current source Icp2 strictly replicate the voltage and current characteristics of the Vlcbus terminal according to the charging and discharging characteristics of the detection capacitors Cc1 and Cc2. That is, the currents of the high-side charging current source Icp1 and the low-side charging current source Icp2 must be the same, and the currents are in a fixed ratio with the first high-speed output driving circuit (3) and the second high-speed output driving circuit (4).

3. The fast-response control loop for an LLC resonant switch controller according to claim 1, characterized in that, The output feedback voltage detection circuit (1) includes: PMOS transistors M41, M42, M46, M47, M410, M411, M412, NMOS transistors M43, M44, M45, M48, M49, M413, M414, M415, M416, M417, M418, inverter Inv41, and inverter Inv42; The inverter Inv41 has its input connected to the control signal OEN, and its output connected to the input of inverter Inv42 and the gate of NMOS transistor M418. The output of inverter Inv42 is connected to the gates of PMOS transistors M41, M42, and M43. The drain of NMOS transistor M43 is connected to current source Ib4, and its source is connected to the drain and gate of NMOS transistors M413, M414, M415, and NMOS transistor M418. The gates of transistors M416 and M417 are connected; the gate of NMOS transistor M44 serves as one signal input, connected to the reference voltage Vref; the gate of NMOS transistor M45 serves as another signal input, connected to the voltage signal FB; the source of NMOS transistor M44 is connected to the drain of NMOS transistor M414 and the gate of NMOS transistor M49; the source of NMOS transistor M45 is connected to the drain of NMOS transistor M415 and the gate of NMOS transistor M48; the drain of PMOS transistor M41 is connected to the gates of PMOS transistors M46, M47, and M410. The drains of PMOS transistors M46 and M48 are connected; the drain of PMOS transistor M47 is connected to the drains of NMOS transistors M49, M411, M42, and M412; the source of NMOS transistor M48 is connected to the source of NMOS transistor M49 and the drain of NMOS transistor M416; the drains of PMOS transistors M410 and M411 are connected; the drain of PMOS transistor M412 is connected to the drain of NMOS transistors M417, M411, and M418, and serves as an inverted... The output node of the feed voltage signal Vfb; the drain of NMOS transistor M44, the drain of NMOS transistor M45, the source of PMOS transistor M41, the source of PMOS transistor M42, the source of PMOS transistor M46, the source of PMOS transistor M47, the source of PMOS transistor M410, and the source of PMOS transistor M412 are all connected to the power supply voltage VCC; the source of NMOS transistor M413, the source of NMOS transistor M414, the source of NMOS transistor M415, the source of NMOS transistor M416, the source of NMOS transistor M417, and the source of NMOS transistor M418 are all connected to the ground voltage GND; Among them, NMOS transistors M44 and M414 form a source follower, NMOS transistors M45 and M415 form another source follower, PMOS transistors M46, M47, M48, M49, M416, M412, and M417 form a two-stage operational amplifier circuit, and PMOS transistors M41, M42, M43, and M418 are the control switches of the circuit; when OEN is "0", the feedback voltage signal Vfb output by the output feedback voltage detection circuit (1) is locked; when OEN is "1", the feedback voltage signal Vfb output by the output feedback voltage detection circuit (1) is determined by the magnitude of the feedback voltage signal FB and the reference voltage Vref.

4. The fast-response control loop for an LLC resonant switch controller according to claim 1, characterized in that, The loop discrimination and comparison circuit (2) includes: a fully differential operational amplifier OTA5, comparators cmp51 and cmp52, resistors R51, R52, R53, and R54; the left end of resistor R51 is connected to the feedback voltage signal Vfb, the left end of resistor R52 is connected to the reference voltage signal Vcm, the right end of resistor R51 is connected to the positive input terminal of the fully differential operational amplifier OTA5 and the left end of resistor R53, and the right end of resistor R52 is connected to the negative input terminal of the fully differential operational amplifier OTA5 and the reference voltage signal Vcm. The left end of resistor R54 and the right end of resistor R53 are connected to the negative output of the fully differential operational amplifier OTA5 and the positive input of comparator cmp51. The right end of resistor R54 is connected to the positive output of the fully differential operational amplifier OTA5 and the negative input of comparator cmp52. The positive input of comparator cmp52 and the negative input of comparator cmp51 are simultaneously connected to the resonant voltage detection signal VLC. Comparator cmp52 outputs a high-side output voltage Voh, and comparator cmp51 outputs a low-side output voltage Vol.

5. The fast-response control loop for an LLC resonant switch controller according to claim 1, characterized in that, The output driving circuit includes: a P-terminal inverter chain (63), an N-terminal inverter chain (64), a high-side output PMOS transistor M61, a low-side output NMOS transistor M62, a level shifting circuit (62), and a signal swing control circuit (61). The P-terminal inverter chain (63) and the N-terminal inverter chain (64) are both composed of several inverters with progressively larger sizes connected in series. The input terminals of the output drive circuit are respectively connected to the input terminals of the level shift circuit (62) and the N-terminal inverter chain (64). The level shift circuit (62) outputs the P-terminal input signal Vin, which is connected to the input terminal of the P-terminal inverter chain (63). The P-terminal inverter chain (63) outputs the P-terminal gate control signal Vgh, which is connected to the gate of the high-side output PMOS transistor M61. The N-terminal inverter chain (64) outputs the N-terminal gate control signal Vgl, which is connected to the gate of the low-side output NMOS transistor M62. The control signals Vgh and Vgl are used to control the conduction and turn-off of the high-side output drive PMOS transistor M61 and the low-side output drive NMOS transistor M62, respectively. The source terminal of the high-side output drive PMOS transistor M61 is connected to... The power supply voltage VCC, the drain terminal of the high-side output driving PMOS transistor M61 is connected to the drain terminal of the low-side output driving NMOS transistor M62, and serves as the drive signal output terminal of the output driving circuit; the source of the low-side output driving NMOS transistor M62 is grounded; the signal swing control circuit (61) is used to generate the floating power supply voltage Vssh and the low-voltage power supply voltage Vssl, Vssh = VCC - Vssl; the power supply terminals of the inverters inside the P-terminal inverter chain (63) are all connected to the power supply voltage VCC, and the ground terminals are all connected to the floating power supply voltage Vssh; the power supply terminals of the inverters inside the N-terminal inverter chain (64) are all connected to the low-voltage power supply voltage Vssl, and the ground terminals are all connected to the ground voltage.

6. The fast-response control loop for an LLC resonant switch controller according to claim 5, characterized in that, The signal swing control circuit (61) includes: PMOS transistors M301, M302, M303, M304, M305, M306, NMOS transistors M307, M308, M309, M310, M311, M312, M313, M314, M315, M316, M317, M318, and M309. OS transistor M319, NMOS transistor M320, NMOS transistor M321, NMOS transistor M322, NMOS transistor M323, NMOS transistor M324, NMOS transistor M325, NMOS transistor M326, PMOS transistor M327, PMOS transistor M328, PMOS transistor M329, NMOS transistor M330, NMOS transistor M331, NMOS transistor M332, resistors R31, R32, R33, R34, R35, R36, R37, R38, R39 and R310; Specifically, the gate of M301 is connected to the gates of M302 and M303, the drain of M304, and the drain of M307. The drain of M301 is connected to the source of M304, the drain of M302 is connected to the source of M305, and the drain of M303 is connected to the source of M306. The gate of M307 is connected to the reference voltage Vref. The drain of M305 is connected to the drain of M308 and the gate of M309. The source of M307 is connected to the source of M308 and the upper end of resistor R31. The drain of M306 is connected to the drain of M309 and the gate of M310. The drain of M310 is connected to the upper end of resistor R32. The connection point outputs the reference voltage Vrot, which is connected to the gate of M313, the gate of M312, the source of M312, the upper end of resistor R34, and the NMOS transistor M. Gate 332; the lower end of resistor R32 is connected to the upper end of resistor R33 and the gate of M308; the lower end of R34 is connected to the gate of M311, the drain of M311, and the gate of M314; the drain of M312 is connected to the source of M313 and the drain of M314; the gate of M315 is connected to the drain of M315, the gate of M316, and the source of M317; the gate of M317 is connected to the drain of M317, the gate of M318, and the drain of M313; the drain of M316 is connected to the source of M318, and the drain of M318 is connected to the drain of M319, the gate of M319, the gate of M320, and the gate of M322; the source of M319 is connected to the upper end of resistor R35, the source of M320, and the drain of M320; the lower end of resistor R35 is connected to the upper end of R36 and the gate of M323. The lower end of R36 is connected to the gate and drain of M321; the source of M322 is connected to the drain of M323 and the upper end of resistor R37, and the connection point outputs a low-voltage power supply voltage Vssl; the source of M326 is connected to the upper end of resistor R38, the lower end of R38 is connected to the upper end of resistor R39 and the gate of M327, the lower end of R39 is connected to the source of M328, the drain of M324, the source of M324, and the gate of M325; the gate of M328 is connected to the drain of M328, the gate of M329, the drain of M330, the drain of M325, and the source of M325; the gate of M330 is connected to the gate of M331; the source of M330 is connected to the drain of M332; the drain of M327 is connected to the source of M329 and the lower end of resistor R310, and the connection point outputs a floating voltage. The power supply voltage is Vssh; the sources of PMOS transistors M301, M302, M303, M304, M315, and M316, the drain of NMOS transistors M322, the gate of M324, M326, and M327, as well as the upper end of resistor R310, are all connected to the power supply voltage VCC; the lower ends of resistors R31 and R33, the sources of NMOS transistors M311, M314, M321, and M323, the lower end of resistor R37, and the sources of NMOS transistors M331 and M332 are all connected to ground.

7. The fast-response control loop for an LLC resonant switch controller according to claim 6, characterized in that: The PMOS transistors M301, M302, M303, M304, M305, M306, M307, M308, M309, and M310, along with resistors R31, R32, and R33, form an input buffer LDO circuit that converts the input reference voltage Vref into a reference voltage Vrot with voltage drive capability. The NMOS transistors M311, M312, M313, M314, M315, M316, M317, M318, M319, M320, M321, M322, and M323, along with resistors R34, R35, R36, and R37, form a step-down circuit used to generate a floating power supply voltage Vssh = VCC - Vssl based on the reference voltage Vrot. The NMOS transistors M325, M326, M327, M328, M329, M330, M331, and M332, along with resistors R38, R39, and R310, form a low-voltage power supply generation circuit. This circuit generates a low-voltage power supply with a voltage of Vssl based on the reference voltage Vrot.

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