Image forming apparatus, control method of image forming apparatus, storage medium
Patent Information
- Application Number
- CN202310318586.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-03-28
- Publication Date
- 2026-10-23
- Estimated Expiration
- 2043-03-28
AI Technical Summary
[0003]有鉴于此,本发明实施例提供了一种图像形成装置和图像形成装置的控制方法、存储介质,用以解决现有技术中用户体验较差的问题
[0037]本发明实施例提供的技术方案中,图像形成装置处于低功耗模式时,电源控制单元将供电模式置于低功耗供电模式;检测单元检测到ADF处有纸时,生成有纸电平信号并将有纸电平信号传递至开关单元;开关单元根据有纸电平信号控制双电源电路导通,使能MCU供电;MCU检测有纸电平信号,并根据有纸电平信号确定并执行有纸操作。本发明实施例提供的技术方案中,图像形成装置通过在检测单元检测到ADF处有纸时唤醒SoC使能MCU供电工作,在降低功耗的同时,使得用户在图像形成装置低功耗模式时也可以获取检测单元的纸有无状态,提高了用户体验。
Smart Images

Figure CN116471359B_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to the field of image forming apparatus technology, and in particular to an image forming apparatus and a control method and storage medium for the image forming apparatus. [Background Technology]
[0002] In existing image forming apparatuses, the automatic document feeder (ADF) is controlled independently by a microcontroller unit (MCU). After the data board powers the ADF engine board, the MCU detects the status of various sensors on the ADF engine board. When a personal computer (PC) needs to obtain sensor status information, the image forming apparatus communicates with the data board through the ADF engine board, feeding back the sensor status to the data board, which then feeds back to the PC. However, in low-power mode, this method results in relatively high power consumption. Related technologies have addressed this by directly shutting off the power supply to the ADF engine board, which reduces power consumption. However, when the image forming apparatus is in low-power mode, the user cannot read the status of critical sensors on the ADF engine board, such as the paper detection sensor's paper presence status, and the image forming apparatus cannot be woken up, resulting in a poor user experience. [Summary of the Invention]
[0003] In view of this, embodiments of the present invention provide an image forming apparatus and a control method for the image forming apparatus, as well as a storage medium, to solve the problem of poor user experience in the prior art.
[0004] In a first aspect, embodiments of the present invention provide an image forming apparatus, including a power control unit, a dual power supply circuit, a microcontroller unit (MCU), and a detection unit, wherein the dual power supply circuit includes a first power supply unit, a second power supply unit, and a switching unit;
[0005] When the image forming apparatus is in a low-power mode, the power control unit is used to set the power supply mode to a low-power power supply mode. In the low-power power supply mode, the first power supply unit is used to supply power to the detection unit, and the second power supply unit does not supply power.
[0006] The detection unit is used to generate a paper level signal and transmit the paper level signal to the switching unit when it detects that there is paper at the automatic document feeder (ADF). The switching unit is used to control the dual power supply circuit to turn on according to the paper level signal, thereby enabling the MCU to supply power. The MCU is used to detect the paper level signal and determine and execute the paper operation according to the paper level signal.
[0007] In one possible implementation, in a low-power supply mode, the first power supply unit is used to power the detection unit, including:
[0008] The detection unit is powered by a predetermined voltage or intermittently powered by a predetermined voltage so that the detection unit can detect whether there is paper at the automatic document feeder (ADF) when the image forming apparatus enters a sleep state.
[0009] In one possible implementation, the detection unit is further configured to generate a paperless level signal and transmit the high-level signal to the switching unit when it detects that there is no paper at the automatic document feeder (ADF); the switching unit is configured to control the dual power supply circuit to shut down according to the paperless level signal, so that the MCU does not work.
[0010] The dual power supply circuit also includes a pull-up unit, a current limiting unit, and a voltage divider unit;
[0011] The pull-up unit is used to pull up the level signal output by the branch to a high level signal;
[0012] The current limiting unit is used to limit the current in the branch.
[0013] The voltage divider unit is used to reduce the voltage of the branch it is located in.
[0014] In one possible implementation, the first power supply unit includes a first power supply and a second power supply, the current limiting unit includes a first current limiting resistor, the pull-up unit includes a first pull-up resistor, and the detection unit includes a photoelectric sensor.
[0015] The first power supply is connected to the first end of the first current-limiting resistor, the second power supply is connected to the first end of the first pull-up resistor, the first end of the photoelectric sensor is connected to the second end of the first current-limiting resistor and the second end of the first pull-up resistor, and the second end of the photoelectric sensor is connected to the first ground wire.
[0016] In one possible implementation, the image forming apparatus further includes a data board and an engine board. The data board includes the power control unit, the dual power supply circuit, and the system-on-a-chip (SoC). The engine board includes the microcontroller unit (MCU) and the detection unit. The current limiting unit includes a second current limiting resistor and a third current limiting resistor. The voltage divider unit includes a voltage divider resistor. The pull-up unit further includes a second pull-up resistor. The second power supply unit includes a third power supply and a fourth power supply. The switching unit includes a first transistor and a second transistor.
[0017] The third power supply is connected to the emitter of the first transistor, the base of the first transistor is connected to the first end of the second current-limiting resistor, the collector of the first transistor is connected to the first end of the third current-limiting resistor, and the second end of the second current-limiting resistor is connected to the SoC.
[0018] The fourth power supply is connected to the first end of the second pull-up resistor, the collector of the second transistor is connected to the second end of the second pull-up resistor and the MCU, the base of the second transistor is connected to the second end of the third current-limiting resistor and the first end of the voltage divider resistor, the emitter of the second transistor is connected to the second ground wire, and the second end of the voltage divider resistor is connected to the second ground wire.
[0019] In one possible implementation, the dual power supply circuit further includes a filtering unit for filtering out noise;
[0020] The filtering unit includes a first capacitor and a second capacitor;
[0021] The first terminal of the first capacitor is connected to the second terminal of the SoC and the second current-limiting resistor, the second terminal of the first capacitor is connected to the first ground wire, and the first capacitor is connected in parallel with the detection unit.
[0022] The first terminal of the second capacitor is connected to the MCU, the second terminal of the second capacitor is connected to the second ground wire, and the second capacitor is connected in parallel with the second transistor.
[0023] Secondly, embodiments of the present invention provide a control method for an image forming apparatus, the image forming apparatus including a power control unit, a dual power supply circuit, a microcontroller unit (MCU), and a detection unit, the dual power supply circuit including a first power supply unit, a second power supply unit, and a switching unit, the method including:
[0024] When the image forming apparatus is in a low-power mode, the power control unit sets the power supply mode to a low-power power supply mode. In the low-power power supply mode, the first power supply unit supplies power to the detection unit, and the second power supply unit does not supply power.
[0025] When the detection unit detects paper at the automatic document feeder (ADF), it generates a paper level signal and transmits the paper level signal to the switching unit. The switching unit controls the dual power supply circuit to turn on based on the paper level signal, enabling the MCU to supply power. The MCU detects the paper level signal to perform a paper operation.
[0026] In one possible implementation, in the low-power supply mode, the first power supply unit supplies power to the detection unit, including:
[0027] The first power supply unit supplies a predetermined voltage to the detection unit or intermittently maintains a predetermined voltage supply, so that the detection unit detects whether there is paper at the automatic document feeder (ADF) when the image forming apparatus enters a sleep state.
[0028] In one possible implementation, the image forming apparatus further includes a system-on-a-chip (SoC), and the switching unit includes a first transistor and a second transistor.
[0029] The switching unit controls the dual power supply circuit to conduct according to the low-level signal, enabling the MCU to discharge, including:
[0030] The switching unit controls the first transistor to turn on according to the low-level signal, so that the SoC enters the working state according to the low-level signal and controls the second transistor to turn on, thereby enabling the MCU to be powered.
[0031] In one possible implementation, the method further includes:
[0032] When the detection unit detects that there is no paper at the automatic document feeder (ADF), it generates a paperless level signal and transmits the paperless level signal to the switching unit. The switching unit is used to control the dual power supply circuit to shut down according to the paperless level signal, so that the MCU does not work.
[0033] In one possible implementation, the switching unit includes a first transistor and a second transistor, and the switching unit controls the dual power supply circuit to turn off according to the high-level signal, enabling the MCU to not operate, including:
[0034] The switching unit controls the first transistor to turn off according to the paperless level signal, which in turn turns off the second transistor, enabling the MCU to stop working.
[0035] Thirdly, embodiments of the present invention provide an image forming apparatus, comprising: one or more processors; a memory; and one or more computer programs, wherein the one or more computer programs are stored in the memory, and the one or more computer programs include instructions that, when executed by the image forming apparatus, cause the image forming apparatus to perform the control method of the image forming apparatus in the second aspect or any possible implementation of the second aspect.
[0036] Fourthly, embodiments of the present invention provide a computer-readable storage medium comprising a stored program, wherein, when the program is executed, it controls the device on which the computer-readable storage medium is located to perform a control method for an image forming apparatus as described in the second aspect or any possible implementation thereof.
[0037] In the technical solution provided by this embodiment of the invention, when the image forming apparatus is in low-power mode, the power control unit sets the power supply mode to low-power mode; when the detection unit detects paper at the ADF, it generates a paper presence level signal and transmits the paper presence level signal to the switching unit; the switching unit controls the dual power supply circuit to conduct according to the paper presence level signal, enabling the MCU to supply power; the MCU detects the paper presence level signal and determines and executes the paper presence operation based on the paper presence level signal. In the technical solution provided by this embodiment of the invention, the image forming apparatus wakes up the SoC to enable the MCU to operate when the detection unit detects paper at the ADF, thereby reducing power consumption and allowing the user to obtain the paper presence status of the detection unit even in the low-power mode of the image forming apparatus, thus improving the user experience. [Attached Image Description]
[0038] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0039] Figure 1 A schematic diagram of an image forming apparatus provided in an embodiment of the present invention;
[0040] Figure 2 A circuit schematic diagram of a dual-power supply circuit provided in an embodiment of the present invention;
[0041] Figure 3 This is a schematic diagram of the power tree between the data board and the engine board in an image forming apparatus provided in an embodiment of the present invention;
[0042] Figure 4 A circuit diagram of another dual-power supply circuit provided in an embodiment of the present invention;
[0043] Figure 5 A circuit diagram of another dual-power supply circuit provided in an embodiment of the present invention;
[0044] Figure 6 A flowchart illustrating a control method for an image forming apparatus provided in an embodiment of the present invention;
[0045] Figure 7 This is a schematic diagram of another image forming apparatus provided in an embodiment of the present invention.
Detailed Implementation Methods
[0046] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0047] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.
[0048] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” as used in the embodiments of this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.
[0049] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.
[0050] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."
[0051] Figure 1 This is a schematic diagram of an image forming apparatus provided in an embodiment of the present invention, such as... Figure 1As shown, the image forming apparatus includes an engine board, a data board, and other components of the image forming apparatus. The engine board and the data board can communicate and interact via general-purpose input / output (GPIO), and the data board can interact with other components of the image forming apparatus. The engine board includes at least one detection sensor, at least one clutch, an MCU, a stepper motor, and a motor driver. The data board includes a dual power supply circuit, a system-on-a-chip (SoC), a power control unit, and a third power supply unit. The dual power supply circuit and the power control unit are both connected to the SoC, and the power control unit is connected to the third power supply unit. For example, at least one clutch includes a paper pick / split clutch and a calibration clutch, and at least one detection sensor includes a detection unit for detecting the presence or absence of paper at the ADF and other related sensors in the image forming apparatus. In this embodiment of the invention, the detection unit includes a diode and a third transistor as an example for description.
[0052] In this embodiment of the invention, the data board further includes a Registered Jack (RJ45) interface and a Universal Serial Bus (USB) interface. The image forming apparatus can communicate and interact with a PC via the RJ45 interface and the USB interface, respectively.
[0053] Figure 2 A circuit schematic diagram of a dual-power supply circuit provided in an embodiment of the present invention is shown below. Figure 2 As shown, the dual power supply circuit includes a first power supply unit, a second power supply unit, a detection unit, and a switching unit. The first power supply unit is connected to the detection unit, and the second power supply unit is connected to the MCU and the switching unit. The first power supply unit includes a first power supply and a second power supply. The first power supply unit supplies power to the detection unit when the image forming apparatus is in normal mode; the first power supply unit also supplies power to the detection unit when the image forming apparatus is in low-power mode. The second power supply unit includes a third power supply and a fourth power supply. The second power supply unit supplies power to the MCU when the image forming apparatus is in normal mode. The detection unit includes a diode and a third transistor Q3. The detection unit detects the presence or absence of paper at the ADF, generates a corresponding level signal based on the presence or absence of paper, and transmits the corresponding level signal to the switching unit. The switching unit includes a first transistor Q1 and a second transistor Q2. The switching unit controls the dual power supply circuit to turn on or off according to the corresponding level signal transmitted by the detection unit. The first, second, third, and fourth power supplies are all 3.3V. The diode is a light-emitting diode. Preferably, the detection unit is a photoelectric sensor.
[0054] The third power supply unit includes both 24V and 5V power supplies, and is used to power the ADF engine board. Figure 3 A schematic diagram of a power tree between a data board and an engine board in an image forming apparatus is provided. Figure 3 As shown, the 24V power supply is used to power the printing components such as the ADF motor, clutch, and electromagnet when the image forming apparatus is in normal mode. The 5V power supply is used to power the MCU and at least one photoelectric sensor when the image forming apparatus is in normal mode. The 5V power supply is converted to 3.3V by a device that converts electrical energy of one voltage value to another voltage value in a DC circuit (DC-DC converter, abbreviated as DC-DC). The 3.3V voltage is used to power the MCU and other photoelectric sensors other than the detection unit.
[0055] In this embodiment of the invention, the dual power supply circuit further includes a current limiting unit, a pull-up unit, and a voltage divider unit. The current limiting unit includes a first current limiting resistor R1, used to limit the current in its branch. The pull-up unit includes a first pull-up resistor R2, used to pull the output signal of its branch to a high level. The first power supply is connected to the first terminal of the first current limiting resistor R1, the second terminal of the first current limiting resistor R1 is connected to the anode of a diode, the cathode of the diode is connected to the first ground wire GND1, the second power supply is connected to the first terminal of the first pull-up resistor R2, the second terminal of the first pull-up resistor R2 is connected to the collector of a third transistor Q3, and the emitter of the third transistor Q3 is connected to the first ground wire GND1.
[0056] In this embodiment of the invention, the dual power supply circuit further includes a voltage divider unit, which includes a voltage divider resistor R5. The voltage divider unit is used to reduce the voltage of the branch it is in. The current limiting unit further includes a second current limiting resistor R3 and a third current limiting resistor R4, with the voltage divider resistor R5 and the third current limiting resistor R4 connected in parallel. The pull-up unit further includes a second pull-up resistor R6. The third power supply is connected to the emitter of the first transistor Q1, the base of the first transistor Q1 is connected to the first end of the second current limiting resistor R3, the collector of the first transistor Q1 is connected to the first end of the third current limiting resistor R4, the second end of the second current limiting resistor R3 is connected to the SoC, the fourth power supply is connected to the first end of the second pull-up resistor R6, the collector of the second transistor Q2 is connected to the second end of the second pull-up resistor R6 and the MCU, the base of the second transistor Q2 is connected to the second end of the third current limiting resistor R4 and the first end of the voltage divider resistor R5, the emitter of the second transistor Q2 is connected to the second ground line GND2, and the second end of the voltage divider resistor R5 is connected to the second ground line GND2.
[0057] In this embodiment of the invention, the dual power supply circuit further includes a filtering unit. The filtering unit includes a first capacitor C1 and a second capacitor C2, used to filter out noise. The first terminal of the first capacitor C1 is connected to the second terminal of the SoC and the second current-limiting resistor R3, the second terminal of the first capacitor C1 is connected to the first ground line GND1, and the first capacitor C1 is connected in parallel with the detection unit. The first terminal of the second capacitor C2 is connected to the MCU, the second terminal of the second capacitor C2 is connected to the second ground line GND2, and the second capacitor C2 is connected in parallel with the second transistor Q2.
[0058] When the image forming apparatus is in normal mode, the power control unit is used to set the power supply mode to normal power supply mode. In normal power supply mode, the first power supply unit is used to power the detection unit, the second power supply unit is used to power the MCU, and the third power supply unit is used to power the ADF engine board.
[0059] When the image forming apparatus is in a low-power mode, the power control unit is used to set the power supply mode to a low-power power supply mode. In the low-power power supply mode, the first power supply unit supplies power to the detection unit, while the second and third power supply units do not supply power. The second power supply unit is used to supply power to other units of the image forming apparatus that are not the detection unit.
[0060] Furthermore, in low-power mode, the first power supply unit maintains a predetermined voltage supply to the detection unit or intermittently maintains a predetermined voltage supply, so that the detection unit can detect whether there is paper at the automatic document feeder (ADF) when the image forming apparatus enters a sleep state. Specifically, the predetermined voltage is preferably 3.3V.
[0061] In low-power mode, when the detection unit detects paper at the ADF, it generates a paper-present level signal and transmits this signal to the switching unit. Upon receiving the paper-present level signal, the switching unit controls the dual-power supply circuit to turn on, enabling the MCU to supply power. At this point, the MCU detects the paper-present level signal and performs a paper-present operation. The paper-present level signal can be either a low-level or high-level signal, depending on the specific circuit requirements.
[0062] Similarly, when the detection unit detects that the ADF is paperless, it generates a paperless level signal and transmits this signal to the switching unit. The switching unit controls the dual power supply circuit to shut down based on this paperless level signal, thus preventing the MCU from operating. This paperless level signal can be either a high-level or low-level signal, depending on the specific circuit and the adaptability of the paper-present level signal. Specifically, in low-power mode, when the paper-present level signal is low, such as... Figure 2 As shown.
[0063] exist Figure 2In the image forming apparatus, when in normal mode, the first power supply unit powers the detection unit, the second power supply unit powers the MCU, and the third power supply unit powers the ADF engine board. When the detection unit detects paper at the ADF, the collector of the third transistor Q3 outputs a low-level signal, turning on the first transistor Q1. The low-level signal is transmitted through the first transistor Q1 and the third current-limiting resistor R4 to the BE junction of the second switching transistor, causing the second transistor Q2 to turn on. After the second transistor Q2 is saturated and turned on, its collector outputs a low level. At this time, the MCU detects the low-level signal and identifies that there is paper at the ADF based on the low-level signal. The MCU then executes the relevant paper-present operation. For example, the paper-present operation includes a paper replacement operation.
[0064] When the detection unit detects no paper at the ADF, the first pull-up resistor R2 pulls the level signal output by the second power supply to a high level, causing the collector of the third transistor Q3 to output a high level signal. The first transistor Q1 is cut off, causing the second transistor Q2 to be cut off. The second pull-up resistor R6 pulls the level signal output by the fourth power supply to a high level, causing the collector of the second transistor Q2 to output a high level. At this time, the MCU detects the high level signal and identifies that there is no paper at the ADF based on the high level signal, so the MCU performs a paperless operation.
[0065] exist Figure 2 In the low-power mode of the image forming apparatus, only the first power supply unit powers the detection unit, while the second and third power supply units are not operational and do not power the MCU and ADF engine board. When the detection unit detects paper at the ADF, it generates a low-level signal and transmits it to the switching unit. The switching unit controls the dual power supply circuit to turn on based on the low-level signal, enabling the MCU to power on. The MCU then detects the low-level signal and performs a paper presence operation. When the detection unit detects no paper at the ADF, it generates a high-level signal and transmits it to the switching unit. The switching unit controls the dual power supply circuit to turn off based on the high-level signal, enabling the MCU to operate without power.
[0066] Specifically, such as Figure 2 As shown, when the detection unit detects paper at the ADF, both the collector and emitter of the third transistor Q3 output low-level signals. These low-level signals are transmitted to the first transistor Q1, causing it to conduct. After the low-level signal is transmitted to the SoC, the SoC enters its operating state and controls the second transistor Q2 to conduct, enabling power to the MCU. At this time, the MCU detects the low-level signal and recognizes the presence of paper at the ADF, thus performing a paper-ready operation.
[0067] When the detection unit detects no paper at the ADF, the first pull-up resistor R2 pulls the level signal output by the second power supply to a high level signal, causing the collector of the third transistor Q3 to output a high level signal. After the high level signal is transmitted to the first transistor Q1, the first transistor Q1 is turned off, causing the second transistor Q2 to be turned off, enabling the MCU to not be powered. At this time, the MCU detects the high level signal and recognizes that there is no paper at the ADF based on the high level signal, so the MCU performs the paperless operation.
[0068] In some embodiments, the first transistor Q1 is a PNP transistor and the second transistor Q2 is an NPN transistor.
[0069] In this embodiment of the invention, a first transistor Q1 is provided in the dual power supply circuit, which can prevent the voltage of the first power supply unit from back-connecting to the second power supply unit, thereby improving safety and reducing the power consumption of the image forming apparatus.
[0070] In other embodiments, such as Figure 4 As shown, Figure 4 Another example of a dual-power supply circuit schematic is shown. Figure 4 and Figure 2 The difference is: Figure 2 In normal mode, when the detection unit detects the presence or absence of paper, the logic levels of the signals at the to SoC and to MCU terminals are the same. Figure 4 In normal mode, when the detection unit detects the presence or absence of paper, the logic levels of the signals to the SoC and to the MCU are opposite.
[0071] exist Figure 4 In the image forming apparatus, in normal mode, when the detection unit detects paper, the to SoC terminal is a low-level signal. At this time, Q1 is turned on, and the third power supply (VCC_3.3V), Q1, R4, and R5 circuit are connected. Because the resistance of R4 is much smaller than that of R5, the to MCU terminal is a high-level signal. When the detection unit detects no paper, the to SoC terminal is a high-level signal, Q1 is turned off, and the to MCU terminal is a low-level signal due to the fifth pull-down resistor R5. Therefore, in normal mode, the logic levels of the signals at the to SoC and to MCU terminals are opposite when paper is detected.
[0072] exist Figure 4In the low-power mode, when the detection unit detects paper, the to SoC terminal is a low-level signal. At this time, the third power supply does not provide 3.3V power, Q1 is off, and the to MCU terminal is a low-level signal due to the fifth pull-down resistor R5. When the detection unit detects no paper, the to SoC terminal is a high-level signal, Q1 is off, and the to MCU terminal is a low-level signal due to the fifth pull-down resistor R5. In this low-power mode, the presence of paper at the ADF is identified based on both the signals from the to SoC and to MCU terminals, causing the MCU to perform the corresponding operation.
[0073] In other embodiments, such as Figure 5 As shown, Figure 5 Another example of a dual-power supply circuit schematic is shown. Figure 5 and Figure 2 The difference is: Figure 2 When the detection unit detects paper, in both normal and low-power modes, the paper presence signal at the SoC is a low-level signal; Figure 5 When the detection unit detects paper, the paper signal on the toSoC is a high-level signal in both normal mode and low-power mode.
[0074] exist Figure 5 In the diagram, R7 is a current-limiting resistor, R8 is a pull-down resistor, and Q3 is a transistor that acts as an inverter. When the image forming apparatus is in normal mode, if the detection unit detects paper, the signal to the SoC is low. At this time, R3 and R7 act as a voltage divider, causing Q3 to conduct. This connects the third power supply (VCC_3.3V), Q1, R8, and Q3, thus connecting the Q1, R4, and R5 circuit. Because the resistance of R4 is much smaller than that of R5, the signal to the MCU is high. When the detection unit detects no paper, the signal to the SoC is low, Q3 is off, and Q1 is off. The signal to the MCU is low due to the fifth pull-down resistor R5. Therefore, in normal mode, the logic levels of the signals to the SoC and to the MCU are the same when paper is detected or not.
[0075] exist Figure 5In this embodiment, when the image forming apparatus is in low-power mode, and the detection unit detects paper, the to SoC terminal is a high-level signal. At this time, due to the voltage divider effect of R3 and R7, Q3 conducts. Since the third power supply does not provide 3.3V power, Q3 also conducts. Because VCC_3.3V is not supplied, the circuit of the third power supply, Q1, R8, and Q3 is not conducting. Due to the pull-down resistor R5, the to MCU signal is a low-level signal. When the detection unit detects no paper, the to SoC signal is low, Q1 and Q3 are cut off, and due to the pull-down resistor R5, the to MCU signal is low. In this embodiment, the image forming apparatus wakes up the SoC to enable MCU power supply when the detection unit detects paper at the ADF. This reduces power consumption while allowing the user to obtain the paper presence / absence status of the detection unit even when the image forming apparatus is in low-power mode, improving the user experience.
[0076] Figure 6 A flowchart of a control method for an image forming apparatus provided in an embodiment of the present invention is shown below. Figure 6 As shown, the method includes:
[0077] Step 101: When the image forming apparatus is in low power mode, the power control unit sets the power supply mode to low power supply mode.
[0078] In this embodiment of the invention, each step is performed by an image forming apparatus. The image forming apparatus includes a data board and an engine board. The data board includes a power control unit and a dual power supply circuit. The engine board includes a microcontroller unit (MCU) and a detection unit. The dual power supply circuit includes a first power supply unit, a second power supply unit, a switching unit, the detection unit, a pull-up unit for pulling up the output level signal of the branch to a high level signal, a current limiting unit for limiting the current of the branch, and a voltage divider unit for reducing the voltage of the branch.
[0079] In this step, under low-power supply mode, the first power supply unit supplies power to the detection unit, while the second power supply unit does not supply power. Specifically, the power control unit puts the first power supply unit into a powered-on state to supply power to the detection unit; the power control unit puts the second power supply unit into a de-powered state, thereby setting the power supply mode of the image forming apparatus to low-power supply mode. The second power supply unit is used to supply power to other units of the image forming apparatus that are not the detection unit. These other units can be wake-up units, monitoring units, or transport units, etc., that are not used to detect the presence or absence of paper at the ADF.
[0080] In this embodiment of the invention, the first power supply unit supplies power to the detection unit by maintaining a predetermined voltage or intermittently maintaining a predetermined voltage, so that the detection unit can detect whether there is paper at the automatic document feeder (ADF) when the image forming apparatus enters a sleep state. The predetermined voltage is preferably 3.3V. Step 102: The detection unit detects whether there is paper at the ADF. If the detection unit detects paper at the ADF, step 103 is executed; if the detection unit detects no paper at the ADF, step 104 is executed.
[0081] Step 103: The detection unit generates a paper level signal and transmits the paper level signal to the switching unit; the switching unit controls the dual power supply circuit to conduct according to the paper level signal, enabling the MCU to operate; the MCU detects the paper level signal to perform the paper operation.
[0082] In this step, the switching unit controls the first transistor to turn on based on a low-level signal, so that the SoC enters the working state based on the low-level signal and controls the second transistor to turn on, enabling the MCU to discharge. For example, paper operation includes paper changing operation.
[0083] In this step, the paper level signal can be a low-level signal, such as... Figure 2 As shown in the circuit diagram, it can also be a high-level signal, such as... Figure 5 The circuit diagram is shown.
[0084] Step 104: The detection unit generates a paperless level signal and transmits the paperless level signal to the switching unit; the switching unit controls the dual power supply circuit to shut down according to the paperless level signal, enabling the MCU to operate without power.
[0085] In this step, such as Figure 2 As shown, the paperless level signal is a high-level signal. The switching unit controls the first transistor to turn off according to the high-level signal, which in turn turns off the second transistor, enabling the MCU to not work.
[0086] In such Figure 5 As shown, the paperless level signal is a low level signal. Therefore, the switching unit controls the first transistor to turn off according to the high level signal, which in turn turns off the second transistor, enabling the MCU to not work.
[0087] In the technical solution provided by this embodiment of the invention, when the image forming apparatus is in low-power mode, the power control unit sets the power supply mode to low-power mode; when the detection unit detects paper at the ADF, it generates a low-level signal and transmits the low-level signal to the switching unit; the switching unit controls the dual power supply circuit to conduct according to the low-level signal, enabling the MCU to operate with power supply; the MCU detects the low-level signal and operates with paper present; when the detection unit detects no paper at the ADF, it generates a high-level signal and transmits the high-level signal to the switching unit; the switching unit controls the dual power supply circuit to turn off according to the high-level signal, enabling the MCU to operate without power supply. In the technical solution provided by this embodiment of the invention, the image forming apparatus wakes up the SoC to enable the MCU to operate when the detection unit detects paper at the ADF, reducing power consumption while allowing the user to obtain the paper presence or absence status of the detection unit even in the low-power mode of the image forming apparatus, thus improving the user experience.
[0088] This invention provides a computer-readable storage medium including a stored program, wherein the program, when running, controls the device containing the computer-readable storage medium to execute the control method of the image forming apparatus described above.
[0089] Figure 7 A schematic diagram of another image forming apparatus provided in an embodiment of the present invention includes: the image forming apparatus 3 of this embodiment includes: a processor 31, a memory 32, and a computer program 33 stored in the memory 32 and executable on the processor 31. When the computer program 33 is executed by the processor 31, it implements the control method of the image forming apparatus in the embodiment. To avoid repetition, it will not be described in detail here.
[0090] The image forming apparatus 3 includes, but is not limited to, a processor 31 and a memory 32. Those skilled in the art will understand that... Figure 7 This is merely an example of the image forming apparatus 3 and does not constitute a limitation on the image forming apparatus 3. It may include more or fewer components than shown, or combine certain components, or different components. For example, a network device may also include input / output devices, network access devices, buses, etc.
[0091] The processor 31 may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.
[0092] The memory 32 can be an internal storage unit of the image forming apparatus 3, such as a hard disk or RAM of the image forming apparatus 3. The memory 32 can also be an external storage device of the image forming apparatus 3, such as a plug-in hard disk, smart media card (SMC), secure digital card (SD), flash card, etc., equipped on the image forming apparatus 3. Furthermore, the memory 32 can include both internal storage units and external storage devices of the image forming apparatus 3. The memory 32 is used to store computer programs and other programs and data required by network devices. The memory 32 can also be used to temporarily store data that has been output or will be output.
[0093] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.
[0094] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0095] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing custom logic functions or processes, and the scope of preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of the invention pertain.
[0096] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."
[0097] In the embodiments provided by this invention, it should be understood that the disclosed systems and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.
[0098] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. An image forming apparatus, characterized in that, It includes a power control unit, a dual power supply circuit, a microcontroller unit (MCU), a detection unit, and a third power supply unit. The dual power supply circuit includes a first power supply unit, a second power supply unit, and a switching unit. The first power supply unit is connected to the detection unit, the second power supply unit is connected to the MCU, and the power control unit is connected to the first power supply unit, the second power supply unit, and the third power supply unit, respectively. When the image forming apparatus is in normal mode, the power control unit is used to set the power supply mode to normal power supply mode. In normal power supply mode, the first power supply unit is used to supply power to the detection unit, the second power supply unit is used to supply power to the MCU, and the third power supply unit is used to supply power to the ADF engine board. When the image forming apparatus is in a low-power mode, the power control unit is used to set the power supply mode to a low-power power supply mode. In the low-power power supply mode, the first power supply unit is used to supply power to the detection unit, the second power supply unit does not supply power to the MCU, and the third power supply unit does not supply power to the ADF engine board. The detection unit is used to generate a paper level signal and transmit the paper level signal to the switching unit when it detects that there is paper at the automatic document feeder (ADF). The switching unit is used to control the dual power supply circuit to turn on according to the paper level signal, thereby enabling the MCU to supply power. The MCU is used to detect the paper level signal and determine and execute the paper-on operation according to the paper level signal. In the low-power supply mode, the first power supply unit is used to supply power to the detection unit, including: maintaining a predetermined voltage for the detection unit or intermittently maintaining a predetermined voltage for the detection unit, so that the detection unit detects whether there is paper at the automatic document feeder (ADF) when the image forming apparatus enters a sleep state.
2. The image forming apparatus according to claim 1, characterized in that, The detection unit is also used to generate a paperless level signal and transmit the paperless level signal to the switching unit when it detects that there is no paper at the automatic document feeder (ADF); the switching unit is used to control the dual power supply circuit to turn off according to the paperless level signal, so that the MCU does not work. The dual power supply circuit also includes a pull-up unit, a current limiting unit, and a voltage divider unit; The pull-up unit is used to pull up the level signal output by the branch to a high level signal; The current limiting unit is used to limit the current in the branch. The voltage divider unit is used to reduce the voltage of the branch it is located in.
3. The image forming apparatus according to claim 2, characterized in that, The first power supply unit includes a first power supply and a second power supply; the current limiting unit includes a first current limiting resistor; the pull-up unit includes a first pull-up resistor; and the detection unit includes a photoelectric sensor. The first power supply is connected to the first end of the first current-limiting resistor, the second power supply is connected to the first end of the first pull-up resistor, the first end of the photoelectric sensor is connected to the second end of the first current-limiting resistor and the second end of the first pull-up resistor, and the second end of the photoelectric sensor is connected to the first ground wire.
4. The image forming apparatus according to claim 2, characterized in that, The image forming apparatus further includes a data board and an engine board. The data board includes the power control unit, the dual power supply circuit, and the system-on-a-chip (SoC). The engine board includes the microcontroller unit (MCU) and the detection unit. The current limiting unit includes a second current limiting resistor and a third current limiting resistor. The voltage dividing unit includes a voltage dividing resistor. The pull-up unit further includes a second pull-up resistor. The second power supply unit includes a third power supply and a fourth power supply. The switching unit includes a first transistor and a second transistor. The third power supply is connected to the emitter of the first transistor, the base of the first transistor is connected to the first end of the second current-limiting resistor, the collector of the first transistor is connected to the first end of the third current-limiting resistor, and the second end of the second current-limiting resistor is connected to the SoC. The fourth power supply is connected to the first end of the second pull-up resistor, the collector of the second transistor is connected to the second end of the second pull-up resistor and the MCU, the base of the second transistor is connected to the second end of the third current-limiting resistor and the first end of the voltage divider resistor, the emitter of the second transistor is connected to the second ground wire, and the second end of the voltage divider resistor is connected to the second ground wire.
5. The image forming apparatus according to claim 4, characterized in that, The dual power supply circuit also includes a filtering unit for filtering out noise; The filtering unit includes a first capacitor and a second capacitor; The first terminal of the first capacitor is connected to the second terminal of the SoC and the second current-limiting resistor, the second terminal of the first capacitor is connected to the first ground wire, and the first capacitor is connected in parallel with the detection unit. The first terminal of the second capacitor is connected to the MCU, the second terminal of the second capacitor is connected to the second ground wire, and the second capacitor is connected in parallel with the second transistor.
6. A control method for an image forming apparatus, characterized in that, The image forming apparatus includes a power control unit, a dual power supply circuit, a microcontroller unit (MCU), a detection unit, and a third power supply unit. The dual power supply circuit includes a first power supply unit, a second power supply unit, and a switching unit. The first power supply unit is connected to the detection unit, and the second power supply unit is connected to the MCU. The power control unit is connected to the first power supply unit, the second power supply unit, and the third power supply unit, respectively. The method includes: When the image forming apparatus is in normal mode, the power control unit is used to set the power supply mode to normal power supply mode. In normal power supply mode, the first power supply unit is used to supply power to the detection unit, the second power supply unit is used to supply power to the MCU, and the third power supply unit is used to supply power to the ADF engine board. When the image forming apparatus is in a low-power mode, the power control unit sets the power supply mode to a low-power power supply mode. In the low-power power supply mode, the first power supply unit supplies power to the detection unit, the second power supply unit does not supply power to the MCU, and the third power supply unit does not supply power to the ADF engine board. When the detection unit detects paper at the automatic document feeder (ADF), it generates a paper level signal and transmits the paper level signal to the switching unit; the switching unit controls the dual power supply circuit to turn on according to the paper level signal, enabling the MCU to supply power; the MCU detects the paper level signal to perform a paper-on operation; In the low-power supply mode, the first power supply unit is used to supply power to the detection unit, including: maintaining a predetermined voltage for the detection unit or intermittently maintaining a predetermined voltage for the detection unit, so that the detection unit detects whether there is paper at the automatic document feeder (ADF) when the image forming apparatus enters a sleep state.
7. The method according to claim 6, characterized in that, The image forming apparatus further includes a system-on-a-chip (SoC), and the switching unit includes a first transistor and a second transistor; The switching unit controls the dual power supply circuit to conduct according to the paper level signal, enabling the MCU to supply power, including: the paper level signal being a low level signal. The switching unit controls the first transistor to turn on according to the low-level signal, so that the SoC enters the working state according to the low-level signal and controls the second transistor to turn on, thereby enabling the MCU to be powered.
8. The method according to claim 6, characterized in that, The method further includes: When the detection unit detects that there is no paper at the automatic document feeder (ADF), it generates a paperless level signal and transmits the paperless level signal to the switching unit; the switching unit is used to control the dual power supply circuit to shut down according to the paperless level signal, thereby enabling the MCU to not work.
9. The method according to claim 8, characterized in that, The switching unit includes a first transistor and a second transistor. The switching unit controls the dual power supply circuit to shut down based on the paperless level signal, enabling the MCU to not operate. This includes: The switching unit controls the first transistor to turn off according to the paperless level signal, thereby turning off the second transistor and enabling the MCU to stop working.
10. An image forming apparatus, characterized in that, include: One or more processors; Memory; And one or more computer programs, wherein the one or more computer programs are stored in the memory, the one or more computer programs including instructions that, when executed by the image forming apparatus, cause the image forming apparatus to perform the method of any one of claims 6 to 9.
11. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored program, wherein, when the program is executed, it controls the device on which the computer-readable storage medium is located to perform the method of any one of claims 6 to 9.
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