Backside illuminated image sensor and method of making the same

Abstract

The application provides a preparation method of a back-illumination image sensor, comprising the following steps: bonding the first substrate on the second substrate through a bonding process to make the combined film layer and the first substrate upside down on the second substrate; forming a plurality of deep grooves arranged in an array; forming a first metal layer; the first metal layer filling the deep grooves and the first metal layer on the top of the deep grooves forming a metal grid; etching to remove the etching stop layer and the first metal layer between the deep grooves in the pixel area to expose part of the thickness of the metal grid. Through the above preparation method, a color filter can be formed between the metal grids beyond the surface of the high-K dielectric layer (the substrate surface) in the subsequent process, so that complete optical isolation between adjacent pixels is realized without sacrificing electrical isolation, optical crosstalk is greatly reduced, and the CIS performance is improved.

Description

Technical Field

[0001] This application relates to the field of image sensor manufacturing technology, specifically to a back-illuminated image sensor and its fabrication method. Background Technology

[0002] With the development of ultra-high resolution CMOS image sensor (CIS) technology, and constrained by the overall sensor size, the size of individual pixels is becoming smaller and smaller, and the spacing between adjacent pixels is also becoming smaller. This poses a significant challenge to the optical and electrical isolation performance between pixels. While back-illuminated CIS significantly increases the amount of light entering the sensor compared to front-illuminated CIS, achieving better optoelectronic isolation performance is particularly important.

[0003] Current traditional back-illuminated CIS achieves opto-isolation by combining Backside DTI (Deep Trench) and Backside Metal Grid, but optical paths still exist between adjacent pixels, which can lead to optical crosstalk and affect device performance. Summary of the Invention

[0004] This application provides a back-illuminated image sensor and its fabrication method, which can solve the problem of optical crosstalk caused by optical paths between adjacent pixels in a back-illuminated image sensor.

[0005] On one hand, embodiments of this application provide a method for fabricating a back-illuminated image sensor, comprising:

[0006] A first substrate and a second substrate are provided. The first substrate includes a pixel region and a logic region. A combined film layer is formed on the front side of the first substrate. A first metal interconnect structure is formed in the combined film layer of the pixel region. A second metal interconnect structure is formed in the combined film layer of the logic region. A first bonding layer is formed on the combined film layer. A second bonding layer is formed on the front side of the second substrate.

[0007] The first bonding layer and the second bonding layer are bonded together by a bonding process, at which time the combined film layer and the first substrate are inverted on the second substrate;

[0008] The first substrate is thinned from the back side of the first substrate;

[0009] The first substrate of the logic region is etched to form a first groove;

[0010] The first substrate of the pixel region is etched to form a plurality of deep trenches arranged in an array;

[0011] A high-k dielectric layer is formed, which covers the back side of the first substrate, the bottom wall and sidewalls of the deep trench, and the bottom wall and sidewalls of the first groove.

[0012] A first metal layer is formed, which covers the high-k dielectric layer, the bottom wall and sidewalls of the first groove, and fills the deep trench. At this time, the first metal layer inside the deep trench and at the top of the deep trench constitutes a metal mesh.

[0013] The bottom wall of the first groove and the first substrate at the bottom of the first groove, a portion of the combined film layer, are etched and stopped on the surface of the second metal interconnect structure to form a second groove;

[0014] A second metal layer is formed, which covers the first metal layer and the bottom and side walls of the second groove;

[0015] A third metal layer is formed, which covers the second metal layer and fills the second groove;

[0016] Remove the third metal layer and the second metal layer that extend beyond the surface of the first metal layer;

[0017] An etch stop layer is formed, which covers the first metal layer and the third metal layer in the second groove;

[0018] Etch the etch stop layer and the first metal layer between the deep trenches in the pixel region to expose the high-k dielectric layer and a portion of the thickness of the metal mesh; and,

[0019] An isolation layer is formed, which covers the exposed metal mesh.

[0020] Optionally, in the fabrication method of the back-illuminated image sensor, after etching the etch stop layer and the first metal layer between the deep trenches of the pixel region to expose the high-k dielectric layer and a portion of the thickness of the metal mesh, the height of the metal mesh extending beyond the surface of the high-k dielectric layer is 100 nm to 300 nm.

[0021] Optionally, in the method for fabricating the back-illuminated image sensor, the depth of the deep trench is at least 3 μm, and the width of the deep trench is 0.1 μm to 0.15 μm.

[0022] Optionally, in the fabrication method of the back-illuminated image sensor, the high-k dielectric layer includes: an Al2O3 layer, a Ta2O5 layer and a SiO2 layer stacked sequentially, wherein the Al2O3 layer covers the back side of the first substrate, the bottom wall and side wall of the deep trench and the bottom wall and side wall of the first groove.

[0023] Optionally, in the method for fabricating the back-illuminated image sensor, the combined film layer includes: a first NDC layer, a second NDC layer to the m-th NDC layer, a first dielectric layer, a second dielectric layer to the m-th dielectric layer, wherein the first NDC layer, the first dielectric layer, the second NDC layer, the second dielectric layer to the m-th NDC layer and the m-th dielectric layer are stacked sequentially, and m is an integer greater than or equal to 2.

[0024] Optionally, in the fabrication method of the back-illuminated image sensor, the first bonding layer and the second bonding layer are bonded by van der Waals force bonding process.

[0025] Optionally, in the method for fabricating the back-illuminated image sensor, after forming the isolation layer, the method further includes: forming a color filter located on the surface of the high-k dielectric layer.

[0026] Optionally, in the method for fabricating the back-illuminated image sensor, after forming the color filter, the method further includes: forming a microlens material layer, wherein the microlens material layer is located on the surface of the color filter.

[0027] On the other hand, embodiments of this application also provide a back-illuminated image sensor, including:

[0028] A first substrate and a second substrate, the first substrate comprising a pixel region and a logic region, a combined film layer formed on the front side of the first substrate, a first metal interconnect structure formed in the combined film layer of the pixel region, a second metal interconnect structure formed in the combined film layer of the logic region, and a first bonding layer formed on the combined film layer; a second bonding layer formed on the front side of the second substrate, the first bonding layer being bonded to the second bonding layer such that the first substrate is inverted on the second substrate.

[0029] Multiple deep trenches arranged in an array, the deep trenches being located in the first substrate of the pixel region;

[0030] The second groove is located in the first substrate of the logic region and the bottom wall opening of the second groove exposes the second metal interconnect structure;

[0031] A high-k dielectric layer covers the back side of the first substrate, the bottom wall and sidewalls of the deep trench, and part of the bottom wall and sidewalls of the second groove;

[0032] A first metal layer covers a portion of the surface of the high-K dielectric layer, a portion of the bottom wall and a portion of the sidewall of the second groove, and fills the deep trench. The interior of the deep trench and the first metal layer at the top of the deep trench form a metal mesh, and the metal mesh at the top of the deep trench extends beyond the surface of the high-K dielectric layer by a certain height.

[0033] A second metal layer covers the bottom wall and side walls of the second groove;

[0034] A third metal layer, the third metal layer filling the second groove;

[0035] An etch stop layer, the etch stop layer covering the first metal layer, the top of the metal mesh, and the third metal layer in the second groove; and,

[0036] An isolation layer that covers the exposed metal mesh.

[0037] Optionally, in the back-illuminated image sensor, the height of the metal mesh extending beyond the surface of the high-k dielectric layer is 100 nm to 300 nm.

[0038] The technical solution of this application has at least the following advantages:

[0039] This application uses a bonding process to bond the first substrate to the second substrate so that the combined film layer and the first substrate are inverted on the second substrate; to form multiple deep trenches arranged in an array; to form a first metal layer, the first metal layer filling the deep trenches and the first metal layer at the top of the deep trenches constitute a metal mesh; to etch away the etch stop layer and the first metal layer between the deep trenches in the pixel area to expose a portion of the thickness of the metal mesh, and subsequently, color filters can be formed between the metal meshes beyond the surface of the high-k dielectric layer (substrate surface), thereby achieving complete optical isolation between adjacent pixels without sacrificing electrical isolation, greatly reducing optical crosstalk and improving CIS performance. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0041] Figure 1 This is a flowchart of a method for fabricating a back-illuminated image sensor according to an embodiment of the present invention;

[0042] Figures 2-16This is a schematic diagram of the semiconductor structure in each process step of fabricating a back-illuminated image sensor according to an embodiment of the present invention;

[0043] The reference numerals in the attached figures are explained as follows:

[0044] 101-First substrate, 102-Second substrate, 20-Combined film layer, 21-First NDC layer, 22-First dielectric layer, 23-Second NDC layer, 24-Second dielectric layer, 25-Third NDC layer, 26-Third dielectric layer, 27-Fourth NDC layer, 28-Fourth dielectric layer, 31-First bonding layer, 32-Second bonding layer, 41-First trench, 42-Deep trench, 43-Second trench, 50-High-K dielectric layer, 60-First metal layer, 61-Metal mesh, 70-Second metal layer, 80-Third metal layer, 90-Etching stop layer, 91-Isolation layer, 92-Color filter, 93-Microlens material layer;

[0045] 201 - First metal interconnect structure, 202 - Second metal interconnect structure. Detailed Implementation

[0046] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0047] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0048] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0049] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0050] This application provides a method for fabricating a back-illuminated image sensor, referring to... Figure 1 , Figure 1 This is a flowchart of a method for fabricating a back-illuminated image sensor according to an embodiment of the present invention.

[0051] refer to Figures 2-16 , Figures 2-16 This is a schematic diagram of the semiconductor structure in each process step of fabricating a back-illuminated image sensor according to an embodiment of the present invention. The fabrication method of the back-illuminated image sensor includes:

[0052] Step S1: As Figure 2 and Figure 3 As shown, a first substrate 101 and a second substrate 102 are provided. The first substrate 101 includes a pixel region and a logic region. A combined film layer 20 is formed on the front side of the first substrate 101. A first metal interconnect structure 201 is formed in the combined film layer 20 of the pixel region, and a second metal interconnect structure 202 is formed in the combined film layer 20 of the logic region. A first bonding layer 31 is formed on the combined film layer 20. A second bonding layer 32 is formed on the front side of the second substrate 102.

[0053] Figure 2 This is a semiconductor structure based on the first substrate 101. Figure 3 The semiconductor structure is based on the second substrate 102.

[0054] Preferably, the combined film layer 20 includes: a first NDC layer, second NDC layers to the m-th NDC layer, and a first dielectric layer, second dielectric layers to the m-th dielectric layer, wherein the first NDC layer, the first dielectric layer, the second NDC layer, the second dielectric layer to the m-th NDC layer, and the m-th dielectric layer are stacked sequentially, that is, the m-th NDC layer and the m-th dielectric layer are stacked alternately. Here, m is an integer greater than or equal to 2. Further, NDC is translated as nitrogen-doped silicon carbide. The m-th NDC layer can be used as a barrier layer in the back-end processes of integrated circuit manufacturing to prevent direct contact between the filler metal material and the dielectric material, thus preventing metal ion diffusion.

[0055] In this embodiment, m is 4, and the combined film layer 20 includes: a first NDC layer 21, a first dielectric layer 22, a second NDC layer 23, a second dielectric layer 24, a third NDC layer 25, a third dielectric layer 26, a fourth NDC layer 27, and a fourth dielectric layer 28 stacked sequentially.

[0056] Preferably, the first bonding layer 31 is made of silicon dioxide; the second bonding layer 32 is also made of silicon dioxide.

[0057] Step S2: As Figure 4 As shown, the first bonding layer 31 and the second bonding layer 32 are bonded together by a bonding process. At this time, the combined film layer 20 and the first substrate 101 are inverted on the second substrate 102 (the second bonding layer 32).

[0058] Preferably, the first bonding layer 31 and the second bonding layer 32 are bonded using a van der Waals force bonding process.

[0059] Step S3: Thin the first substrate 101 by a certain thickness from the back side of the first substrate 101.

[0060] Step S4: As Figure 5 As shown, the first substrate 101 of the logic region is etched to form a first groove 41.

[0061] Specifically, the thickness of the first substrate 101 is etched to be 1000nm to 1200nm to form the first groove 41.

[0062] Step S5: As Figure 6 As shown, the first substrate 101 of the pixel region is etched to form a plurality of deep trenches 42 arranged in an array.

[0063] Preferably, the depth of the deep trench 42 is at least 3 μm, and the width of the deep trench 42 is 0.1 μm to 0.15 μm.

[0064] Step S6: As Figure 7 As shown, a high-K dielectric layer 50 is formed, which covers the back side of the first substrate 101, the bottom wall and side wall of the deep trench 42, and the bottom wall and side wall of the first groove 41.

[0065] Preferably, the high-k dielectric layer may specifically include: an Al2O3 layer, a Ta2O5 layer and a SiO2 layer stacked sequentially, wherein the Al2O3 layer covers the back side of the first substrate 101, the bottom wall and side wall of the deep trench 42 and the bottom wall and side wall of the first groove 41.

[0066] Step S7: As Figure 8As shown, a first metal layer 60 is formed, which covers the high-k dielectric layer 50, the bottom wall and sidewalls of the first groove 41, and fills the deep trench 42. In this case, the first metal layer inside the deep trench 42 and at the top of the deep trench 42 constitutes a metal mesh 61. The first metal layer 60 can achieve optical and electrical isolation between pixels, while also enabling metal interconnection functionality for the back-side process of the device.

[0067] Preferably, the material of the first metal layer 60 can be tungsten.

[0068] Step S8: As Figure 9 As shown, the bottom wall of the first groove 41 and the first substrate 101 at the bottom of the first groove 41, the combined film layer 20 of a certain thickness are etched and stopped on the surface of the second metal interconnect structure 102 to form the second groove 43.

[0069] Step S9: As Figure 10 As shown, a second metal layer 70 is formed, which covers the first metal layer 60 and the bottom wall and side wall (on which the first metal layer 60 is located) of the second groove 43.

[0070] Preferably, the second metal layer 70 includes: a stacked titanium layer and a titanium nitride layer, wherein the titanium layer covers the first metal layer 60 and the bottom wall and side wall of the second groove 43.

[0071] Step S10: As Figure 11 As shown, a third metal layer 80 is formed, which covers the second metal layer 70 and fills the second groove 43.

[0072] Preferably, the material of the third metal layer 80 can be aluminum.

[0073] Step S11: As Figure 12 As shown, the third metal layer 80 and the second metal layer 70 extending beyond the surface of the first metal layer 60 are removed to planarize the surface. Figure 12 The surface of the semiconductor structure shown. After removing the third metal layer 80 and the second metal layer 70 that extend beyond the surface of the first metal layer 60, only the second metal layer 70 and the third metal layer 80 in the second groove 43 are retained.

[0074] In this embodiment, removing the third metal layer 80 and the second metal layer 70 that extend beyond the surface of the first metal layer 60 allows the upper surface of the logic region to be flush with the upper surface of the pixel region. This avoids uneven photoresist coating during subsequent photolithography processes, thereby improving device manufacturing yield and efficiency.

[0075] Step S12: As Figure 13 As shown, an etch stop layer 90 is formed, which covers the first metal layer 60 and the third metal layer 80 in the second groove 43.

[0076] The etching stop layer 90 can be made of silicon dioxide.

[0077] Step S14: As Figure 14 As shown, the etch stop layer 90 and the first metal layer 60 between the deep trenches 42 in the pixel region are etched to expose the high-k dielectric layer 50 and a portion of the thickness of the metal mesh 61. At this point, the metal mesh 61, extending a certain height beyond the surface of the high-k dielectric layer 50, enables optical isolation between pixels.

[0078] Preferably, after etching the etch stop layer 90 and the first metal layer 60 between the deep trenches 42 in the pixel region to expose the high-K dielectric layer 50 and the metal mesh 61 with a thickness of the top portion of the deep trenches 42, the height of the metal mesh 61 extending beyond the surface of the high-K dielectric layer 50 can be 100 nm to 300 nm.

[0079] Step S15: As Figure 15 As shown, an isolation layer 91 is formed, which covers the exposed metal mesh 61.

[0080] Preferably, the material of the isolation layer 91 can be silicon dioxide.

[0081] Preferably, the thickness of the isolation layer 91 is at least 10 nm.

[0082] Furthermore, after forming the isolation layer 91, the method for fabricating the back-illuminated image sensor may further include: forming a color filter 92, the color filter 92 being located on the surface of the high-k dielectric layer 50.

[0083] Preferably, the thickness of the color filter 92 is equal to or less than the height of the metal mesh 61 extending beyond the surface of the high-K dielectric layer 50.

[0084] In this embodiment, the thickness of the color filter 92 is equal to the height of the metal mesh 61 extending beyond the surface of the high-K dielectric layer 50.

[0085] Furthermore, after forming the color filter 92, the method for fabricating the back-illuminated image sensor may further include: forming a microlens material layer 93, wherein the microlens material layer 93 is located on the surface of the color filter 92.

[0086] In this application, the first substrate 101 is first bonded to the second substrate 102 by a bonding process so that the combined film layer 20 and the first substrate 101 are inverted on the second substrate 102; then, a plurality of deep trenches 42 are formed in an array; next, a first metal layer 60 is formed, wherein the first metal layer filling the deep trenches and the first metal layer at the top of the deep trenches constitute a metal mesh 61; then, the etching stop layer 90 and the first metal layer 60 between the deep trenches in the pixel area are etched to expose a portion of the thickness of the metal mesh 61. Subsequently, a color filter 62 can be formed between the metal mesh 61 that extends beyond the surface of the high-k dielectric layer (substrate surface), thereby achieving complete optical isolation between adjacent pixels without sacrificing electrical isolation, greatly reducing optical crosstalk and improving CIS performance.

[0087] Based on the same inventive concept, embodiments of this application also provide a back-illuminated image sensor, such as... Figure 15 As shown, the back-illuminated image sensor includes:

[0088] A first substrate 101 and a second substrate 102, wherein the first substrate 101 includes a pixel region and a logic region, a combined film layer 20 is formed on the front side of the first substrate 101, a first metal interconnect structure 201 is formed in the combined film layer 20 of the pixel region, a second metal interconnect structure 202 is formed in the combined film layer 20 of the logic region, and a first bonding layer 31 is formed on the front side of the combined film layer 20; a second bonding layer 32 is formed on the front side of the second substrate 102, and the first bonding layer 31 is bonded to the second bonding layer 32 such that the first substrate 101 is inverted on the second substrate 102;

[0089] Multiple deep trenches 42 arranged in an array, the deep trenches 42 being located in the first substrate 101 of the pixel region;

[0090] The second groove 43 is located in the first substrate 101 of the logic region and the bottom wall opening of the second groove 43 exposes the second metal interconnect structure 202.

[0091] A high-K dielectric layer 50 covers the back side of the first substrate 101, the bottom wall and side wall of the deep trench 42, and part of the bottom wall and side wall of the second groove 43.

[0092] A first metal layer 60 covers a portion of the surface of the high-K dielectric layer 50, a portion of the bottom wall and a portion of the sidewall of the second groove 43, and fills the deep trench 42. The first metal layer inside the deep trench 42 and at the top of the deep trench 43 forms a metal mesh 61. The metal mesh 61 at the top of the deep trench 42 extends beyond the surface of the high-K dielectric layer 50 by a certain height.

[0093] The second metal layer 70 covers the bottom wall and side wall of the second groove 43;

[0094] A third metal layer 80 fills the second groove 43;

[0095] An etch stop layer 90 covers the first metal layer 50, the top of the metal mesh 61, and the third metal layer 80 in the second groove 43; and,

[0096] An isolation layer 91 covers all exposed metal mesh 61.

[0097] Preferably, the height of the metal mesh 61 extending beyond the surface of the high-K dielectric layer 50 is 100 nm to 300 nm.

[0098] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A method for fabricating a back-illuminated image sensor, characterized in that, include: A first substrate and a second substrate are provided. The first substrate includes a pixel region and a logic region. A combined film layer is formed on the front side of the first substrate. A first metal interconnect structure is formed in the combined film layer of the pixel region. A second metal interconnect structure is formed in the combined film layer of the logic region. A first bonding layer is formed on the combined film layer. A second bonding layer is formed on the front side of the second substrate. The first bonding layer and the second bonding layer are bonded together by a bonding process, at which time the combined film layer and the first substrate are inverted on the second substrate; The first substrate is thinned from the back side of the first substrate; The first substrate of the logic region is etched to form a first groove; The first substrate of the pixel region is etched to form a plurality of deep trenches arranged in an array; A high-k dielectric layer is formed, which covers the back side of the first substrate, the bottom wall and sidewalls of the deep trench, and the bottom wall and sidewalls of the first groove. A first metal layer is formed, which covers the high-k dielectric layer, the bottom wall and sidewalls of the first groove, and fills the deep trench. At this time, the first metal layer inside the deep trench and at the top of the deep trench constitutes a metal mesh. The bottom wall of the first groove and the first substrate at the bottom of the first groove, a portion of the combined film layer, are etched and stopped on the surface of the second metal interconnect structure to form a second groove; A second metal layer is formed, which covers the first metal layer and the bottom and side walls of the second groove; A third metal layer is formed, which covers the second metal layer and fills the second groove; Remove the third metal layer and the second metal layer that extend beyond the surface of the first metal layer; An etch stop layer is formed, which covers the first metal layer and the third metal layer in the second groove; Etch the etch stop layer and the first metal layer between the deep trenches in the pixel region to expose the high-k dielectric layer and a portion of the thickness of the metal mesh; and, An isolation layer is formed, which covers the exposed metal mesh.

2. The method for fabricating a back-illuminated image sensor according to claim 1, characterized in that, After etching the etch stop layer and the first metal layer between the deep trenches in the pixel region to expose the high-k dielectric layer and a portion of the thickness of the metal mesh, the height of the metal mesh extending beyond the surface of the high-k dielectric layer is 100 nm to 300 nm.

3. The method for fabricating a back-illuminated image sensor according to claim 1, characterized in that, The depth of the deep trench is at least 3 μm, and the width of the deep trench is 0.1 μm to 0.15 μm.

4. The method for fabricating a back-illuminated image sensor according to claim 1, characterized in that, The high-K dielectric layer includes: an Al2O3 layer, a Ta2O5 layer and a SiO2 layer stacked sequentially, wherein the Al2O3 layer covers the back side of the first substrate, the bottom wall and side wall of the deep trench and the bottom wall and side wall of the first groove.

5. The method for fabricating a back-illuminated image sensor according to claim 1, characterized in that, The combined film layer includes: a first NDC layer, a second NDC layer to the m-th NDC layer, a first dielectric layer, a second dielectric layer to the m-th dielectric layer, wherein the first NDC layer, the first dielectric layer, the second NDC layer, the second dielectric layer to the m-th NDC layer and the m-th dielectric layer are stacked sequentially, and m is an integer greater than or equal to 2.

6. The method for fabricating a back-illuminated image sensor according to claim 1, characterized in that, The first bonding layer and the second bonding layer are bonded using a van der Waals force bonding process.

7. The method for fabricating a back-illuminated image sensor according to claim 1, characterized in that, After forming the isolation layer, the method for fabricating the back-illuminated image sensor further includes: forming a color filter located on the surface of the high-k dielectric layer.

8. The method for fabricating a back-illuminated image sensor according to claim 7, characterized in that, After forming the color filter, the method for fabricating the back-illuminated image sensor further includes: forming a microlens material layer, the microlens material layer being located on the surface of the color filter.

9. A back-illuminated image sensor, characterized in that, include: A first substrate and a second substrate, the first substrate comprising a pixel region and a logic region, a combined film layer formed on the front side of the first substrate, a first metal interconnect structure formed in the combined film layer of the pixel region, a second metal interconnect structure formed in the combined film layer of the logic region, and a first bonding layer formed on the combined film layer; a second bonding layer formed on the front side of the second substrate, the first bonding layer being bonded to the second bonding layer such that the first substrate is inverted on the second substrate. Multiple deep trenches arranged in an array, the deep trenches being located in the first substrate of the pixel region; The second groove is located in the first substrate of the logic region and the bottom wall opening of the second groove exposes the second metal interconnect structure; A high-k dielectric layer covers the back side of the first substrate, the bottom wall and sidewalls of the deep trench, and part of the bottom wall and sidewalls of the second groove; A first metal layer covers a portion of the surface of the high-K dielectric layer, a portion of the bottom wall and a portion of the sidewall of the second groove, and fills the deep trench. The interior of the deep trench and the first metal layer at the top of the deep trench form a metal mesh, and the metal mesh at the top of the deep trench extends beyond the surface of the high-K dielectric layer by a certain height. A second metal layer covers the bottom wall and side walls of the second groove; A third metal layer, the third metal layer filling the second groove; An etch stop layer, the etch stop layer covering the first metal layer, the top of the metal mesh, and the third metal layer in the second groove; and, An isolation layer that covers the exposed metal mesh.

10. The back-illuminated image sensor according to claim 9, characterized in that, The height of the metal mesh extending beyond the surface of the high-K dielectric layer is 100 nm to 300 nm.

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