Data transceiver circuit of a serializer / deserializer
Patent Information
- Application Number
- CN202310281367.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-03-21
- Publication Date
- 2026-10-23
- Estimated Expiration
- 2043-03-21
AI Technical Summary
[0006]本发明提供一种串行器/解串器的数据收发电路,用以解决现有技术中不能在兼容高压和低压的同时提升带宽的缺陷,实现在兼容高压和低压的同时提升带宽
[0025]本发明提供的串行器/解串器的数据收发电路,包括:发送模块、传输模块和接收模块,其中:发送模块包括低压开关设备和保护设备;低压开关设备为芯片内部使用的设备,保护设备用于确保目标数据经过低压开关设备到达传输模块的信道上;接收模块的工作电压为高压或低压,接收模块用于接收信道传输的目标数据。一方面,接收模块兼容高压和低压;另一方面,数据管使用的低压开关设备,可能会导致目标数据不能经过低压开关设备到达传输模块的信道上,而本发明使用保护设备确保目标数据经过低压开关设备到达传输模块的信道上,由于低压开关设备的带宽较大,能够有效提升带宽。本发明可以在兼容高压和低压的同时提升带宽。
Smart Images

Figure CN116488677B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of high-speed data communication technology, and in particular to a data transceiver circuit for a serializer / deserializer. Background Technology
[0002] Currently, with the development of electronic information technology, the application scenarios of serializers / deserializers (SerDes, SE Rializer / DESerializer) are becoming increasingly widespread, and various SerDes protocols are emerging. Earlier protocols required support for high voltage, with common high voltage ranges of 1–5V, such as 1.2V, 1.8V, 3.3V, and 5V, and the maximum voltage could not exceed the power supply voltage. Newer protocols released in recent years, prioritizing performance, support low voltage, with common low voltage ranges of 0–1V, such as 0.75V and 0.85V.
[0003] like Figure 1 The diagram shown is one of the data transceiver circuit schematics for a serializer / deserializer. The transmitting end is connected to a driver, directly driven by a low voltage source, and data transmission is completed via a transmission line connected to the receiving terminal. Figure 1 In the circuit shown, although the data tube uses a low-voltage switching device, which can increase bandwidth, it does not support high voltage.
[0004] like Figure 2 The diagram shown is the second schematic of a serializer / deserializer data transceiver circuit. The receiving end is connected to a terminal block including a voltage power supply (high or low voltage) and a fixed impedance, and then connected to a driver connected to the transmitting end via a transmission line. The data transistor uses a high-voltage switching device, and data is transmitted in current mode. Figure 2 In the circuit shown, although it is compatible with both high and low voltage, the data tube uses a high-voltage switching device, which leads to a decrease in bandwidth.
[0005] The shortcoming of existing technologies is that they cannot increase bandwidth while being compatible with both high and low voltage. Summary of the Invention
[0006] This invention provides a data transceiver circuit for a serializer / deserializer to address the shortcomings of existing technologies that cannot improve bandwidth while maintaining compatibility with both high and low voltage, thereby achieving improved bandwidth while maintaining compatibility with both high and low voltage.
[0007] This invention provides a data transceiver circuit for a serializer / deserializer, comprising: a transmitting module, a transmission module, and a receiving module, wherein:
[0008] The transmitting module includes a low-voltage switching device and a protection device; the low-voltage switching device is a device used inside the chip, and the protection device is used to ensure that the target data reaches the channel of the transmitting module after passing through the low-voltage switching device.
[0009] The receiving module operates at high or low voltage, and is used to receive the target data transmitted through the channel.
[0010] According to a serializer / deserializer data transceiver circuit provided by the present invention, the number of low-voltage switching devices is two, the protection device includes two AC coupling capacitors, the transmission module includes two transmission lines, the receiving module includes a common-mode level holding circuit, the power supply voltage of the two low-voltage switching devices is low voltage, and the two AC coupling capacitors are used to couple the target data to the common-mode level holding circuit;
[0011] Wherein, the data output terminal of the first low-voltage switchgear is connected to the first terminal of the first AC coupling capacitor, and the second terminal of the first AC coupling capacitor is connected to the first terminal of the first transmission line; the data output terminal of the second low-voltage switchgear is connected to the first terminal of the second AC coupling capacitor, and the second terminal of the second AC coupling capacitor is connected to the first terminal of the second transmission line; the second terminals of the first and second transmission lines are coupled to the common-mode level holding circuit.
[0012] According to the data transceiver circuit of the serializer / deserializer provided by the present invention, both of the AC coupling capacitors are disposed on the printed circuit board.
[0013] According to the present invention, a data transceiver circuit for a serializer / deserializer includes a first low-voltage switching device comprising a first switch and a second switch, a second low-voltage switching device comprising a third switch and a fourth switch, and a common-mode level holding circuit comprising a first pull-up resistor, a second pull-up resistor, a first pull-down resistor, and a second pull-down resistor.
[0014] Wherein, the first terminal of the first switch is connected to low voltage, the second terminal of the first switch and the first terminal of the second switch are both connected to the data output terminal of the first low-voltage switchgear, and the second terminal of the second switch is grounded; the first terminal of the third switch is connected to low voltage, the second terminal of the third switch and the first terminal of the fourth switch are both connected to the data output terminal of the second low-voltage switchgear, and the second terminal of the fourth switch is grounded; the first terminals of the first pull-up resistor and the second pull-up resistor are both connected to high voltage or low voltage, the second terminals of the first pull-up resistor and the first terminal of the first pull-down resistor are both connected to the second terminal of the first transmission line, the second terminals of the second pull-up resistor and the first terminals of the second pull-down resistor are both connected to the second terminal of the second transmission line, and the second terminals of the first pull-down resistor and the second pull-down resistor are both grounded.
[0015] According to a serializer / deserializer data transceiver circuit provided by the present invention, the number of low-voltage switching devices is two, the protection device includes two AC coupling capacitors and a pull-down unit of the common-mode level holding circuit, the transmission module includes two transmission lines, the receiving module includes a pull-up unit of the common-mode level holding circuit, the power supply voltage of the two low-voltage switching devices is low voltage, and the two AC coupling capacitors are used to couple the target data to the common-mode level holding circuit;
[0016] In this configuration, the data output terminal of the first low-voltage switchgear is connected to the first terminal of the first AC coupling capacitor, the data output terminal of the second low-voltage switchgear is connected to the first terminal of the second AC coupling capacitor, the second terminal of the first AC coupling capacitor and the first terminal of the first transmission line are both connected to the first terminal of the pull-down unit, the second terminal of the second AC coupling capacitor and the first terminal of the second transmission line are both connected to the second terminal of the pull-down unit, and the third terminal of the pull-down unit is grounded; the first terminal of the pull-up unit is connected to the second terminal of the first transmission line, the second terminal of the pull-up unit is connected to the second terminal of the second transmission line, and the third terminal of the pull-up unit is connected to either high voltage or low voltage.
[0017] According to the data transceiver circuit of the serializer / deserializer provided by the present invention, the two AC coupling capacitors and the pull-down unit are all disposed on the printed circuit board.
[0018] According to the present invention, a data transceiver circuit for a serializer / deserializer includes a first low-voltage switching device comprising a first switch and a second switch, a second low-voltage switching device comprising a third switch and a fourth switch, a pull-up unit comprising a first pull-up resistor and a second pull-up resistor, and a pull-down unit comprising a first pull-down resistor and a second pull-down resistor.
[0019] Wherein, the first terminal of the first switch is connected to low voltage, the second terminal of the first switch and the first terminal of the second switch are both connected to the data output terminal of the first low-voltage switchgear, and the second terminal of the second switch is grounded; the first terminal of the third switch is connected to low voltage, the second terminal of the third switch and the first terminal of the fourth switch are both connected to the data output terminal of the second low-voltage switchgear, and the second terminal of the fourth switch is grounded; the first terminal of the first pull-up resistor and the first terminal of the second pull-up resistor are both connected to high voltage or low voltage, the second terminal of the first pull-up resistor is connected to the second terminal of the first transmission line, the second terminal of the second pull-up resistor is connected to the second terminal of the second transmission line, the second terminal of the first AC coupling capacitor and the first terminal of the first transmission line are both connected to the first terminal of the first pull-down resistor, the second terminal of the second AC coupling capacitor and the first terminal of the second transmission line are both connected to the first terminal of the second pull-down resistor, and the second terminals of the first pull-down resistor and the second pull-down resistor are both grounded.
[0020] According to a data transceiver circuit for a serializer / deserializer provided by the present invention, the transmitting module further includes a current source, the protection device includes a high-voltage switching device, the receiving module includes a pull-up circuit, and the high-voltage switching device is used to prevent the low-voltage switching device from being broken down by high voltage.
[0021] Wherein, the first terminal of the low-voltage switchgear is connected to the positive terminal of the current source, the negative terminal of the current source is grounded, the second terminal of the low-voltage switchgear is connected to the first terminal of the high-voltage switchgear, the second terminal of the high-voltage switchgear is connected to the internal bias voltage, the third terminal of the high-voltage switchgear is connected to the first terminal of the transmission module, the second terminal of the transmission module is connected to the first terminal of the pull-up circuit, and the second terminal of the pull-up circuit is connected to either high voltage or low voltage.
[0022] According to the present invention, a data transceiver circuit for a serializer / deserializer includes a low-voltage switching device comprising a first transistor and a second transistor, a high-voltage switching device comprising a third transistor, a fourth transistor, a fifth transistor and a sixth transistor, a transmission module comprising two transmission lines, and a pull-up circuit comprising a third pull-up resistor and a fourth pull-up resistor.
[0023] In this configuration, the gates of the first and second transistors are connected to the target data; the sources of both the first and second transistors are connected to the positive terminal of the current source; the drain of the first transistor is connected to the source of the fourth transistor; the drain of the second transistor is connected to the source of the sixth transistor; the drain of the fourth transistor is connected to the source of the third transistor; the drain of the sixth transistor is connected to the source of the fifth transistor; the drain of the third transistor is connected to the first end of the first transmission line; the drain of the fifth transistor is connected to the first end of the second transmission line; the gates of the third and fourth transistors are connected to the internal bias voltage; the second end of the first transmission line is connected to the first end of the third pull-up resistor; the second end of the second transmission line is connected to the first end of the fourth pull-up resistor; and the second ends of the third and fourth pull-up resistors are connected to either a high voltage or a low voltage.
[0024] According to the data transceiver circuit of the serializer / deserializer provided by the present invention, the values of the two AC coupling capacitors are in the range of 75 to 200 nF.
[0025] The serializer / deserializer data transceiver circuit provided by this invention includes: a transmitting module, a transmission module, and a receiving module. The transmitting module includes a low-voltage switching device and a protection device. The low-voltage switching device is an internal chip device, and the protection device ensures that the target data reaches the transmission module's channel after passing through the low-voltage switching device. The receiving module operates at either high or low voltage and is used to receive the target data transmitted through the channel. On one hand, the receiving module is compatible with both high and low voltage. On the other hand, the low-voltage switching device used in the data tube might prevent the target data from reaching the transmission module's channel. This invention uses a protection device to ensure that the target data reaches the transmission module's channel after passing through the low-voltage switching device. Since the low-voltage switching device has a larger bandwidth, it can effectively improve bandwidth. This invention can improve bandwidth while maintaining compatibility with both high and low voltage. Attached Figure Description
[0026] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0027] Figure 1 This is one of the schematic diagrams of data transceiver circuits for serializers / deserializers provided by existing technology;
[0028] Figure 2 This is the second schematic diagram of a data transceiver circuit for a serializer / deserializer provided by existing technology.
[0029] Figure 3 This is one of the schematic diagrams of the data transceiver circuit of the serializer / deserializer provided in the embodiments of the present invention;
[0030] Figure 4 This is the second schematic diagram of the data transceiver circuit of the serializer / deserializer provided in the embodiment of the present invention;
[0031] Figure 5 This is the third schematic diagram of the data transceiver circuit of the serializer / deserializer provided in the embodiment of the present invention;
[0032] Figure 6 This is the fourth schematic diagram of the data transceiver circuit of the serializer / deserializer provided in the embodiments of the present invention. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.
[0034] The following is combined with Figures 3 to 6 The data transceiver circuit of the serializer / deserializer of the present invention is described.
[0035] Please refer to Figure 3 , Figure 3 This is one of the schematic diagrams of the data transceiver circuit of the serializer / deserializer provided in the embodiments of the present invention. For example... Figure 3 As shown, the data transceiver circuit of the serializer / deserializer may include: a transmitting module 1, a transmitting module 2, and a receiving module 3, wherein:
[0036] The transmitting module 1 includes a low-voltage switching device 11 and a protection device 12; the low-voltage switching device 11 is a device used inside the chip, and the protection device 12 is used to ensure that the target data reaches the channel of the transmitting module 2 after passing through the low-voltage switching device 11.
[0037] The operating voltage of the receiving module 3 is high voltage or low voltage. The receiving module 3 is used to receive target data transmitted through the channel.
[0038] Specifically, the target data is the data to be transmitted, such as differential signals (Data_p, Data_n).
[0039] The transmitting module 1 can use the highest-speed low-voltage switching device 11 to ensure bandwidth. The low-voltage switching device 11 has a thin gate oxide layer, supporting lower voltages, such as 0.75V or 0.85V. However, the low-voltage switching device 11 has a large bandwidth; using it as the data transistor effectively improves bandwidth. Furthermore, because the low-voltage switching device 11 has a smaller area, the power consumption of the preceding driver circuit is also lower.
[0040] Receiver module 3 can be connected to either high voltage or low voltage, and can switch between different operating voltages according to the actual scenario. High voltage refers to the input / output (I / O) voltage, such as 1.2V, 1.8V, 3.3V, 5V, etc. Low voltage refers to the core voltage, such as 0.75V, 0.85V, etc.
[0041] When the data tube uses a low-voltage switchgear 11, connecting the receiving module 3 to high voltage may cause the low-voltage switchgear 11 to break down, preventing the target data from being transmitted to the receiving module 3. Alternatively, the low-voltage switchgear 11 may generate a signal waveform with an amplitude of Vpp under low-voltage drive, which cannot be directly transmitted to the receiving module 3. To address these issues, this embodiment employs a protection device 12 to ensure that the target data reaches the channel of the transmission module 2 via the low-voltage switchgear 11.
[0042] In this embodiment, on the one hand, the receiving module is compatible with both high and low voltage; on the other hand, the low-voltage switching equipment used in the data tube may prevent the target data from reaching the transmission module's channel through the low-voltage switching equipment. This embodiment uses a protection device to ensure that the target data reaches the transmission module's channel through the low-voltage switching equipment. Since the low-voltage switching equipment has a larger bandwidth, it can effectively improve bandwidth. Therefore, this embodiment can improve bandwidth while maintaining compatibility with both high and low voltage.
[0043] In one embodiment, such as Figure 4 As shown, there are two low-voltage switchgear devices, the protection device 12 includes two AC coupling capacitors, the transmission module 2 includes two transmission lines, and the receiving module 3 includes a common-mode level holding circuit 31. The power supply voltage of the two low-voltage switchgear devices is low voltage, and the two AC coupling capacitors are used to couple the target data to the common-mode level holding circuit.
[0044] Among them, the data output terminal of the first low-voltage switchgear 111 is connected to the first AC coupling capacitor C. pcb1 The first terminal is connected to the first AC coupling capacitor C. pcb1 The second terminal is connected to the first terminal of the first transmission line 21; the data output terminal of the second low-voltage switching device 112 is connected to the second AC coupling capacitor C. pcb2 The first terminal is connected to the second AC coupling capacitor C. pcb2 The second end is connected to the first end of the second transmission line 22; the second ends of the first transmission line 21 and the second transmission line 22 are coupled to the common-mode level holding circuit 31.
[0045] Since the power supply voltage of the two low-voltage switching devices at the transmitting end is low, the two low-voltage switching devices generate a signal waveform with an amplitude of Vpp under the low-voltage drive. This waveform cannot be directly transmitted to the common-mode level holding circuit 31 at the receiving end. Therefore, a first AC coupling capacitor C is added between the first low-voltage switching device 111 and the first transmission line 21. pcb1 A second AC coupling capacitor C is added between the second low-voltage switchgear 112 and the second transmission line 22. pcb2 The common-mode level holding circuit 31 at the receiving end can couple the signal waveform (i.e., target data) with an amplitude of Vpp at the transmitting end to the signal waveform at the receiving end.
[0046] Furthermore, regardless of whether the common-mode level holding circuit 31 switches to high or low voltage, since the power supply domain at the transmitting end is low voltage, a first low-voltage switching device 111 and a second low-voltage switching device 112 with higher bandwidth can be selected to increase the bandwidth without the risk of overvoltage. Because there is no risk of overvoltage, the protection device 12 does not need to use a vertically cascaded protection transistor, resulting in higher bandwidth.
[0047] For example, the first AC coupling capacitor C pcb1 Second AC coupling capacitor C pcb2 The value range is 75–200 nF. Preferably, the first AC coupling capacitor C pcb1 Second AC coupling capacitor C pcb2 All of these are located on printed circuit boards, which can reduce circuit manufacturing costs.
[0048] In this embodiment, firstly, both low-voltage switching devices are powered by low voltage. The receiving module includes a common-mode level holding circuit. Since the two low-voltage switching devices at the transmitting end generate a signal waveform with an amplitude of Vpp under low-voltage drive, it cannot be directly transmitted to the common-mode level holding circuit at the receiving end. The protection device uses two AC coupling capacitors to couple the signal waveform with an amplitude of Vpp (i.e., the target data) at the transmitting end to the common-mode level holding circuit at the receiving end. Secondly, since the power supply domain at the transmitting end is low voltage, a first low-voltage switching device and a second low-voltage switching device with higher bandwidth can be selected to increase the bandwidth without the risk of overvoltage. Because there is no risk of overvoltage, the protection device does not need to use a vertically cascaded protection transistor, resulting in higher bandwidth.
[0049] In one embodiment, such as Figure 4 As shown, the first low-voltage switching device 111 includes a first switch K1 and a second switch K2, the second low-voltage switching device 112 includes a third switch K3 and a fourth switch K4, and the common-mode level holding circuit 31 includes a first pull-up resistor R. source1 Second pull-up resistor R source2 First pull-down resistor R load1 Second pull-down resistor R load2 ;
[0050] In this configuration, the first terminal of the first switch K1 is connected to low voltage, and the second terminals of both the first and second switches K2 are connected to the data output terminal of the first low-voltage switchgear 111. The second terminal of the second switch K2 is grounded. The first terminal of the third switch K3 is connected to low voltage, and the second terminals of both the third switch K3 and the fourth switch K4 are connected to the data output terminal of the second low-voltage switchgear 112. The second terminal of the fourth switch K4 is grounded. The first pull-up resistor R... source1 Second pull-up resistor R source2The first terminal is connected to either high voltage or low voltage, and the first pull-up resistor R source1 The second terminal and the first pull-down resistor R load1 The first end of each line is connected to the second end of the first transmission line 21, and the second pull-up resistor R source2 The second terminal and the second pull-down resistor R load2 The first end of each line is connected to the second end of the second transmission line 22, and the first pull-down resistor R load1 Second pull-down resistor R load2 The second end of each is grounded.
[0051] Specifically, the signal transmission circuit includes: ① Low voltage - first switch K1 - first AC coupling capacitor C pcb1 -First transmission line 21-First pull-down resistor R load1 - Ground; ② High voltage or low voltage - First pull-up resistor R source1 -First transmission line 21-First AC coupling capacitor C pcb1 -Second switch K2-Ground; ③Low voltage-Third switch K3-Second AC coupling capacitor C pcb2 -Second transmission line 22-Second pull-down resistor R load2 -Ground; ④High voltage or low voltage -Second pull-up resistor R source2 -Second transmission line 22-Second AC coupling capacitor C pcb2 -Fourth switch K4- Ground. When the first switch K1 and the fourth switch K4 are on, signal transmission loops ① and ④ are on, completing data transmission. When the second switch K2 and the third switch K3 are on, signal transmission loops ② and ③ are on, completing data transmission.
[0052] For example, the first pull-up resistor R source1 =Second pull-up resistor R source2 =R source First pull-down resistor R load1 =Second pull-down resistor R load2 =R load R source =100 ohm, R load =100 ohm, R source / / R load =50 ohm. That is, the common-mode level V at the receiving end CM This is guaranteed by the common-mode level holding circuit 31.
[0053] The transmitting end generates a signal waveform with an amplitude of Vpp in the low-voltage domain, which is coupled to the common-mode level V through two AC coupling capacitors. CM Finally, the required common-mode level V is observed at the receiving end. CM The signal above.
[0054] In this embodiment, the common-mode level at the receiving end is guaranteed by the common-mode level holding circuit. The transmitting end generates a signal waveform with an amplitude of Vpp in the low-voltage domain. This waveform is coupled to the common-mode level through two AC coupling capacitors, and finally the signal at the desired common-mode level can be observed at the receiving end.
[0055] In one embodiment, such as Figure 5 As shown, there are two low-voltage switchgear devices, both powered by low voltage. Protection device 12 includes two AC coupling capacitors C. pcb The transmission module 2 includes two transmission lines and a common-mode level holding circuit pull-down unit 41. The receiving module 3 includes a common-mode level holding circuit pull-up unit 42 and two AC coupling capacitors for coupling the target data to the common-mode level holding circuit.
[0056] Among them, the data output terminal of the first low-voltage switchgear 111 is connected to the first AC coupling capacitor C. pcb1 The first terminal is connected, and the data output terminal of the second low-voltage switchgear 112 is connected to the second AC coupling capacitor C. pcb2 The first terminal is connected to the first AC coupling capacitor C. pcb1 The second end and the first end of the first transmission line 21 are both connected to the first end of the pull-down unit 41, and the second AC coupling capacitor C pcb2 The second end of the first transmission line 21 and the first end of the second transmission line 22 are both connected to the second end of the pull-down unit 41, and the third end of the pull-down unit 41 is grounded; the first end of the pull-up unit 42 is connected to the second end of the first transmission line 21, the second end of the pull-up unit 42 is connected to the second end of the second transmission line 22, and the third end of the pull-up unit 42 is connected to high voltage or low voltage.
[0057] Specifically, pull-up unit 42 and pull-down unit 41 together form a common-mode level holding circuit. For scenarios requiring open-drain operation, pull-up unit 42 is located at the receiving end, and no pull-down unit 41 is provided below pull-up unit 42, which can meet the requirement of open-drain operation.
[0058] Preferably, both AC coupling capacitors and pull-down unit 41 are disposed on a printed circuit board, which can reduce circuit manufacturing costs.
[0059] The pull-up unit 42 at the receiving end switches between high voltage and low voltage according to the actual scenario, and the common-mode level holding circuit generates the required common-mode level V. CM Since the power supply voltage of the two low-voltage switching devices at the transmitting end is low voltage, the two low-voltage switching devices generate a signal waveform with an amplitude of Vpp under the drive of low voltage. This signal waveform passes through the first AC coupling capacitor C. pcb1 Second AC coupling capacitor C pcb2 Coupled to common-mode level V CMFinally, the required common-mode level V is observed at the receiving end. CM The signal above.
[0060] Furthermore, regardless of whether the pull-up unit 42 at the receiving end switches to high voltage or low voltage, since the power supply domain at the transmitting end is low voltage, a first low-voltage switchgear 111 and a second low-voltage switchgear 112 with higher bandwidth can be selected to increase the bandwidth without the risk of overvoltage. Because there is no risk of overvoltage, the protection device 12 does not need to use a vertically cascaded protection tube, resulting in higher bandwidth.
[0061] For example, the first AC coupling capacitor C pcb1 Second AC coupling capacitor C pcb2 The values range from 75 to 200 nF.
[0062] In this embodiment, firstly, the pull-up unit and the pull-down unit together form a common-mode level holding circuit. For scenarios requiring open-drain operation, the pull-up unit is located at the receiving end, and no pull-down unit is provided below the pull-up unit, which can meet the requirement of open-drain operation. Secondly, the common-mode level holding circuit generates the required common-mode level. Two low-voltage switching devices generate a signal waveform with an amplitude of Vpp under low-voltage drive. This signal waveform is coupled to the common-mode level through the first AC coupling capacitor and the second AC coupling capacitor, and finally the signal at the required common-mode level is observed at the receiving end. Thirdly, since the power supply domain at the transmitting end is low-voltage, the first and second low-voltage switching devices with higher bandwidth can be selected to increase the bandwidth without the risk of overvoltage. Since there is no risk of overvoltage, the protection device does not need to use a vertically cascaded protection transistor, resulting in higher bandwidth.
[0063] In one embodiment, such as Figure 5 As shown, the first low-voltage switchgear 111 includes a first switch K1 and a second switch K2, the second low-voltage switchgear 112 includes a third switch K3 and a fourth switch K4, and the pull-up unit 42 includes a first pull-up resistor R. source1 Second pull-up resistor R source2 The pull-down unit 41 includes a first pull-down resistor R. load1 Second pull-down resistor R load2 ;
[0064] In this configuration, the first terminal of the first switch K1 is connected to low voltage, and the second terminals of both the first and second switches K2 are connected to the data output terminal of the first low-voltage switchgear 111. The second terminal of the second switch K2 is grounded. The first terminal of the third switch K3 is connected to low voltage, and the second terminals of both the third switch K3 and the fourth switch K4 are connected to the data output terminal of the second low-voltage switchgear 112. The second terminal of the fourth switch K4 is grounded. The first pull-up resistor R... source1 Second pull-up resistor R source2The first terminal is connected to either high voltage or low voltage, and the first pull-up resistor R source1 The second end is connected to the second end of the first transmission line 21, and the second pull-up resistor R source2 The second end is connected to the second end of the second transmission line 22, and the first AC coupling capacitor C pcb1 Both the second end and the first end of the first transmission line 21 are connected to the first pull-down resistor R. load1 The first terminal is connected to the second AC coupling capacitor C. pcb2 The second end and the first end of the second transmission line 22 are both connected to the second pull-down resistor R. load2 The first terminal is connected, and the first pull-down resistor R load1 Second pull-down resistor R load2 The second end of each is grounded.
[0065] Specifically, the signal transmission circuit includes: ① Low voltage - first switch K1 - first AC coupling capacitor C pcb1 -First pull-down resistor R load1 - Ground; ② High voltage or low voltage - First pull-up resistor R source1 -First transmission line 21-First AC coupling capacitor C pcb1 -Second switch K2-Ground; ③Low voltage-Third switch K3-Second AC coupling capacitor C pcb2 -Second pull-down resistor R load2 -Ground; ④High voltage or low voltage -Second pull-up resistor R source2 -Second transmission line 22-Second AC coupling capacitor C pcb2 -Fourth switch K4- Ground. When the first switch K1 and the fourth switch K4 are on, signal transmission loops ① and ④ are on, completing data transmission. When the second switch K2 and the third switch K3 are on, signal transmission loops ② and ③ are on, completing data transmission.
[0066] For example, the first pull-up resistor R source1 =Second pull-up resistor R source2 =R source First pull-down resistor R load1 =Second pull-down resistor R load2 =R load Regarding the High Definition Multimedia Interface (HDMI), R source =50 ohm, R load =500 ohm.
[0067] In this embodiment, the common-mode level holding circuit generates the required common-mode level. Two low-voltage switching devices generate a signal waveform with an amplitude of Vpp under low-voltage drive. This signal waveform is coupled to the common-mode level through the first AC coupling capacitor and the second AC coupling capacitor. Finally, the signal at the required common-mode level is observed at the receiving end.
[0068] In one embodiment, such as Figure 6 As shown, the transmitting module 1 also includes a current source 13, the protection device 12 includes a high-voltage switchgear 121, and the receiving module 3 includes a pull-up circuit 51. The high-voltage switchgear 121 is used to prevent the low-voltage switchgear 11 from being broken down by high voltage.
[0069] In this configuration, the first terminal of the low-voltage switchgear 11 is connected to the positive terminal of the current source 13, and the negative terminal of the current source 13 is grounded. The second terminal of the low-voltage switchgear 11 is connected to the first terminal of the high-voltage switchgear 121, and the second terminal of the high-voltage switchgear 121 is connected to the internal bias voltage V. casc The third terminal of the high-voltage switchgear 121 is connected to the first terminal of the transmission module 2, and the second terminal of the transmission module 2 is connected to the first terminal of the pull-up circuit 51. The second terminal of the pull-up circuit 51 is connected to high voltage or low voltage.
[0070] Specifically, the receiving end is connected to a terminal including a power supply and a pull-up circuit 51. The power supply can be high voltage or low voltage, but high voltage is typically used. The oxide layer of the high-voltage switching device 121 is a thick gate oxide layer, and the thicker the gate oxide layer, the higher the supported voltage, such as 1.8V, 3.3V, 5V, etc. However, the bandwidth of the high-voltage switching device 121 is relatively small.
[0071] Since the high voltage at the receiving end will break down the low-voltage switchgear 11 after passing through the transmission module 2, a high-voltage switchgear 121 is added between the low-voltage switchgear 11 and the transmission module 2. The high-voltage switchgear 121, as a protection tube of the vertical cascade structure, can generate a voltage drop and protect the low-voltage switchgear 11 from being broken down.
[0072] The low-voltage switchgear 11 serves as a data tube, and a current source 13 is connected to the low-voltage switchgear 11, enabling data to be transmitted in current mode.
[0073] In this embodiment, firstly, adding a high-voltage switchgear between the low-voltage switchgear and the transmission module can protect the low-voltage switchgear from breakdown. Secondly, using a low-voltage switchgear for the data tube can improve bandwidth. Thirdly, connecting a current source to the low-voltage switchgear enables data to be transmitted in current mode.
[0074] In one embodiment, such as Figure 6As shown, the low-voltage switchgear 11 includes a first transistor T1 and a second transistor T2, the high-voltage switchgear 121 includes a third transistor T3, a fourth transistor T4, a fifth transistor T5 and a sixth transistor T6, the transmission module 2 includes two transmission lines, and the pull-up circuit 51 includes a third pull-up resistor R1 and a fourth pull-up resistor R2.
[0075] In this configuration, the gates of the first transistor T1 and the second transistor T2 are connected to the target data. The sources of both the first transistor T1 and the second transistor T2 are connected to the positive terminal of the current source 13. The drain of the first transistor T1 is connected to the source of the fourth transistor T4. The drain of the second transistor T2 is connected to the source of the sixth transistor T6. The drain of the fourth transistor T4 is connected to the source of the third transistor T3. The drain of the sixth transistor T6 is connected to the source of the fifth transistor T5. The drain of the third transistor T3 is connected to the first terminal of the first transmission line 21. The drain of the fifth transistor T5 is connected to the first terminal of the second transmission line 22. The gates of the third transistor T3 and the fourth transistor T4 are connected to the internal bias voltage V. casc The second end of the first transmission line 21 is connected to the first end of the third pull-up resistor R1, and the second end of the second transmission line 22 is connected to the first end of the fourth pull-up resistor R2. The second ends of the third pull-up resistor R1 and the fourth pull-up resistor R2 are connected to high voltage or low voltage.
[0076] Specifically, the signal transmission loop includes: ① High voltage or low voltage - third pull-up resistor R1 - first transmission line 21 - third transistor T3 - fourth transistor T4 - first transistor T1 - current source 13 - ground; ② High voltage or low voltage - fourth pull-up resistor R2 - second transmission line 22 - fifth transistor T5 - sixth transistor T6 - second transistor T2 - current source 13 - ground. Internal bias voltage V casc When the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are turned on, and the first transistor T1 and the second transistor T2 are turned on, the signal transmission circuits ① and ② are turned on, thus completing the data transmission.
[0077] In this embodiment, four additional transistors are added between the first and second transistors in the low-voltage switching device and the first and second transmission lines. These four transistors generate a voltage drop, protecting the first and second transistors from breakdown. Furthermore, the sources of the first and second transistors in the low-voltage switching device are connected to a current source, enabling data to be transmitted in a current-mode manner.
[0078] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A data transceiver circuit for a serializer / deserializer, characterized in that, include: The module consists of a sending module, a transmitting module, and a receiving module, wherein: The transmitting module includes a low-voltage switching device and a protection device; the low-voltage switching device is a device used inside the chip, and the protection device is used to ensure that the target data reaches the channel of the transmitting module after passing through the low-voltage switching device. The receiving module operates at high or low voltage, and is used to receive the target data transmitted through the channel. The low-voltage switchgear consists of two devices, the protection device includes two AC coupling capacitors, the transmission module includes two transmission lines, and the receiving module includes a common-mode level holding circuit or a pull-up unit of the common-mode level holding circuit. Each AC coupling capacitor is located between the corresponding low-voltage switchgear and the transmission line, and is used to couple the target data to the common-mode level holding circuit.
2. The data transceiver circuit of the serializer / deserializer according to claim 1, characterized in that, Both of the low-voltage switching devices are supplied with low voltage, and the two AC coupling capacitors are used to couple the target data to the common-mode level holding circuit. Wherein, when the receiving module includes a common-mode level holding circuit, the data output terminal of the first low-voltage switching device is connected to the first terminal of the first AC coupling capacitor, and the second terminal of the first AC coupling capacitor is connected to the first terminal of the first transmission line; the data output terminal of the second low-voltage switching device is connected to the first terminal of the second AC coupling capacitor, and the second terminal of the second AC coupling capacitor is connected to the first terminal of the second transmission line; the second terminals of the first and second transmission lines are coupled to the common-mode level holding circuit.
3. The data transceiver circuit of the serializer / deserializer according to claim 2, characterized in that, Both of the aforementioned AC coupling capacitors are mounted on a printed circuit board.
4. The data transceiver circuit of the serializer / deserializer according to claim 2 or 3, characterized in that, The first low-voltage switchgear includes a first switch and a second switch; the second low-voltage switchgear includes a third switch and a fourth switch; and the common-mode level holding circuit includes a first pull-up resistor, a second pull-up resistor, a first pull-down resistor, and a second pull-down resistor. Wherein, the first terminal of the first switch is connected to low voltage, the second terminal of the first switch and the first terminal of the second switch are both connected to the data output terminal of the first low-voltage switchgear, and the second terminal of the second switch is grounded; the first terminal of the third switch is connected to low voltage, the second terminal of the third switch and the first terminal of the fourth switch are both connected to the data output terminal of the second low-voltage switchgear, and the second terminal of the fourth switch is grounded; the first terminals of the first pull-up resistor and the second pull-up resistor are both connected to high voltage or low voltage, the second terminals of the first pull-up resistor and the first terminal of the first pull-down resistor are both connected to the second terminal of the first transmission line, the second terminals of the second pull-up resistor and the first terminals of the second pull-down resistor are both connected to the second terminal of the second transmission line, and the second terminals of the first pull-down resistor and the second pull-down resistor are both grounded.
5. The data transceiver circuit of the serializer / deserializer according to claim 1, characterized in that, The protection device also includes a pull-down unit of the common-mode level holding circuit, the power supply voltage of the two low-voltage switching devices is low voltage, and the two AC coupling capacitors are used to couple the target data to the common-mode level holding circuit; Wherein, when the receiving module includes a pull-up unit of the common-mode level holding circuit, the data output terminal of the first low-voltage switching device is connected to the first terminal of the first AC coupling capacitor, the data output terminal of the second low-voltage switching device is connected to the first terminal of the second AC coupling capacitor, the second terminal of the first AC coupling capacitor and the first terminal of the first transmission line are both connected to the first terminal of the pull-down unit, the second terminal of the second AC coupling capacitor and the first terminal of the second transmission line are both connected to the second terminal of the pull-down unit, and the third terminal of the pull-down unit is grounded; the first terminal of the pull-up unit is connected to the second terminal of the first transmission line, the second terminal of the pull-up unit is connected to the second terminal of the second transmission line, and the third terminal of the pull-up unit is connected to high voltage or low voltage.
6. The data transceiver circuit of the serializer / deserializer according to claim 5, characterized in that, Both AC coupling capacitors and the pull-down unit are mounted on a printed circuit board.
7. The data transceiver circuit of the serializer / deserializer according to claim 5 or 6, characterized in that, The first low-voltage switchgear includes a first switch and a second switch; the second low-voltage switchgear includes a third switch and a fourth switch; the pull-up unit includes a first pull-up resistor and a second pull-up resistor; and the pull-down unit includes a first pull-down resistor and a second pull-down resistor. Wherein, the first terminal of the first switch is connected to low voltage, the second terminal of the first switch and the first terminal of the second switch are both connected to the data output terminal of the first low-voltage switchgear, and the second terminal of the second switch is grounded; the first terminal of the third switch is connected to low voltage, the second terminal of the third switch and the first terminal of the fourth switch are both connected to the data output terminal of the second low-voltage switchgear, and the second terminal of the fourth switch is grounded; the first terminal of the first pull-up resistor and the first terminal of the second pull-up resistor are both connected to high voltage or low voltage, the second terminal of the first pull-up resistor is connected to the second terminal of the first transmission line, the second terminal of the second pull-up resistor is connected to the second terminal of the second transmission line, the second terminal of the first AC coupling capacitor and the first terminal of the first transmission line are both connected to the first terminal of the first pull-down resistor, the second terminal of the second AC coupling capacitor and the first terminal of the second transmission line are both connected to the first terminal of the second pull-down resistor, and the second terminals of the first pull-down resistor and the second pull-down resistor are both grounded.
8. The data transceiver circuit of the serializer / deserializer according to claim 1, characterized in that, The transmitting module further includes a current source, the protection device includes a high-voltage switching device, the receiving module includes a pull-up circuit, and the high-voltage switching device is used to prevent the low-voltage switching device from being broken down by high voltage. Wherein, the first terminal of the low-voltage switchgear is connected to the positive terminal of the current source, the negative terminal of the current source is grounded, the second terminal of the low-voltage switchgear is connected to the first terminal of the high-voltage switchgear, the second terminal of the high-voltage switchgear is connected to the internal bias voltage, the third terminal of the high-voltage switchgear is connected to the first terminal of the transmission module, the second terminal of the transmission module is connected to the first terminal of the pull-up circuit, and the second terminal of the pull-up circuit is connected to either high voltage or low voltage.
9. The data transceiver circuit of the serializer / deserializer according to claim 8, characterized in that, The low-voltage switching device includes a first transistor and a second transistor, the high-voltage switching device includes a third transistor, a fourth transistor, a fifth transistor and a sixth transistor, the transmission module includes two transmission lines, and the pull-up circuit includes a third pull-up resistor and a fourth pull-up resistor. In this configuration, the gates of the first and second transistors are connected to the target data; the sources of both the first and second transistors are connected to the positive terminal of the current source; the drain of the first transistor is connected to the source of the fourth transistor; the drain of the second transistor is connected to the source of the sixth transistor; the drain of the fourth transistor is connected to the source of the third transistor; the drain of the sixth transistor is connected to the source of the fifth transistor; the drain of the third transistor is connected to the first end of the first transmission line; the drain of the fifth transistor is connected to the first end of the second transmission line; the gates of the third and fourth transistors are connected to the internal bias voltage; the second end of the first transmission line is connected to the first end of the third pull-up resistor; the second end of the second transmission line is connected to the first end of the fourth pull-up resistor; and the second ends of the third and fourth pull-up resistors are connected to either a high voltage or a low voltage.
10. The data transceiver circuit of the serializer / deserializer according to claim 4, characterized in that, The values of the two AC coupling capacitors range from 75 to 200 nF.
Citation Information
Patent Citations
5v tolerant circuit for CML transceiver in ac-couple
US20120001671A1