Method and apparatus for implementing digital low-level harmonic suppression in high-frequency synchrotron systems

Abstract

This invention relates to a method and apparatus for implementing digital low-level harmonic suppression in a synchrotron high-frequency system, comprising the following steps: acquiring the amplitude and phase information of harmonic signals corresponding to each frequency point across the entire operating bandwidth of the synchrotron high-frequency system; generating excitation signals required to suppress a preset number of harmonics at each frequency point based on the amplitude and phase information of the harmonic signals corresponding to each frequency point; and synthesizing the generated excitation signals required to suppress the preset number of harmonics with the corresponding fundamental excitation signal to suppress the preset number of harmonics in the synchrotron high-frequency system. This invention can effectively suppress harmonic voltages within the cavity, improving the amplitude and phase control accuracy of the cavity voltage; it can be applied in particle accelerators, biological (medical), aerospace, and industrial fields.

Description

Technical Field

[0001] This invention relates to the field of low-level control technology for particle accelerators, and more specifically to a method and apparatus for implementing digital low-level harmonic suppression in a high-frequency synchrotron accelerator system. Background Technology

[0002] A particle accelerator is a device that artificially generates high-speed charged particles. It is an important tool for exploring the properties, internal structure, and interactions of atomic nuclei and particles, and has wide and important practical applications in science and technology, industrial and agricultural production, and healthcare. A storage ring accelerator is a ring-shaped accelerator device that uses a high-frequency electric field to accelerate particles (such as electrons or ions) in a defined ring orbit. The strength of the magnetic field in the accelerator increases with the energy of the accelerated particles, thus maintaining the particle cyclotron frequency synchronized with the high-frequency electric field. The high-frequency system is one of the important components of a synchrotron accelerator, serving as the energy source for the continuous acceleration of the beam. The stability of the amplitude and phase of the high-frequency electric field directly determines the stability of the beam energy and the quality of the beam. Deterioration in the harmonic performance of the high-frequency system can be directly reflected in the waveform distortion of the sampled signal of the cavity electric field, such as… Figure 1a and Figure 1b As shown, the effect on the accelerator is to cause beam instability. Effective suppression of this instability is needed to improve beam quality, but existing measures have not been very effective.

[0003] The synchronous loop high-frequency system operates in a swept-pulse mode, and its operating waveform is shown in the example below. Figure 2a and Figure 2b As shown, the amplitude and frequency of the cavity electric field change within one operating cycle: the frequency changes from several hundred kHz to MHz, a change of about 10 times; the amplitude changes from 0 to several kilovolts, or even tens of kilovolts. Harmonic classification in high-frequency systems: Harmonics are divided into those within and outside the operating bandwidth. For example, a typical synchronous loop high-frequency system operates in the range of 0.6–5.4 MHz, which is called the operating bandwidth. Frequencies above 5.4 MHz are called the operating bandwidth. The third harmonic of the fundamental frequency (0.6–1.8 MHz) falls within the operating bandwidth and is called in-band harmonics. Third harmonics above 1.8 MHz, which are higher than 5.4 MHz and fall outside the operating bandwidth, are called out-of-band harmonics. The harmonics in the cavity electric field of a broadband high-power high-frequency system are very abundant.

[0004] The suppression of harmonics in high-frequency systems is mainly achieved in two ways: one is to improve the harmonic suppression degree of the power source system, and the other is to suppress harmonics through the feedforward or feedback function of the digital low-level system.

[0005] However, there are problems with improving the harmonic suppression of power source systems:

[0006] 1) The main methods to improve the harmonic suppression of a power source system are to adjust the power amplifier module to Class A or Class A bias and increase the power margin. In this case, the third harmonic suppression of the power source system output power can be up to 20dB, but the cost will increase exponentially.

[0007] 2) Out-of-band harmonics can be suppressed by adding filters, but adding filters is not effective for in-band harmonics because filters suppress both in-band harmonics and the fundamental frequency within the band. For example... Figure 3a and Figure 3b As shown, this is an example of a power source system with a low-pass filter added to the output; however, the harmonic suppression at some frequencies still exceeds the limit. Figure 3b The harmonic suppression at 4.177MHz is only 18.01dB.

[0008] Current digital low-level systems do not have harmonic suppression capabilities because:

[0009] 1) Digital low-level systems generally use quadrature demodulation to detect and phase-detect radio frequency signals. Before obtaining the two low-frequency quadrature signals, this demodulation method passes through narrowband filters such as CIC and FIR, which have already filtered out the harmonic signals of the sampled voltage, and what is obtained is the amplitude and phase of the cavity voltage fundamental wave.

[0010] 2) The feedback control algorithm of the digital low-level system has a bandwidth below 1.5kHz, which can only suppress noise near the fundamental frequency. Taking a fundamental frequency of 0.3MHz as an example, if it is to be effective against its third harmonic of 0.9MHz, the bandwidth of the feedback control would need to reach more than 0.6MHz, which is impossible. Summary of the Invention

[0011] To address the aforementioned problems, the present invention aims to provide a method and apparatus for implementing digital low-level harmonic suppression in a synchrotron high-frequency system. This method and apparatus can effectively suppress harmonic voltages within the cavity and further improve the amplitude and phase control accuracy of the cavity voltage. It can be applied to particle accelerators, biological (medical), aerospace, and industrial fields.

[0012] To achieve the above objectives, the present invention adopts the following technical solution:

[0013] In a first aspect, the present invention provides a method for implementing digital low-level harmonic suppression in a high-frequency synchrotron system, comprising the following steps:

[0014] To obtain the amplitude and phase information of the harmonic signals corresponding to each frequency point under the entire operating bandwidth of the synchrotron high-frequency system;

[0015] Based on the amplitude and phase information of the harmonic signals corresponding to each frequency point, the excitation signal required to suppress the preset number of harmonics at each frequency point is generated.

[0016] The generated excitation signal required to suppress the preset harmonic order is combined with the corresponding fundamental excitation signal to suppress the preset harmonic order of the synchrotron high-frequency system.

[0017] Furthermore, the acquisition of the amplitude and phase information of the fundamental and harmonic signals corresponding to each frequency point within the entire operating bandwidth of the synchrotron high-frequency system includes the following steps:

[0018] Determine the range and frequency step value of the radio frequency excitation signal;

[0019] Based on the determined initial value of the radio frequency excitation signal and the frequency step value, the high-frequency system of the synchrotron is subjected to equal-interval frequency sweep.

[0020] Based on the cavity sampling signals of the synchrotron high-frequency system at each frequency point, phase detection and detection operations are performed to obtain the amplitude and phase information of the fundamental and harmonic signals corresponding to each frequency point under the entire operating bandwidth of the synchrotron high-frequency system.

[0021] Furthermore, the frequency range of the radio frequency excitation signal is 0.2 to 20 MHz, and the frequency step is 100 Hz.

[0022] Furthermore, when performing phase detection and detection operations based on the cavity sampling signals of the synchrotron high-frequency system at each point frequency, the following steps are included:

[0023] The cavity voltage signal of the synchrotron high-frequency system at any given point frequency is divided into multiple inputs and demodulated simultaneously by multiple detection and phase detection modules to obtain the amplitude and phase information of the fundamental and harmonic outputs of the synchrotron high-frequency system at that point frequency.

[0024] Repeat the previous step to calculate the amplitude and phase of the fundamental and harmonic signals output by the synchrotron high-frequency system at each point frequency, and based on the obtained amplitude and phase frequency response data, obtain the fundamental amplitude table, fundamental phase table, cavity harmonic amplitude table, and cavity harmonic phase table.

[0025] Furthermore, the step of simultaneously demodulating the cavity voltage signal of the synchrotron high-frequency system at any point frequency by dividing it into multiple input channels and multiple detection and phase detection modules includes:

[0026] First, at each frequency point, the cavity sampling signal is divided into multiple paths and sent to the multi-channel detector phase detection module;

[0027] Secondly, the frequency and phase control words of each digitally controlled oscillator are rewritten to obtain orthogonal sine and cosine signals;

[0028] Next, the sampled signal is multiplied by the sine and cosine signals output by the numerically controlled oscillator to obtain the IQ quadrature demodulation signal or fundamental signal of the preset harmonic component of interest.

[0029] Finally, after the IQ quadrature demodulated signal is processed by multiple levels of CIC and FIR filtering, the amplitude and phase information corresponding to the harmonic component are obtained by the CORDIC curl algorithm.

[0030] Furthermore, the step of generating the excitation signal required to suppress a preset number of harmonics at each frequency point based on the amplitude and phase information of the harmonic signal corresponding to each frequency point includes the following steps:

[0031] Calculate the excitation required to cancel harmonics, and obtain the excitation harmonic amplitude table and excitation harmonic phase table;

[0032] The amplitude and phase of the calculated excitation are corrected by using the sliding mode extremum search method, resulting in a table of corrected excitation harmonic amplitude and a table of corrected excitation harmonic phase.

[0033] Furthermore, the amplitude and phase of the calculated excitation are corrected using the sliding mode extremum search method to obtain a corrected excitation harmonic amplitude table and a corrected excitation harmonic phase table, including:

[0034] 2.2.1) The calculated excitation signal The sampled signal y(t) is fed into the high-frequency system of the synchrotron, and the control quantity s is obtained by subtracting the sampled signal y(t) from the reference signal g(t).

[0035] 2.2.2) Based on the positive and negative values ​​of the control parameter sgn(sin(πs / α)) in the sliding mode extremum search algorithm, the original phase is... To adjust by increasing or decreasing;

[0036] 2.2.3) Modified excitation signal Repeat steps 2.2.1) and 2.2.2) above by feeding the sample back into the synchrotron high-frequency system.

[0037] 2.2.4) Iterate repeatedly until the control quantity s meets the requirements, and use the excitation signal obtained at this time as the correction excitation signal.

[0038] Furthermore, the step of combining the generated excitation signal required to suppress the preset harmonic order with the corresponding fundamental excitation signal to suppress the preset harmonic order of the synchrotron high-frequency system includes the following steps:

[0039] Using the frequency of the fundamental excitation signal as the address, the table of corrected excitation harmonic amplitude and the table of corrected excitation harmonic phase are searched to obtain the preset order harmonic cancellation excitation signal;

[0040] The preset harmonic cancellation excitation signal is combined with the fundamental excitation signal, and the combined signal is used to excite the high-frequency system of the synchrotron.

[0041] Secondly, the present invention provides a digital low-level implementation device for harmonic suppression in a synchrotron high-frequency system, comprising:

[0042] Motherboard, daughterboard, and FMC connector for connecting the motherboard and daughterboard;

[0043] The motherboard obtains the amplitude and phase information of the harmonic signals corresponding to each frequency point under the entire operating bandwidth of the synchrotron high-frequency system through the daughterboard. At the same time, based on the amplitude and phase information of the harmonic signals corresponding to each frequency point, it generates the excitation signal required to suppress the preset number of harmonics at each frequency point. The generated excitation signal required to suppress the preset number of harmonics is combined with the corresponding fundamental excitation signal and output to the synchrotron high-frequency system through the daughterboard to suppress the preset number of harmonics.

[0044] Furthermore, the sub-board includes an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and a timing control module. The ADC is used to convert the cavity voltage sampling signal of the synchrotron high-frequency system into a digital signal and send it to the motherboard for processing. The DAC is used to convert the digital signal processed by the motherboard into an excitation signal and send it to the synchrotron high-frequency system. The timing control module is used to provide clock signals for the ADC and DAC.

[0045] The present invention has the following advantages due to the adoption of the above technical solutions:

[0046] 1. This invention obtains the frequency response of the harmonics output by the high-frequency system of the synchrotron through a digital low-level system, generates the excitation signal required to suppress the preset number of harmonics at each frequency point, and outputs it to the high-frequency system of the synchrotron through a sub-board, thereby realizing harmonic suppression over a wide frequency range.

[0047] 2. This invention employs a sliding mode extremum search method when generating the excitation signal required to suppress preset harmonics, and saves the obtained excitation signal to the DRR memory of the motherboard card. Harmonic suppression can be achieved by looking up a table. The operation is simple and quick, and it can effectively suppress harmonic voltage in the cavity and improve the amplitude and phase control accuracy of the cavity voltage.

[0048] This invention can be widely applied in fields such as particle accelerators, biology (medicine), aerospace, and industry. Attached Figure Description

[0049] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts. In the drawings:

[0050] Figure 1a and Figure 1b The waveform is distorted in the cavity sampling (distorted waveform in the left image, normal waveform in the right image);

[0051] Figure 2a and Figure 2b These are the amplitude and frequency curves of the cavity electric field within one working cycle of a synchronous loop high-frequency system;

[0052] Figure 3a and Figure 3b These are the time-domain and frequency-domain waveforms of the power source output with a low-pass filter applied.

[0053] Figure 4 This is a flowchart of a method for implementing digital low-level harmonic suppression in a synchrotron high-frequency system, provided in an embodiment of the present invention.

[0054] Figure 5 This is a flowchart of the low-level system harmonic analysis algorithm provided in an embodiment of the present invention;

[0055] Figure 6 This is a block diagram illustrating the principle of generating phase values ​​through extreme value search provided in an embodiment of the present invention;

[0056] Figure 7 This is the third harmonic cancellation excitation signal generation provided in the embodiments of the present invention;

[0057] Figure 8 This is a low-level hardware block diagram provided in an embodiment of the present invention;

[0058] Figure 9 This is an overall framework diagram of low-level system harmonic suppression provided in an embodiment of the present invention;

[0059] Figure 10 This is a comparison of harmonic suppression before and after the present invention embodiment. Detailed Implementation

[0060] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.

[0061] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0062] In some embodiments of the present invention, a digital low-level implementation method for harmonic suppression in a synchrotron high-frequency system is provided. This method utilizes a low-level system to obtain the amplitude and phase information of harmonic signals corresponding to each frequency point within the entire operating bandwidth of the synchrotron high-frequency system. Based on the amplitude and phase information of the harmonic signals corresponding to each frequency point, an excitation signal required to suppress a preset number of harmonics at each frequency point is generated. The generated excitation signal required to suppress the preset number of harmonics is then combined with the corresponding fundamental excitation signal to suppress the preset number of harmonics in the synchrotron high-frequency system. This invention can effectively suppress harmonic voltages within the cavity, further improving the amplitude and phase control accuracy of the cavity voltage. It can be applied in particle accelerators, biological (medical), aerospace, and industrial fields.

[0063] Correspondingly, some other embodiments of the present invention provide a digital low-level implementation system for harmonic suppression in a synchrotron high-frequency system.

[0064] Example 1

[0065] like Figure 4 As shown, this embodiment provides a method for implementing digital low-level harmonic suppression in a synchrotron high-frequency system, including the following steps:

[0066] 1) Utilize the low-level system to obtain the amplitude and phase information of the harmonic signals corresponding to each frequency point under the entire operating bandwidth of the synchrotron high-frequency system;

[0067] 2) Based on the amplitude and phase information of the harmonic signals corresponding to each frequency point, generate the excitation signal required to suppress the preset number of harmonics at each frequency point;

[0068] 3) The generated excitation signal required to suppress the preset harmonic order is combined with the corresponding fundamental excitation signal to suppress the preset harmonic order of the synchrotron high-frequency system.

[0069] Preferably, in step 1) above, obtaining the amplitude and phase information of the fundamental and harmonic signals corresponding to each frequency point under the entire operating bandwidth of the synchrotron high-frequency system using a low-level system includes the following steps:

[0070] 1.1) Determine the initial value of the RF excitation signal and the frequency step value;

[0071] 1.2) Based on the determined initial value of the RF excitation signal and the frequency step value, the high-frequency system of the synchrotron is subjected to equal-interval frequency sweep using a digital low-level system.

[0072] 1.3) Based on the cavity sampling signals of the synchrotron high-frequency system at each point frequency, phase detection and detection operations are performed to obtain the amplitude and phase information of the fundamental and harmonic signals corresponding to each point frequency under the entire operating bandwidth of the synchrotron high-frequency system.

[0073] Preferably, in step 1.1) above, a radio frequency excitation signal with a frequency range of 0.2 to 20 MHz and a frequency step of 100 Hz is used from the output of a digital low-level system.

[0074] Preferably, in step 1.3) above, when performing phase detection and detection operations based on the cavity sampling signals of the synchrotron high-frequency system at each point frequency, the following steps are included:

[0075] 1.3.1) The cavity voltage signal of the synchrotron high-frequency system at any given point frequency is divided into multiple inputs and demodulated simultaneously by multiple detection and phase detection modules to obtain the amplitude and phase information of the fundamental and harmonic outputs of the synchrotron high-frequency system at that point frequency.

[0076] 1.3.2) Repeat step 1.3.1) to calculate the amplitude and phase of the fundamental and harmonic signals output by the synchrotron high-frequency system at each point frequency, and store the obtained amplitude and phase frequency response data in the DDR memory of the digital low-level system to obtain the fundamental amplitude table, fundamental phase table, cavity harmonic amplitude table and cavity harmonic phase table.

[0077] Specifically, when a high-frequency system is excited by a fundamental frequency signal, second, third, fourth, and fifth harmonics will be generated due to the inherent characteristics of the high-frequency system. To suppress these harmonics, it is necessary to measure the amplitude and phase information of the harmonic signals. The digital low-level system of this invention has detection and phase discrimination functions for multiple harmonic signals. Taking the suppression of the third harmonic as an example, when the fundamental frequency is 1MHz, the cavity will generate a 3MHz third harmonic electric field. The low-level system can automatically calculate the amplitude and phase information of the third harmonic electric field. When the digital low-level system performs frequency sweep at equal intervals, it can automatically measure the phase and amplitude information of the harmonic signals across the entire operating bandwidth and store it in the DDR memory of the board.

[0078] Preferably, such as Figure 5 As shown, in step 1.3.1) above, when the multi-channel detection phase detection module performs phase detection and detection operations on the cavity voltage sampling signal, it includes:

[0079] First, at each frequency point, the cavity sampling signal is divided into multiple paths and sent to the multi-channel detector phase detection module;

[0080] Secondly, the frequency and phase control words of each digitally controlled oscillator (NCO) are rewritten to obtain orthogonal sine and cosine signals;

[0081] Next, the sampled signal is multiplied by the sine and cosine signals output by the numerically controlled oscillator to obtain the IQ quadrature demodulation signal or fundamental signal of the preset harmonic component of interest.

[0082] Finally, after multi-stage CIC and FIR processing, the amplitude and phase information corresponding to the harmonic component are obtained through the CORDIC curl algorithm of the IQ quadrature demodulated signal. The multi-stage CIC and FIR filters are used to filter out interference from other high-frequency components in the IQ quadrature demodulated signal.

[0083] Preferably, in step 2) above, generating the excitation signal required to suppress a preset number of harmonics at each frequency point, based on the amplitude and phase information of the harmonic signal corresponding to each frequency point, includes the following steps:

[0084] 2.1) Calculate the excitation required to cancel harmonics and obtain the excitation harmonic amplitude table and excitation harmonic phase table.

[0085] Specifically, to cancel a harmonic electric field, an electric field with the same amplitude but opposite phase to the harmonic electric field needs to be generated on the cavity of the synchrotron high-frequency system. Therefore, based on the frequency response characteristics of the fundamental output signal of the high-frequency system and the amplitude and phase information of the third harmonic obtained in step 1), the amplitude and phase of the excitation required for the low-level system can be calculated.

[0086] 2.2) The amplitude and phase of the calculated excitation are corrected by using the sliding mode extremum search method to obtain the corrected excitation harmonic amplitude table and the corrected excitation harmonic phase table.

[0087] Specifically, due to the nonlinear characteristics of high-frequency systems, the excitation calculated in step 2.1) may not achieve the optimal suppression effect. Therefore, this invention designs an automatic control method based on sliding mode extremum search, such as... Figure 6 As shown, the excitation signal amplitude and phase information for canceling the third harmonic within the frequency range are automatically iterated and optimized, and the optimal result is stored in the calibration excitation third harmonic phase amplitude table.

[0088] like Figure 6As shown, assume H(ω) is the frequency domain response function of the synchrotron high-frequency system, representing the influence of high-frequency system nonlinearity on the excitation; y(t) is the sampled signal, g(t) is the reference signal of the sliding mode extremum search algorithm, and sgn(sin(πs / α)) is the control parameter of the sliding mode extremum search algorithm, where sgn(x) is the sign function, which is 1 when x is greater than 0 and -1 when x is less than 0, s is the difference between the sampled signal and the reference signal, and α is the control parameter, the value of which must ensure that the value of the sign function is changed before the system moves out of the controllable range. To correct the excitation signal, To correct the phase value of the excitation signal, the specific process of sliding mode extremum search is as follows:

[0089] 2.2.1) The excitation signal calculated in step 2.1) The sampled signal y(t) is fed into the high-frequency system of the synchrotron, and the control quantity s is obtained by subtracting the sampled signal y(t) from the reference signal g(t).

[0090] 2.2.2) Adjust the original phase according to the sign of sgn(sin(πs / α)). Make fine adjustments to increase or decrease the size;

[0091] 2.2.3) Modified excitation signal Repeat steps 2.2.1) and 2.2.2) above by sending the sample back into the high-frequency system.

[0092] 2.2.4) Iterate repeatedly until the control quantity s meets the requirements. At this time, the excitation signal is the corrected excitation signal after iterative optimization by the sliding mode extremum search algorithm.

[0093] Preferably, in step 3) above, such as Figure 7 As shown, the generated excitation signal required to suppress a preset order harmonic is combined with the corresponding fundamental excitation signal to suppress the preset order harmonic of the synchrotron high-frequency system, including the following steps:

[0094] 3.1) Using the frequency of the fundamental excitation signal as the address, search the calibration excitation harmonic amplitude table and the calibration excitation harmonic phase table to obtain the preset order harmonic cancellation excitation signal;

[0095] 3.2) The preset harmonic cancellation excitation signal is combined with the fundamental excitation signal, and the combined signal is used to excite the high-frequency system.

[0096] Example 2

[0097] like Figure 8As shown, this embodiment provides a digital low-level implementation device for harmonic suppression in a synchrotron high-frequency system. This low-level system has advantages such as high data throughput, fast calculation speed, and flexible design. It consists of two parts: a motherboard and a daughterboard. The motherboard, as the main control unit, is connected to the daughterboard via an FMC connector and is mainly responsible for signal IQ demodulation, correction calculation, data storage, algorithm control, and excitation generation. The motherboard obtains the amplitude and phase information of the harmonic signals corresponding to each frequency point within the entire operating bandwidth of the synchrotron high-frequency system through the daughterboard. Based on the amplitude and phase information of the harmonic signals corresponding to each frequency point, it generates the excitation signal required to suppress a preset number of harmonics at each frequency point. The generated excitation signal required to suppress the preset number of harmonics is then combined with the corresponding fundamental excitation signal and output to the synchrotron high-frequency system through the daughterboard to suppress the preset number of harmonics.

[0098] Preferably, the sub-board is connected to the synchrotron high-frequency system and includes an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and a timing control module. The ADC is used to convert the cavity voltage sampling signal of the synchrotron high-frequency system into a 14-bit digital signal and send it to the FPGA for processing. The DAC is used to convert the digital signal processed by the FPGA into an excitation signal and send it to the synchrotron high-frequency system. The timing control module is used to provide clock signals for the ADC and DAC.

[0099] Preferably, the main control chip is the Xilinx XC5VSX95T FPGA chip; the DDR memory is 4GB DDR2 memory; the flash memory is 128MHz flash storage; and the CPCI bus is a 64-bit CPCI bus with a 33MHz read frequency.

[0100] Preferably, the motherboard also includes a large number of expansion modules and interfaces, including a 64-bit 33MHz CPCI bus, which is responsible for communication between the board and the host computer; a 128MHz flash memory; 4GB of DDR2 memory for data reading and writing; and a configuration chip XCF32P for initializing and configuring the main control chip.

[0101] Preferably, the ADC module is a 2-channel 14-bit ADC module of TI's ADS62P49; the DAC module is a 2-channel 16-bit DAC module of Analog Devices' AD9122; and the timing control module is an AD9516 timing control module, which supports both on-board clock and external clock.

[0102] like Figure 9 As shown, a high-performance digital low-level system based on an FPGA is used to implement harmonic suppression in the high-frequency system of this invention. The entire low-level harmonic suppression is divided into two parts:

[0103] 1. A feedback control loop is used to control the fundamental amplitude and phase using the traditional PI control method.

[0104] 2. Suppress the harmonic components of the cavity electric field within the working bandwidth range, and the harmonic suppression method is as described in Example 1.

[0105] Example 3

[0106] This embodiment was experimentally verified using a nanocrystalline soft magnetic alloy loading cavity in an existing synchrotron high-frequency system. The experimental results are as follows: Figure 10 As shown in the figure, the solid line represents the sampling waveform of the high-frequency cavity when the low-level system uses the traditional PI control method. The high-frequency voltage waveform is distorted due to harmonic interference, which will affect the beam quality. The dashed line represents the sampling waveform of the high-frequency system after applying the harmonic suppression method of this invention to the low-level system. The comparison shows that the harmonic suppression method of this invention can effectively suppress harmonic interference within the operating bandwidth, solving the problem that traditional PI control cannot effectively suppress harmonics outside the fundamental frequency range.

[0107] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A method for implementing digital low-level harmonic suppression in a synchrotron high-frequency system, characterized in that, Includes the following steps: To obtain the amplitude and phase information of the harmonic signals corresponding to each frequency point under the entire operating bandwidth of the synchrotron high-frequency system; Based on the amplitude and phase information of the harmonic signals corresponding to each frequency point, the excitation signal required to suppress the preset number of harmonics at each frequency point is generated. The generated excitation signal required to suppress the preset harmonic order is combined with the corresponding fundamental excitation signal to suppress the preset harmonic order of the synchrotron high-frequency system.

2. The method for implementing digital low-level harmonic suppression in a synchrotron high-frequency system as described in claim 1, characterized in that, The acquisition of amplitude and phase information of the fundamental and harmonic signals at each frequency point across the entire operating bandwidth of the synchrotron high-frequency system includes the following steps: Determine the range and frequency step value of the radio frequency excitation signal; Based on the determined initial value of the radio frequency excitation signal and the frequency step value, the high-frequency system of the synchrotron is subjected to equal-interval frequency sweep. Based on the cavity sampling signals of the synchrotron high-frequency system at each frequency point, phase detection and detection operations are performed to obtain the amplitude and phase information of the fundamental and harmonic signals corresponding to each frequency point under the entire operating bandwidth of the synchrotron high-frequency system.

3. The method for implementing digital low-level harmonic suppression in a synchrotron high-frequency system as described in claim 2, characterized in that, The frequency range of the radio frequency excitation signal is 0.2 to 20 MHz, and the frequency step is 100 Hz.

4. The method for implementing digital low-level harmonic suppression in a synchrotron high-frequency system as described in claim 2, characterized in that, When performing phase detection and detection operations on the cavity sampling signals of the synchrotron high-frequency system at each point frequency, the following are included: The cavity voltage signal of the synchrotron high-frequency system at any given point frequency is divided into multiple inputs and demodulated simultaneously by multiple detection and phase detection modules to obtain the amplitude and phase information of the fundamental and harmonic outputs of the synchrotron high-frequency system at that point frequency. Repeat the previous step to calculate the amplitude and phase of the fundamental and harmonic signals output by the synchrotron high-frequency system at each point frequency, and based on the obtained amplitude and phase frequency response data, obtain the fundamental amplitude table, fundamental phase table, cavity harmonic amplitude table, and cavity harmonic phase table.

5. The method for implementing digital low-level harmonic suppression in a synchrotron high-frequency system as described in claim 4, characterized in that, The process of dividing the cavity voltage signal of the synchrotron high-frequency system at any given point frequency into multiple input channels and performing simultaneous demodulation by a multi-channel detection and phase-detection module includes: First, at each frequency point, the cavity sampling signal is divided into multiple paths and sent to the multi-channel detector phase detection module; Secondly, the frequency and phase control words of each digitally controlled oscillator are rewritten to obtain orthogonal sine and cosine signals; Next, the sampled signal is multiplied by the sine and cosine signals output by the numerically controlled oscillator to obtain the IQ quadrature demodulation signal or fundamental signal of the preset harmonic component of interest. Finally, after the IQ quadrature demodulated signal is processed by multiple levels of CIC and FIR filtering, the amplitude and phase information corresponding to the harmonic component are obtained by the CORDIC curl algorithm.

6. The method for implementing digital low-level harmonic suppression in a synchrotron high-frequency system as described in claim 1, characterized in that, The process of generating the excitation signal required to suppress a preset number of harmonics at each frequency point, based on the amplitude and phase information of the harmonic signal corresponding to each frequency point, includes the following steps: Calculate the excitation required to cancel harmonics, and obtain the excitation harmonic amplitude table and excitation harmonic phase table; The amplitude and phase of the calculated excitation are corrected by using the sliding mode extremum search method, resulting in a table of corrected excitation harmonic amplitude and a table of corrected excitation harmonic phase.

7. The method for implementing digital low-level harmonic suppression in a synchrotron high-frequency system as described in claim 6, characterized in that, The sliding mode extremum search method is used to correct the amplitude and phase of the calculated excitation, resulting in a corrected excitation harmonic amplitude table and a corrected excitation harmonic phase table, including: 2.2.1) The calculated excitation signal The sampled signal y(t) is fed into the high-frequency system of the synchrotron, and the control quantity s is obtained by subtracting the sampled signal y(t) from the reference signal g(t). 2.2.2) Based on the positive and negative values ​​of the control parameter sgn(sin(πs / α)) in the sliding mode extremum search algorithm, the original phase is... To adjust by increasing or decreasing; 2.2.3) Modified excitation signal Repeat steps 2.2.1) and 2.2.2) above by feeding the sample back into the synchrotron high-frequency system. 2.2.4) Iterate repeatedly until the control quantity s meets the requirements, and use the excitation signal obtained at this time as the correction excitation signal.

8. The method for implementing digital low-level harmonic suppression in a synchrotron high-frequency system as described in claim 6, characterized in that, The process of combining the generated excitation signal required to suppress preset harmonics with the corresponding fundamental excitation signal to suppress preset harmonics in the synchrotron high-frequency system includes the following steps: Using the frequency of the fundamental excitation signal as the address, the table of corrected excitation harmonic amplitude and the table of corrected excitation harmonic phase are searched to obtain the preset order harmonic cancellation excitation signal; The preset harmonic cancellation excitation signal is combined with the fundamental excitation signal, and the combined signal is used to excite the high-frequency system of the synchrotron.

9. A digital low-level implementation device for harmonic suppression in a synchrotron high-frequency system, characterized in that, include: Motherboard, daughterboard, and FMC connector for connecting the motherboard and daughterboard; The motherboard obtains the amplitude and phase information of the harmonic signals corresponding to each frequency point under the entire operating bandwidth of the synchrotron high-frequency system through the daughterboard. At the same time, based on the amplitude and phase information of the harmonic signals corresponding to each frequency point, it generates the excitation signal required to suppress the preset number of harmonics at each frequency point. The generated excitation signal required to suppress the preset number of harmonics is combined with the corresponding fundamental excitation signal and output to the synchrotron high-frequency system through the daughterboard to suppress the preset number of harmonics.

10. The digital low-level implementation device for harmonic suppression in a synchrotron high-frequency system as described in claim 9, characterized in that, The sub-board includes an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and a timing control module. The ADC is used to convert the cavity voltage sampling signal of the synchrotron high-frequency system into a digital signal and send it to the motherboard for processing. The DAC is used to convert the digital signal processed by the motherboard into an excitation signal and send it to the synchrotron high-frequency system. The timing control module is used to provide clock signals for the ADC and DAC.

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