Compact thin film surface mountable coupler

Abstract

A surface mountable thin film coupler can include a monolithic base substrate and a plurality of ports formed on the monolithic base substrate. The surface mountable thin film coupler can include at least one thin film component connected with at least one of the plurality of ports. The surface mountable thin film coupler can provide a coupling coefficient greater than -5 dB and less than -1 dB over a coupling frequency range having a lower limit greater than 1 GHz and an upper limit at least 200 MHz greater than the lower limit. The coupler can have a footprint less than about 3 mm 2 .

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 117,615, filed on November 24, 2020, which is incorporated herein by reference in its entirety. Background Technology

[0003] Couplers typically couple a source line to a coupled line without direct electrical contact, replicating the electrical signal from the signal line onto the coupled line. The trend towards miniaturization has increased the demand for small, passive couplers. However, miniaturization has also increased the difficulty of surface-mounting such small couplers. Therefore, compact, surface-mountable thin-film couplers are highly desirable in this field. Summary of the Invention

[0004] According to one embodiment of the present invention, a surface-mountable thin-film coupler may include a monolithic substrate and a plurality of ports formed on the monolithic substrate. The surface-mountable thin-film coupler may include at least one thin-film component connected to at least one of the plurality of ports. The surface-mountable thin-film coupler can provide a coupling coefficient greater than -5 dB over a coupling frequency range having a lower limit greater than 1 GHz and an upper limit greater than the lower limit of at least 200 MHz. The occupies an area of ​​less than approximately 3 mm². 2 .

[0005] According to another embodiment of the present invention, a surface-mountable thin-film coupler may include a monolithic substrate and a plurality of ports formed on the monolithic substrate. The plurality of ports may include an isolation port, a coupling port, an input port, and an output port. A first thin-film inductor may be connected between the input port and the output port. A second thin-film inductor may be connected between the coupling port and the isolation port and is inductively coupled to the first thin-film inductor. The occupies an area of ​​less than approximately 3 mm². 2 .

[0006] According to another embodiment of the present invention, a method for forming a surface-mountable thin-film coupler may include providing a monolithic substrate and forming a plurality of ports on the monolithic substrate. The plurality of ports may include an isolation port, a coupling port, an input port, and an output port. The method may include forming a first thin-film inductor connected between the input port and the output port. The method may include forming a second thin-film inductor connected between the coupling port and the isolation port and inductively coupled to the first thin-film inductor. The occupies an area of ​​less than about 3 mm². 2 . Attached Figure Description

[0007] For those skilled in the art, the complete and feasible disclosure of the present invention (including its best mode) is set forth in the specification with reference to the accompanying drawings, in which: Figure 1 A schematic diagram of a compact, thin-film, surface-mountable coupler according to aspects of this disclosure is shown; Figure 2 A top view of an embodiment of the coupler according to aspects of this disclosure is shown; Figure 3 yes Figure 2 Side view of the coupler in the middle; Figure 4A An example of a first patterned conductive layer according to an aspect of this disclosure is shown, which can be formed on a monolithic substrate of a compact thin-film surface-mountable coupler; Figure 4B An example of a second patterned conductive layer according to an aspect of this disclosure is shown, the second patterned conductive layer being formed on... Figure 4A On the first patterned conductive layer; Figure 4C An example of a third patterned conductive layer according to this disclosure is shown, which can be formed on... Figure 4B On the second patterned conductive layer; Figure 5 This is a flowchart of a method for forming a surface-mountable coupler according to aspects of this disclosure; Figure 6 This is a graph of the theoretically calculated S-parameters of a 3 dB coupler over a frequency range extending from 2 GHz to 3 GHz, which is used as... Figures 1 to 4C It is configured using a coupler; Figure 7 This is a graph of the theoretically calculated S-parameters of a 3 dB coupler over a frequency range extending from 3 GHz to 4.5 GHz, which is used as... Figures 1 to 4C The coupler is configured accordingly; and Figure 8 A power supply including a coupler is shown according to aspects of this disclosure.

[0008] The repeated use of reference numerals in this specification and drawings is intended to indicate the same or similar features or elements of the invention. Detailed Implementation

[0009] A surface-mount thin-film coupler is provided that provides uniform coupling for high frequencies in a compact, surface-mountable package. The coupler typically regenerates a coupled signal at the coupling port in response to an input signal being applied to its input port. In some embodiments, the coupler can be configured as a 3 dB splitter / combiner. The 3 dB splitter / combiner can separate the input signal approximately evenly between the coupling port and the output port. The input signal can be reproduced in each of the coupling and output lines at half the amplitude of the input signal. Similarly, the 3 dB splitter / combiner can combine a first signal applied to the input port and a second signal applied to the coupling port to generate a combined signal at the output port. Such a 3 dB splitter / combiner has various applications, including, for example, those described in the following references. Figure 8 The power source described.

[0010] Typically, currently disclosed thin-film couplers offer excellent performance characteristics in very compact surface-mount packages. In this respect, thin-film couplers may require minimal space (e.g., a small footprint) when mounted to a surface (e.g., a printed circuit board). This compact size can be particularly useful as devices employing surface-mount technology (e.g., power supplies) become smaller.

[0011] For example, couplers can have a small footprint and therefore require less space for mounting on a printed circuit board. The footprint of a coupler can be less than approximately 3 mm². 2 In some implementations, it can be less than about 2.5 mm. 2 In some implementations, it can be less than about 2.0 mm. 2 In some implementations, it can be less than about 1.5 mm. 2 In some implementations, it can be less than about 1.0 mm. 2 In some implementations, it can be less than about 0.8 mm. 2 And in some embodiments, it can be less than about 0.6 mm. 2 .

[0012] The length of the coupler can be less than about 2.0 mm, in some embodiments less than about 1.8 mm, in some embodiments less than about 1.5 mm, and in some embodiments less than about 1.1 mm. The width of the coupler can be less than about 1.2 mm, in some embodiments less than about 1 mm, in some embodiments less than about 0.8 mm, in some embodiments less than about 0.7 mm, and in some embodiments less than about 0.6 mm. In some embodiments, the EIA housing size of the thin-film coupler can be 1206, 805, 0504, 0402, 0303, 0202, or smaller.

[0013] Couplers typically include a monolithic base substrate. At least one port (e.g., an input port, an output port, a coupling port, and / or an isolation port) may be exposed along the exterior of the coupler for surface mounting, such as using a grid array type mounting (e.g., land grid array (LGA) type mounting, ball grid array (BGA) type, etc.). The coupler may include a monolithic base substrate and multiple ports formed on the monolithic base substrate. At least one thin-film component may be connected to at least one of the multiple ports. Surface-mountable thin-film couplers can provide a coupling coefficient greater than -5 dB over a coupling frequency range having a lower limit greater than 1 GHz and an upper limit greater than the lower limit by at least 200 MHz. For example, the lower limit of the coupling frequency range may be in the range from about 1 GHz to about 8 GHz, in some embodiments from about 1.5 GHz to about 6 GHz, and in some embodiments from about 2 GHz to about 4 GHz. The upper limit can be 200 MHz or more greater than the lower limit, in some embodiments it can be 300 MHz or more greater than the lower limit, in some embodiments it can be 500 MHz or more greater than the lower limit, in some embodiments it can be 800 MHz or more greater than the lower limit, in some embodiments it can be 1 GHz or more greater than the lower limit, and in some embodiments it can be 2 GHz or more greater than the lower limit.

[0014] In some embodiments, the coupler may exhibit a coupling coefficient greater than -5 dB and less than -1 dB over the coupling frequency range. For example, as indicated above, in some embodiments, the coupler may be a 3 dB coupler. In such embodiments, the coupler may exhibit a coupling coefficient of approximately -3 dB. For example, the coupler may exhibit a coupling coefficient between -2 dB and -4 dB, and in some embodiments, it may exhibit a coupling coefficient between -2.5 dB and -3.5 dB. As another example, the coupling frequency range may extend from approximately 2 GHz to approximately 3 GHz, in some embodiments from approximately 2 GHz to approximately 4 GHz, and in some embodiments from approximately 3 GHz to approximately 4.5 GHz.

[0015] The coupler can provide consistent coupling across the coupling frequency range. For example, the coupler can exhibit a coupling coefficient variation of less than 5 dB across the coupling frequency range, in some embodiments less than 4.5 dB, in some embodiments less than 4 dB, in some embodiments less than 3.5 dB, and in some embodiments less than 3 dB. The variation in coupling coefficient can be less than 5 dB per GHz, in some embodiments less than 3 dB per GHz, in some embodiments less than 2 dB per GHz, in some embodiments less than 1.5 dB per GHz, and in some embodiments less than 1.2 dB per GHz.

[0016] The coupler can exhibit an isolation factor of less than about -10 dB over the coupling frequency range, in some embodiments less than about -12 dB, in some embodiments less than about -14 dB, in some embodiments less than about -16 dB, and in some embodiments less than about -17 dB. A low isolation factor over the coupling frequency range indicates excellent directivity. In contrast, a high isolation factor (e.g., greater than -10 dB) will indicate a lossy coupler.

[0017] A coupler may include one or more thin-film components configured to generate a coupling signal in a coupling port (e.g., relative to an isolation port) in response to an input signal received from an input port. For example, the coupler may include a first thin-film inductor connected between the input port and an output port. The coupler may also include a second thin-film inductor connected between the coupling port and the isolation port and inductively coupled to the first thin-film inductor.

[0018] In some embodiments, the coupler may include one or more film capacitors. For example, a first film capacitor may be connected between the input port and the coupling port. A second film capacitor may be connected between the isolation port and the output port.

[0019] The coupler may include a monolithic substrate. Multiple layers may be formed on the monolithic substrate. These multiple layers may include dielectric materials and / or protective materials. The coupler may include multiple patterned conductive layers, each patterned conductive layer including thin film components formed on and / or between the layers. In some embodiments, a capping layer may be formed on these layers. The capping layer may include various suitable materials, such as silicon oxynitride. In some embodiments, a first protective layer may be formed on the capping layer. The first protective layer may include various suitable materials, such as polyimide.

[0020] The port may extend through these layers (and a first protective layer, if present) and may be electrically connected to a first patterned conductive layer (e.g., adjacent to a monolithic substrate), a second patterned conductive layer, and / or a third patterned conductive layer. The port may protrude beyond the outer surface of the cover layer, allowing the coupler to be mounted and electrically connected (e.g., mounted and electrically connected to a printed circuit) via the port (e.g., as a "flip chip"). The port may be formed by depositing a conductive material (e.g., copper) after selective etching (e.g., using electroplating). The port may include one or more layers on the conductive material, such as a plating of tin, nickel, or mixtures thereof.

[0021] As used herein, "formed on" the second layer can refer to a first layer positioned above the second layer relative to the thickness direction of the coupler. The first layer may be in direct contact with the second layer. However, an intermediate layer may also be formed between the first and second layers, such that the first and second layers are not in direct contact with each other.

[0022] For example, as described below, the capping layer may include a suitable ceramic dielectric material. The capping layer may have a thickness ranging from about 100 micrometers to about 600 micrometers, in some embodiments it may have a thickness ranging from about 125 micrometers to about 500 micrometers, in some embodiments it may have a thickness ranging from about 150 micrometers to about 400 micrometers, and in some embodiments it may have a thickness ranging from about 175 micrometers to about 300 micrometers.

[0023] The substrate, dielectric layer, and / or capping layer may comprise one or more suitable ceramic materials. Suitable materials are typically electrically insulating and thermally conductive. Example dielectric materials include hafnium dioxide (HFO2), alumina (Al2O3), tantalum pentoxide (Ta2O5), silicon oxynitride, silicon nitride, silicon oxide, and organic materials (e.g., silk). In alternative embodiments, one or more of the following dielectric materials may be used: barium titanate, strontium titanate, barium strontium titanate, bismuth strontium tantalate, oxides or nitrides of niobium or such materials, NPO (COG), X7R, X7S, Z5U, Y5V formulations, and lead-based materials (e.g., doped or undoped PZT dielectrics), etc.

[0024] The substrate and / or capping layer may comprise glass, ceramics, organic materials, or mixtures thereof. Additional example materials for the substrate and / or capping layer include alumina, aluminum nitride, beryllium oxide, aluminum oxide, boron nitride, silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, zirconium dioxide, mixtures thereof, oxides and / or nitrides of such materials, or any other suitable ceramic material. Other ceramic materials include calcium titanate (CaTiO3), zinc oxide (ZnO), ceramics containing low-temperature glass, and other glass bonding materials.

[0025] In some embodiments, one or more of the substrate, dielectric layer, and / or capping layer may comprise sapphire or ruby. Sapphire and ruby ​​are types of corundum, a crystalline form of aluminum oxide (a ceramic material) containing additional trace material. Substrates comprising sapphire can provide several benefits, including excellent electrical insulation, heat dissipation, and high-temperature stability. Furthermore, because sapphire is typically transparent, the internal features of the coupler can be visually inspected, reducing the time and difficulty associated with inspecting the quality of completed components.

[0026] The substrate, dielectric layer, and / or capping layer may comprise a material having a dielectric constant of less than about 30, as determined according to ASTM D2149-13 at an operating temperature of 25°C and a frequency of 1 kHz; in some embodiments, a dielectric constant of less than about 25; in some embodiments, a dielectric constant of less than about 20; and in some embodiments, a dielectric constant of less than about 15. However, in other embodiments, materials with a dielectric constant greater than 30 may be used to achieve higher frequencies and / or smaller components. For example, in such embodiments, the dielectric constant, as determined according to ASTM D2149-13 at an operating temperature of 25°C and a frequency of 1 kHz, may range from about 30 to about 120 or greater; in some embodiments, it may range from about 50 to about 100; and in some embodiments, it may range from about 70 to about 90.

[0027] Thin-film components can be formed from a variety of suitable materials. Thin-film inductors and / or capacitors may include a conductive layer. The conductive layer may include a variety of suitable conductive materials. Example conductive materials include copper, nickel, gold, tin, lead, palladium, silver, and alloys thereof. However, any conductive metallic or non-metallic material suitable for thin-film fabrication may be used. In some embodiments, the coupler may include a thin-film resistor. The thin-film resistor may include a resistive layer, which may be formed from a variety of suitable resistive materials. For example, the resistive layer may include tantalum nitride (TaN), nickel chromium (NiCr), tantalum aluminide, silicon chromium, titanium nitride, titanium tungsten, tantalum tungsten, oxides and / or nitrides of such materials, and / or any other suitable thin-film resistive material.

[0028] The thickness of one or more thin film components can be about 50 micrometers or less, in some embodiments about 20 micrometers or less, in some embodiments about 10 micrometers or less, and in some embodiments about 5 micrometers or less. For example, in some embodiments, the thickness of the thin film component can range from about 0.05 micrometers to about 50 micrometers, in some embodiments from about 0.1 micrometers to about 20 micrometers, in some embodiments from about 0.3 micrometers to about 10 micrometers, and in some embodiments from about 1 micrometer to about 5 micrometers.

[0029] Various suitable subtractive, semi-additive, or full additive manufacturing processes can be used to precisely form thin-film components. For example, physical vapor deposition and / or chemical deposition can be used. For instance, in some embodiments, sputtering (a type of physical vapor deposition) can be used to form the thin-film component. However, various other suitable processes can be used, including plasma-enhanced chemical vapor deposition (PECVD), electroless plating, and electroplating. Photolithography masks and etching can be used to produce the desired shape of the thin-film component. Various suitable etching techniques can be used, including dry etching and / or wet etching using plasmas of reactive or non-reactive gases (e.g., argon, nitrogen, oxygen, chlorine, boron trichloride).

[0030] In some embodiments, the coupler may include at least one adhesive layer that contacts one or more thin-film components. The adhesive layer may be or include various materials suitable for improving adhesion between the thin-film component and adjacent layers (e.g., a substrate, dielectric layer, and / or capping layer). As an example, the adhesive layer may include at least one of tantalum (Ta), chromium (Cr), tantalum nitride (TaN), titanium tungsten (TiW), titanium (Ti), or titanium nitride (TiN). For example, the adhesive layer may be or include tantalum (Ta) (e.g., tantalum, or an oxide or nitride of tantalum) and may be formed between the microstrip and the substrate to improve adhesion between them. Without being theoretically constrained, the material of the adhesive layer may be selected to overcome phenomena such as lattice mismatch and residual stress.

[0031] One or more adhesive layers may have a variety of suitable thicknesses. For example, in some embodiments, the thickness of the one or more adhesive layers may range from about 100 angstroms to about 1,000 angstroms, in some embodiments from about 200 angstroms to about 800 angstroms, and in some embodiments from about 400 angstroms to about 600 angstroms.

[0032] As indicated above, the coupler can be configured to surface mount to a mounting surface (e.g., a printed circuit board, PCB) using ports exposed along the bottom surface of the coupler for surface mounting components. For example, the coupler can be configured for grid array type surface mounting, such as contact grid array (LGA) type mounting, ball grid array (BGA) type mounting, or any other suitable type of grid array type surface mounting. In this respect, one or more ports may not extend along the side surface of the substrate, as is the case with a surface mount device (SMD). In this respect, in some embodiments, the side surfaces of the substrate and / or the coupler may not contain conductive material.

[0033] In some embodiments, the coupler may include a first protective layer and / or a second protective layer, the first protective layer being exposed along the bottom surface of the coupler and the second protective layer being exposed along the top surface of the coupler. For example, the first protective layer may be formed over a cover layer. In some embodiments, the second protective layer may be formed over a second surface of a monolithic substrate. The first and / or second protective layers may include layers of materials such as polymeric materials (e.g., polyimide), silicon oxynitride (SiNO), Al2O3, silicon dioxide (SiO2), silicon nitride (Si3N4), benzocyclobutene, or glass. The thickness of the first and / or second protective layers may range from about 1 micrometer to about 300 micrometers, in some embodiments from about 5 micrometers to about 200 micrometers, and in some embodiments from about 10 micrometers to about 100 micrometers.

[0034] I. Example Implementation Figure 1 A schematic diagram of a coupler 100 according to aspects of this disclosure is shown. Coupler 100 may include an input port 102, an output port 104, a coupling port 106, and an isolation port 108. A first inductor 110 may be inductively coupled to a second inductor 112. The first inductor 110 may be connected between the input port 102 and the output port 104. The second thin-film inductor 112 may be connected between the coupling port 106 and the isolation port 108.

[0035] In some embodiments, a first film capacitor 114 may be connected between the input port 102 and the coupling port 106. A second film capacitor 116 may be connected between the isolation port 108 and the output port 104.

[0036] However, alternative configurations can be used within the scope of this disclosure. For example, one or more capacitors 114, 116 can be omitted. Additional capacitors, inductors, and / or resistors can be used to provide the desired performance characteristics. Those skilled in the art will understand that various configurations are possible within the scope of this disclosure.

[0037] Figure 2 A top view of an embodiment of coupler 200 according to this disclosure is shown. Coupler 200 may include a plurality of ports, such as an input port 202, an output port 204, a coupling port 206, and / or an isolation port 208. A first thin-film inductor 210 may be inductively coupled to a second thin-film inductor 212. The first inductor 210 may be connected between the input port 202 and the output port 204. For example, the first thin-film inductor 210 may include patterned wires that are separated from the patterned wires of the second thin-film inductor 212 in the thickness direction of the coupler 200, as shown in the following reference. Figures 4A to 4C The second thin-film inductor 212 may be connected between the coupling port 206 and the isolation port 208, for example, through one or more through-holes 209. The second thin-film inductor 212 may include patterned wires in the thickness direction of the coupler 200 (e.g., via...). Figure 3 The second layer (244) shown is separated from the patterned wires of the first thin-film inductor 210.

[0038] In some embodiments, a first film capacitor 214 may be connected between an input port 202 and a coupling port 206. The first film capacitor 214 may be formed of a first portion 214a and a second portion 214b. The first portion 214a may be formed of a first patterned conductor on a layer of the coupler 200, and the second portion 214b may be formed of a second patterned conductor on another layer, separated from the layer having the first portion 214a, in the thickness direction of the coupler 200. A second film capacitor 216 may be connected between an isolation port 208 and an output port 204. The second film capacitor 216 may be formed of a first portion 216a and a second portion 216b. The first portion 216a may be formed of a first patterned conductor on a layer of the coupler 200, and the second portion 216b may be formed of a second patterned conductor on another layer, separated from the layer having the first portion 216a, in the thickness direction of the coupler 200.

[0039] Coupler 200 may have a length 218 in the longitudinal direction 220 and a width 222 in the transverse direction 224. As indicated above, coupler 200 may have a small footprint (e.g., less than about 3 mm). 2The occupied area can be defined as the area of ​​coupler 200 (which is equal to the length 218 of the coupler multiplied by the width 222 of the coupler), thus requiring less space to be installed on the printed circuit board.

[0040] It will be understood that the differences in shading between different components—such as the dotted shading of the first portion 214a of the first thin-film capacitor 214 and the first portion 216a of the second thin-film capacitor 216, the grid shading of the first thin-film inductor 210 and the section line shading of the second thin-film inductor 212—are for viewing the drawings only, for example, to distinguish them. Figure 2 Different components within. Furthermore... Figure 2 The diagram illustrates the positions or arrangements of various elements of coupler 200 in at least some embodiments of coupler 200—e.g., ports 202, 204, 206, and 208, first inductor 210, second inductor 212, first capacitor 214, second capacitor 212, etc.—relative to each other, and Figure 2 It is not necessary to represent the relative positions of various patterned wires, such as in the thickness direction.

[0041] refer to Figure 3 The coupler 200 may include a monolithic substrate 240. A first layer 242 may be formed on the monolithic substrate 240 relative to the thickness direction 243 of the coupler 200. A second layer 244 may be formed on the first layer 242. A capping layer 246 may be formed on the second layer 244. A first patterned conductive layer 248 may be formed on the monolithic substrate 240. A second patterned conductive layer 250 may be formed on the first layer 242. A third patterned conductive layer 252 may be formed on the second layer 244. One or more protective layers may be formed on one or more of the patterned conductive layers 248, 250, and 242, and / or on the first layer 242, the second layer 244, and / or the third layer 246. For example, a protective layer may be formed between the second patterned conductive layer 248 and the first layer 242. The one or more protective layers may include a polymeric material, such as polyimide.

[0042] One or more vias 209 may be formed through one or more of layers 242 and 244. The capping layer 246 may comprise a variety of suitable materials, such as silicon oxynitride. In some embodiments, a first protective layer may be formed on the capping layer 246. The first protective layer may comprise a variety of suitable materials, such as polyimide.

[0043] refer to Figure 3Ports 202, 204, 206, and 208 may extend through layers 242, 244, and 246 (and the first protective layer, if present) and may be electrically connected to the first patterned conductive layer 248, the second patterned conductive layer 250, and / or the third patterned conductive layer 252, for example, as per [reference to...]. Figures 4A to 4C As described and shown.

[0044] Ports 202, 204, 206, and 208 may protrude beyond the outer surface 254 of the cover layer 246, allowing coupler 200 to be mounted and electrically connected (e.g., mounted and electrically connected to a printed circuit) via ports 202, 204, 206, and 208. Ports 202, 204, 206, and 208 may be formed by selectively etching followed by deposition of a conductive material (e.g., copper) using electroplating. Ports 202, 204, 206, and 208 may comprise one or more layers of conductive material, such as plating of tin, nickel, or mixtures thereof.

[0045] Figures 4A to 4C An example conductive pattern according to aspects of this disclosure is shown. Figure 4A An example first patterned conductive layer 248 that can be formed on a monolithic substrate 240 is shown. Figure 4B An example of a second patterned conductive layer 250 that can be formed on the first layer 242 is shown. Figure 4C An example of a third patterned conductive layer 252 that can be formed on the second layer 244 is shown.

[0046] refer to Figure 5 This disclosure relates to a method 500 for forming a surface-mountable coupler. Generally, this document will refer to the foregoing references. Figures 1 to 4C The thin-film coupler 200 is described to describe method 500. However, it should be understood that the disclosed method 500 can be implemented using any suitable thin-film coupler. Furthermore, although... Figure 5 The steps are described in a specific order for illustrative and explanatory purposes, but the methods discussed herein are not limited to any particular order or arrangement. Those skilled in the art will understand using the disclosure provided herein that the steps of the methods disclosed herein may be omitted, rearranged, combined, and / or modified in various ways without departing from the scope of this disclosure.

[0047] Method 500 may include, at (502), providing a monolithic substrate. The monolithic substrate may be or include various materials described herein, such as one or more suitable ceramic materials, sapphire, or ruby.

[0048] Method 500 may include forming a plurality of ports on a monolithic substrate at (504). The plurality of ports may include isolation ports, coupling ports, input ports, and output ports, as referenced above. Figures 1 to 4C As described, a series of layers can be deposited on a single substrate. Openings or windows can be formed in the series of layers, through which ports can be formed or deposited.

[0049] Method 500 may include, at (506), forming a first thin-film inductor connected between an input port and an output port. Method 500 may also include, at (508), forming a second thin-film inductor connected between a coupling port and an isolation port and inductively coupled to the first thin-film inductor. For example, forming the first thin-film inductor may include patterned wires formed in the thickness direction of the coupler, separate from the patterned wires of the second thin-film inductor, for example, as referenced above. Figures 2 to 4C As described. For example, forming a first thin-film inductor may include depositing and patterning a conductive layer (e.g., a second patterned conductive layer 250 on a first layer 242). Forming a second thin-film inductor may include depositing and patterning a conductive layer (e.g., a third patterned conductive layer 252 on a second layer 244).

[0050] In some embodiments, method 500 may include, at (510), forming a first film capacitor and forming a second film capacitor, the first film capacitor being connected between an input port and a coupling port, and the second film capacitor being connected between an isolation port and an output port, for example, as referenced above. Figures 1 to 4C As described.

[0051] II. Simulation Data Figure 6 The above-mentioned reference represents the theoretically calculated S-parameters of a first coupler, which is typically used as a reference in accordance with aspects of this disclosure. Figures 1 to 4C The coupler 200 described is configured to be used. Figure 6 The S-parameters are shown for a frequency range extending from 2 GHz to 3 GHz. As understood in the art, the S-parameters are represented by notation of the following form: S( a, b ).value a and b The port number associated with the S-parameter is such that each S-parameter can be understood as representing a signal generated at port b as a result of the signal input at port a. As understood in the art, S-parameters are typically referred to as follows:

[0052] like Figure 6As shown, in this example, the coupling coefficient varies from approximately -4 dB at 2 GHz to approximately -2 dB at 3 GHz. Therefore, the coupling coefficient varies by approximately 2 dB over the frequency range of 2 GHz to 3 GHz. Figure 6 Within the frequency range shown, the coupling coefficient varies by approximately 2 dB per GHz.

[0053] However, the coupling frequency range can be defined as from 2.3 GHz to 2.7 GHz. The following table shows the coupling coefficients at the upper and lower limits of the coupling frequency range:

[0054] The coupling coefficient can vary by approximately 0.65 dB over the coupling frequency range. The upper limit of the coupling frequency range, 2.7 GHz, is 400 MHz larger than the lower limit, 2.3 GHz. Therefore, in this example, the coupling coefficient can vary by approximately 1.63 dB per GHz over the coupling frequency range.

[0055] The isolation factor is less than -18 dB over the coupling frequency range. This low isolation factor indicates excellent directivity. In contrast, an isolation factor greater than -10 dB would indicate a lossy coupler.

[0056] Figure 7 The above reference represents the theoretically calculated S-parameters of the second coupler, which is typically used as a reference in accordance with aspects of this disclosure. Figures 1 to 4C The coupler 200 described is configured such that, in this example, the coupling coefficient varies from approximately -4.5 dB at 3 GHz to approximately -2.5 dB at 4.5 GHz. Therefore, the coupling coefficient varies by approximately 2 dB over the frequency range of 3 GHz to 4.5 GHz. Figure 7 Within the frequency range shown, the coupling coefficient varies by approximately 1.33 dB per GHz.

[0057] However, the coupling frequency range can be defined as from 3.7 GHz to 4 GHz. The following table shows the coupling coefficients at the upper and lower limits of the coupling frequency range:

[0058] The coupling coefficient can vary by approximately 0.305 dB over the coupling frequency range. The upper limit of the coupling frequency range, 4 GHz, is 300 MHz greater than the lower limit, 3.7 GHz. Therefore, in this example, the coupling coefficient can vary by approximately 1.02 dB per GHz over the coupling frequency range.

[0059] The isolation factor is less than -17 dB over the coupling frequency range. This low isolation factor indicates excellent directivity. In contrast, an isolation factor greater than -10 dB would indicate a lossy coupler.

[0060] III. Test A source signal generator (e.g., a Keithley 2400 series source measurement unit (SMU), such as the Keithley 2410-C SMU) can be used to perform tests on coupling coefficient, insertion loss, return loss, and other S-parameter characteristics. For example, an input signal can be applied to the input port of a coupler, and the coupled signal can be measured at the coupling port of the coupler using a source signal generator.

[0061] IV. Application The disclosed coupler can be used in a variety of applications. Example applications include power amplifiers, WiFi, Worldwide Interoperability for Microwave Access (WiMAX), Wireless Broadband (WIBRO), Long Term Evolution (LTE), Bluetooth, and / or Low Power Wireless Gateway applications. Additional examples include power sensing, frequency sensing, and voltage standing wave ratio (VSWR) monitoring.

[0062] Example applications include: compact components configured for 5G signal processing (e.g., 5G base stations), smartphones, signal repeaters (e.g., small base stations), relay stations, radar, and radio frequency identification (RFID) devices. For example, according to this disclosure, the power supply may include a 3 dB coupler. As described above, a 3 dB coupler is also referred to as a splitter / combiner. Compact 3 dB couplers with excellent performance characteristics can facilitate more cost-effective power supply designs. For example, as referenced below... Figure 8 As described, a pair of lower-power and lower-cost power amplifiers can be used with two 3 dB couplers instead of a single higher-power and higher-cost power amplifier.

[0063] Figure 8 A power supply 800 including a coupler according to aspects of this disclosure is shown. The power supply 800 includes a first coupler 802, such as those described above. Figures 1 to 4CThe described coupler 200. An isolation port 806 of the first coupler 802 can be connected to ground 808. An input port 810 of the first coupler 802 can correspond to the input of a power supply 800. An output port 812 of the first coupler 802 can be connected to a first amplifier 814. A coupling port 816 of the first coupler 802 can be connected to a second amplifier 818. In some embodiments, the first coupler 802 can be configured to provide a coupled signal at coupling port 816 that is phase-shifted relative to the signal output at output port 812. For example, the coupled signal at coupling port 816 can be 90 degrees out of phase with the output signal.

[0064] The first amplifier 814 and the second amplifier 818 can be connected to the second coupler 804. More specifically, the first amplifier 814 can be connected to the coupling port 820 of the second coupler 804. The second amplifier 818 can be connected to the input port 822 of the second coupler 804. The isolation port 824 of the second coupler 804 can be connected to ground 826. The output port 828 of the second coupler 804 can correspond to the output of the power supply 800.

[0065] Those skilled in the art can practice these and other modifications and variations of the invention without departing from the spirit and scope of the invention. Furthermore, it should be understood that aspects of the various embodiments can be interchanged in whole or in part. Moreover, those skilled in the art will understand that the foregoing description is merely exemplary and is not intended to limit the invention further described in the appended claims.

Claims

1. A surface-mountable thin-film coupler, comprising: Monolithic substrate; Multiple ports are formed on the monolithic substrate, including isolation ports, coupling ports, input ports, and output ports, wherein the isolation ports, coupling ports, input ports, and output ports are exposed along the outer surface of the surface-mountable thin-film coupler; as well as At least one thin-film component is connected to at least one of the plurality of ports, the at least one thin-film component including a first thin-film inductor and a second thin-film inductor, the first thin-film inductor being connected between the input port and the output port; The second thin-film inductor is connected between the coupling port and the isolation port, and is inductively coupled to the first thin-film inductor; The first patterned conductive layer connects the first thin-film inductor to the output port and the second thin-film inductor to the isolation port. The second patterned conductive layer defines the first thin-film inductor, and the second patterned conductive layer is separated from the first patterned conductive layer along the thickness direction. The third patterned conductive layer defines the second thin-film inductor, and the third patterned conductive layer is separated from each of the first and second patterned conductive layers along the thickness direction. Wherein, the first patterned conductive layer is formed on the monolithic substrate, the second patterned conductive layer is formed on the first layer, the first layer is formed on the first patterned conductive layer, the third patterned conductive layer is formed on the second layer, the second layer is formed on the second patterned conductive layer, and one or more vias extend along the thickness direction through the first layer and the second layer. The isolation port, the coupling port, the input port, and the output port extend from the outer surface through the first layer and the second layer, and are electrically connected to the first patterned conductive layer, the second patterned conductive layer, and the third patterned conductive layer. The surface-mountable thin-film coupler provides a coupling coefficient greater than -5 dB and less than -1 dB over a coupling frequency range having a lower limit greater than 1 GHz and an upper limit at least 200 MHz greater than the lower limit. The surface-mountable thin-film coupler occupies an area of ​​less than approximately 3 mm. 2 .

2. The surface-mountable thin-film coupler according to claim 1, wherein, The surface-mountable thin-film coupler exhibits a coupling coefficient of approximately -3 dB over the coupling frequency range.

3. The surface-mountable thin-film coupler according to claim 1, wherein, The surface-mountable thin-film coupler exhibits a coupling coefficient that varies by less than 5 dB over the coupling frequency range.

4. The surface-mountable thin-film coupler according to claim 1, wherein, The surface-mountable thin-film coupler exhibits a coupling coefficient that varies by less than 3 dB per GHz over the coupling frequency range.

5. The surface-mountable thin-film coupler according to claim 1, wherein, The surface-mountable thin-film coupler exhibits an isolation factor of less than approximately -10 dB over the coupling frequency range.

6. The surface-mountable thin-film coupler according to claim 1, wherein, The width of the surface-mountable thin-film coupler is less than about 1.2 mm.

7. The surface-mountable thin-film coupler according to claim 1, wherein, The surface-mountable thin-film coupler is less than about 2 mm in length.

8. The surface-mountable thin-film coupler according to claim 1, wherein, The at least one thin-film component includes a layer having a thickness of less than about 50 micrometers.

9. The surface-mountable thin-film coupler according to claim 1, wherein, The at least one thin-film component further includes: A first film capacitor is connected between the input port and the coupling port; and A second film capacitor is connected between the isolation port and the output port.

10. The surface-mountable thin-film coupler of claim 1, further comprising a cover layer formed on the at least one thin-film component.

11. The surface-mountable thin-film coupler of claim 10, wherein, The covering layer comprises silicon oxynitride.

12. The surface-mountable thin-film coupler according to claim 10, wherein, The capping layer is formed on the third patterned conductive layer, the capping layer defines the outer surface of the surface-mountable thin-film coupler, and wherein the plurality of ports are exposed through the capping layer.

13. The surface-mountable thin-film coupler according to claim 1, wherein, The monolithic substrate comprises a ceramic material.

14. A surface-mountable thin-film coupler, comprising: Monolithic substrate; Multiple ports are formed on the monolithic substrate, wherein the multiple ports include an isolation port, a coupling port, an input port, and an output port, and the isolation port, the coupling port, the input port, and the output port are exposed along the outer surface of the surface-mountable thin-film coupler; A first thin-film inductor, the first thin-film inductor being connected between the input port and the output port; and A second thin-film inductor is connected between the coupling port and the isolation port and is inductively coupled to the first thin-film inductor. The first patterned conductive layer connects the first thin-film inductor to the output port and the second thin-film inductor to the isolation port. The second patterned conductive layer defines the first thin-film inductor, and the second patterned conductive layer is separated from the first patterned conductive layer along the thickness direction. The third patterned conductive layer defines the second thin-film inductor, and the third patterned conductive layer is separated from each of the first and second patterned conductive layers along the thickness direction. The isolation port, the coupling port, the input port, and the output port extend from the outer surface through the first and second layers and are electrically connected to the first patterned conductive layer, the second patterned conductive layer, and the third patterned conductive layer. One or more vias extend along the thickness direction through two or more layers separating the first patterned conductive layer, the second patterned conductive layer, and the third patterned conductive layer, wherein the two or more layers include the first layer and the second layer, and The surface-mountable thin-film coupler occupies an area of ​​less than approximately 3 mm. 2 .

15. The surface-mountable thin-film coupler of claim 14, wherein, The surface-mountable thin-film coupler exhibits an isolation factor of less than approximately -10 dB over the coupling frequency range.

16. The surface-mountable thin-film coupler of claim 14, wherein, The surface-mountable thin-film coupler exhibits a coupling coefficient between -1 dB and -5 dB in the coupling frequency range.

17. The surface-mountable thin-film coupler of claim 14, wherein, The surface-mountable thin-film coupler exhibits a coupling coefficient that varies by less than 5 dB over the coupling frequency range.

18. The surface-mountable thin-film coupler of claim 14, wherein, The surface-mountable thin-film coupler exhibits a coupling coefficient that varies by less than 3 dB per GHz across the coupling frequency range.

19. The surface-mountable thin-film coupler according to claim 14, wherein, At least one of the first thin-film inductor or the second thin-film inductor includes a layer having a thickness of less than about 50 micrometers.

20. The surface-mountable thin-film coupler of claim 14, further comprising at least one thin-film capacitor connected to at least one of the input port or the isolation port.

21. The surface-mountable thin-film coupler of claim 14, further comprising: A first film capacitor is connected between the input port and the coupling port; as well as A second film capacitor is connected between the isolation port and the output port.

22. The surface-mountable thin-film coupler of claim 14, further comprising a capping layer formed on the first thin-film inductor and the second thin-film inductor, wherein, The cover layer defines the outer surface of the surface-mountable thin-film coupler.

23. The surface-mountable thin-film coupler according to claim 22, wherein, The covering layer comprises silicon oxynitride.

24. The surface-mountable thin-film coupler of claim 14, wherein, The width of the surface-mountable thin-film coupler is less than about 1.2 mm.

25. The surface-mountable thin-film coupler of claim 14, wherein, The surface-mountable thin-film coupler is less than about 2 mm in length.

26. The surface-mountable thin-film coupler according to claim 14, wherein, The monolithic substrate comprises a ceramic material.

27. A method for forming a surface-mountable thin-film coupler, the method comprising: Provide monolithic substrates; Multiple ports are formed on the monolithic substrate, wherein the multiple ports include isolation ports, coupling ports, input ports, and output ports; Forming the first patterned conductive layer; A second patterned conductive layer is formed, which defines the first thin-film inductor; A third patterned conductive layer is formed, the third patterned conductive layer defining a second thin-film inductor, the second thin-film inductor being inductively coupled to the first thin-film inductor; and The isolation port, the coupling port, the input port, and the output port are exposed along the outer surface of the surface-mountable thin-film coupler. The first thin-film inductor is connected between the input port and the output port, and the second thin-film inductor is connected between the coupling port and the isolation port. The first patterned conductive layer connects the first thin-film inductor to the output port and the second thin-film inductor to the isolation port. In this configuration, the second patterned conductive layer is separated from the first patterned conductive layer along the thickness direction. The third patterned conductive layer is separated from each of the first and second patterned conductive layers along the thickness direction. One or more vias extend along the thickness direction through two or more layers that separate the first patterned conductive layer, the second patterned conductive layer, and the third patterned conductive layer, wherein the two or more layers include the first layer and the second layer; The isolation port, coupling port, input port, and output port extend from the outer surface through the first and second layers and are electrically connected to the first, second, and third patterned conductive layers. The surface-mountable thin-film coupler occupies an area of ​​less than approximately 3 mm. 2 .

28. A power supply comprising one or more surface-mountable thin-film couplers as claimed in claim 1.

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