Packaging method for a separate device based on silicon-based OLEDs

Abstract

The application relates to a packaging method of a silicon-based OLED separated device and belongs to the technical field of separated device packaging. Panel IC and Drive IC are designed and manufactured in a separated mode, then the Drive IC and FPC are connected with the Panel IC through the flip welding and FOG method. The method can effectively reduce the packaging difficulty of high-performance silicon-based OLED products, reduce the manufacturing cost of the Panel IC and the Drive IC, improve the yield, and realize high-precision and high-reliability connection of a large number of pads with small line width and spacing. The design is suitable for high-performance and multi-pin silicon-based OLED products, and can also be applied to the post-packaging process of other semiconductor display industries through optimization.

Description

Technical Field

[0001] This invention belongs to the field of discrete device packaging technology, specifically relating to a packaging method for discrete devices based on silicon-based OLEDs. Background Technology

[0002] Traditional silicon-based OLED products are mainly encapsulated using WB (Welded Brace) or FOG (Formula-Oxide-Glass) methods. WB offers the advantage of high product reliability but suffers from low production efficiency, making it suitable for products with fewer than 300 leads. FOG is a newer encapsulation technology with higher production efficiency, suitable for products with approximately 1000 pads. However, FOG uses adhesive bonding for encapsulation, and after undergoing high temperature and humidity, temperature cycling, and temperature shock tests, it may exhibit defects such as impedance abnormalities and black screens, making its reliability lower than WB encapsulation.

[0003] As the performance of silicon-based OLED products improves, the number of pads may reach around 2000. Arranging such a large number of pads on small-sized panel ICs is extremely difficult, as pad linewidth and pitch may fall below 10µm, making web bonding (WB) impossible. A critical factor in FOG (Flexible Open-Glass) technology is the bonding precision between the pads on the FPC and the chip pads. Currently, the highest precision in FPC bonding is mainly used in flexible mobile phone displays, with linewidths below 9µm and space of 5µm. FOG also has high requirements for pad length, height, conductive area, and space. Current high-performance silicon-based OLED products are generally smaller than 2 inches, far smaller than mobile phone sizes.

[0004] Current technologies also use COG (Copy-on-Glass) technology to physically and electrically connect the Drive IC, FPC, and Panel IC using anisotropic conductive adhesive (ACF). Currently, the highest precision achieved using ACF for connection is 4µm, with linewidths below 9µm. If the Drive IC bonding pad linewidth in the Panel IC is large, COG technology can be used. However, when the Drive IC bonding pad linewidth is below 1µm, simply using COG technology results in a small ACF adhesive selection window, difficulty in selection, and significant challenges in FPC bonding, leading to poor product reliability and other problems. Therefore, a new packaging method is needed to solve this problem. Summary of the Invention

[0005] To provide a novel packaging method, this invention proposes a packaging method for discrete devices based on silicon-based OLEDs to solve the above-mentioned problems.

[0006] A packaging method for discrete devices based on silicon-based OLEDs is characterized by the separate design and fabrication of the Panel IC and Drive IC, followed by the connection of the Drive IC and FPC to the Panel IC via flip-chip bonding and FOG (Flip Chip and Foundry Group) methods. The method includes the following steps: S1: Create a UBM layer on the pad of the Drive IC; S2: Indium pillar growth is performed on UBM; S3: Clean the bonding areas of the Drive IC and Panel IC; S4: The CCD camera takes pictures and performs high-precision alignment compensation. The pads of the Drive IC and the Panel IC are connected one by one by flip-chip soldering. S5: Clean the bonding areas of the FPC and Panel IC; S6: The CCD camera takes pictures of the Panel IC and performs high-precision alignment compensation. Under the action of low temperature and low pressure of the pressure head, the ACF is flatly attached to the Panel IC with the cutter, ensuring that the ACF is attached without folding or skewing. S7: The CCD camera performs high-precision alignment compensation of the mark points of the FPC and Panel IC, and attaches the FPC to the pad area of ​​the Panel IC by heating and pressurizing. S8: Apply UV adhesive to both the front and back of the adhesive.

[0007] The UBM is manufactured by evaporation or sputtering methods.

[0008] The indium pillars are grown using evaporation or sputtering processes, and are prepared in conjunction with a photomask.

[0009] The cleaning steps in S2 and S5 include ultrasonic cleaning and plasma cleaning. Ultrasonic cleaning can remove large particles, while plasma cleaning can remove organic contaminants from the surface.

[0010] In step S7, pre-pressing is performed first, followed by main pressing. Pre-pressing uses low temperature and low pressure, during which the conductive particles do not break and the thermosetting resin does not cure. The process is then transferred to the next step, main pressing, which uses high temperature and high pressure. During this process, the conductive particles break, making the FPC and the panel IC pads conductive. At the same time, the thermosetting resin cures, bonding the FPC and the panel IC pads together.

[0011] The coating method of the positive and negative adhesive in S8 is as follows: a layer of positive adhesive is uniformly coated on the FPC bonding area, which can isolate water and oxygen and prevent device failure; a layer of back adhesive is uniformly coated on the connection of the back of the Panel IC to improve the physical connection strength between the FPC and the Panel IC.

[0012] The beneficial effects of this invention are as follows: First, the original large set of pads can be divided into two groups: one for the Drive IC and the other for the FPC. This reduces the number of pads on the FPC bonding side without reducing the overall pad count, ensuring sufficient linewidth and gaps when arranging the FPC bonding pads, thus simplifying FPC bonding. The fabricated indium pillars have high purity, small linewidth, high density, and stable connection performance, suitable for connections up to 16,000 pads. This significantly reduces the interconnection process difficulty between the Drive IC and Panel IC, improves reliability, and also reduces the number of pads in the subsequent FOG process, indirectly reducing the complexity of the FOG process.

[0013] The connection between the FPC and the Panel IC is achieved by hot-pressing with conductive adhesive. The encapsulation process uses multiple pressure heads to bond all the pads at once, which improves production efficiency. In the three-pressure head production mode, the UPH can reach 1k / H. In addition, the coating process in FOG can effectively isolate water and oxygen, and improve the connection strength between FPC and Panel IC.

[0014] Currently, the highest precision for ACF (Acoustic Coating Flow) connections in the industry is 4µm, with linewidths below 9µm. In contrast, flip-chip bonding technology can achieve linewidths below 1µm, demonstrating stronger process capabilities. In practical packaging applications, if the bonding pad linewidth of the Drive IC in the Panel IC is large, COG (Chip-on-Garde) technology can be used. Conversely, if the bonding pad linewidth of the Drive IC is small and COG technology cannot be used, flip-chip bonding technology must be used to connect the Drive IC.

[0015] In summary, the discrete device packaging method proposed in this design can effectively solve the packaging difficulties caused by the large number of small and narrow spacing of Drive IC pins in high-performance silicon-based OLEDs, reduce the difficulty of pad design in FOG process, and greatly reduce IC manufacturing cost and improve IC manufacturing yield. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of step S1 in embodiment S1; Figure 2 This is a schematic diagram of step S2 in the embodiment; Figure 3 This is a schematic diagram of step S3 in the embodiment; Figure 4 This is a schematic diagram of step S4 in the embodiment; Figure 5 This is a schematic diagram of step S5 in the embodiment; Figure 6 This is a schematic diagram of step S6 in embodiment S6; Figure 7 This is a schematic diagram of step S7 in embodiment S. Figure 8 This is a schematic diagram of step S8 in the embodiment; Figure 9 This is a schematic diagram of step S1 in the comparative example; Figure 10 This is a schematic diagram of step S2 in the comparative example; Figure 11 This is a schematic diagram of step S3 in the comparative example; Figure 12 This is a schematic diagram of step S4 in the comparative example; Figure 13 This is a schematic diagram of step S5 in the comparative example; Figure 14 This is a schematic diagram of step S6 in the comparative example; Figure 15 This is a schematic diagram of step S7 for comparison.

[0017] Among them, 1-Drive IC, 2-Drive IC pad, 3-UBM, 4-Indium pillar, 5-Panel IC, 6-First bonding area, 7-ACF, 8-FPC, 9-UV adhesive, 10-Second bonding area. Detailed Implementation

[0018] Example 1: A discrete device packaging method based on silicon-based OLED. This method first involves the discrete design and fabrication of Panel IC5 and Drive IC1. Then, Drive IC1 and FPC8 are connected to Panel IC5 using flip-chip bonding and FOG (Flip-chip Group). The specific implementation steps are as follows, where S1-S4 are flip-chip bonding steps, and S5-S8 are FOG steps: S1: As Figure 1 As shown, UBM3 is fabricated on pad2 of the Drive IC. UBM3 is a multilayer metal film, mainly composed of an adhesive layer, a diffusion barrier layer, and a wetting layer. In this embodiment, photoresist is first coated around pad2 of the Drive IC, and then two diffusion barrier layers are fabricated by sputtering. The photoresist is then removed and recoated. UBM3 can reduce the difficulty of interconnecting Drive IC1 with Panel IC5 and improve reliability.

[0019] S2: As Figure 2 As shown, indium pillars 4 are grown on UBM3 via evaporation. This method uses mature equipment and technology, requiring a photomask. The resulting indium pillars 4 exhibit high purity, small linewidth, and high density. After the indium pillars 4 are fabricated, excess material and photoresist are removed.

[0020] S3: As Figure 3As shown, the first bonding region 6 of Drive IC1 and Panel IC5 is cleaned using ultrasonic cleaning and plasma cleaning, respectively. Ultrasonic cleaning can remove large particles, while plasma cleaning can remove surface organic contaminants.

[0021] S4: As Figure 4 As shown, the robotic arm picks up Drive IC2 and Panel IC5, the CCD camera takes pictures for high-precision alignment compensation, and the indium pillar 4 of Drive IC2 and the pad of Panel IC5 are connected one by one by flip-chip bonding to realize the connection between Drive IC1 and Panel IC5.

[0022] S5: As Figure 5 As shown, the second bonding area 10 of FPC8 and Panel IC5 is cleaned in the same way as S3 to ensure cleanliness.

[0023] S6: As Figure 6 As shown, the CCD camera takes pictures of Panel IC5 and performs high-precision alignment compensation. Under the action of low temperature and low pressure of the pressure head, the ACF7 is flatly attached to Panel IC5 with the cutter, ensuring that the ACF7 is attached without folding or skewing.

[0024] S7: As Figure 7 As shown, the robotic arm picks up the FPC8, and the CCD camera performs high-precision alignment compensation of the mark points of the FPC8 and the Panel IC5. The FPC8 is then attached to the pad area of ​​the Panel IC5 by heating and pressurizing. The attachment process involves pre-pressing followed by final pressing. The pre-pressing uses low temperature and low pressure, during which the conductive particles do not break and the thermosetting resin does not cure. The final pressing uses high temperature and high pressure, during which the conductive particles break, making the FPC8 and the pad of the Panel IC5 conductive. At the same time, the thermosetting resin cures, bonding the FPC8 and the Panel IC5 together.

[0025] S8: As Figure 8 As shown, a UV adhesive 9 coating process is performed, and a layer of positive adhesive is evenly coated on the bonding area of ​​FPC8, which can isolate water and oxygen and prevent device failure; a layer of back adhesive is evenly coated on the connection area on the back of Panel IC5 to improve the physical connection strength between FP8 and Panel IC5.

[0026] This method effectively reduces the packaging complexity of high-performance silicon-based OLED products, lowers the manufacturing costs of Panel IC5 and Drive IC1, improves yield, and enables high-precision, high-reliability interconnection of a large number of pads with small linewidths and pitches. This design is suitable for high-performance, multi-pin silicon-based OLED products and, with optimization, can also be applied to post-packaging processes in other semiconductor display industries.

[0027] Comparative Example 1: A discrete device packaging method based on silicon-based OLEDs, which uses COG technology, and the specific implementation steps are as follows: S1: As Figure 9 As shown, the first bonding region 6 of Drive IC1 and Panel IC5 is cleaned using ultrasonic cleaning and plasma cleaning, respectively. Ultrasonic cleaning can remove large particles, while plasma cleaning can remove surface organic contaminants.

[0028] S2: As Figure 10 As shown, the CCD camera takes pictures of Panel IC1 and performs high-precision alignment compensation. Under the action of low temperature and low pressure of the pressure head, the ACF7 is flatly attached to Panel IC5 with the cutter, ensuring that the ACF7 is attached without folding or skewing. S3: As Figure 11 As shown, the robotic arm picks up Drive IC1, and the CCD camera performs high-precision alignment compensation of the mark points of Drive IC1 and Panel IC5. Drive IC1 is then attached to the pad area of ​​Panel IC5 by heating and pressurizing. The attachment process involves pre-pressing followed by final pressing. Pre-pressing uses low temperature and low pressure, during which the conductive particles do not break and the thermosetting resin does not cure. Final pressing uses high temperature and high pressure, during which the conductive particles break, making the pad of Drive IC1 and Panel IC5 conductive. At the same time, the thermosetting resin cures, bonding Drive IC1 and Panel IC5 together.

[0029] S4: As Figure 12 As shown, the second bonding area 10 of FPC8 and Panel IC5 is cleaned in the same way as S3 to ensure cleanliness.

[0030] S5: As Figure 13 As shown, the CCD camera takes pictures of Panel IC5 and performs high-precision alignment compensation. Under the action of low temperature and low pressure of the pressure head, the ACF7 is flatly attached to Panel IC5 with the cutter, ensuring that the ACF7 is attached without folding or skewing.

[0031] S6: As Figure 14As shown, the robotic arm picks up the FPC8, and the CCD camera performs high-precision alignment compensation of the mark points of the FPC8 and the Panel IC5. The FPC8 is then attached to the pad area of ​​the Panel IC5 by heating and pressurizing. The attachment process involves pre-pressing followed by final pressing. The pre-pressing uses low temperature and low pressure, during which the conductive particles do not break and the thermosetting resin does not cure. The final pressing uses high temperature and high pressure, during which the conductive particles break, making the FPC8 and the pad of the Panel IC5 conductive. At the same time, the thermosetting resin cures, bonding the FPC8 and the Panel IC5 together.

[0032] S7: As Figure 15 As shown, a UV adhesive 9 coating process is performed, and a layer of positive adhesive is evenly coated on the bonding area of ​​FPC8, which can isolate water and oxygen and prevent device failure; a layer of back adhesive is evenly coated on the connection area on the back of Panel IC5 to improve the physical connection strength between FP8 and Panel IC5.

[0033] The difference between the two processes lies in the connection method of the Drive IC, while the similarity lies in the connection process of the FPC.

[0034] Although the flip-chip bonding + FOG process is more complex and costly than the COG process, because the flip-chip bonding process requires UBM and indium pillar growth beforehand, involving photolithography, sputtering, and evaporation processes—all front-end processes in semiconductor manufacturing with high precision and expensive raw materials—the drive IC directly connects to the panel IC via ACF, eliminating the front-end processes used in flip-chip bonding. Comparatively, its process complexity and manufacturing cost are lower. In terms of production capacity, the flip-chip bonding + FOG process involves more steps, resulting in a longer production cycle and lower capacity. In contrast, the COG process directly bonds the drive IC to the panel IC via ACF using thermoforming, resulting in a simpler process flow, shorter production cycle, and higher capacity.

[0035] However, in terms of process capability limits, flip-chip bonding + FOG process is far superior to COG process. Currently, the highest precision of ACF connection in the industry is 4um, with a linewidth of less than 9um, while the linewidth of flip-chip bonding process can reach less than 1um. Its process capability is stronger. In actual packaging applications, if the linewidth of the bonding pad of the Drive IC in the Panel IC is large, the COG process can be used. Conversely, if the linewidth of the bonding pad of the Drive IC is small, the COG process cannot be used, and the flip-chip bonding process must be used to connect the Drive IC.

Claims

1. A packaging method for discrete devices based on silicon-based OLEDs, characterized in that... The Panel IC and Drive IC are designed and manufactured separately, and then the Drive IC and FPC are connected to the Panel IC by flip-chip bonding and FOG method; The steps of this method include: S1: Create a UBM layer on the pad of the Drive IC; S2: Indium pillar growth is performed on UBM; S3: Clean the bonding areas of the Drive IC and Panel IC. S4: The CCD camera takes pictures and performs high-precision alignment compensation. The pads of the Drive IC and the pads of the Panel IC are connected one by one through flip-chip soldering. S5: Clean the bonding areas of the FPC and Panel IC; S6: The CCD camera takes pictures of the Panel IC and performs high-precision alignment compensation. Under the action of low temperature and low pressure of the pressure head, the ACF is flatly attached to the Panel IC with the cutter, ensuring that the ACF is attached without folding or skewing. S7: The CCD camera performs high-precision alignment compensation of the mark points of the FPC and Panel IC, and attaches the FPC to the pad area of ​​the Panel IC by heating and pressurizing. S8: Apply UV adhesive to both the front and back of the adhesive.

2. The packaging method for a discrete device based on silicon-based OLED as described in claim 1, characterized in that... The UBM is prepared by evaporation or sputtering.

3. The packaging method for a discrete device based on silicon-based OLED as described in claim 1, characterized in that... The indium pillars are grown using evaporation or sputtering processes, and are prepared in conjunction with a photomask.

4. The packaging method for a discrete device based on silicon-based OLED as described in claim 1, characterized in that... The cleaning processes in S2 and S5 include ultrasonic cleaning and plasma cleaning. Ultrasonic cleaning can remove large particles, while plasma cleaning can remove organic contaminants from the surface.

5. The packaging method for a discrete device based on silicon-based OLED as described in claim 1, characterized in that... In step S7, pre-pressing is performed first, followed by main pressing. Pre-pressing uses low temperature and low pressure, during which the conductive particles do not break and the thermosetting resin does not cure. The process is then transferred to the next step, main pressing, which uses high temperature and high pressure. During this process, the conductive particles break, making the FPC and the panel IC pads conductive. At the same time, the thermosetting resin cures, bonding the FPC and the panel IC pads together.

6. The packaging method for a discrete device based on silicon-based OLED as described in claim 1, characterized in that... The coating method of the positive and negative adhesive in S8 is as follows: a layer of positive adhesive is uniformly coated on the FPC bonding area, which can isolate water and oxygen and prevent device failure; a layer of back adhesive is uniformly coated on the connection of the back of the Panel IC to improve the physical connection strength between the FPC and the Panel IC.

Images