Power module structure and power devices

Abstract

This invention relates to the field of power semiconductor technology. Specifically, it relates to a power module structure and a power device. The power module structure provided by this invention includes: multiple bottom DBC substrates and multiple top DBC substrates, which together constitute a full-bridge circuit layout module; the multiple bottom DBC substrates and multiple top DBC substrates are arranged in an array on the same layer; the top DBC substrates are connected to the bottom DBC substrates through their own bottom conductive copper layer or bridges; the bottom DBC substrates and top DBC substrates are stacked one-to-one; the bottom DBC substrates are provided with multiple parallel power chips, which are arranged in a single chip setting area and are closely arranged; for the arrayed top DBC substrates, at least one side of the top DBC substrate is provided with an AC terminal; the opposite side of the top DBC substrate is provided with a DC negative terminal; the bottom DBC substrate on the same side as the DC negative terminal is provided with a DC positive terminal.

Description

Technical Field

[0001] This invention relates to the field of power semiconductor technology, and more specifically to a power module structure and a power device. Background Technology

[0002] In recent years, novel power electronic devices such as silicon carbide (SiC) have been widely used in new energy power generation systems, electric vehicles, and electric drives. Compared with traditional silicon (Si) devices, SiC devices have lower on-resistance, higher blocking voltage, and higher operating temperature. Simultaneously, SiC MOSFETs exhibit no tail current during turn-off, effectively reducing switching losses and increasing switching speed. This performance advantage provides more favorable conditions for reducing the transportation, installation, and maintenance costs of new energy converters. Therefore, SiC MOSFETs are expected to become the next generation of power devices, replacing Si IGBTs. Due to manufacturing process and cost limitations, the current carrying capacity of a single SiC MOSFET chip is only tens of amperes. In high-power applications such as electric drives and new energy, modules with multiple chips connected in parallel are typically required. This parallel design effectively improves current carrying capacity while maintaining the high efficiency and high-speed switching characteristics of SiC MOSFETs, making it an ideal solution for meeting the demands of high-power applications.

[0003] Traditional multi-chip parallel power modules typically use a single DBC (Direct Bonding Copper) substrate to arrange multiple chips for full-bridge circuit layout. However, this layout method has some problems, such as occupying too much tiled area, large size, loose structure, and low design freedom. Summary of the Invention

[0004] To address the aforementioned problems, this invention provides a power module structure and power device to solve the issues of excessive tiling area, large size, loose structure, and low design freedom in the full-bridge circuit layout of existing power modules.

[0005] This invention provides a power module structure, comprising: multiple bottom DBC substrates and multiple top DBC substrates, wherein the multiple bottom DBC substrates and multiple top DBC substrates together constitute a full-bridge circuit layout module; wherein, the multiple bottom DBC substrates are arranged in an array on the same layer; the multiple top DBC substrates are arranged in an array on the same layer; the top DBC substrates are connected to the bottom DBC substrates through their own bottom conductive copper layer or conductive bridge; the bottom DBC substrates and the top DBC substrates are stacked one-to-one correspondingly; the bottom DBC substrates are provided with multiple parallel power chips, which are arranged in a single chip setting area and are closely arranged; the top DBC substrates are not provided with power chips; for the arrayed top DBC substrates, at least one side of the top DBC substrate is provided with an AC terminal; the opposite side of the top DBC substrate is provided with a DC negative terminal; the bottom DBC substrate on the same side as the DC negative terminal is provided with a DC positive terminal.

[0006] Optionally, the bottom DBC substrate includes at least two upper tube bottom DBC substrates arranged side by side and at least two lower tube bottom DBC substrates arranged side by side opposite to them; the DC positive terminal is fixedly connected to each lower tube bottom DBC substrate and is located on the side away from the upper tube bottom DBC substrate.

[0007] Optionally, a single chip setting area may contain eight power chips connected in parallel.

[0008] Optionally, the bottom DBC substrate includes at least two upper tube top DBC substrates arranged side by side and at least two lower tube top DBC substrates arranged side by side opposite to them; the DC negative terminal is fixedly connected to each lower tube top DBC substrate and is located on the side away from the upper tube top DBC substrate; the AC terminal is fixedly connected to each upper tube top DBC substrate and is located on the side away from the lower tube top DBC substrate.

[0009] Optionally, the DC positive terminal is soldered to the bottom DBC substrate of each lower transistor. The DC negative terminal is soldered to the top DBC substrate of each lower transistor. The AC terminal is soldered to the top DBC substrate of each upper transistor.

[0010] Optionally, the conductive copper layer at the bottom of the top DBC substrate of the upper tube extends to the corresponding bottom DBC substrate of the lower tube and is electrically connected to the bottom DBC substrate of the lower tube; at the same time, the conductive copper layer at the bottom of the top DBC substrate of the upper tube is also electrically connected to the bottom DBC substrate of the upper tube below it.

[0011] Optionally, the power module structure also includes: an intermediate bridge; the top DBC substrate of the upper tube is electrically connected to the corresponding bottom DBC substrate of the lower tube through the intermediate bridge; the intermediate bridge is stepped, with one end of the step overlapping the top DBC substrate of the upper tube and the other end overlapping the bottom DBC substrate of the lower tube.

[0012] Optionally, the power module structure also includes: an upper tube bridge; the upper tube top DBC substrate and the power chip in the lower upper tube bottom DBC substrate are electrically connected through the upper tube bridge; the upper tube bridge is wavy, including continuous peaks and troughs, the bottom of each trough is in contact with a power chip in the lower upper tube bottom DBC substrate, and both ends of the upper tube bridge are connected to the upper tube top DBC substrate.

[0013] Optionally, the power module structure also includes: a lower tube bridge; the top DBC substrate of the lower tube and the power chip in the bottom DBC substrate of the lower tube below it are electrically connected through the lower tube bridge; the lower tube bridge is wavy, including continuous peaks and troughs, the bottom of each trough is in contact with a power chip in the bottom DBC substrate of the lower tube, and both ends of the lower tube bridge are connected to the top DBC substrate of the lower tube.

[0014] The present invention also provides a power device, including the power module structure provided by the present invention.

[0015] The beneficial effects of this invention are as follows:

[0016] The power module structure provided by this invention, by setting up multiple bottom-level DBC substrates and multiple top-level DBC substrates within the power module to form a full-bridge circuit layout module, allows for a one-to-one correspondence between the bottom-level and top-level DBC substrates. Each bottom-level DBC substrate has only a single chip setting area for parallel power chips, enabling a group of bottom-level DBC substrates and the top-level DBC substrates above them to jointly form a switch S in the full-bridge circuit. No chips are set on the top-level DBC substrates. Thus, a single chip setting area on a single bottom-level DBC substrate can accommodate more power chips than a single chip setting area on a single DBC substrate in the original tiled mode. Furthermore, by using multiple bottom-level and top-level DBC substrates in a stacked connection, the parallel connection of multiple power chips in multiple power chip setting areas, which would have required a large area of ​​tiled DBC substrates in the original tiled DBC substrate full-bridge circuit layout module, is achieved. In this embodiment, the power module is constructed with a bottom DBC substrate and a top DBC substrate stacked one-to-one. Therefore, compared to a power module with a flat DBC substrate (e.g., a power module with a flat substrate), the power module offers advantages over a traditional power module with a flat substrate. Figure 2In this configuration (using a single-layer area), the copper area capable of conducting current is doubled, thus reducing the overall size of the power module while maintaining the same copper area requirement for current conduction. This allows for a more compact power module structure and facilitates smaller module dimensions. Furthermore, since the top-layer DBC substrate does not house the power chip, a chip placement area can be provided without the chip itself, exposing the power chip in the underlying bottom-layer DBC substrate. Alternatively, the chip placement area can be omitted, but the copper layer area can be significantly increased. Both methods benefit heat dissipation for the power chip in the bottom-layer DBC substrate. Additionally, each DBC substrate has a three-layer structure: a top copper layer, a middle AlN ceramic layer, and a bottom copper layer, with no electrical connection between the top and bottom copper layers. Because the DBC substrate can be divided into multiple regions to achieve different circuit connections, multiple electrical connections can be implemented in each bottom-layer and top-layer DBC substrate. This method achieves the same effect as a flat DBC substrate by stacking multiple DBC substrates, allowing each bottom DBC substrate and its top DBC substrate to form a group, creating a smaller power unit. If a single small power unit fails, it can be individually inspected and replaced, improving the overall fault tolerance of the power module. Combining multiple small power units to achieve the effect of a large power module increases design freedom and facilitates complex module layouts. Attached Figure Description

[0017] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is an equivalent circuit diagram of a full-bridge power module structure.

[0019] Figure 2 This is a structural layout diagram of the power module structure on the existing DBC substrate;

[0020] Figure 3 This is a partial exploded view of the power module structure according to an embodiment of the present invention;

[0021] Figure 4 for Figure 3 Another view;

[0022] Figure 5A To display Figure 1 A top view of the length and width dimensions of the DBC substrate power module structure;

[0023] Figure 5BA top view showing the length and width dimensions of a power module structure according to an embodiment of the present invention. Detailed Implementation

[0024] refer to Figure 2 A power module structure of a prior art DBC substrate for a full-bridge circuit layout is disclosed, comprising at least two DBC substrates 100 laid flat on the same layer. Each DBC substrate has multiple power chips connected in parallel, and each DBC substrate is a sub-module of the full-bridge circuit layout. The power chips are arranged in a 4×4 configuration in four spaced-apart power chip placement areas. The power module also includes a DC positive terminal 1 and a DC negative terminal 2 on one side, and an AC terminal 3 on the other side. The power chips in the power chip placement area on the AC terminal 3 side are electrically connected to the DBC substrate via an upper connector bridge 4, and the power chips on the DC positive terminal 1 and DC negative terminal 2 side are electrically connected to the DBC substrate via a lower connector bridge 5. (Reference) Figure 1 Due to the requirements of the full-bridge circuit layout, the 16 chips are divided into 4 groups, arranged in a 4×4 configuration in 4 spaced-apart power chip placement areas. This undoubtedly increases the size of the DBC substrate, inevitably leading to problems such as excessive floor space occupation, larger size, looser structure, and lower design freedom.

[0025] To address the above problems, the present invention provides a power module structure and a power device.

[0026] This invention provides a power module structure, comprising: multiple bottom DBC substrates and multiple top DBC substrates, which together constitute a full-bridge circuit layout module; wherein the multiple bottom DBC substrates are arranged in an array on the same layer; the multiple top DBC substrates are arranged in an array on the same layer; the top DBC substrates are connected to the bottom DBC substrates through their own bottom conductive copper layer or conductive bridge; the bottom DBC substrates and the top DBC substrates are stacked one-to-one; the bottom DBC substrates are provided with multiple parallel power chips, which are arranged in a single chip setting area and are closely arranged; the top DBC substrates are not provided with chips; for the arrayed top DBC substrates, at least one side of the top DBC substrate is provided with an AC terminal; the opposite side of the top DBC substrate is provided with a DC negative terminal; the bottom DBC substrate on the same side of the DC negative terminal is provided with a DC positive terminal.

[0027] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0028] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0029] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0030] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0031] Example 1

[0032] refer to Figures 3-4 Please also refer to Figure 1 The equivalent circuit diagram of the full-bridge circuit is shown in this embodiment. This embodiment provides a power module structure, including:

[0033] Multiple bottom-layer DBC substrates and multiple top-layer DBC substrates together constitute a full-bridge circuit layout module;

[0034] Among them, multiple bottom-layer DBC substrates are arranged in the same layer array; multiple top-layer DBC substrates are arranged in the same layer array;

[0035] The top DBC substrate is connected to the bottom DBC substrate through its own bottom conductive copper layer or bridge; the bottom DBC substrate and the top DBC substrate are stacked one-to-one in a corresponding manner.

[0036] The bottom DBC substrate has multiple power chips connected in parallel, which are located in a single chip area and arranged closely together; the top DBC substrate has no chips.

[0037] For the top DBC substrate arranged in an array, at least one side of the top DBC substrate is provided with an AC terminal; the opposite side of the top DBC substrate is provided with a DC negative terminal; and the bottom DBC substrate on the same side as the DC negative terminal is provided with a DC positive terminal.

[0038] The power module structure provided in this embodiment uses multiple bottom-level and top-level DBC substrates to form a full-bridge circuit layout module. This can be achieved by arranging the bottom-level and top-level DBC substrates one-to-one, with each bottom-level DBC substrate having only a single chip setting area for parallel power chips. This allows a group of bottom-level and top-level DBC substrates to collectively form a switch S in the full-bridge circuit. No chips are placed on the top-level DBC substrates. Therefore, a single chip setting area on a single bottom-level DBC substrate can accommodate more power chips than a single chip setting area on a single DBC substrate in the original tiled layout. By using multiple bottom-level and top-level DBC substrates in a stacked configuration, the parallel connection of multiple power chips in multiple power chip setting areas, which would otherwise require a large area of ​​tiled DBC substrates in the original tiled full-bridge circuit layout module, is achieved. In this embodiment, the power module is constructed with a bottom DBC substrate and a top DBC substrate stacked one-to-one. Therefore, compared to a power module with a flat DBC substrate (e.g., a power module with a flat substrate), the power module offers advantages over a traditional power module with a flat substrate. Figure 2 In this configuration (using a single-layer area), the copper area capable of conducting current is doubled, thus reducing the overall size of the power module while maintaining the same copper area requirement for current conduction. This allows for a more compact power module structure and facilitates smaller module dimensions. Furthermore, since the top-layer DBC substrate does not house the power chip, a chip placement area can be provided without the chip itself, exposing the power chip in the underlying bottom-layer DBC substrate. Alternatively, the chip placement area can be omitted, but the copper layer area can be significantly increased. Both methods benefit heat dissipation for the power chip in the bottom-layer DBC substrate. Additionally, each DBC substrate has a three-layer structure: a top copper layer, a middle AlN ceramic layer, and a bottom copper layer, with no electrical connection between the top and bottom copper layers. Because the DBC substrate can be divided into multiple regions to achieve different circuit connections, multiple electrical connections can be implemented in each bottom-layer and top-layer DBC substrate. This method achieves the same effect as a flat DBC substrate by stacking multiple DBC substrates, allowing each bottom DBC substrate and its top DBC substrate to form a group, creating a smaller power unit. If a single small power unit fails, it can be individually inspected and replaced, improving the overall fault tolerance of the power module. Combining multiple small power units to achieve the effect of a large power module increases design freedom and facilitates complex module layouts.

[0039] Furthermore, the underlying DBC substrate includes at least two upper-tube underlying DBC substrates 100 arranged side by side and at least two lower-tube underlying DBC substrates 200 arranged side by side opposite to them. The DC positive terminal 1 is fixedly connected to each lower-tube underlying DBC substrate 200 and is disposed on the side away from the upper-tube underlying DBC substrate 100.

[0040] The bottom DBC substrate includes at least two upper tube top DBC substrates 300 arranged side by side and at least two lower tube top DBC substrates 400 arranged side by side opposite to them. A DC negative terminal 2 is fixedly connected to each lower tube top DBC substrate 400 and is located on the side away from the upper tube top DBC substrates 300. An AC terminal 3 is fixedly connected to each upper tube top DBC substrate 300 and is located on the side away from the lower tube top DBC substrates 400.

[0041] It should be noted that, Figure 3 and Figure 4 In the diagram, to demonstrate the structure of a single DBC substrate, an upper tube top-layer DBC substrate 300 and a lower tube top-layer DBC substrate 400 are exploded and slightly raised. In the actual product, the raised upper tube top-layer DBC substrate 300 is arranged side-by-side with its adjacent upper tube top-layer DBC substrate 300, stacked on top of the lower tube bottom-layer DBC 100 below it; similarly, the raised lower tube top-layer DBC 400 is arranged side-by-side with its adjacent lower tube top-layer DBC 400, stacked on top of the lower tube bottom-layer DBC 200 below it. Furthermore, the distinction between the upper and lower tubes is based on the following: the side closer to AC terminal 3 is the upper tube, and the side closer to DC positive terminal 1 and DC negative terminal 2 is the lower tube.

[0042] In this embodiment, in order to be with Figure 2 Compared to the power modules, the number of bottom DBC substrates 100 (upper tube), 200 (lower tube), 300 (upper tube), and 400 (lower tube) is set to two each. Each bottom DBC substrate has a single chip placement area, with eight chips connected in parallel in the power chip placement area A of each upper tube bottom DBC substrate 100 and the power chip placement area B of each lower tube bottom DBC substrate. In other embodiments, more chips can be added as needed. The DC positive terminal 1 is soldered to each lower tube bottom DBC substrate 200. The DC negative terminal 2 is soldered to each lower tube top DBC substrate 400. The AC terminal 3 is soldered to each upper tube top DBC substrate 300.

[0043] Furthermore, the conductive copper layer at the bottom of the top DBC substrate 300 of the upper transistor extends to the corresponding bottom DBC substrate 200 of the lower transistor, and is electrically connected to the bottom DBC substrate 200 of the lower transistor; at the same time, the conductive copper layer at the bottom of the top DBC substrate 300 of the upper transistor is also electrically connected to the bottom DBC substrate 100 of the upper transistor below it. This allows for the electrical connection between the drain (positive terminal) of the power chip in the bottom DBC substrate 100 of the upper transistor and the DC positive terminal 1.

[0044] Furthermore, the power module structure also includes an intermediate bridge 6. The top DBC substrate 300 of the upper transistor is electrically connected to the corresponding bottom DBC substrate 400 of the lower transistor via the intermediate bridge 6. The intermediate bridge 6 is stepped, with one end of the step connecting to the top DBC substrate 300 of the upper transistor and the other end connecting to the bottom DBC substrate 400 of the lower transistor. This allows for the electrical connection between the drain (positive terminal) of the power chip in the bottom DBC substrate 400 of the lower transistor and the AC terminal 3.

[0045] Furthermore, the power module structure also includes an upper transistor bridge 4. The upper transistor top layer DBC substrate 300 and the power chip in the lower upper transistor bottom layer DBC substrate 100 below it are electrically connected through the upper transistor bridge 4.

[0046] Specifically, the upper tube bridge 4 is wave-shaped, including continuous peaks and troughs. The bottom of each trough contacts a power chip in the bottom DBC substrate 100 of the upper tube, and both ends of the upper tube bridge 4 are connected to the top DBC substrate 300 of the upper tube.

[0047] Furthermore, the power module structure also includes a lower transistor bridge 5. The top DBC substrate 400 of the lower transistor and the power chip in the bottom DBC substrate 200 of the lower transistor below it are electrically connected through the lower transistor bridge 5.

[0048] Specifically, the lower tube bridge 5 is wave-shaped, including continuous peaks and troughs. The bottom of each trough contacts a power chip in the lower tube bottom DBC substrate 200, and the two ends of the lower tube bridge are connected to the lower tube top DBC substrate 400.

[0049] Furthermore, in this embodiment, the power module also includes pins (columnar shapes in the figure, not labeled). Each group of bottom DBC substrates and its top DBC substrate constitutes a switch S in a full-bridge layout. The bottom DBC substrate and its top DBC substrate of each switch S share a set of pins as gate terminals. The pin sets shared by adjacent groups of bottom DBC substrates and their top DBC substrates are symmetrically arranged. This gate structure allows for maximum left-right symmetry, solving the gate driving problem of multi-chip parallel connections.

[0050] For comparison of effects, refer to Figure 5A and Figure 5BThe existing DBC substrate module with a tiled full-bridge circuit layout includes two tiled DBC substrates, each with 4×4 parallel power chips, for a total of 4×4×2=32 power chips. Figure 2 The structure shown. With the chip size remaining constant, the structure provided in Embodiment 1 allows for the placement of eight identical power chips in a single chip area on a single underlying DBC substrate. The entire power module structure forms an 8×4 full-bridge circuit layout, resulting in a total of 8×4 = 32 power chips. With the total number of chips remaining constant... Figure 2 The original structure had a length L1 of 90mm and a width W1 of 89mm; while the structure in this embodiment has a length L2 of 84.700mm and a width W2 of 64.50mm. It is evident that the overall length and width dimensions of the power module structure are significantly reduced, and the area is correspondingly smaller.

[0051] Example 2

[0052] This embodiment provides a power device, including the power module structure provided in Embodiment 1 above.

[0053] The power device provided in this embodiment, by setting the DBC substrate within the power module provided in Embodiment 1 as multiple bottom-level DBC substrates and multiple top-level DBC substrates, allows for the parallel connection of power chips by setting only a single chip setting area on each of the multiple DBC substrates. The single chip setting area of ​​a single DBC substrate houses more power chips than a single chip setting area on a single DBC substrate. The multiple DBC substrates, in conjunction with the stacked DBC substrates, achieve the parallel connection of multiple power chips in a large area that would otherwise require a flat arrangement of DBC substrates. This results in a more compact power module structure, reducing the overall size of the power module. Furthermore, the stacking of multiple DBC substrates achieves the same effect as a flat arrangement of DBC substrates, making each DBC substrate a smaller power unit. When a small power unit fails, it can be individually inspected and replaced, improving the overall fault tolerance of the power module. Achieving a large power module effect through the combination of multiple small power units increases design freedom and facilitates complex module layouts.

[0054] The present invention has been described above through embodiments, and it is believed that those skilled in the art can understand the present invention through the above embodiments. Obviously, the above embodiments are merely examples for clear illustration and are not intended to limit the implementation. For those skilled in the art, other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all embodiments here. However, obvious variations or modifications derived therefrom are still within the protection scope of the present invention.

Claims

1. A power module structure, characterized in that, include: Multiple bottom-layer DBC substrates and multiple top-layer DBC substrates together constitute a full-bridge circuit layout module. The multiple bottom-layer DBC substrates are arranged in a co-layer array; the multiple top-layer DBC substrates are arranged in a co-layer array. The top-level DBC substrate is connected to the bottom-level DBC substrate through its own bottom conductive copper layer or conductive bridge; the bottom-level DBC substrate and the top-level DBC substrate are stacked one on top of each other in a corresponding manner; The bottom DBC substrate has multiple power chips connected in parallel, and the power chips connected in parallel are arranged in a single chip setting area and are closely arranged; the top DBC substrate does not have any power chips. For the arrayed top DBC substrate, at least one side of the top DBC substrate is provided with an AC terminal; the opposite side of the top DBC substrate is provided with a DC negative terminal; the bottom DBC substrate on the same side as the DC negative terminal is provided with a DC positive terminal. The underlying DBC substrate includes at least two upper tube underlying DBC substrates arranged side by side and at least two lower tube underlying DBC substrates arranged side by side opposite to them. The top-level DBC substrate includes at least two upper tube top-level DBC substrates arranged side by side and at least two lower tube top-level DBC substrates arranged side by side opposite to them.

2. The power module structure according to claim 1, characterized in that, The DC positive terminal is fixedly connected to the bottom layer DBC substrate of each of the lower tubes and is located on the side away from the bottom layer DBC substrate of the upper tube.

3. The power module structure according to claim 2, characterized in that, The single chip setting area contains eight power chips connected in parallel.

4. The power module structure according to claim 2, characterized in that, The DC negative terminal is fixedly connected to the top layer DBC substrate of each of the lower tubes and is located on the side away from the top layer DBC substrate of the upper tube. The AC terminal is fixedly connected to the top layer DBC substrate of each of the upper tubes and is located on the side away from the top layer DBC substrate of the lower tube.

5. The power module structure according to claim 4, characterized in that, The DC positive terminal is welded to the bottom DBC substrate of each of the lower tubes; The DC negative terminal is welded to the top layer DBC substrate of each of the lower tubes; The AC terminals are welded to the top layer DBC substrate of each of the upper tubes.

6. The power module structure according to claim 4, characterized in that, The conductive copper layer at the bottom of the top DBC substrate of the upper tube extends to the corresponding bottom DBC substrate of the lower tube and is electrically connected to the bottom DBC substrate of the lower tube; at the same time, the conductive copper layer at the bottom of the top DBC substrate of the upper tube is also electrically connected to the bottom DBC substrate of the upper tube below it.

7. The power module structure according to claim 4, characterized in that, Also includes: Intermediate bridge; The top DBC substrate of the upper tube is electrically connected to the corresponding bottom DBC substrate of the lower tube through an intermediate bridge. The intermediate bridge is stepped, with one end of the step connecting to the top layer DBC substrate of the upper tube and the other end connecting to the bottom layer DBC substrate of the lower tube.

8. The power module structure according to claim 4, characterized in that, Also includes: Upper pipe connection bridge; The power chip in the top DBC substrate of the upper tube and the bottom DBC substrate of the upper tube below it are electrically connected through the upper tube bridge. The upper tube bridge is wavy, including continuous peaks and troughs. The bottom of each trough contacts a power chip in the bottom DBC substrate of the upper tube. The two ends of the upper tube bridge are connected to the top DBC substrate of the upper tube.

9. The power module structure according to claim 4, characterized in that, Also includes: Lower pipe connection bridge; The power chip in the top DBC substrate of the lower tube and the bottom DBC substrate below it are electrically connected through the lower tube bridge. The lower tube bridge is wavy, including continuous peaks and troughs. The bottom of each trough contacts a power chip in the bottom DBC substrate of the lower tube, and both ends of the lower tube bridge are connected to the top DBC substrate of the lower tube.

10. A power device, characterized in that, Includes the power module structure as described in any one of claims 1-9.

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