Transimpedance amplifier, optical receiver, and electronic device

Abstract

A transimpedance amplifier (TIA) includes a first amplifier stage having a first input coupled to an input node and having a first output, a feedback path between the first output and the first input, a second amplifier stage in the feedback path having a second input coupled to the first output of the first amplifier stage, a feedback resistor in the feedback path coupled between an output of the second amplifier stage and a first input of the first amplifier stage, and an output stage including a load resistor coupled between a reference voltage node and a T coil including first and second inductors coupled in series at an inductor node, the T coil coupled between the first output and the load resistor, the inductor node coupled to the output node of the TIA.

Description

Technical Field

[0001] This disclosure relates to improvements in transimpedance amplifiers (TIAs), optical receivers, and electronic devices, and more specifically to TIAs that drive loads. Background Technology

[0002] In optical data links, information is typically encoded by modulating the amplitude of an optical signal propagating through an optical fiber to a receiver at the end of the link. A photodiode in the receiver generates a current proportional to the amplitude of the optical signal. This current is amplified and converted into a voltage signal, which can then be further amplified and processed to determine the received data pattern. A transimpedance amplifier (TIA) can be used to perform this current-to-voltage conversion.

[0003] To increase the data transmission rate across communication networks, the amplitude modulation rate of the optical signal can be increased. A higher modulation rate requires a larger bandwidth component in the receiver to faithfully reproduce the transmitted signal without introducing interference (inter-symbol interference) between consecutive data symbols. Optimal receiver bandwidth is typically between 60% and 70% of the symbol rate. Because optical signals attenuate as they propagate through optical fibers, the amplitude of the signal reaching the receiver can be very small.

[0004] To help the receiver accurately determine the data type, it is advantageous to minimize the noise added to the received signal by the TIA while maintaining sufficient bandwidth. Summary of the Invention

[0005] According to a first aspect of this disclosure, a transimpedance amplifier (TIA) is provided for converting an input current at an input node into an output voltage at an output node. The TIA includes: a first amplifier stage having a first input coupled to the input node and a first output; a feedback path between the first output and the first input; a second amplifier stage in the feedback path having a second input coupled to the first output; a feedback resistor in the feedback path coupled between the output of the second amplifier stage and the first input of the first amplifier stage; and an output stage including: a load resistor coupled between a first reference voltage node and a T-coil, the T-coil including a first inductor and a second inductor coupled in series at an inductor node, the T-coil being coupled between the first output and the load resistor, the inductor node being coupled to the output node of the TIA.

[0006] The T-coil can be a bridged T-coil. In this case, the T-coil may further include a bridge capacitor coupled between the first output terminal and the load resistor.

[0007] The first reference voltage node can be a supply voltage node.

[0008] The first amplifier stage may include a transconductance amplifier.

[0009] The first amplifier stage may include a common-emitter amplifier, the common-emitter amplifier including a first bipolar junction transistor (BJT) having: a first base coupled to the first input terminal of the first amplifier stage; a first emitter coupled to a second reference voltage node; and a first collector coupled to the first output terminal of the first amplifier stage.

[0010] The first amplifier stage may include a common-emitter, common-base, common-emitter amplifier. The common-emitter, common-base, common-emitter amplifier may include: a common-emitter BJT having a first base coupled to the first input terminal, a first emitter coupled to a second reference voltage, and a first collector; and a common-emitter, common-base BJT having a second base coupled to a common-emitter, common-base bias voltage node, a second emitter coupled to the first collector, and a second collector coupled to the first output terminal.

[0011] The first amplifier stage may include: a first BJT having a third base coupled to the first input terminal, a third collector coupled to the first output terminal, and a third emitter; a second BJT having a fourth base coupled to a second reference voltage node, a fourth collector coupled to a third reference voltage node, and a fourth emitter; and a current source having the third emitter and the fourth emitter coupled to the current source.

[0012] The second amplifier stage preferably has a voltage gain of approximately 1.

[0013] The second amplifier stage may include an emitter follower amplifier, the emitter follower amplifier including a second BJT having a second base coupled to the first output terminal of the first amplifier stage, a second collector coupled to the fourth reference voltage node, and a second emitter coupled to the feedback resistor.

[0014] The first amplifier stage may include a common-source amplifier. The common-source amplifier may include a first CMOS device having: a first gate coupled to the first input terminal of the first amplifier stage, a first source coupled to a second reference voltage node, and a first drain coupled to the first output terminal of the first amplifier stage.

[0015] The second amplifier stage may include a source follower amplifier. The source follower amplifier may include a second CMOS device having: a second gate coupled to the first output terminal of the first amplifier stage, a second source coupled to the feedback resistor, and a second drain coupled to a second reference voltage node.

[0016] The TIA may include a third amplifier stage coupled to the output node. The third amplifier stage may include a limiting amplifier or a variable gain amplifier (VGA).

[0017] The TIA may also include a second transconductance amplifier coupled to the input node and configured to generate the input current.

[0018] According to another aspect of this disclosure, an optical receiver is provided, comprising: a photodiode for generating the input current; and the TIA described above. The photodiode is preferably reverse-biased.

[0019] According to another aspect of this disclosure, an electronic device is provided, the electronic device comprising the TIA described above.

[0020] The electronic device may be one of an optical receiver, a Geiger-Müller tube, a photomultiplier tube, or an accelerometer.

[0021] Throughout this specification, the term “comprise” or variations thereof (such as “comprises” or “comprising”) shall be understood to imply inclusion of the stated element, integer or step, or group of elements, integers or steps, but not to exclude any other element, integer or step, or group of elements, integers or steps. Attached Figure Description

[0022] Embodiments of this disclosure will now be described by way of non-limiting examples with reference to the drawings, in which:

[0023] Figure 1 This is a schematic diagram of a known optical receiver;

[0024] Figure 2 Show Figure 1 Exemplary implementation of an optical receiver;

[0025] Figure 3 This is a schematic diagram of an optical receiver according to an embodiment of the present disclosure;

[0026] Figure 4 Diagram Explanation Figure 3 The equivalent circuit of the T coil shown;

[0027] Figure 5 It is shown Figure 2 and Figure 3 A graph showing the frequency response of the receiver's amplifier;

[0028] Figure 6 It is shown Figure 2 and Figure 3 A graph of the input reference noise of the receiver's amplifier;

[0029] Figures 7 to 9 Show Figure 3 The circuit diagram of the receiver's bipolar junction transistor implementation shown; and

[0030] Figure 10 Show Figure 3 The circuit diagram shown is a CMOS implementation diagram of the receiver. Detailed Implementation

[0031] Figure 1 This is a schematic diagram of an optical receiver 100, which includes a known shunt-feedback transimpedance amplifier TIA 101 and a photodiode 106. TIA 101 includes a gain of -A F The inverting amplifier 102 (which may be interchangeably referred to herein as the feedback amplifier) ​​and the resistor R F The feedback resistor 104 is coupled between the input and output terminals of the inverting amplifier 102. The TIA 101 has an inherent input capacitance C. I When arranged in an optical receiver, the input of TIA 101 is coupled to the anode of photodiode 106. The cathode of photodiode 106 is connected to the supply voltage Vdd. As explained in more detail below, TIA 101 can be used to convert any current into voltage, and is not limited to converting the current generated by photodiode 106.

[0032] Photodiode 106 has an inherent parasitic capacitance C PD The current I passing through photodiode 106 PD The current I is proportional to the amplitude of the light incident on the photodiode 106. PD The current flows into TIA 101, which then generates an output voltage Vout at its output terminal.

[0033] The contribution of feedback resistor 104 to the input reference noise IRN of TIA 101 can be estimated by the following equation.

[0034]

[0035] Therefore, the value R of the feedback resistor 104 can be increased. F To reduce or minimize the IRN of TIA 101. However, given a feedback gain A F In this case, increase the value R of feedback resistor 104. F This can also lead to an undesirable reduction in the bandwidth of the TIA 101, as explained below.

[0036] The parasitic capacitance C of photodiode 106 PD and the input capacitor C of TIA 101 I The bandwidth of TIA 101 is limited. Assuming the inverting amplifier 102 has a flat frequency response, the input current I can be estimated using the following equation. PD The frequency-dependent transfer function between the output voltage Vout and the frequency-dependent transfer function.

[0037]

[0038] in

[0039]

[0040]

[0041] C T =C I +C PD

[0042] As can be seen from the above, given the feedback resistor R F Parasitic capacitance C PD and input capacitor C I In this case, the open-loop feedback gain A associated with the inverting amplifier 102 can be increased. F To increase the bandwidth ω of TIA 101 p .

[0043] In practice, the inverting amplifier 102 will have a limited bandwidth, where the gain A is limited given the process technology. F With bandwidth ω pThe product is approximately constant. This results in a corresponding limitation on the total bandwidth of the TIA 101. Assuming the inverting amplifier 102 has a single dominant pole, this gives the TIA 101 a second-order frequency response. If the dominant pole frequency of amplifier 102 is too low, the closed-loop response of the TIA 101 will be underdamped, and the impulse response will exhibit ringing, leading to inter-symbol interference. This indicates the need to maintain... The Q factor (i.e., the Butterworth response), the bandwidth ω of amplifier 102 A The following equations should be satisfied.

[0044]

[0045] This results in a total -3dB bandwidth:

[0046]

[0047] Therefore, in order to increase the feedback resistance R of TIA 101 F While maintaining the high total bandwidth of the TIA 101 (to reduce IRN), it is desirable to increase the product of the feedback amplifier gain and bandwidth (A). F ·ω A ).

[0048] Figure 2 Showing includes Figure 1 The system 200 is a known exemplary embodiment of the optical receiver 100 shown, wherein similar parts have been given similar designations. The system includes an optical receiver 100 that provides its output Vout to a next amplifier stage 202.

[0049] The inverting amplifier 102 includes: a first amplifier stage 204, which includes a transconductance amplifier; and a second amplifier stage 206, which includes a buffer. The output of the first amplifier stage 204 is coupled to the second amplifier stage 206 at an output voltage node 208. The first amplifier stage 204 generates a current through a load resistor R coupled between the output voltage node 208 and a reference voltage (in this case, ground). L It is converted back to the output voltage Vout at output voltage node 208. This produces the amplifier gain A. F =-GmR L The second amplifier stage 206 is configured to drive a feedback resistor R with low output impedance. FThe second amplifier stage 206 preferably has a gain of about 1. However, in practice, the second amplifier stage 206 may have a gain slightly less than 1 (e.g., 0.8 or 0.9). The input of the next amplifier stage 202 is coupled to the output voltage node 208 such that the next amplifier stage 202 is driven by the output voltage Vout.

[0050] The next amplifier stage 202 has a parasitic input capacitance C N The parasitic input capacitance is Figure 2 This is represented as coupling between the input of the next amplifier stage 202 and the reference voltage (in this case, ground). Similarly, the capacitor C associated with the input of the transconductance amplifier and the second amplifier stage... L This is represented as coupling between the input of the second amplifier stage 206 and the reference voltage (in this case, ground).

[0051] The bandwidth ω of the inverting amplifier 102 A The input capacitance C of the next amplifier stage 202 N and the capacitor C associated with the inverting amplifier 102 L The combination of restrictions can be determined based on the following equation.

[0052]

[0053] For any given process technology, these capacitors C N C L It has an achievable lower limit. And although the load resistance R is reduced... L This will make the bandwidth ω A Increase, but the gain Gm of the first amplifier stage 204 needs to be increased to achieve the given target A. F This will in turn increase the power consumption of amplifier 102 and increase the input capacitance C of the first amplifier stage 204. I A higher gain Gm often requires the first amplifier stage 204 to have larger components to accommodate the increased current, which in turn increases cost and circuit area.

[0054] The embodiments of this disclosure aim to eliminate or at least reduce the input capacitance C of the next gain stage 202. N The effect on the inverting amplifier 102 is used to address or at least mitigate one or more of the aforementioned problems. In this way, the gain-bandwidth product (ω) of the inverting amplifier 102 can be extended. A A F This makes it possible to achieve a given feedback resistance R. F This allows for expansion of the total bandwidth of the TIA 101. Conversely, it allows for expansion of the bandwidth ω for a given bandwidth. A Use a larger feedback resistor R FThis will in turn reduce the IRN of TIA 101.

[0055] Figure 3 The schematic diagram illustrates an optical receiver 300 designed to achieve this effect according to an embodiment of the present disclosure. The optical receiver 300 and... Figure 2 Similar parts of the optical receiver 200 have been assigned similar designations. Therefore, with Figure 2 Similar to the optical receiver 200 shown, the optical receiver 300 includes a photodiode 106, a TIA 101 (including a first amplifier stage 204 and a second amplifier stage 206), and a next gain stage 202.

[0056] and Figure 2 Compared to the optical receiver 200, Figure 3 The optical receiver 300 shown includes an output stage 302 coupled between the output voltage node 208 of the TIA 101 and the input node 304 of the next gain stage 202.

[0057] Output stage 302 includes a T-coil 306 and a load resistor 308, the load resistor 308 having a resistance R. L T-coil 306 includes a first inductor 310 and a second inductor 312, which are coupled in series between the first inductor node I1 and the second inductor node I2. The first inductor 310 and the second inductor 312 are coupled to each other at a third inductor node I3, which is itself coupled to the input node 304 of the next gain stage 202. The first inductor node I1 is coupled to the voltage output node 208 of the feedback amplifier 102. A load resistor 308 is coupled between the second inductor node I2 and a reference voltage Vref, which in some embodiments is a supply voltage.

[0058] In the embodiments described herein, T-coil 306 is a bridged T-coil. Therefore, T-coil 306 also includes a bridging capacitor coupled between the first inductor node I1 and the second inductor node I2 and thus arranged in parallel with the series-coupled inductors 310 and 312. Bridge capacitor C B Ensure that the input impedance of the T-coil is constant and resistive over a large frequency range. However, it will be understood that in other implementations, the bridging capacitor C can be omitted. B Although this arrangement is not very efficient, it does not have a bridging capacitor C. B The T coil will still be able to improve the bandwidth of the TIA 101.

[0059] In the embodiments described herein, the inductors 310 and 312 of the T-coil have the same inductance L. However, it will be understood that in other embodiments, the inductors 310 and 312 may have different inductance values.

[0060] Figure 4 The equivalent circuit 400 of output stage 302 is shown. The T-coil is well-known in this art, therefore its operating theory will not be elaborated here. However, in general, each of the inductors 310 and 312 of the T-coil 306 has an inductance L (therefore the differential inductance of the T-coil is 2L) and the inductors 310 and 312 share a mutual inductance M. The inductance L of each coil, the mutual inductance M, and the bridging capacitor C... B The value of can be chosen such that the impedance measured at the first inductor node I1 is a constant resistance over a large frequency range. To achieve this condition, it can be shown that the following equation needs to be satisfied.

[0061]

[0062]

[0063] Where θ is the pole angle of the T coil, which is equal to 30 degrees under the maximally flat envelope delay.

[0064]

[0065] Therefore, by arranging the T-coil 306 between the impedance at the input node 304 of the next amplifier stage 202 and the voltage output node 208 of the inverting amplifier 102, the parasitic capacitance C of the next amplifier stage 202 is... N The first amplifier stage 204 can be concealed. The impedance at the voltage output node 208, as seen from TIA 101, is constant and resistive.

[0066] Eliminating the parasitic capacitance C of the next amplifier stage 202 N Under the influence of the following equation, the bandwidth ω of the feedback amplifier 102 can be determined. A .

[0067]

[0068] Therefore, with the total capacitance decreasing, the bandwidth ω of the feedback amplifier 102... A Given a feedback resistor R F This allows for expansion under certain conditions. Similarly, given a bandwidth ω... A In this case, the load resistance R can be increased. L This will in turn cause the feedback gain A to...F It gets bigger.

[0069] Figure 5 This bandwidth expansion is illustrated graphically. Specifically, Figure 5 This diagram illustrates exemplary frequency responses with and without the presence of the T-coil 306 between the voltage output node 208 and the input node 304 of the next amplifier stage 202. Each receiver 200, 300 has the following component values, C T It is the total input capacitance (C) I +C PD ).

[0070] <![CDATA[R F ]]> 300Ω <![CDATA[R L ]]> 50Ω <![CDATA[C T ]]> 200fF <![CDATA[C L ]]> 30fF <![CDATA[C N ]]> 60fF T coil polar angle 30°

[0071] Curve 502 shows the voltage observed at node 208. Figure 2 The frequency response of the prior art receiver 200 (without T-coil 306) is shown. Curve 504 plots the frequency response observed at voltage output node 208 with T-coil 306. Figure 3 The frequency response of receiver 300 is shown. Curve 506 illustrates the frequency response observed at input node 304 of the next gain stage 202. Figure 3 The frequency response of receiver 300 shown.

[0072] It can be seen that, without the T-coil 306, the large parasitic capacitance C of the next amplifier stage 202, which houses the feedback amplifier 102, is significant. N This resulted in a 2dB frequency response peak followed by a sharp drop above this peak. Compared to the frequency response of receiver 200, an additional [amount] was added at the output of the first amplifier stage 204. Figure 3 The T-coil 306 shown will flatten and broaden the frequency response.

[0073] It will be understood that adding T-coil 306 introduces an additional second-order filter between voltage output node 208 and input node 304 of the next amplifier stage 202. However, the inventors have found that the cutoff frequency of this filter is high enough that it does not significantly affect the overall frequency response of receiver 300. Figure 5 The answer is obvious.

[0074] In addition to the above, the increased gain-bandwidth product of the feedback amplifier 102, resulting from coupling the T coil 306 to the output of the first amplifier stage 204 of the feedback amplifier 102 (specifically), allows for the use of a larger feedback resistor R given the total bandwidth of the TIA 101. F This makes it compatible with existing technology amplifiers (such as...) Figure 2 Compared to receiver 200 shown, the IRN of TIA 101 is significantly reduced.

[0075] To illustrate the difference in IRN between receivers 200 and 300 with and without T coil 306, receiver 200 was simulated, and the IRN of receiver 200 was selected. F and R L The value of , which makes the frequency response consistent with Figure 3 The frequency response of the receiver 300 is roughly matched.

[0076] Figure 6 The closely matched frequency responses 602 and 604 of receivers 200 and 300 are illustrated in graphical form, with the following component values.

[0077] <![CDATA[R F ]]> 110Ω 300Ω <![CDATA[R L ]]> 21Ω 50Ω <![CDATA[C T ]]> 200fF 200fF <![CDATA[C L ]]> 30fF 30fF <![CDATA[C N ]]> 60fF 60fF T coil polar angle 30° 30°

[0078] Using the above component values, combined with a bandwidth up to 67 GHz (-3 dB bandwidth), the IRN of receiver 200 is 2.04 μArms with T-coil 306 and 3.13 μArms without T-coil. This diagram illustrates the difference in IRN between receiver 200 (without T-coil) and the feedback resistor R from receiver 300 (with T-coil 306). F The contribution of IRN decreased significantly (approximately 35%).

[0079] Now refer to Figures 7 to 10 Various implementations of the receiver 300 are described. In each example, the photodiode 106, output stage 302, and next amplifier stage 202 are... Figure 3 The ones shown are essentially the same, and therefore have been labeled with similar reference numbers.

[0080] First refer to Figure 7The receiver 700 includes a TIA 702 implemented using a bipolar junction transistor (BJT). The TIA 702 includes a first BJT 704, a second BJT 706, and a feedback resistor 708. The first BJT 704 is arranged as a common-emitter amplifier, with its base coupled to the input node 705 of the TIA 702 (and thus to the anode of the photodiode 106), its emitter coupled to a reference voltage (in this case, ground), and its collector coupled to the voltage output node 710 of the TIA 702. Therefore, the first BJT 704 functions as a transconductance amplifier. The voltage output node 710 of the TIA 702 is coupled to the first inductor node I1 of the T-coil 306. The second BJT 706 is arranged as an emitter follower amplifier, with its base coupled to the voltage output node 710 and its emitter coupled to each of the feedback resistor 708 and the current source 712, the current source 712 itself being coupled to a reference voltage (in this case, ground). The collector of the second BJT 706 is coupled to the reference voltage (such as a bias voltage or supply voltage). The feedback resistor 708 is coupled between the emitter of the second BJT 706 and the base of the first BJT 704.

[0081] Figure 8 Receiver 800 is shown. Receiver 800 is... Figure 7 A variation of receiver 700 is shown where the first BJT 704 has been replaced by a common-emitter common-base common-emitter amplifier 802 comprising a common-emitter BJT 804 and a common-emitter common-base (cascode) BJT 806. The common-emitter BJT 804 has a base coupled to input node 705, an emitter coupled to a reference voltage (in this case, ground), and a collector coupled to the emitter of the common-emitter common-base BJT 806. The common-emitter common-base BJT 806 has a base coupled to a common-emitter common-base bias voltage Vcasc and a collector coupled to the voltage output node 710 and the base of the second BJT 706. Therefore, BJTs 804 and 806 serve as common-emitter common-base common-emitter amplifiers known in this art.

[0082] Figure 9 Receiver 900 is shown. Receiver 900 is... Figure 7Another variation of the receiver 700 shown involves replacing the first BJT 704 with an added raised front-end arrangement 902, which includes a first BJT 904 and a second BJT 906 arranged as a differential pair or a long-tailed pair. The first BJT 904 has a base coupled to the input node 705 and a collector coupled to the voltage output node 710. The second BJT 906 has a base connected to a first reference voltage Vref1 and a collector coupled to a second reference voltage Vref2. In the illustrated embodiment, the second reference voltage Vref2 is greater than the first reference voltage Vref1. The first reference voltage Vref1 can be selected to be approximately equal to the average input voltage Vin received at the input node 705.

[0083] The emitters of the first BJT 904 and the second BJT 906 are coupled to a common current source 908, which itself is coupled to another reference voltage (in this case, ground). Therefore, a front-end arrangement 902 is added to act as a transconductance amplifier.

[0084] refer to Figures 7 to 9 Any of the bipolar implementations shown and described may be implemented in other implementations using the corresponding CMOS (complementary metal-oxide-semiconductor) technology.

[0085] Figure 10 A receiver 1000 with an exemplary CMOS implementation is provided, the receiver 1000 with... Figure 7The receiver 700 shown is an equivalent CMOS. Receiver 1000 includes a TIA 1002 implemented using an NMOS (N-type metal-oxide-semiconductor) transistor. It will be understood that in other embodiments, the TIA 1002 can also be implemented using a PMOS (P-type metal-oxide-semiconductor) device. The TIA 1002 includes a first MOSFET (metal-oxide-semiconductor field-effect transistor) 1004, a second MOSFET 1006, and a feedback resistor 1008. The first MOSFET 1004 is arranged as a common-source amplifier, wherein its gate is coupled to the input node 1005 of the TIA 1002 (and thus to the anode of the photodiode 106), its source is coupled to a reference voltage (in this case, ground), and its drain is coupled to the voltage output node 1010 of the TIA 1002. The voltage output node 1010 of the TIA 1002 is coupled to the first inductor node I1 of the T-coil 306. Thus, the first MOSFET 1004 functions as a transconductance amplifier. The second MOSFET 1006 is arranged as a source follower amplifier, with its gate coupled to the voltage output node 1010 and its source coupled to a feedback resistor 1008 and a current source 1012, which itself is coupled to a reference voltage (in this case, ground). The drain of the second MOSFET 1006 is coupled to a reference voltage, such as a bias voltage or a supply voltage. The feedback resistor 1008 is coupled between the source of the second MOSFET 1006 and the gate of the first MOSFET 1004.

[0086] It will be understood that CMOS devices can also be used (e.g., by replacing each BJT with a CMOS transistor) to redesign Figure 8 and Figure 9 The implementation scheme shown is illustrated.

[0087] While embodiments of this disclosure are described as converting current generated by a photodiode, this disclosure is not limited thereto. The TIAs described herein can be used to convert any input current generated by any conceivable device. By non-limiting example, the TIAs described herein can be used to convert input current output from Geiger-Muller tubes, photomultiplier tubes, accelerometers, and any other type of sensor that generates input current. Those skilled in the art will appreciate that TIAs are particularly useful for converting signals from sensors whose current response is more linear than their voltage response. Additionally, the TIAs described herein can be configured in combination with a transconductance amplifier to convert input voltage (rather than input current). For example, an input voltage can be provided to a transconductance amplifier, which can then output a current to be used as input to one or more of the TIAs described herein.

[0088] The implementation scheme can be implemented in a host device such as an optical module, which itself may be located in a server or other computing device.

[0089] It should be noted that the above embodiments are illustrative of the invention and not limiting, and those skilled in the art will be able to devise numerous alternative embodiments without departing from the scope of the appended claims. The word "comprising" does not exclude the presence of elements or steps other than those listed in the claims, "a" does not exclude a plurality, and a single feature or other element may perform the function of several elements recited in the claims. Any reference numbers or labels in the claims should not be construed as limiting the scope of the claims.

Claims

1. A transimpedance amplifier (TIA) for converting an input current at an input node into an output voltage at an output node, the TIA comprising: A first amplifier stage, the first amplifier stage having a first input terminal coupled to the input node and having a first output terminal; A feedback path, wherein the feedback path is located between the first output terminal and the first input terminal; A second amplifier stage, in the feedback path, has a second input terminal coupled to the first output terminal of the first amplifier stage; A feedback resistor, which is coupled in the feedback path between the output of the second amplifier stage and the first input of the first amplifier stage; as well as Output stage, the output stage including: A load resistor is coupled between a first reference voltage node and a T-coil, the T-coil comprising a first inductor and a second inductor coupled in series at an inductor node, the T-coil being coupled between the first output terminal and the load resistor, and the inductor node being coupled to the output node of the TIA.

2. The TIA of claim 1, wherein the T coil is a bridged T coil, and wherein the T coil further comprises a bridge capacitor coupled between the first output terminal and the load resistor.

3. The TIA as claimed in claim 1, wherein the first reference voltage node is a supply voltage node, and the second reference voltage node is coupled to ground.

4. The TIA of claim 1, wherein the first amplifier stage comprises a transconductance amplifier.

5. The TIA as claimed in any of the preceding claims, wherein the first amplifier stage comprises a common-emitter amplifier, the common-emitter amplifier comprising: A first bipolar junction transistor (BJT), the first BJT having: The first base is coupled to the first input terminal of the first amplifier stage; The first emitter is coupled to the second reference voltage node; as well as The first collector is coupled to the first output terminal of the first amplifier stage.

6. The TIA as claimed in any one of claims 1 to 4, wherein the first amplifier stage comprises a common-emitter, common-base, common-emitter amplifier.

7. The TIA of claim 6, wherein the common-emitter, common-base, common-emitter amplifier comprises: A common-emitter BJT, wherein the common-emitter BJT has a first base coupled to the first input terminal, a first emitter coupled to the second reference voltage node, and a first collector; A common-emitter common-base BJT has a second base coupled to a common-emitter common-base bias voltage node, a second emitter coupled to the first collector, and a second collector coupled to the first output terminal.

8. The TIA as claimed in any one of claims 1 to 4, wherein the first amplifier stage comprises: A first BJT has a third base coupled to the first input terminal, a third collector coupled to the first output terminal, and a third emitter. The second BJT has a fourth base coupled to a third reference voltage node, a fourth collector coupled to a fourth reference voltage node, and a fourth emitter. as well as A current source, wherein the third emitter and the fourth emitter are coupled to the current source.

9. The TIA as claimed in any one of claims 1 to 4, wherein the second amplifier stage has a voltage gain of approximately 1.

10. The TIA of any one of claims 1 to 4, wherein the second amplifier stage comprises an emitter follower amplifier, the emitter follower amplifier comprising: The second BJT has: The second base is coupled to the first output terminal of the first amplifier stage; The second collector electrode is coupled to the fifth reference voltage node; as well as The second emitter is coupled to the feedback resistor.

11. The TIA as claimed in any one of claims 1 to 4, wherein the first amplifier stage comprises a common-source amplifier.

12. The TIA of claim 11, wherein the common-source amplifier includes a first CMOS device, the first CMOS device having: A first gate, the first gate being coupled to the first input terminal of the first amplifier stage; The first source is coupled to the second reference voltage node; as well as The first drain is coupled to the first output terminal of the first amplifier stage.

13. The TIA of any one of claims 1 to 4, wherein the second amplifier stage comprises a source follower amplifier.

14. The TIA of claim 13, wherein the source follower amplifier includes a second CMOS device, the second CMOS device having: The second gate is coupled to the first output terminal of the first amplifier stage; The second source is coupled to the feedback resistor; as well as The second drain is coupled to the second reference voltage node.

15. The TIA of any one of claims 1 to 4, wherein the TIA further comprises a third amplifier stage coupled to the output node.

16. The TIA of claim 15, wherein the third amplifier stage is a limiting amplifier or a variable gain amplifier (VGA).

17. The TIA of any one of claims 1 to 4, wherein the TIA further comprises a second transconductance amplifier coupled to the input node and configured to generate the input current.

18. An optical receiver, the optical receiver comprising: A photodiode, which is used to generate an input current; as well as The TIA as described in any one of claims 1 to 17.

19. The optical receiver of claim 18, wherein the photodiode is reverse biased.

20. An electronic device comprising a TIA as claimed in any one of claims 1 to 17.

21. The electronic device of claim 20, wherein the electronic device is one of an optical receiver, a Geiger-Müller tube, a photomultiplier tube, or an accelerometer.

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