Chip resistor and method of manufacturing the same

Abstract

A chip resistor (1) has a resistor body (10), a first conductive base layer (17), a second conductive base layer (18), a first electrode (20), and a second electrode (25). The first electrode (20) includes a first electrode layer (21). The second electrode (25) includes a second electrode layer (26). A first resistivity of the first conductive base layer (17) is greater than a second resistivity of the first electrode layer (21) and greater than a third resistivity of the resistor body (10). A fourth resistivity of the second conductive base layer (18) is greater than a fifth resistivity of the second electrode layer (26) and greater than the third resistivity of the resistor body (10).

Description

Technical Field

[0001] This invention relates to chip resistors and their manufacturing methods. Background Technology

[0002] Japanese Patent Application Publication No. 2018-4267 (Patent Document 1) discloses a shunt resistor having a resistive element, a first electrode, and a second electrode. The first electrode covers one end of the resistive element. The second electrode covers the other end of the resistive element, opposite to one end of the resistive element. The first electrode and the second electrode are spaced apart from each other.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent document 1: Japanese Patent Application Publication No. 2018-4267. Summary of the Invention

[0006] The problem the invention aims to solve

[0007] The resistance value of the shunt resistor described in Patent Document 1 is determined by the resistivity of the resistive element, the cross-sectional area of ​​the resistive element, and the spacing between the first and second electrodes. When the areas of the first and second electrodes are increased to improve the heat dissipation of the shunt resistor described in Patent Document 1, the spacing between the first and second electrodes decreases, thereby changing the resistance value of the shunt resistor from its designed value. The present invention has been made in view of the above-mentioned problems, and its object is to provide a chip resistor capable of improving heat dissipation independently of its resistance value.

[0008] Technical means for solving problems

[0009] The chip resistor of the present invention comprises a resistive body, a first conductive substrate layer, a second conductive substrate layer, a first electrode, and a second electrode. The resistive body includes a first main surface, a second main surface opposite to the first main surface, a first side surface connected to the first and second main surfaces, and a second side surface opposite to the first side surface. The second side surface is connected to the first and second main surfaces. The first conductive substrate layer is disposed on the first main surface of the resistive body. The second conductive substrate layer is disposed on the first main surface of the resistive body and spaced apart from the first conductive substrate layer. The first electrode is disposed on the first side surface of the resistive body and spaced apart from the second conductive substrate layer. The second electrode is disposed on the second side surface of the resistive body and spaced apart from the first conductive substrate layer and the first electrode. The first electrode comprises a first electrode layer disposed on the first main surface of the resistive body and on the first conductive substrate layer. The second electrode comprises a second electrode layer disposed on the first main surface of the resistive body and on the second conductive substrate layer. The first resistivity of the first conductive substrate layer is greater than the second resistivity of the first electrode layer and greater than the third resistivity of the resistive body. The fourth resistivity of the second conductive substrate layer is greater than the fifth resistivity of the second electrode layer and greater than the third resistivity of the resistive body.

[0010] The present invention discloses a method for manufacturing a chip resistor, comprising: forming a first conductive substrate layer and a second conductive substrate layer spaced apart from the first conductive substrate layer on a first main surface of a strip-shaped resistive body; forming a first conductive film on the first conductive substrate layer, the second conductive substrate layer, and portions of the first main surface exposed from the first and second conductive substrate layers; and dividing the strip-shaped resistive body to form a resistive body including a first side surface and a second side surface. By dividing the strip-shaped resistive body, the first conductive film is divided into a first electrode layer near the first side surface and a second electrode layer near the second side surface and spaced apart from the first electrode layer. The first resistivity of the first conductive substrate layer is greater than the second resistivity of the first electrode layer and greater than the third resistivity of the resistive body. The fourth resistivity of the second conductive substrate layer is greater than the fifth resistivity of the second electrode layer and greater than the third resistivity of the resistive body.

[0011] Invention Effects

[0012] The surface mount resistor according to the present invention can improve its heat dissipation independently of its resistance value. The manufacturing method of the surface mount resistor according to the present invention can obtain a surface mount resistor whose heat dissipation is improved independently of its resistance value. Attached Figure Description

[0013] Figure 1 This is a schematic bottom view showing the chip resistor of Embodiment 1.

[0014] Figure 2The chip resistor in embodiment 1 is in Figure 1 A schematic sectional view of section line II-II shown.

[0015] Figure 3 This is a schematic cross-sectional view of the chip resistor of Embodiment 1 mounted on a circuit board.

[0016] Figure 4 This is a schematic top view showing one step of the manufacturing method of the chip resistor according to Embodiments 1 to 4.

[0017] Figure 5 This refers to the manufacturing method of the chip resistor in Embodiments 1 to 3. Figure 4 A rough bottom view of the next step after the shown process.

[0018] Figure 6 This refers to the manufacturing methods of chip resistors from Embodiment 1 to Embodiment 3. Figure 4 The schematic top view of the next step in the process shown is an illustration of the manufacturing method of the chip resistor in Embodiment 4. Figure 28 A schematic top view of the next process after the process shown.

[0019] Figure 7 This refers to the manufacturing method of the chip resistor in Embodiments 1 to 3. Figure 5 and Figure 6 A rough bottom view of the next step after the shown process.

[0020] Figure 8 This refers to the manufacturing method of the chip resistor in Embodiment 1. Figure 7 The schematic bottom view of the next step in the process shown is an illustration of the manufacturing method of the chip resistor in Embodiment 2. Figure 17 The schematic bottom view of the next step in the process shown is an illustration of the manufacturing method of the chip resistor in Embodiment 3. Figure 24 A rough bottom view of the next step after the shown process.

[0021] Figure 9 This refers to the manufacturing method of the chip resistor in Embodiment 1. Figure 7 The schematic top view of the next step in the process shown is an illustration of the manufacturing method of the chip resistor in Embodiment 4. Figure 6 and Figure 29 A rough bottom view of the next step after the shown process.

[0022] Figure 10 This refers to the manufacturing method of the chip resistor in Embodiment 1. Figure 8 and Figure 9The schematic bottom view of the next process shown is from the chip resistor manufacturing method of Embodiment 2. Figure 8 and Figure 18 The schematic bottom view of the next step in the process shown is from the manufacturing method of the chip resistor in Embodiment 3. Figure 8 and Figure 25 A rough bottom view of the next step after the shown process.

[0023] Figure 11 This refers to the manufacturing method of the chip resistor in Embodiment 1. Figure 8 and Figure 9 The schematic top view of the next step in the process shown is an illustration of the manufacturing method of the chip resistor in Embodiment 4. Figure 9 and Figure 30 A rough bottom view of the next step after the shown process.

[0024] Figure 12 This refers to the manufacturing method of the chip resistor in Embodiment 1. Figure 10 and Figure 11 The schematic bottom view of the next step in the process shown is an illustration of the manufacturing method of the chip resistor in Embodiments 2 and 3. Figure 10 and Figure 19 A rough bottom view of the next step after the shown process.

[0025] Figure 13 This refers to the manufacturing method of the chip resistor in Embodiment 1. Figure 10 and Figure 11 The schematic top view of the next step in the process shown is an illustration of the manufacturing method of the chip resistor in Embodiment 4. Figure 11 and Figure 31 A rough bottom view of the next step after the shown process.

[0026] Figure 14 This is a schematic top view of the chip resistor in Embodiment 2.

[0027] Figure 15 The chip resistor in embodiment 2 is in Figure 14 A schematic cross-sectional view showing the section line XV-XV.

[0028] Figure 16 This refers to the manufacturing method of the chip resistor in Embodiment 2. Figure 5 and Figure 6 A schematic top view of the next process after the process shown.

[0029] Figure 17 This refers to the manufacturing method of the chip resistor in Embodiment 2. Figure 7 and Figure 16A schematic top view of the next process after the process shown.

[0030] Figure 18 This refers to the manufacturing method of the chip resistor in Embodiment 2. Figure 17 A schematic top view of the next process after the process shown.

[0031] Figure 19 This refers to the manufacturing method of the chip resistor in Embodiment 2. Figure 8 and Figure 18 The schematic top view of the next step in the process shown is an illustration of the manufacturing method of the chip resistor in Embodiment 3. Figure 8 and Figure 25 A schematic top view of the next process after the process shown.

[0032] Figure 20 This refers to the manufacturing methods of the chip resistors in Embodiments 2 and 3. Figure 10 and Figure 19 A schematic top view of the next process after the process shown.

[0033] Figure 21 This is a schematic top view showing the chip resistor of embodiment 3.

[0034] Figure 22 The chip resistor in embodiment 3 is in Figure 21 The schematic cross-sectional view of section lines XXII-XXII shown.

[0035] Figure 23 This refers to the manufacturing method of the chip resistor in Embodiment 3. Figure 5 and Figure 6 A schematic top view of the next process after the process shown.

[0036] Figure 24 This refers to the manufacturing method of the chip resistor in Embodiment 3. Figure 7 and Figure 23 A schematic top view of the next process after the process shown.

[0037] Figure 25 This refers to the manufacturing method of the chip resistor in Embodiment 3. Figure 24 A schematic top view of the next process after the process shown.

[0038] Figure 26 This is a schematic top view of the chip resistor in embodiment 4.

[0039] Figure 27 This refers to the chip resistor in embodiment 4. Figure 26 The schematic sectional view of section lines XXVII-XXVII shown.

[0040] Figure 28 This refers to the manufacturing method of the chip resistor in embodiment 4. Figure 4 A schematic top view of the next process after the process shown.

[0041] Figure 29 This refers to the manufacturing method of the chip resistor in embodiment 4. Figure 28 A rough bottom view of the next step after the shown process.

[0042] Figure 30 This refers to the manufacturing method of the chip resistor in embodiment 4. Figure 6 and Figure 29 A rough bottom view of the next step after the shown process.

[0043] Figure 31 This refers to the manufacturing method of the chip resistor in embodiment 4. Figure 9 and Figure 30 A rough bottom view of the next step after the shown process.

[0044] Figure 32 This refers to the manufacturing method of the chip resistor in embodiment 4. Figure 11 and Figure 31 A rough bottom view of the next step after the shown process. Detailed Implementation

[0045] The following describes the embodiments. Furthermore, the same reference numerals are used to label the same structures, and repeated descriptions are omitted.

[0046] (Implementation Method 1)

[0047] Reference Figure 1 and Figure 2 The chip resistor 1 of embodiment 1 is described below. The chip resistor 1 is, for example, a chip resistor suitable for current sensing. The chip resistor 1 is, for example, a shunt resistor. The chip resistor 1 has a resistive element 10, a first conductive substrate layer 17, a second conductive substrate layer 18, a first electrode 20, and a second electrode 25. The chip resistor 1 may also further have a first insulating layer 15, a second insulating layer 16, and an insulating cover film 30.

[0048] The resistor 10 is formed of a resistive material such as a Cu-Mn alloy, Cu-Ni alloy, or Ni-Cr alloy. The resistor 10 includes a first main surface 11, a second main surface 12 opposite to the first main surface 11, a first side surface 13a, a second side surface 13b opposite to the first side surface 13a, a third side surface 14a, and a fourth side surface 14b opposite to the third side surface 14a. The first main surface 11 and the second main surface 12 extend along a first direction (x-direction) and a second direction (y-direction) perpendicular to the first direction (x-direction), respectively. The first direction (x-direction) is, for example, the direction of the long side of the resistor 10. The second direction (y-direction) is, for example, the direction of the short side of the resistor 10. The first main surface 11 and the second main surface 12 are spaced apart from each other in a third direction (z-direction) perpendicular to the first direction (x-direction) and the second direction (y-direction). The third direction (z-direction) is the thickness direction of the resistor 10. The chip resistor 1 is mounted to a circuit board 50 (see reference). Figure 3 When the resistor 10 is in operation, its first main surface 11 faces the circuit board 50.

[0049] The first side surface 13a is connected to the first main surface 11 and the second main surface 12. The second side surface 13b is connected to the first main surface 11 and the second main surface 12. The first side surface 13a and the second side surface 13b are spaced apart from each other in the first direction (x direction). The third side surface 14a is connected to the first main surface 11 and the second main surface 12, and is also connected to the first side surface 13a and the second side surface 13b. The fourth side surface 14b is connected to the first main surface 11 and the second main surface 12, and is also connected to the first side surface 13a and the second side surface 13b. The third side surface 14a and the fourth side surface 14b are spaced apart from each other in the second direction (y direction). The resistor 10 includes a central portion 10m that is exposed from the first electrode 20 and the second electrode 25 when viewed from above the first main surface 11. The central portion 10m is disposed between the first electrode 20 and the second electrode 25 in the first direction (x direction).

[0050] A first insulating layer 15 is disposed on the first main surface 11 of the resistor 10. The first insulating layer 15 is disposed between the first electrode 20 and the second electrode 25, spaced apart from each other. The first insulating layer 15 is disposed between the first electrode layer 21 and the second electrode layer 26, spaced apart from each other. The first insulating layer 15 is disposed between the first conductive substrate layer 17 and the second conductive substrate layer 18, spaced apart from each other. The first insulating layer 15 is formed on the central portion 10m of the resistor 10. The first insulating layer 15 protects the resistor 10. The first insulating layer 15 includes a first end 15a near the first side surface 13a of the resistor 10 and a second end 15b near the second side surface 13b of the resistor 10. The first insulating layer 15 is formed of an insulating resin such as epoxy resin.

[0051] A second insulating layer 16 is disposed on the second main surface 12 of the resistor 10. The second insulating layer 16 is disposed between the first electrode 20 and the second electrode 25, thus separating the first electrode 20 and the second electrode 25 from each other. The second insulating layer 16 is disposed between the third electrode layer 22 and the fourth electrode layer 27, thus separating the third electrode layer 22 and the fourth electrode layer 27 from each other. The second insulating layer 16 is formed on the central portion 10m of the resistor 10. The second insulating layer 16 protects the resistor 10. The second insulating layer 16 includes a third end 16a near the second side surface 13b of the resistor 10 and a fourth end 16b near the first side surface 13a of the resistor 10. The third end 16a of the second insulating layer 16 can contact the fourth electrode layer 27. The fourth end 16b of the second insulating layer 16 can contact the third electrode layer 22. The second insulating layer 16 is formed of an insulating resin such as epoxy resin.

[0052] An insulating cover film 30 covers the third side 14a, the fourth side 14b, a first strip-shaped region near the third side 14a on the first main surface 11 of the resistor 10, a second strip-shaped region near the fourth side 14b on the first main surface 11 of the resistor 10, a third strip-shaped region near the third side 14a on the second main surface 12 of the resistor 10, and a fourth strip-shaped region near the fourth side 14b on the second main surface 12 of the resistor 10. The long side direction of the first, second, third, and fourth strip-shaped regions is the first direction (x-direction). The insulating cover film 30 protects the resistor 10. The insulating cover film 30 is formed of an insulating resin such as epoxy resin.

[0053] A first conductive substrate layer 17 is disposed on the first main surface 11 of the resistor 10. The first conductive substrate layer 17 is formed in the region of the first main surface 11 of the resistor 10 near the first side surface 13a of the resistor 10 relative to the central portion 10m of the resistor 10. The first conductive substrate layer 17 includes an end 17a near the first side surface 13a of the resistor 10 and an end 17b near the central portion 10m of the resistor 10. The first conductive substrate layer 17 is also disposed on the first insulating layer 15. The first end 15a of the first insulating layer 15 is covered by the first conductive substrate layer 17. The end 17b of the first conductive substrate layer 17 is exposed from the first insulating layer 15. The ends 17a and 17b of the first conductive substrate layer 17 are covered by the first electrode layer 21. The first conductive substrate layer 17 is formed, for example, of a conductive resin containing an adhesive (e.g., epoxy resin, phenolic resin, or polyimide resin) and conductive particles (e.g., silver particles) dispersed in the adhesive resin.

[0054] The first resistivity of the first conductive substrate layer 17 is greater than the second resistivity of the first electrode layer 21, and greater than the third resistivity of the resistive body 10. Therefore, when current flows through the chip resistor 1, almost no current flows through the first conductive substrate layer 17. The first conductive substrate layer 17 makes the resistance value of the chip resistor 1 substantially unchanged.

[0055] The first resistivity of the first conductive substrate 17 is, for example, more than 10 times the second resistivity of the first electrode layer 21. The first resistivity of the first conductive substrate 17 can be more than 20 times, more than 50 times, or more than 100 times the second resistivity of the first electrode layer 21. The first resistivity of the first conductive substrate 17 is, for example, more than 5 times the third resistivity of the resistive element 10. The first resistivity of the first conductive substrate 17 can be more than 10 times, more than 25 times, or more than 50 times the third resistivity of the resistive element 10.

[0056] A second conductive substrate layer 18 is disposed on the first main surface 11 of the resistor 10. The second conductive substrate layer 18 is formed in the region of the first main surface 11 of the resistor 10 near the second side surface 13b of the resistor 10, relative to the central portion 10m of the resistor 10. The second conductive substrate layer 18 includes an end 18a near the second side surface 13b of the resistor 10 and an end 18b near the central portion 10m of the resistor 10. The second conductive substrate layer 18 is also disposed on the first insulating layer 15. The second end 15b of the first insulating layer 15 is covered by the second conductive substrate layer 18. The end 18b of the second conductive substrate layer 18 protrudes from the first insulating layer 15. The ends 18a and 18b of the second conductive substrate layer 18 are covered by the second electrode layer 26. The second conductive substrate layer 18 is spaced apart from the first conductive substrate layer 17 in the first direction (x direction). The second conductive substrate layer 18 is formed, for example, of a conductive resin containing an adhesive resin (e.g., epoxy resin, phenolic resin, or polyimide resin) and conductive particles (e.g., silver particles) dispersed in the adhesive resin.

[0057] The fourth resistivity of the second conductive substrate layer 18 is greater than the fifth resistivity of the second electrode layer 26, and greater than the third resistivity of the resistive element 10. Therefore, when current flows through the chip resistor 1, almost no current flows through the second conductive substrate layer 18. The second conductive substrate layer 18 makes the resistance value of the chip resistor 1 substantially unchanged.

[0058] The fourth resistivity of the second conductive substrate 18 is, for example, more than 10 times the fifth resistivity of the second electrode layer 26. The fourth resistivity of the second conductive substrate 18 may also be more than 20 times, more than 50 times, or more than 100 times the fifth resistivity of the second electrode layer 26. The fourth resistivity of the second conductive substrate 18 is, for example, more than 5 times the third resistivity of the resistive element 10. The fourth resistivity of the second conductive substrate 18 may also be more than 10 times, more than 25 times, or more than 50 times the third resistivity of the resistive element 10.

[0059] The first electrode 20 is disposed on the first side surface 13a of the resistive element 10. The first electrode 20 is located close to the first side surface 13a of the resistive element 10 relative to the center portion 10m of the resistive element 10 in the first direction (x-direction). The first electrode 20 extends along the first side surface 13a of the resistive element 10. The first electrode 20 is spaced apart from the second conductive substrate layer 18 and the second electrode 25 in the first direction (x-direction). The first electrode 20 includes a first electrode layer 21, a third electrode layer 22, and a first metal thin film layer 23.

[0060] The first electrode layer 21 is disposed on the first main surface 11 of the resistor 10 and on the first conductive substrate layer 17. The first electrode layer 21 is close to the first side surface 13a of the resistor 10 and extends along the first side surface 13a of the resistor 10. When viewed from above the first main surface 11 or the second main surface 12, the first portion 21m of the first electrode layer 21 that is in contact with the resistor 10 and is closest to the central portion 10m of the resistor 10 is closer to the central portion 10m of the resistor 10 than the third portion 22m of the third electrode layer 22 that is in contact with the resistor 10 and is closest to the central portion 10m of the resistor 10, or the third portion 22m of the third electrode layer 22 is on the same plane.

[0061] The thickness of the first electrode layer 21 on the first conductive substrate layer 17 is very small compared to the thickness of the first electrode layer 21 on the first main surface 11 of the resistor 10. For example, the thickness of the first electrode layer 21 on the first conductive substrate layer 17 is less than 0.1 times the thickness of the first electrode layer 21 on the first main surface 11 of the resistor 10. The second resistivity of the first electrode layer 21 is smaller than the third resistivity of the resistor 10. The first electrode layer 21 is formed, for example, of a metal such as copper. The first electrode layer 21 is, for example, a plating layer.

[0062] The third electrode layer 22 is disposed on the second main surface 12 of the resistive body 10. The ninth resistivity of the third electrode layer 22 is smaller than the third resistivity of the resistive body 10. The third electrode layer 22 is formed of a metal such as copper. The third electrode layer 22 is, for example, a plating layer.

[0063] The first metal thin film layer 23 electrically connects the first electrode layer 21 and the third electrode layer 22. The first metal thin film layer 23 covers the first electrode layer 21, the third electrode layer 22, and the first side surface 13a of the resistor 10. The first metal thin film layer 23 is formed of a tin-containing conductive material such as a solder layer. The first metal thin film layer 23 is, for example, a plating layer.

[0064] The second electrode 25 is disposed on the second side surface 13b of the resistor 10. The second electrode 25 is located close to the second side surface 13b of the resistor 10 relative to the center portion 10m of the resistor 10 in the first direction (x-direction). The second electrode 25 extends along the second side surface 13b of the resistor 10. The second electrode 25 is spaced apart from the first conductive substrate layer 17 and the first electrode 20 in the first direction (x-direction). The second electrode 25 includes a second electrode layer 26, a fourth electrode layer 27, and a second metal thin film layer 28.

[0065] The second electrode layer 26 is disposed on the first main surface 11 and the second conductive substrate layer 18 of the resistor 10. The second electrode layer 26 extends along the second side surface 13b of the resistor 10, close to the second side surface 13b of the resistor 10. When viewed from above the first main surface 11 or the second main surface 12, the second portion 26m of the second electrode layer 26 that is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10 is closer to the central portion 10m of the resistor 10 than the fourth portion 27m of the fourth electrode layer 27 that is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, or is on the same plane as the fourth portion 27m of the fourth electrode layer 27.

[0066] The thickness of the second electrode layer 26 on the second conductive substrate layer 18 is very small compared to the thickness of the second electrode layer 26 on the first main surface 11 of the resistor 10. The thickness of the second electrode layer 26 on the second conductive substrate layer 18 is, for example, less than 0.1 times the thickness of the second electrode layer 26 on the first main surface 11 of the resistor 10. The fifth resistivity of the second electrode layer 26 is smaller than the third resistivity of the resistor 10. The second electrode layer 26 is, for example, formed of a metal such as copper. The second electrode layer 26 is, for example, a plating layer.

[0067] A fourth electrode layer 27 is disposed on the second main surface 12 of the resistive body 10. The fourth electrode layer 27 is spaced apart from the third electrode layer 22 in the first direction (x-direction). The seventh resistivity of the fourth electrode layer 27 is lower than the third resistivity of the resistive body 10. The fourth electrode layer 27 is formed, for example, of a metal such as copper. The fourth electrode layer 27 is, for example, a plating layer.

[0068] The second metal thin film layer 28 electrically connects the second electrode layer 26 and the fourth electrode layer 27. The second metal thin film layer 28 covers the second electrode layer 26, the fourth electrode layer 27, and the second side surface 13b of the resistor 10. The second metal thin film layer 28 is formed of a tin-containing conductive material such as a solder layer. The second metal thin film layer 28 is, for example, a plating layer.

[0069] The first portion 21m of the first electrode layer 21, which is in contact with the resistor 10 and closest to the center 10m of the resistor 10, is closer to the center 10m of the resistor 10 than the third portion 22m of the third electrode layer 22, which is also in contact with the resistor 10 and closest to the center 10m of the resistor 10, or is in the same plane as the third portion 22m of the third electrode layer 22. Similarly, the second portion 26m of the second electrode layer 26, which is in contact with the resistor 10 and closest to the center 10m of the resistor 10, is closer to the center 10m of the resistor 10 than the fourth portion 27m of the fourth electrode layer 27, which is also in contact with the resistor 10 and closest to the center 10m of the resistor 10, or is in the same plane as the fourth portion 27m of the fourth electrode layer 27. Therefore, the resistance value of the chip resistor 1 depends on the distance L between the first portion 21m of the first electrode layer 21 and the second portion 26m of the second electrode layer 26 (refer to...). Figure 2 ).

[0070] In contrast, as described above, the first conductive substrate 17 and the second conductive substrate 18 do not substantially change the resistance value of the chip resistor 1. That is, even if the dimensions of the first conductive substrate 17 and the second conductive substrate 18 change, as long as the distance L does not change, the resistance value of the chip resistor 1 will not substantially change.

[0071] Therefore, the resistance value of the chip resistor 1 depends on the distance L, but not on the dimensions of the first electrode 20 (first electrode layer 21) or the second electrode 25 (second electrode layer 26). This allows for improved heat dissipation of the chip resistor 1 independently of its resistance value.

[0072] Reference Figure 3 The chip resistor 1 is mounted, for example, on a circuit board 50. Specifically, the circuit board 50 includes an insulating substrate 51 and conductive wires 52 and 53. The first electrode 20 of the chip resistor 1 is bonded to the conductive wire 52 of the circuit board 50 using a bonding material 54 such as solder. The second electrode 25 of the chip resistor 1 is bonded to the conductive wire 53 of the circuit board 50 using a bonding material 55 such as solder.

[0073] Reference Figures 1 to 13 An example of the manufacturing method of the chip resistor 1 in this embodiment will be described.

[0074] Reference Figure 4 The manufacturing method of the chip resistor 1 in this embodiment includes a step of preparing a resistor frame 5. The resistor frame 5 is formed of a resistive material such as Cu-Mn alloy, Cu-Ni alloy, or Ni-Cr alloy. The resistor frame 5 includes a plurality of strip resistors 10a. The long side direction of the strip resistors 10a is a first direction (x direction). The plurality of strip resistors 10a each include a first main surface 11, a second main surface 12 opposite to the first main surface 11, a third side surface 14a, and a fourth side surface 14b opposite to the third side surface 14a.

[0075] Reference Figure 5 and Figure 6 The manufacturing method of the chip resistor 1 in this embodiment includes: a step of forming a first insulating layer 15 on a first main surface 11 of a strip resistor 10a; and a step of forming a second insulating layer 16 on a second main surface 12 of the strip resistor 10a. The first insulating layer 15 includes: a first end portion 15a, which is an end portion of the first insulating layer 15 in a first direction (x-direction); and a second end portion 15b, which is an end portion of the first insulating layer 15 in the first direction (x-direction) and is opposite to the first end portion 15a. The second insulating layer 16 includes: a third end portion 16a, which is an end portion of the second insulating layer 16 in the first direction (x-direction); and a fourth end portion 16b, which is an end portion of the second insulating layer 16 in the first direction (x-direction) and is opposite to the third end portion 16a.

[0076] The first insulating layer 15 and the second insulating layer 16 are formed, for example, of an insulating resin such as epoxy resin. The first insulating layer 15 and the second insulating layer 16 are formed, for example, by printing such as screen printing.

[0077] Reference Figure 7 The manufacturing method of the chip resistor 1 in this embodiment includes a step of forming a first conductive substrate layer 17 and a second conductive substrate layer 18 on a first main surface 11 of a strip resistor body 10a. The first conductive substrate layer 17 and the second conductive substrate layer 18 may also be further formed on a first insulating layer 15. The first conductive substrate layer 17 may also cover a first end 15a of the first insulating layer 15. The second conductive substrate layer 18 may also cover a second end 15b of the first insulating layer 15. The first conductive substrate layer 17 and the second conductive substrate layer 18 are spaced apart from each other in a first direction (x-direction). The first conductive substrate layer 17 and the second conductive substrate layer 18 are formed, for example, of a conductive resin containing an adhesive resin (e.g., epoxy resin, phenolic resin, or polyimide resin) and conductive particles (e.g., silver particles) dispersed in the adhesive resin. The first conductive substrate layer 17 and the second conductive substrate layer 18 are formed, for example, by printing such as screen printing.

[0078] Reference Figure 8 and Figure 9 The manufacturing method of the chip resistor 1 in this embodiment includes a step of forming an insulating cover film 30. The insulating cover film 30 covers: the third side 14a and the fourth side 14b of the strip resistor 10a; a first strip region in the first main surface 11 of the strip resistor 10a near the third side 14a; a second strip region in the first main surface 11 of the strip resistor 10a near the fourth side 14b; a third strip region in the second main surface 12 of the strip resistor 10a near the third side 14a; and a fourth strip region in the second main surface 12 of the strip resistor 10a near the fourth side 14b. The insulating cover film 30 is formed, for example, from an insulating resin such as epoxy resin. The insulating cover film 30 is formed, for example, by impregnation or printing.

[0079] Reference Figure 10 and Figure 11 The manufacturing method of the chip resistor 1 in this embodiment includes the steps of forming a first conductive film 40 and a second conductive film 41. The first conductive film 40 is formed on the first conductive substrate layer 17, the second conductive substrate layer 18, and on the portion of the first main surface 11 of the resistor body 10 that exposes the first insulating layer 15, the insulating cover film 30, the first conductive substrate layer 17, and the second conductive substrate layer 18. The second conductive film 41 is formed on the portion of the second main surface 12 of the resistor body 10 that exposes the second insulating layer 16 and the insulating cover film 30. The first conductive film 40 and the second conductive film 41 are formed, for example, of a metal such as copper.

[0080] The first conductive film 40 and the second conductive film 41 are, for example, formed by plating. The first conductive film 40 and the second conductive film 41 are, for example, metal-plated films. The resistor 10, the first conductive base layer 17, and the second conductive base layer 18 are conductive, whereas the first insulating layer 15, the second insulating layer 16, and the insulating cover film 30 are electrically insulating. Therefore, the first conductive film 40 is selectively formed on the first conductive base layer 17, the second conductive base layer 18, and on the portions of the first main surface 11 of the resistor 10 that are exposed from the first insulating layer 15, the insulating cover film 30, the first conductive base layer 17, and the second conductive base layer 18. The second conductive film 41 is selectively formed on the portions of the second main surface 12 of the resistor 10 that are exposed from the second insulating layer 16 and the insulating cover film 30.

[0081] When the first conductive film 40 is formed, for example by plating, the thickness of the first conductive film 40 on the first conductive substrate layer 17 becomes very small compared to the thickness of the first conductive film 40 on the first main surface 11 of the resistor 10, and the thickness of the first conductive film 40 on the second conductive substrate layer 18 becomes very small compared to the thickness of the first conductive film 40 on the first main surface 11 of the resistor 10.

[0082] Reference Figure 12 and Figure 13 The manufacturing method of the chip resistor 1 in this embodiment includes a step of dividing a strip-shaped resistive body 10a to form a resistive body 10 including a first side surface 13a and a second side surface 13b. By dividing the strip-shaped resistive body 10a, the first conductive film 40 is divided into a first electrode layer 21 near the first side surface 13a and a second electrode layer 26 near the second side surface 13b. The second electrode layer 26 is spaced apart from the first electrode layer 21 in a first direction (x-direction). By dividing the strip-shaped resistive body 10a, the second conductive film 41 is divided into a third electrode layer 22 near the first side surface 13a and a fourth electrode layer 27 near the second side surface 13b. The fourth electrode layer 27 is spaced apart from the third electrode layer 22 in the first direction (x-direction).

[0083] The manufacturing method of the chip resistor 1 in this embodiment then includes the steps of forming a first metal thin film layer 23 and a second metal thin film layer 28. The first metal thin film layer 23 electrically connects the first electrode layer 21 and the third electrode layer 22. The first metal thin film layer 23 covers the first electrode layer 21, the third electrode layer 22, and the first side surface 13a of the resistor body 10. The second metal thin film layer 28 electrically connects the second electrode layer 26 and the fourth electrode layer 27. The second metal thin film layer 28 covers the second electrode layer 26, the fourth electrode layer 27, and the second side surface 13b of the resistor body 10. The first metal thin film layer 23 and the second metal thin film layer 28 are formed, for example, of a tin-containing conductive material such as a solder layer.

[0084] The first metal thin film layer 23 and the second metal thin film layer 28 are provided, for example, by plating. The first metal thin film layer 23 and the second metal thin film layer 28 are, for example, metal plating films. The first electrode layer 21, the second electrode layer 26, the resistor 10, the third electrode layer 22, and the fourth electrode layer 27 are conductive, whereas the first insulating layer 15, the second insulating layer 16, and the insulating cover film 30 are electrically insulating. Therefore, the first metal thin film layer 23 is selectively formed on the first electrode layer 21, the second electrode layer 26, and the first side surface 13a of the resistor 10. The second metal thin film layer 28 is selectively formed on the third electrode layer 22, the fourth electrode layer 27, and the second side surface 13b of the resistor 10. In this way, it is possible to obtain… Figure 1 and Figure 2 The chip resistor 1 shown.

[0085] The effects of the chip resistor 1 and its manufacturing method in this embodiment are explained.

[0086] The chip resistor 1 of this embodiment includes a resistive body 10, a first conductive substrate layer 17, a second conductive substrate layer 18, a first electrode 20, and a second electrode 25. The resistive body 10 includes a first main surface 11, a second main surface 12 opposite to the first main surface 11, a first side surface 13a connected to the first main surface 11 and the second main surface 12, and a second side surface 13b opposite to the first side surface 13a. The second side surface 13b is connected to the first main surface 11 and the second main surface 12. The first conductive substrate layer 17 is disposed on the first main surface 11 of the resistive body 10. The second conductive substrate layer 18 is disposed on the first main surface 11 of the resistive body 10 and spaced apart from the first conductive substrate layer 17. The first electrode 20 is disposed on the first side surface 13a side of the resistive body 10 and spaced apart from the second conductive substrate layer 18. The second electrode 25 is disposed on the second side surface 13b side of the resistive body 10 and spaced apart from the first conductive substrate layer 17 and the first electrode 20. The first electrode 20 includes a first electrode layer 21 disposed on a first main surface 11 of the resistive body 10 and on a first conductive substrate layer 17. The second electrode 25 includes a second electrode layer 26 disposed on the first main surface 11 of the resistive body 10 and on a second conductive substrate layer 18. The first resistivity of the first conductive substrate layer 17 is greater than the second resistivity of the first electrode layer 21 and greater than the third resistivity of the resistive body 10. The fourth resistivity of the second conductive substrate layer 18 is greater than the fifth resistivity of the second electrode layer 26 and greater than the third resistivity of the resistive body 10.

[0087] Therefore, the resistance value of the chip resistor 1 depends on the distance L (refer to...). Figure 2 The size of the first electrode 20 (first electrode layer 21) and the second electrode 25 (second electrode layer 26) are independent of the dimensions of the first electrode 20 (first electrode layer 21) and the second electrode 25 (second electrode layer 26). Furthermore, the first electrode layer 21 is disposed not only on the first main surface 11 of the resistor 10 but also on the first conductive substrate layer 17. The second electrode layer 26 is disposed not only on the first main surface 11 of the resistor 10 but also on the second conductive substrate layer 18. The chip resistor 1 is bonded to the circuit board 50 (see reference). Figure 3 When the surface mount resistor 1 is in contact with the circuit board 50, it can be bonded to the circuit board 50 with a larger contact area. The heat generated by the surface mount resistor 1 can be dissipated to the circuit board 50 more efficiently. According to this embodiment, the surface mount resistor 1 can improve its heat dissipation independently of its resistance value.

[0088] As mentioned above, the resistance value of the chip resistor 1 depends on the distance L (refer to...). Figure 2This is independent of the dimensions of the first electrode 20 (first electrode layer 21) and the second electrode 25 (second electrode layer 26). Therefore, among multiple chip resistors 1 having various distances L and various resistance values, the dimensions of the first electrode 20 (first electrode layer 21) and the second electrode 25 (second electrode layer 26) can be commonalized. The circuit board 50 on which the chip resistors 1 are mounted (see reference...) Figure 3 The dimensions of conductive wiring 52 and conductive wiring 53 can be standardized. The design of the circuit board 50 for mounting the chip resistor 1 can be simplified.

[0089] In the chip resistor 1 of this embodiment, the first conductive base layer 17 and the second conductive base layer 18 are formed of a conductive resin containing a binder resin and conductive particles (e.g., silver particles) dispersed in the binder resin. The first electrode layer 21 and the second electrode layer 26 are formed of metal. Therefore, the heat dissipation of the chip resistor 1 can be improved independently of the resistance value of the chip resistor 1. The manufacturing cost of the chip resistor 1 can be reduced.

[0090] The chip resistor 1 in this embodiment also has a first insulating layer 15 disposed on the first main surface 11 of the resistive body 10. The first insulating layer 15 is disposed between the first electrode 20 and the second electrode 25, and between the first conductive substrate layer 17 and the second conductive substrate layer 18.

[0091] The first insulating layer 15 protects the resistive element 10, extending the lifespan of the chip resistor 1. The first insulating layer 15 prevents the first conductive substrate layer 17 from contacting the second conductive substrate layer 18 and the first electrode layer 21 from contacting the second electrode layer 26.

[0092] In the chip resistor 1 of this embodiment, the first end 15a of the first insulating layer 15 near the first side 13a of the resistor 10 is covered by the first conductive substrate layer 17. The second end 15b of the first insulating layer 15 near the second side 13b of the resistor 10 is covered by the second conductive substrate layer 18. According to the chip resistor 1 of this embodiment, the heat dissipation of the chip resistor 1 can be improved independently of the resistance value of the chip resistor 1.

[0093] In the chip resistor 1 of this embodiment, the first electrode 20 further includes a third electrode layer 22 and a first metal thin film layer 23. The third electrode layer 22 is disposed on the second main surface 12 of the resistive body 10. The first metal thin film layer 23 electrically connects the first electrode layer 21 and the third electrode layer 22. The second electrode 25 further includes a fourth electrode layer 27 and a second metal thin film layer 28. The fourth electrode layer 27 is disposed on the second main surface 12 of the resistive body 10 and is spaced apart from the third electrode layer 22. The second metal thin film layer 28 electrically connects the second electrode layer 26 and the fourth electrode layer 27.

[0094] When mounting the chip resistor 1 onto the circuit board 50 (see reference) Figure 3 When the surface-mount resistor 1 is in operation, the heat generated in the surface-mount resistor 1 can be dissipated not only from the first main surface 11 of the resistor body 10, but also from the second main surface 12 of the resistor body 10 to the circuit board 50 through the third electrode layer 22, the first metal thin film layer 23, the fourth electrode layer 27, and the second metal thin film layer 28. The heat dissipation performance of the surface-mount resistor 1 can be improved.

[0095] In the chip resistor 1 of this embodiment, the resistive element 10 includes a central portion 10m exposed from the first electrode 20 and the second electrode 25 when viewed from the first main surface 11. The first portion 21m of the first electrode layer 21, which contacts the resistive element 10 and is closest to the central portion 10m, is closer to the central portion 10m of the resistive element 10 than the third portion 22m of the third electrode layer 22, which also contacts the resistive element 10 and is closest to the central portion 10m, or is on the same plane as the third portion 22m of the third electrode layer 22. Similarly, the second portion 26m of the second electrode layer 26, which contacts the resistive element 10 and is closest to the central portion 10m, is closer to the central portion 10m of the resistive element 10 than the fourth portion 27m of the fourth electrode layer 27, which also contacts the resistive element 10 and is closest to the central portion 10m, or is on the same plane as the fourth portion 27m of the fourth electrode layer 27.

[0096] The resistance value of the chip resistor 1 depends on the distance L between the first portion 21m of the first electrode layer 21 and the second portion 26m of the second electrode layer 26, and does not depend on the size of the first electrode 20 and the size of the second electrode 25. According to this embodiment, the heat dissipation of the chip resistor 1 can be improved independently of its resistance value.

[0097] In the chip resistor 1 of this embodiment, the first metal thin film layer 23 and the second metal thin film layer 28 are formed of a conductive material containing tin. Therefore, the chip resistor 1 can be easily mounted to the circuit board 50 (see reference 50) using soldering. Figure 3 ).

[0098] In the chip resistor 1 of this embodiment, a second insulating layer 16 is also provided on the second main surface 12 of the resistive body 10. The second insulating layer 16 is disposed between the third electrode layer 22 and the fourth electrode layer 27.

[0099] The second insulating layer 16 protects the resistive element 10, extending the lifespan of the chip resistor 1. The second insulating layer 16 also prevents the third electrode layer 22 and the fourth electrode layer 27 from coming into contact with each other.

[0100] In the chip resistor 1 of this embodiment, the chip resistor 1 is a shunt resistor. Therefore, the heat dissipation of the chip resistor 1 can be improved independently of the resistance value of the chip resistor 1. A chip resistor 1 suitable for current sensing can be provided.

[0101] The manufacturing method of the chip resistor 1 in this embodiment includes the steps of forming a first conductive substrate layer 17 and a second conductive substrate layer 18 spaced apart from the first conductive substrate layer 17 on a first main surface 11 of a strip resistor 10a; and forming a first conductive film 40 on the first conductive substrate layer 17, the second conductive substrate layer 18, and on the portion of the first main surface 11 of the strip resistor 10a exposed from the first conductive substrate layer 17 and the second conductive substrate layer 18. The manufacturing method of the chip resistor 1 in this embodiment also includes the step of dividing the strip resistor 10a to form a resistor 10 including a first side surface 13a and a second side surface 13b. By dividing the strip resistor 10a, the first conductive film 40 is divided into a first electrode layer 21 near the first side surface 13a and a second electrode layer 26 near the second side surface 13b and spaced apart from the first electrode layer 21. The first resistivity of the first conductive substrate layer 17 is greater than the second resistivity of the first electrode layer 21 and greater than the third resistivity of the resistor 10. The fourth resistivity of the second conductive substrate layer 18 is greater than the fifth resistivity of the second electrode layer 26, and is also greater than the third resistivity of the resistive body 10.

[0102] Therefore, the resistance value of the chip resistor 1 depends on the distance L (refer to...). Figure 2 The first electrode layer 21 is disposed not only on the first main surface 11 of the resistor 10, but also on the first conductive substrate 17. The second electrode layer 26 is disposed not only on the first main surface 11 of the resistor 10, but also on the second conductive substrate 18. When bonding the chip resistor 1 to the circuit board 50 (see reference...), the dimensions of the first electrode layer 21 and the second electrode layer 26 are not dependent on the dimensions of the second electrode layer 26. Figure 3 When the surface mount resistor 1 is mounted, it can be bonded to the circuit board 50 with a larger bonding area. The heat generated by the surface mount resistor 1 can be dissipated to the circuit board 50 more efficiently. According to the manufacturing method of the surface mount resistor 1 of this embodiment, a surface mount resistor 1 that can improve heat dissipation independently of its resistance value can be obtained.

[0103] Furthermore, as mentioned above, the resistance value of the chip resistor 1 depends on the distance L (refer to...). Figure 2 This is independent of the dimensions of the first electrode layer 21 and the second electrode layer 26. Therefore, the dimensions of the first electrode layer 21 and the second electrode layer 26 can be common to multiple chip resistors 1 with various distances L and various resistance values. A circuit board 50 on which the chip resistors 1 are mounted (see reference 1) Figure 3The dimensions of conductive wiring 52 and conductive wiring 53 can be standardized. The circuit board 50 for mounting the chip resistor 1 (see reference) Figure 3 The design can be simplified.

[0104] In the manufacturing method of the chip resistor 1 according to this embodiment, the first conductive substrate layer 17 and the second conductive substrate layer 18 are formed by printing. The first conductive film 40 is formed by plating. Therefore, the productivity of the chip resistor 1 can be improved, and the manufacturing cost of the chip resistor 1 can be reduced.

[0105] (Implementation Method 2)

[0106] Reference Figure 14 and Figure 15 The chip resistor 1b of Embodiment 2 is described below. The chip resistor 1b of this embodiment has the same structure as the chip resistor 1 of Embodiment 1, but differs in the following aspects.

[0107] The chip resistor 1b also has a third conductive substrate layer 33. The chip resistor 1b may also have a third insulating layer 35.

[0108] A third conductive substrate layer 33 is disposed on the second main surface 12 and the second insulating layer 16 of the resistor 10. The third conductive substrate layer 33 is in contact with the fourth electrode layer 27 and is spaced apart from the third electrode layer 22 in the first direction (x direction). A portion of the third conductive substrate layer 33 is exposed from the third insulating layer 35. The third conductive substrate layer 33 includes an end 33a near the first side surface 13a. The end 33a of the third conductive substrate layer 33 is covered by the third insulating layer 35. The end 33a of the third conductive substrate layer 33 is spaced apart from the third electrode layer 22 in the first direction (x direction).

[0109] The third end 16a of the second insulating layer 16, which is close to the second side surface 13b of the resistor 10, is covered by the third conductive substrate layer 33. When viewed from above the second main surface 12 of the resistor 10, the third conductive substrate layer 33 overlaps with the second conductive substrate layer 18. When viewed from above the second main surface 12 of the resistor 10, the third conductive substrate layer 33 overlaps with the central portion 10m of the resistor 10 in a first direction (x-direction) spaced apart from the first electrode 20 and the second electrode 25. When viewed from above the second main surface 12 of the resistor 10, the third conductive substrate layer 33 may also overlap with the first conductive substrate layer 17. The fourth end 16b of the second insulating layer 16, which is close to the first side surface 13a of the resistor 10, is exposed from the third conductive substrate layer 33.

[0110] The sixth resistivity of the third conductive substrate layer 33 is greater than the seventh resistivity of the fourth electrode layer 27, and also greater than the third resistivity of the resistive body 10. Therefore, when current flows through the chip resistor 1, almost no current flows through the third conductive substrate layer 33. The third conductive substrate layer 33 substantially does not change the resistance value of the chip resistor 1.

[0111] The sixth resistivity of the third conductive substrate 33 is, for example, more than 10 times the seventh resistivity of the fourth electrode layer 27. The sixth resistivity of the third conductive substrate 33 may also be more than 20 times, more than 50 times, or more than 100 times the seventh resistivity of the fourth electrode layer 27. The sixth resistivity of the third conductive substrate 33 is, for example, more than 5 times the third resistivity of the resistor 10. The sixth resistivity of the third conductive substrate 33 may be more than 10 times, more than 25 times, or more than 50 times the third resistivity of the resistor 10. The third conductive substrate 33 is formed of a conductive resin containing a binder resin (e.g., epoxy resin, phenolic resin, or polyimide resin) and conductive particles (e.g., silver particles) dispersed in the binder resin.

[0112] A fourth electrode layer 27 is further disposed on the third conductive substrate layer 33. The thickness of the fourth electrode layer 27 on the third conductive substrate layer 33 is very small compared to the thickness of the fourth electrode layer 27 on the first main surface 11 of the resistor 10. The thickness of the fourth electrode layer 27 on the third conductive substrate layer 33 is, for example, less than 0.1 times the thickness of the fourth electrode layer 27 on the first main surface 11 of the resistor 10.

[0113] A third insulating layer 35 is disposed on the third conductive substrate layer 33 and the second insulating layer 16. The third insulating layer 35 protects the third conductive substrate layer 33. The third insulating layer 35 is formed of an insulating resin such as epoxy resin.

[0114] Reference Figures 4 to 7 and Figures 14 to 20 This section describes the manufacturing method of the chip resistor 1b according to this embodiment. The manufacturing method of the chip resistor 1b according to this embodiment includes the same steps as the manufacturing method of the chip resistor 1 in Embodiment 1, but differs mainly in the following aspects.

[0115] The manufacturing method of the chip resistor 1b in this embodiment includes: Figures 4 to 6 The process shown. (Refer to...) Figure 7 and Figure 16 The manufacturing method of the chip resistor 1b in this embodiment includes the steps of forming a first conductive substrate layer 17 and a second conductive substrate layer 18 on the first main surface 11 of the strip resistor 10a, and forming a third conductive substrate layer 33 on the second main surface 12 of the strip resistor 10a and a second insulating layer 16.

[0116] The third end 16a of the second insulating layer 16 is covered by the third conductive substrate layer 33. When viewed from above the second main surface 12 of the strip resistor 10a, the third conductive substrate layer 33 overlaps with the second conductive substrate layer 18. When viewed from above the second main surface 12 of the strip resistor 10a, the third conductive substrate layer 33 may also overlap with the first conductive substrate layer 17. The fourth end 16b of the second insulating layer 16 is exposed from the third conductive substrate layer 33.

[0117] The third conductive substrate 33 is formed, for example, of a conductive resin containing conductive particles (e.g., silver particles) dispersed in an adhesive resin (e.g., epoxy resin, phenolic resin, or polyimide resin). The third conductive substrate 33 is provided, for example, by printing such as screen printing.

[0118] Reference Figure 17 The manufacturing method of the chip resistor 1b in this embodiment includes a step of forming a third insulating layer 35 on a third conductive substrate layer 33 and a second insulating layer 16. A portion of the third conductive substrate layer 33 is exposed from the third insulating layer 35. The third insulating layer 35 is formed, for example, of an insulating resin such as epoxy resin. The third insulating layer 35 is formed, for example, by printing such as screen printing.

[0119] Reference Figure 8 and Figure 18 The manufacturing method of the chip resistor 1b in this embodiment includes a step of forming an insulating cover film 30. The step of forming the insulating cover film 30 in this embodiment is the same as the step of forming the insulating cover film 30 in Embodiment 1. The insulating cover film 30 further covers a fifth strip region near the third side 14a and a sixth strip region near the fourth side 14b in the third insulating layer 35.

[0120] Reference Figure 10 and Figure 19 The manufacturing method of the chip resistor 1b in this embodiment includes the steps of forming a first conductive film 40 and a second conductive film 41, similar to the manufacturing method of the chip resistor 1 in Embodiment 1. The second conductive film 41 is formed on the third conductive substrate layer 33 and on the portion of the second main surface 12 of the resistor body 10 that is exposed from the insulating cover film 30, the third insulating layer 35, and the third conductive substrate layer 33.

[0121] When the second conductive film 41 is formed, for example by plating, the thickness of the second conductive film 41 on the third conductive substrate layer 33 becomes very small compared to the thickness of the second conductive film 41 on the first main surface 11 of the resistor 10.

[0122] Reference Figure 12 and Figure 20The manufacturing method of the chip resistor 1b in this embodiment is similar to that of the chip resistor 1 in Embodiment 1, including the step of dividing the strip-shaped resistive body 10a to form a resistive body 10 including a first side surface 13a and a second side surface 13b. By dividing the strip-shaped resistive body 10a, the first conductive film 40 is divided into a first electrode layer 21 and a second electrode layer 26. The second conductive film 41 is divided into a third electrode layer 22 and a fourth electrode layer 27. The third conductive substrate layer 33 is in contact with the fourth electrode layer 27 and is spaced apart from the third electrode layer 22. The fourth electrode layer 27 is disposed not only on the second main surface 12 of the resistive body 10, but also on the third conductive substrate layer 33.

[0123] Furthermore, the manufacturing method of the chip resistor 1b in this embodiment is similar to the manufacturing method of the chip resistor 1 in Embodiment 1, including the steps of forming a first metal thin film layer 23 and a second metal thin film layer 28. In this way, a... Figure 14 and Figure 15 The chip resistor 1b is shown.

[0124] The chip resistor 1b and its manufacturing method in this embodiment not only have the effects of the chip resistor 1 and its manufacturing method in Embodiment 1, but also have the following effects.

[0125] The chip resistor 1b of this embodiment further includes a third conductive substrate layer 33 disposed on the second main surface 12 of the resistive body 10 and on the second insulating layer 16. The third conductive substrate layer 33 is in contact with the fourth electrode layer 27 and spaced apart from the third electrode layer 22. The third end 16a of the second insulating layer 16, which is close to the second side surface 13b of the resistive body 10, is covered by the third conductive substrate layer 33. The sixth resistivity of the third conductive substrate layer 33 is greater than the seventh resistivity of the fourth electrode layer 27 and greater than the third resistivity of the resistive body 10.

[0126] When mounting the chip resistor 1b onto the circuit board 50 (see reference) Figure 3 When the heat generated in the chip resistor 1b is dissipated, it is not only from the first main surface 11 of the resistor body 10, but also from the second main surface 12 of the resistor body 10 to the circuit board 50 through the third conductive substrate layer 33, the fourth electrode layer 27, and the second metal thin film layer 28. Furthermore, the third conductive substrate layer 33 substantially does not change the resistance value of the chip resistor 1b. Therefore, the heat dissipation of the chip resistor 1b can be improved independently of its resistance value.

[0127] In the chip resistor 1b of this embodiment, when viewed from above the second main surface 12 of the resistor body 10, the third conductive substrate layer 33 overlaps the central portion 10m of the resistor body 10 in the direction (first direction (x direction)) where the first electrode 20 and the second electrode 25 are spaced apart from each other.

[0128] When mounting the chip resistor 1b onto the circuit board 50 (see reference) Figure 3 When the surface mount resistor 1b generates heat, the heat generated can travel from the central portion 10m of the resistive element 10, where the temperature is highest in the surface mount resistor 1b, through the third conductive substrate layer 33, the fourth electrode layer 27, and the second metal thin film layer 28 to the circuit board 50 (see reference). Figure 3 Heat dissipation. This can improve the heat dissipation of the chip resistor 1b.

[0129] In the chip resistor 1b of this embodiment, the third conductive substrate layer 33 is formed of a conductive resin containing an adhesive resin and conductive particles dispersed in the adhesive resin. The fourth electrode layer 27 is formed of metal. Therefore, the heat dissipation of the chip resistor 1b can be improved independently of the resistance value of the chip resistor 1b. The manufacturing cost of the chip resistor 1b can be reduced.

[0130] The manufacturing method of the chip resistor 1b in this embodiment further includes: a step of forming a second insulating layer 16 on a second main surface 12 of the strip resistor 10a opposite to the first main surface 11; a step of forming a third conductive substrate layer 33 on the second main surface 12 of the strip resistor 10a and the second insulating layer 16; a step of forming a second conductive film 41 on the third conductive substrate layer 33 and on the portion of the second main surface 12 of the strip resistor 10a exposed from the third conductive substrate layer 33; and a step of forming a first metal thin film layer 23 and a second metal thin film layer 28. By dividing the strip resistor 10a, the second conductive film 41 is divided into a third electrode layer 22 near the first side surface 13a and a fourth electrode layer 27 near the second side surface 13b and spaced apart from the third electrode layer 22. The third conductive substrate layer 33 is in contact with the fourth electrode layer 27 and spaced apart from the third electrode layer 22. The first metal thin film layer 23 electrically connects the first electrode layer 21 and the third electrode layer 22 to each other. The second metal thin film layer 28 electrically connects the second electrode layer 26 and the fourth electrode layer 27. The sixth resistivity of the third conductive substrate layer 33 is greater than the seventh resistivity of the fourth electrode layer 27 and greater than the third resistivity of the resistive body 10.

[0131] Mount the chip resistor 1b onto circuit board 50 (see reference). Figure 3 When the heat generated in the chip resistor 1b is transferred, it can be dissipated not only from the first main surface 11 of the resistive body 10, but also from the second main surface 12 of the resistive body 10 to the circuit board 50 through the third conductive substrate layer 33, the fourth electrode layer 27, and the second metal thin film layer 28. Furthermore, the third conductive substrate layer 33 substantially does not change the resistance value of the chip resistor 1b. Thus, a chip resistor 1b with improved heat dissipation independent of its resistance value can be obtained.

[0132] In the manufacturing method of the chip resistor 1b in this embodiment, the third conductive substrate layer 33 is formed by printing. The second conductive film 41 is formed by plating. Therefore, the productivity of the chip resistor 1b can be improved, and the manufacturing cost of the chip resistor 1b can be reduced.

[0133] (Implementation Method 3)

[0134] Reference Figure 21 and Figure 22 The chip resistor 1c of Embodiment 3 is described below. The chip resistor 1c of this embodiment has the same structure as the chip resistor 1b of Embodiment 2, but differs in the following aspects.

[0135] The chip resistor 1c also has a fourth conductive substrate layer 34. The fourth conductive substrate layer 34 is disposed on the second main surface 12 and the second insulating layer 16 of the resistive body 10. The fourth conductive substrate layer 34 is in contact with the third electrode layer 22 and is spaced apart from the third conductive substrate layer 33 and the fourth electrode layer 27 in a first direction (x-direction). A portion of the fourth conductive substrate layer 34 is exposed from the third insulating layer 35. The fourth conductive substrate layer 34 includes an end 34a near the second side surface 13b. The end 34a of the fourth conductive substrate layer 34 is covered by the third insulating layer 35. The end 34a of the fourth conductive substrate layer 34 is spaced apart from the end 33a of the third conductive substrate layer 33 and the fourth electrode layer 27 in the first direction (x-direction).

[0136] The fourth end 16b of the second insulating layer 16, which is close to the first side surface 13a of the resistor 10, is covered by the fourth conductive substrate layer 34. When viewed from above the second main surface 12 of the resistor 10, the fourth conductive substrate layer 34 overlaps the first conductive substrate layer 17. When viewed from above the second main surface 12 of the resistor 10, the fourth conductive substrate layer 34 is spaced apart from the central portion 10m of the resistor 10 in a first direction (x direction) that is spaced apart from the first electrode 20 and the second electrode 25.

[0137] The eighth resistivity of the fourth conductive substrate layer 34 is greater than the ninth resistivity of the third electrode layer 22, and also greater than the third resistivity of the resistive body 10. Therefore, when current flows through the chip resistor 1c, almost no current flows through the fourth conductive substrate layer 34. The fourth conductive substrate layer 34 substantially does not change the resistance value of the chip resistor 1c.

[0138] The eighth resistivity of the fourth conductive substrate layer 34 is, for example, more than 10 times the ninth resistivity of the third electrode layer 22. The eighth resistivity of the fourth conductive substrate layer 34 may also be more than 20 times, more than 50 times, or more than 100 times the ninth resistivity of the third electrode layer 22. The eighth resistivity of the fourth conductive substrate layer 34 is, for example, more than 5 times the third resistivity of the resistor 10. The eighth resistivity of the fourth conductive substrate layer 34 may also be more than 10 times, more than 25 times, or more than 50 times the third resistivity of the resistor 10. The fourth conductive substrate layer 34 is formed of a conductive resin containing a binder resin (e.g., epoxy resin, phenolic resin, or polyimide resin) and conductive particles (e.g., silver particles) dispersed in the binder resin.

[0139] The third electrode layer 22 is further disposed on the fourth conductive substrate layer 34. The thickness of the third electrode layer 22 on the fourth conductive substrate layer 34 is very small compared to the thickness of the third electrode layer 22 on the second main surface 12 of the resistor 10. The thickness of the third electrode layer 22 on the fourth conductive substrate layer 34 is, for example, less than 0.1 times the thickness of the third electrode layer 22 on the second main surface 12 of the resistor 10.

[0140] The third insulating layer 35 is disposed on the third conductive substrate 33, the fourth conductive substrate 34, and the second insulating layer 16. The third insulating layer 35 protects the third conductive substrate 33 and the fourth conductive substrate 34.

[0141] Reference Figures 4 to 7 , Figure 10 , Figure 12 and Figures 21 to 25 This section describes the manufacturing method of the chip resistor 1c according to this embodiment. The manufacturing method of the chip resistor 1c according to this embodiment includes the same steps as the manufacturing method of the chip resistor 1b according to embodiment 2, but differs mainly in the following aspects.

[0142] The manufacturing method of the chip resistor 1c in this embodiment includes, as follows: Figures 4 to 6 The process shown. (Refer to...) Figure 7 and Figure 23 The manufacturing method of the chip resistor 1c in this embodiment includes the steps of forming a first conductive substrate layer 17 and a second conductive substrate layer 18 on the first main surface 11 of the strip resistor 10a, and forming a third conductive substrate layer 33 and a fourth conductive substrate layer 34 on the second main surface 12 of the strip resistor 10a and a second insulating layer 16.

[0143] The fourth end 16b of the second insulating layer 16 is covered by the fourth conductive substrate layer 34. When viewed from above the second main surface 12 of the strip resistor 10a, the fourth conductive substrate layer 34 overlaps the first conductive substrate layer 17. The fourth conductive substrate layer 34 is spaced apart from the third conductive substrate layer 33 in the first direction (x direction).

[0144] The fourth conductive substrate 34 is formed, for example, of a conductive resin containing an adhesive resin (e.g., epoxy resin, phenolic resin, or polyimide resin) and conductive particles (e.g., silver particles) dispersed in the adhesive resin. The fourth conductive substrate 34 is provided, for example, by printing such as screen printing.

[0145] Reference Figure 24 The manufacturing method of the chip resistor 1c in this embodiment includes a step of forming a third insulating layer 35 on a third conductive substrate layer 33, a fourth conductive substrate layer 34, and a second insulating layer 16. A portion of the third conductive substrate layer 33 and a portion of the fourth conductive substrate layer 34 are exposed from the third insulating layer 35.

[0146] Reference Figure 8 and Figure 25 The manufacturing method of the chip resistor 1c in this embodiment includes a step of forming an insulating cover film 30. The step of forming the insulating cover film 30 in this embodiment is the same as the step of forming the insulating cover film 30 in Embodiment 2.

[0147] Reference Figure 10 and Figure 19 The manufacturing method of the chip resistor 1c in this embodiment, like the manufacturing method of the chip resistor 1b in embodiment 2, includes the steps of forming a first conductive film 40 and a second conductive film 41. The second conductive film 41 is formed on the third conductive substrate layer 33, the fourth conductive substrate layer 34, and on the portion of the second main surface 12 of the resistor body 10 that is exposed from the insulating cover film 30, the third insulating layer 35, the third conductive substrate layer 33, and the fourth conductive substrate layer 34.

[0148] When the second conductive film 41 is formed, for example by plating, the thickness of the second conductive film 41 on the fourth conductive substrate layer 34 becomes very small compared to the thickness of the second conductive film 41 on the second main surface 12 of the resistor 10.

[0149] Reference Figure 12 and Figure 20The manufacturing method of the chip resistor 1c in this embodiment is similar to that of the chip resistor 1b in Embodiment 2, including the step of dividing the strip-shaped resistive body 10a to form a resistive body 10 including a first side surface 13a and a second side surface 13b. By dividing the strip-shaped resistive body 10a, the first conductive film 40 is divided into a first electrode layer 21 and a second electrode layer 26. The second conductive film 41 is divided into a third electrode layer 22 and a fourth electrode layer 27. The fourth conductive base layer 34 is in contact with the third electrode layer 22 and spaced apart from the fourth electrode layer 27. The third electrode layer 22 is formed not only on the second main surface 12 of the resistive body 10 but also on the fourth conductive base layer 34.

[0150] Then, the manufacturing method of the chip resistor 1c in this embodiment is similar to the manufacturing method of the chip resistor 1b in Embodiment 2, including the steps of forming a first metal thin film layer 23 and a second metal thin film layer 28. In this way, a... Figure 21 and Figure 22 The chip resistor 1c is shown.

[0151] The chip resistor 1c and its manufacturing method in this embodiment not only have the same effects as the chip resistor 1b and its manufacturing method in embodiment 2, but also have the following effects.

[0152] The chip resistor 1c of this embodiment further includes a fourth conductive substrate layer 34 disposed on the second main surface 12 of the resistive body 10 and on the second insulating layer 16. The fourth conductive substrate layer 34 is in contact with the third electrode layer 22 and is spaced apart from the third conductive substrate layer 33 and the fourth electrode layer 27. The fourth end 16b of the second insulating layer 16, which is close to the first side surface 13a of the resistive body 10, is covered by the fourth conductive substrate layer 34. The eighth resistivity of the fourth conductive substrate layer 34 is greater than the ninth resistivity of the third electrode layer 22 and greater than the third resistivity of the resistive body 10.

[0153] When mounting the chip resistor 1c onto the circuit board 50 (see reference) Figure 3 When the surface mount resistor 1c is in operation, the heat generated in the surface mount resistor 1c can be dissipated not only from the first main surface 11 of the resistive body 10, but also from the second main surface 12 of the resistive body 10 to the circuit board 50 through the third conductive substrate layer 33, the fourth conductive substrate layer 34, the third electrode layer 22, and the fourth electrode layer 27. Furthermore, the fourth conductive substrate layer 34 substantially does not change the resistance value of the surface mount resistor 1c. Therefore, the heat dissipation of the surface mount resistor 1c can be improved independently of its resistance value.

[0154] In the chip resistor 1c of this embodiment, the fourth conductive substrate layer 34 is formed of a conductive resin containing an adhesive resin and conductive particles dispersed in the adhesive resin. The third electrode layer 22 is formed of metal. Therefore, the heat dissipation of the chip resistor 1c can be improved independently of the resistance value of the chip resistor 1c. The manufacturing cost of the chip resistor 1c can be reduced.

[0155] The manufacturing method of the chip resistor 1c in this embodiment further includes a step of forming a fourth conductive base layer 34, spaced apart from the third conductive base layer 33, on the second main surface 12 of the strip resistive body 10a and the second insulating layer 16. A second conductive film 41 is also formed on the fourth conductive base layer 34. The fourth conductive base layer 34 is in contact with the third electrode layer 22 and spaced apart from the fourth electrode layer 27. The eighth resistivity of the fourth conductive base layer 34 is greater than the ninth resistivity of the third electrode layer 22 and greater than the third resistivity of the resistive body 10.

[0156] When mounting the chip resistor 1c onto the circuit board 50 (see reference) Figure 3 When the heat generated in the chip resistor 1c is transferred, it can be dissipated not only from the first main surface 11 of the resistive body 10, but also from the second main surface 12 of the resistive body 10 to the circuit board 50 through the third conductive substrate layer 33, the fourth conductive substrate layer 34, the third electrode layer 22, and the fourth electrode layer 27. Furthermore, the fourth conductive substrate layer 34 substantially does not change the resistance value of the chip resistor 1c. Thus, a chip resistor 1c with improved heat dissipation independent of its resistance value can be obtained.

[0157] In the manufacturing method of the chip resistor 1c according to this embodiment, the fourth conductive substrate layer 34 is provided by printing. Therefore, the productivity of the chip resistor 1c can be improved, and the manufacturing cost of the chip resistor 1c can be reduced.

[0158] (Implementation Method 4)

[0159] Reference Figure 26 and Figure 27 The chip resistor 1d of Embodiment 4 is described below. The chip resistor 1d of this embodiment has the same structure as the chip resistor 1 of Embodiment 1, but there are differences in the following aspects.

[0160] A first insulating layer 15 is also disposed on the first conductive substrate layer 17. A first end 15a of the first insulating layer 15 protrudes from the first conductive substrate layer 17. An end 17b of the first conductive substrate layer 17 is covered by the first insulating layer 15. The end 17b of the first conductive substrate layer 17 is spaced apart from the first electrode layer 21. The first insulating layer 15 is also disposed on the second conductive substrate layer 18. A second end 15b of the first insulating layer 15 protrudes from the second conductive substrate layer 18. An end 18b of the second conductive substrate layer 18 is covered by the first insulating layer 15. The end 18b of the second conductive substrate layer 18 is spaced apart from the second electrode layer 26.

[0161] Reference Figure 4 , Figure 6 , Figure 9 , Figure 11 , Figure 13 and Figures 28 to 32 This section describes the manufacturing method of the chip resistor 1d according to this embodiment. The manufacturing method of the chip resistor 1d according to this embodiment includes the same steps as the manufacturing method of the chip resistor 1 in Embodiment 1, but differs mainly in the following aspects.

[0162] The manufacturing method of the chip resistor 1d in this embodiment includes: Figure 4 The process shown. (Refer to...) Figure 28 The manufacturing method of the chip resistor 1d in this embodiment includes a step of forming a first conductive substrate layer 17 and a second conductive substrate layer 18 on the first main surface 11 of the strip resistor 10a. The first conductive substrate layer 17 and the second conductive substrate layer 18 are spaced apart from each other in a first direction (x direction).

[0163] The first conductive substrate 17 includes an end portion 17a, which is an end portion of the first conductive substrate 17 in the first direction (x direction), and an end portion 17b, which is an end portion of the first conductive substrate 17 in the first direction (x direction) and is opposite to end portion 17a. The second conductive substrate 18 includes an end portion 18a, which is an end portion of the second conductive substrate 18 in the first direction (x direction), and an end portion 18b, which is an end portion of the second conductive substrate 18 in the first direction (x direction) and is opposite to end portion 18a. The end portion 17b of the first conductive substrate 17 is opposite to the end portion 18b of the second conductive substrate 18. The first conductive substrate 17 and the second conductive substrate 18 are provided, for example, by printing such as screen printing.

[0164] Reference Figure 6 and Figure 29The manufacturing method of the chip resistor 1d according to this embodiment includes: a step of forming a first insulating layer 15 on a first main surface 11 of a strip resistor 10a, on a first conductive substrate layer 17, and on a second conductive substrate layer 18; and a step of forming a second insulating layer 16 on a second main surface 12 of the strip resistor 10a. The first insulating layer 15 is formed between the first conductive substrate layer 17 and the second conductive substrate layer 18. The end 17b of the first conductive substrate layer 17 is covered by the first insulating layer 15. The end 18b of the second conductive substrate layer 18 is covered by the first insulating layer 15.

[0165] The first insulating layer 15 includes a first end portion 15a, which is an end portion of the first insulating layer 15 in the first direction (x direction), and a second end portion 15b, which is an end portion of the first insulating layer 15 in the first direction (x direction) and is opposite to the first end portion 15a. The first end portion 15a of the first insulating layer 15 is located on the first conductive substrate layer 17 and covers the end portion 17b of the first conductive substrate layer 17. The second end portion 15b of the first insulating layer 15 is located on the second conductive substrate layer 18 and covers the end portion 18b of the second conductive substrate layer 18. The second insulating layer 16 includes a third end portion 16a, which is an end portion of the second insulating layer 16 in the first direction (x direction), and a fourth end portion 16b, which is an end portion of the second insulating layer 16 in the first direction (x direction) and is opposite to the third end portion 16a.

[0166] Reference Figure 9 and Figure 30 The manufacturing method of the chip resistor 1d in this embodiment is similar to the manufacturing method of the chip resistor 1 in Embodiment 1, including the step of forming an insulating cover film 30. (See also...) Figure 11 and Figure 31 The manufacturing method of the chip resistor 1d in this embodiment is similar to that of the chip resistor 1 in Embodiment 1, including the steps of forming a first conductive film 40 and a second conductive film 41. (Refer to...) Figure 13 and Figure 32 The manufacturing method of the chip resistor 1d in this embodiment is similar to that of the chip resistor 1 in Embodiment 1, including the step of dividing the strip-shaped resistive body 10a to form a resistive body 10 including a first side surface 13a and a second side surface 13b. Then, the manufacturing method of the chip resistor 1d in this embodiment is similar to that of the chip resistor 1 in Embodiment 1, including the step of forming a first metal thin film layer 23 and a second metal thin film layer 28. In this way, a... Figure 26 and Figure 27 The chip resistor 1d is shown.

[0167] The chip resistor 1d in this embodiment has the same following effects as the chip resistor 1 in embodiment 1.

[0168] In the chip resistor 1d of this embodiment, the resistive element 10 includes a central portion 10m exposed from the first electrode 20 and the second electrode 25 when viewed from above the first main surface 11. The end 17b of the first conductive base layer 17, which is close to the central portion 10m of the resistive element 10, is covered by a first insulating layer 15. The end 18b of the second conductive base layer 18, which is close to the central portion 10m of the resistive element 10, is also covered by the first insulating layer 15. According to the chip resistor 1d of this embodiment, the heat dissipation of the chip resistor 1d can be improved independently of its resistance value.

[0169] All contents of Embodiments 1 to 4 disclosed herein are illustrative and should not be considered as limiting. At least two of Embodiments 1 to 4 may be combined with each other as long as there is no contradiction. For example, the third conductive substrate layer 33 and the third insulating layer 35 of Embodiment 2 may be provided in the chip resistor 1d of Embodiment 4. The third conductive substrate layer 33, the fourth conductive substrate layer 34, and the third insulating layer 35 of Embodiment 3 may also be provided in the chip resistor 1d of Embodiment 4. The scope of this invention is not limited to the above description, but is indicated by the scope of the claims, and should include all modifications within the meaning and scope equivalent to the scope of the claims.

[0170] Explanation of reference numerals in the attached figures

[0171] 1, 1b, 1c, 1d Chip resistors; 5 Resistor frame; 10 Resistor; 10a Strip resistor; 10m Central section; 11 First main surface; 12 Second main surface; 13a First side surface; 13b Second side surface; 14a Third side surface; 14b Fourth side surface; 15 First insulating layer; 15a First end; 15b Second end; 16 Second insulating layer; 16a Third end; 16b Fourth end; 17 First conductive base layer; 17a, 17b Ends; 18 Second conductive base layer; 18a, 18b Ends; 20 First electrode; 21 First electrode layer; 21m First part; 22 Third electrode layer; 22m Third part; 23 First metal thin film layer; 25 Second electrode; 26 Second electrode layer; 26m Second part; 27 Fourth electrode layer; 27m Fourth part; 28 Second metal thin film layer; 30 Insulating cover film; 33 Third conductive base layer; 33a End, 34 Fourth conductive substrate layer, 34a End, 35 Third insulating layer, 40 First conductive film, 41 Second conductive film, 50 Circuit board, 51 Insulating substrate, 52, 53 Conductive wiring, 54, 55 Bonding material.

Claims

1. A chip resistor, characterized in that: The device comprises a resistive element, including a first main surface, a second main surface opposite to the first main surface, a first side surface connected to the first main surface and the second main surface, and a second side surface opposite to the first side surface, wherein the second side surface is connected to the first main surface and the second main surface. The chip resistor also has: A first conductive substrate layer disposed on the first main surface; A second conductive substrate layer disposed on the first main surface and spaced apart from the first conductive substrate layer; A first electrode is disposed on the first side of the resistor and spaced apart from the second conductive substrate layer; A second electrode is disposed on the second side of the resistor and spaced apart from the first conductive substrate layer and the first electrode; and The first insulating layer is disposed on the first main surface. The first electrode includes a first electrode layer disposed on the first main surface and the first conductive substrate layer. The second electrode comprises a second electrode layer disposed on the first main surface and the second conductive substrate layer. The first resistivity of the first conductive substrate layer is greater than the second resistivity of the first electrode layer, and greater than the third resistivity of the resistive element. The fourth resistivity of the second conductive substrate layer is greater than the fifth resistivity of the second electrode layer, and also greater than the third resistivity of the resistive element. The first insulating layer is disposed between the first electrode and the second electrode, and also between the first conductive substrate layer and the second conductive substrate layer. The resistive element is contained in a central portion that is exposed from the first electrode and the second electrode when viewed from above the first main surface. The end of the first conductive substrate layer near the central portion is covered by the first insulating layer. The end of the second conductive substrate layer near the central portion is covered by the first insulating layer.

2. The chip resistor as described in claim 1, characterized in that: The first conductive substrate layer and the second conductive substrate layer are formed of a conductive resin containing an adhesive resin and conductive particles dispersed in the adhesive resin. The first electrode layer and the second electrode layer are formed of metal.

3. A chip resistor, characterized in that: The device comprises a resistive element, including a first main surface, a second main surface opposite to the first main surface, a first side surface connected to the first main surface and the second main surface, and a second side surface opposite to the first side surface, wherein the second side surface is connected to the first main surface and the second main surface. The chip resistor also has: A first conductive substrate layer disposed on the first main surface; A second conductive substrate layer disposed on the first main surface and spaced apart from the first conductive substrate layer; A first electrode is disposed on the first side of the resistor and spaced apart from the second conductive substrate layer; A second electrode is disposed on the second side of the resistor and spaced apart from the first conductive substrate layer and the first electrode; A second insulating layer disposed on the second main surface; and A third conductive substrate layer is disposed on the second main surface and on the second insulating layer. The first electrode comprises: a first electrode layer disposed on the first main surface and the first conductive substrate layer; a third electrode layer; and a first metal thin film layer, wherein the third electrode layer is disposed on the second main surface, and the first metal thin film layer electrically connects the first electrode layer and the third electrode layer to each other. The second electrode comprises: a second electrode layer disposed on the first main surface and the second conductive substrate layer; a fourth electrode layer; and a second metal thin film layer, wherein the fourth electrode layer is disposed on the second main surface and spaced apart from the third electrode layer, and the second metal thin film layer electrically connects the second electrode layer and the fourth electrode layer to each other. The first resistivity of the first conductive substrate layer is greater than the second resistivity of the first electrode layer, and greater than the third resistivity of the resistive element. The fourth resistivity of the second conductive substrate layer is greater than the fifth resistivity of the second electrode layer, and also greater than the third resistivity of the resistive element. The second insulating layer is disposed between the third electrode layer and the fourth electrode layer. The third conductive substrate layer is in contact with the fourth electrode layer and is spaced apart from the third electrode layer. The third end of the second insulating layer near the second side is covered by the third conductive substrate layer. The sixth resistivity of the third conductive substrate layer is greater than the seventh resistivity of the fourth electrode layer, and is also greater than the third resistivity of the resistive element.

4. The chip resistor as described in claim 3, characterized in that: The resistive element is contained in a central portion that is exposed from the first electrode and the second electrode when viewed from above the first main surface. The first portion of the first electrode layer that contacts the resistor and is closest to the center of the resistor is closer to the center of the resistor than the third portion of the third electrode layer that contacts the resistor and is closest to the center of the resistor, or the third portion of the third electrode layer is on the same plane. The second portion of the second electrode layer that is in contact with the resistor and is closest to the central portion of the resistor is closer to the central portion of the resistor than the fourth portion of the fourth electrode layer that is in contact with the resistor and is closest to the central portion of the resistor, or is on the same plane as the fourth portion of the fourth electrode layer.

5. The chip resistor as described in claim 4, characterized in that: When viewed from above the second main surface, the third conductive substrate layer overlaps the central portion of the resistive element in a direction that separates the first electrode from the second electrode.

6. The chip resistor as described in claim 3, characterized in that: The third conductive substrate layer is formed of a conductive resin containing an adhesive resin and conductive particles dispersed in the adhesive resin. The fourth electrode layer is formed of metal.

7. The chip resistor as described in claim 3, characterized in that: It also has a fourth conductive substrate layer disposed on the second main surface and on the second insulating layer. The fourth conductive substrate layer is in contact with the third electrode layer, and is spaced apart from both the third conductive substrate layer and the fourth electrode layer. The fourth end of the second insulating layer near the first side is covered by the fourth conductive substrate layer. The eighth resistivity of the fourth conductive substrate layer is greater than the ninth resistivity of the third electrode layer, and also greater than the third resistivity of the resistive element.

8. The chip resistor as described in claim 7, characterized in that: The fourth conductive substrate layer is formed of a conductive resin containing an adhesive resin and conductive particles dispersed in the adhesive resin. The third electrode layer is formed of metal.

9. The chip resistor as described in any one of claims 1 to 8, characterized in that: The chip resistor is a shunt resistor.

10. A method for manufacturing a chip resistor, characterized in that, include: The process of forming a first conductive substrate layer and a second conductive substrate layer spaced apart from the first conductive substrate layer on the first main surface of the strip resistor; The process of forming a first conductive film on the first conductive substrate layer, the second conductive substrate layer, and the portion of the first main surface exposed from the first conductive substrate layer and the second conductive substrate layer; and The process of dividing the strip-shaped resistive element to form a resistive element including a first side and a second side. By segmenting the strip-shaped resistive body, the first conductive film is divided into a first electrode layer near the first side and a second electrode layer near the second side and spaced apart from the first electrode layer. The first resistivity of the first conductive substrate layer is greater than the second resistivity of the first electrode layer, and greater than the third resistivity of the resistive element. The fourth resistivity of the second conductive substrate layer is greater than the fifth resistivity of the second electrode layer, and also greater than the third resistivity of the resistive element. The method for manufacturing the chip resistor further includes: The process of forming a second insulating layer on the second main surface of the strip resistor on the side opposite to the first main surface; The process of forming a third conductive substrate layer on the second main surface and the second insulating layer; The process of forming a second conductive film on the third conductive substrate layer and on the portion of the second main surface exposed from the third conductive substrate layer; and The process of forming the first metal thin film layer and the second metal thin film layer. By segmenting the strip resistor, the second conductive film is divided into a third electrode layer near the first side and a fourth electrode layer near the second side and spaced apart from the third electrode layer. The third conductive substrate layer is in contact with the fourth electrode layer and is spaced apart from the third electrode layer. The first metal thin film layer electrically connects the first electrode layer and the third electrode layer. The second metal thin film layer electrically connects the second electrode layer and the fourth electrode layer. The sixth resistivity of the third conductive substrate layer is greater than the seventh resistivity of the fourth electrode layer, and is also greater than the third resistivity of the resistive element.

11. The method for manufacturing a chip resistor as described in claim 10, characterized in that: The first conductive substrate layer and the second conductive substrate layer are formed by printing. The first conductive film is formed by plating.

12. The method for manufacturing a chip resistor as described in claim 10 or 11, characterized in that: The third conductive substrate layer is formed by printing. The second conductive film is formed by plating.

13. The method for manufacturing a chip resistor as described in claim 10 or 11, characterized in that: It also includes the step of forming a fourth conductive substrate layer spaced apart from the third conductive substrate layer on the second main surface and the second insulating layer. The second conductive film is formed on the fourth conductive substrate layer. The fourth conductive substrate layer is in contact with the third electrode layer and is spaced apart from the fourth electrode layer. The eighth resistivity of the fourth conductive substrate layer is greater than the ninth resistivity of the third electrode layer, and also greater than the third resistivity of the resistive element.

14. The method for manufacturing a chip resistor as described in claim 13, characterized in that: The fourth conductive substrate layer is formed by printing.

Images