L-2L de-embedding method based on TDR technology

By using the L-2L de-embedding method based on TDR technology, the GSG PAD parasitic network is equivalent to an error model. The error parameters are solved by using time-domain reflection technology, which solves the problem of decreased de-embedding accuracy in the high-frequency band in the existing technology and achieves higher de-embedding accuracy and frequency band applicability.

CN116522832BActive Publication Date: 2026-06-23UNIV OF ELECTRONICS SCI & TECH OF CHINA

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
UNIV OF ELECTRONICS SCI & TECH OF CHINA
Filing Date
2023-03-13
Publication Date
2026-06-23

AI Technical Summary

Technical Problem

Existing L-2L de-embedding algorithms suffer from decreased de-embedding accuracy at high frequencies due to the use of lumped element equivalent models, and are unable to effectively remove the distributed effects of the GSG PAD parasitic network.

Method used

The L-2L de-embedding method based on TDR technology is adopted, which equates the GSG PAD parasitic network to an error model. The error parameters are solved by time-domain reflection technology, and the de-embedding is performed by combining time-domain and frequency-domain methods, which improves the de-embedding accuracy and the applicable frequency band.

Benefits of technology

It improves the de-embedding accuracy and universality in the high-frequency band, providing higher de-embedding accuracy and applicable frequency bands, especially suitable for millimeter wave and terahertz frequency bands.

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Abstract

This invention discloses an L-2L de-embedding method based on TDR technology, belonging to the field of device modeling technology. Specifically, it involves: converting half-through de-embedding, through-through de-embedding, and on-chip testing of the device under test to obtain the corresponding ABCD matrix; solving the ABCD matrix of the virtual interconnection of GSG PADs on the left and right sides of the fixture, converting it into an S-parameter matrix, and then using 8 error parameters to characterize the parasitic network of GSG PADs on the left and right sides of the fixture; and using TDR technology to solve the error parameters S... 11L and S 22R Then, other error parameters are obtained, and based on this, a transmission line ABCD matrix of length L is solved. After removing the parasitic GSG PAD on the left and right sides and the parasitic interconnect transmission lines, the device under test is de-embedded. This invention fully considers the distributed effect of transmission lines, avoids the deterioration of high-frequency de-embedded effect caused by lumped element equivalence, and has higher de-embedded accuracy and universality.
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Description

Technical Field

[0001] This invention belongs to the field of device modeling technology, specifically relating to an L-2L de-embedding method based on TDR technology. Background Technology

[0002] De-embedding aims to eliminate errors in test results caused by test fixtures. Therefore, removing parasitic parameters introduced by fixtures such as GSG (Ground-Signal-Ground) PADs and metal interconnects using high-precision de-embedding algorithms is a prerequisite for obtaining the true characteristics of devices. Common de-embedding algorithms include typical two-step de-embedding methods such as Open-Short, three-step de-embedding, and four-step de-embedding. However, since these methods are based on lumped element equivalent models, the de-embedding results become inaccurate as the frequency increases. TRL (Thru-Reflect-Line) is a distributed de-embedding algorithm widely used in millimeter-wave and terahertz bands. It strips parasitic networks based on 8- or 10-term error models. However, TRL is a narrowband algorithm, and achieving broadband de-embedding requires designing delay standards for multiple frequency bands (inserting 1 / 4 wavelength transmission lines). Therefore, the auxiliary de-embedding structure introduced by TRL is relatively complex and is greatly affected by process errors, resulting in high testing costs.

[0003] The L-2L algorithm disclosed in the paper "A Novel Transmission-Line Deembedding Technique for RF Device Characterization" is a broadband deembedding algorithm, also known as the two-line deembedding method. This algorithm only requires two deembedding structures and has been verified at the low-frequency end of millimeter waves. The specific steps of the existing L-2L deembedding algorithm are as follows:

[0004] Step 1: Perform on-chip testing on the device under test, the half-through de-embedding with a transmission line length of L, and the through-through de-embedding with a transmission line length of 2L, respectively, and obtain the corresponding S-parameter matrix S. meas S halfthru and S thru By converting the S-parameter matrix into an ABCD (transmission) matrix, the ABCD matrix A of the device under test can be obtained. meas Semi-through insert ABCD matrix A halfthru and through-insert ABCD matrix A thru ;

[0005] Step 2: Construct the matrix equation A for semi-through de-embedding. halfthru =A pad_left A line A pad_right The matrix equation A for pass-through embedding thru =A pad_left Aline A line A pad_right Among them, A line Let A be a transmission line matrix ABCD of length L; pad_left The ABCD matrix of the GSG PAD on the left side of the fixture; A pad_right The ABCD matrix of the GSG PAD on the right side of the fixture;

[0006] The ABCD matrix of the virtual interconnection between the GSG PADs on the left and right sides of the fixture is solved by the following formula:

[0007] A pad =A halfthru A -1 thru A halfthru

[0008] =(A pad_left A line A pad_right (A) pad_left A line A line A pad_right ) -1 (A pad_left A line A pad_right )

[0009] =A pad_left A pad_right

[0010] Step 3: To solve for the ABCD matrix of the left and right GSG PADs respectively, the parasitic properties of the left and right GSG PADs are equivalent to lumped parameters, which are equivalent to a parallel admittance Y1 and a series admittance Y2. Then, A can be calculated separately. pad_left and A pad_right The solution formula is as follows:

[0011]

[0012] Therefore, the solution is as follows:

[0013]

[0014]

[0015] Step 4: Calculate formula A using the cascaded matrix. halfthru =A pad_left A line A pad_right After removing the parasitic GSGPAD on both sides, a transmission line matrix ABCD of length L is obtained:

[0016] A line=A -1 pad_left A halfthru A -1 pad_right

[0017] Step 5: Using relation A dut =A -1 line A -1 pad_left A meas A -1 pad_right A -1 line The ABCD matrix A of the device under test after removing parasitic GSG PADs and interconnect transmission lines on both sides was calculated. dut This is converted into scattering parameters to obtain the final device de-embedding result S. dut .

[0018] However, existing L-2L de-embedding algorithms typically use a lumped parameter model (Y1 and Y2) to represent the parasitic GSG PAD network, generally a π-type or T-type network. As the frequency increases, the distributed effect of the fixture has a greater impact on the test results, and the PAD network based on the lumped element equivalent model will experience a decrease in de-embedding accuracy with increasing frequency. Summary of the Invention

[0019] The purpose of this invention is to address the problems in the prior art by providing an L-2L de-embedding method based on TDR technology. This method uses an error model to represent the parasitic network of GSG PAD, fully characterizing the distribution effects in the millimeter wave and terahertz frequency bands. At the same time, it uses Time Domain Reflectometry (TDR) technology to solve for error parameters, and finally de-embedding is achieved through a combination of time and frequency domain methods. Compared with the traditional L-2L de-embedding algorithm, this method has higher accuracy and a wider applicable frequency band, providing a new approach for high-frequency de-embedding algorithms.

[0020] The technical solution adopted in this invention is as follows:

[0021] A method for L-2L de-embedding based on TDR technology, characterized by the following steps:

[0022] Step 1: Perform on-chip testing on the half-through de-embedding, through-through de-embedding, and the device under test respectively to obtain the S-parameter matrix S of the half-through de-embedding. halfthru S-parameter matrix S for pass-through embedding thru S-parameter matrix S of the device under test meas The S-parameter matrix is ​​converted into an ABCD matrix, which yields the ABCD matrix A for semi-through insert removal. halfthruA through-insertion ABCD matrix thru And the ABCD matrix A of the device under test meas ;

[0023] Step 2: Solve for the ABCD matrix A of the virtual interconnection of GSG PAD on the left and right sides of the fixture. pad :

[0024] A pad =A halfthru A -1 thru A halfthru =A pad_left A pad_right (1)

[0025] Step 3: Transform the ABCD matrix A pad Converted into the S-parameter matrix S of the virtual interconnection of GSG PADs on the left and right sides of the fixture pad :

[0026]

[0027] Among them, S 11 S 12 S 21 S 22 These are the input reflection coefficient, the reverse transmission coefficient, the forward transmission coefficient, and the output reflection coefficient, respectively.

[0028] Step 4: Convert the S-parameter matrix S pad Equivalent to an error model, using four error parameters S 11L S 21L S 12L S 22L The parasitic network of the GSG PAD on the left side of the fixture is characterized using four error parameters S. 11R S 21R S 12R S 22R Characterizing the parasitic GSG PAD network on the right side of the fixture, the S-parameter matrix S pad Obtained by the signal flow graph method:

[0029]

[0030] Since the GSG PAD is a passive structure, the error models on both sides of the fixture must satisfy the reciprocity requirement and have the same insertion loss. Therefore:

[0031] S 12L =S 21L =S 12R =S 21R (4)

[0032] Therefore, we get:

[0033]

[0034] Step 5: Using TDR technology, solve for the error parameter S in the error model. 11L and S 22R ;

[0035] Step 6: According to formula (5) and the obtained error parameter S 11L S 22R Solve for the error parameter S 21L S 12L S 22L S 11R S 21R and S 12R This leads to the S-parameter matrix S. pad Convert to ABCD matrix A pad After that, we obtained A. pad_left and A pad_right ;

[0036] Step 7: Solve for the ABCD matrix A of transmission line of length L. line :

[0037] A line =A -1 pad_left A halfthru A -1 pad_right

[0038] After removing the parasitic GSG PADs and interconnect transmission lines on both sides, the ABCD matrix A of the device under test is obtained. dut :

[0039] A dut =A -1 line A -1 pad_left A meas A -1 pad_right A -1 line

[0040] A dut Transform into S-parameter matrix S dut This enables the removal of the device under test from the embedded state.

[0041] Furthermore, the specific solution process for step 5 is as follows:

[0042] Step 5.1: Use ADS (Advanced Design System) software to view the time-domain waveforms of the virtual interconnection of the GSG PADs on both sides of the fixture, including the input waveform T.11 First response waveform T 12 Second response waveform T 21 and output waveform T 22 ;

[0043] Since the GSG PAD is a passive structure, the second response waveform T is recorded. 21 The peak pulse time t is used as the center of the virtual interconnection of the GSG PAD on both sides of the fixture.

[0044] Step 5.2: Centered on time t, analyze the input waveform T. 11 Perform time-domain gating, retaining the time-domain signal at the center left end as T. 11L ; For the output waveform T 22 Perform time-domain gating, retaining the time-domain signal at the center left end as T. 22R ;

[0045] Step 5.3: Through Fourier transform, T 11L Converting to the frequency domain (inverse TDR process) yields the error parameter S. 11L , will T 22R Converting to the frequency domain yields the error parameter S. 22R .

[0046] Furthermore, the device under test is an active device such as a HEMT (High Electron Mobility Transistor) or a passive device such as a capacitor.

[0047] Furthermore, step 5.2 implements time-domain gating using MATLAB programming.

[0048] Furthermore, during on-chip testing via a probe station, the left and right sides of the GSG PAD virtual interconnect are asymmetrical due to the sensitivity to the probe insertion position and the existence of certain process errors. The L-2L de-embedding method proposed in this invention can be applied to the case of asymmetry between the left and right sides of the GSG PAD virtual interconnect.

[0049] The beneficial effects of this invention are as follows:

[0050] This invention proposes an L-2L de-embedding method based on TDR technology. It transforms the GSGPAD parasitic network in the existing L-2L de-embedding algorithm into an error model containing 8 error parameters, fully considering the distribution effect of the transmission line and avoiding the deterioration of high-frequency de-embedding effect caused by using lumped elements to represent the GSG PAD parasitic network. The improved L-2L de-embedding algorithm has higher de-embedding accuracy and universality than the existing L-2L de-embedding algorithm, and provides a new approach for de-embedding algorithms in the millimeter wave and terahertz bands. Attached Figure Description

[0051] Figure 1This is a schematic diagram of the embedded structure of the passive device capacitor in Embodiment 1 of the present invention;

[0052] Figure 2 This is a schematic diagram of a semi-through de-embedding with a transmission line length of L in Embodiment 1 of the present invention;

[0053] Figure 3 This is a schematic diagram of a straight-through de-embedded component with a transmission line length of 2L in Embodiment 1 of the present invention;

[0054] Figure 4 This is a schematic diagram of the error model in Embodiment 1 of the present invention;

[0055] Figure 5 The simulation de-embedding result S of the passive device capacitor in Embodiment 1 of the present invention. 11 Schematic diagram;

[0056] Figure 6 The simulation de-embedding result S of the passive device capacitor in Embodiment 1 of the present invention. 21 Schematic diagram;

[0057] Figure 7 This is a schematic diagram of the embedded structure of the active device HEMT in Embodiment 1 of the present invention. Detailed Implementation

[0058] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0059] Example 1

[0060] This embodiment provides an L-2L de-embedding method based on TDR technology. The device under test, a semi-through de-embedding device, and a through de-embedding device are obtained based on a 35nm InP HEMT process. The InP substrate thickness is 50μm. The semi-through de-embedding device and the through de-embedding device are in the form of GCPW (grounded coplanar waveguide). The signal linewidth w is 11μm, and the distance d between the signal line and the ground on both sides is 10μm.

[0061] In this embodiment, the device under test is a passive capacitor (i.e., Figure 1 The capacitor 1 in the middle has an embedded structure as shown in the figure. Figure 1 As shown; the transmission line length for the semi-through de-embedded transmission is L, and the transmission line length for the through-through de-embedded transmission is 2L, as shown respectively. Figure 2 and Figure 3 As shown. The device under test (DUT) has the same GSG PAD as the semi-through de-embedded component and the through-through de-embedded component. The transmission line length at both ends of the DUT is L, and the grounding connection between the upper metal layer and the lower back metal layer is achieved through the grounding via 2.

[0062] The L-2L de-embedding method based on TDR technology provided in this embodiment specifically includes the following steps:

[0063] Step 1: Perform on-chip testing on the half-through de-embedding, through-through de-embedding, and device under test using a probe station to obtain the S-parameter matrix S of the half-through de-embedding. halfthru S-parameter matrix S for pass-through embedding thru S-parameter matrix S of the device under test meas The S-parameter matrix is ​​converted into an ABCD matrix, which yields the ABCD matrix A for semi-through insert removal. halfthru A through-insertion ABCD matrix thru And the ABCD matrix A of the device under test meas ;

[0064] Step 2: Solve for the ABCD matrix A of the virtual interconnection of GSG PAD on the left and right sides of the fixture. pad :

[0065] A pad =A halfthru A -1 thru A halfthru =A pad_left A pad_right (1)

[0066] Step 3: Transform the ABCD matrix A pad Converted into the S-parameter matrix S of the virtual interconnection of GSG PADs on the left and right sides of the fixture pad :

[0067]

[0068] Among them, S 11 S 12 S 21 S 22 These are the input reflection coefficient, the reverse transmission coefficient, the forward transmission coefficient, and the output reflection coefficient, respectively.

[0069] Step 4: Convert the S-parameter matrix S pad Equivalent to, for example Figure 4 The error model shown uses four error parameters S. 11L S 21L S 12L S 22L The parasitic network of the GSG PAD on the left side of the fixture is characterized using four error parameters S. 11R S 21R S 12R S 22R Characterizing the parasitic GSG PAD network on the right side of the fixture, the S-parameter matrix S pad Obtained by the signal flow graph method:

[0070]

[0071] Since the GSG PAD is a passive structure, the error models on both sides of the fixture must meet the reciprocity requirement and have the same insertion loss. Due to its sensitivity to the probe pickup position and the existence of certain process errors, the left and right sides of the GSG PAD virtual interconnect are asymmetrical. Therefore:

[0072] S 12L =S 21L =S 12R =S 21R S 22L =S 22R (4)

[0073] Therefore, we get:

[0074]

[0075] Step 5: Using TDR technology, solve for the error parameter S in the error model. 11L and S 22R Specifically:

[0076] Step 5.1: Use ADS software to view the time-domain waveforms of the virtual interconnection of the GSG PADs on both sides of the fixture, including the input waveform T. 11 First response waveform T 12 Second response waveform T 21 and output waveform T 22 ;

[0077] Since the GSG PAD is a passive structure, the second response waveform T is recorded. 21 The peak pulse time t is used as the center of the virtual interconnection of the GSG PAD on both sides of the fixture.

[0078] Step 5.2: Centered on time t, analyze the input waveform T. 11 Perform time-domain gating, retaining the time-domain signal at the center left end as T. 11L ; For the output waveform T 22 Perform time-domain gating, since T 22 Since the waveform is viewed from the right, the time-domain signal at the center left end is retained as T. 22R Time-domain gating was implemented using MATLAB programming.

[0079] Step 5.3: Through Fourier transform, T 11L Converting to the frequency domain yields the error parameter S. 11L , will T 22R Converting to the frequency domain yields the error parameter S. 22R ;

[0080] Step 6: According to formula (5) and the obtained error parameter S 11L S 22R Solve for the error parameter S 21L S 12L S 22L S 11R S 21R and S 12R This leads to the S-parameter matrix S. pad Convert to ABCD matrix A pad After that, we obtained A. pad_left and A pad_right ;

[0081] Step 7: Solve for the ABCD matrix A of transmission line of length L. line :

[0082] A line =A -1 pad_left A halfthru A -1 pad_right

[0083] After removing the parasitic GSG PADs and interconnect transmission lines on both sides, the ABCD matrix A of the device under test is obtained. dut :

[0084] A dut =A -1 line A -1 pad_left A meas A -1 pad_right A -1 line

[0085] A dut Transform into S-parameter matrix S dut This enables device de-embedding.

[0086] To verify the effectiveness of the L-2L de-embedding algorithm based on TDR technology proposed in this embodiment, simulation verification of the de-embedding algorithm from 0.1 to 300 GHz was performed on the device under test (passive device capacitor). ADS software was used for the simulation. Figure 1 The structure shown is simulated.

[0087] The S-parameter matrix S of the passive device capacitance obtained after removing the parasitic GSG PADs on the left and right sides and the parasitic interconnect transmission lines in this embodiment is shown. dut The S-parameter matrix S of passive device capacitance obtained by the traditional L-2L de-embedding algorithm dutThe actual S-parameter curves of passive device capacitors and those of unde-embedded capacitors (excluding fixtures) were compared to obtain... Figure 5 and Figure 6 The simulation de-embedding result S of the passive device capacitor is shown. 11 Schematic diagram and simulation de-embedding results S 21 The schematic diagram shows that, compared with the traditional L-2L de-embedding algorithm, this embodiment is closer to the true S-parameter curve of the passive device capacitance, indicating that this embodiment can better remove the parasitic GSGPAD on the left and right sides and the parasitic interconnect transmission line, thus verifying the effectiveness of the algorithm.

[0088] In this embodiment, the passive capacitor can be replaced with an active HEMT, as shown in the following structure. Figure 7 As shown.

[0089] It should be noted that the de-embedding method proposed in this embodiment is applicable not only to coplanar waveguide de-embedding structures, but also to microstrip de-embedding structures.

[0090] The above embodiments are only for illustrating the principles and advantages of the present invention, and are not intended to limit the present invention. They are only for helping to understand the principles of the present invention. The scope of protection of the present invention is not limited to the above configurations and embodiments. Those skilled in the art can make various other specific modifications and combinations based on the disclosed technology without departing from the essence of the present invention, but they are still within the scope of protection of the present invention.

Claims

1. An L-2L de-embedding method based on TDR technology, characterized in that, Includes the following steps: Step 1: Perform on-chip testing on the half-through de-embedding, through-through de-embedding, and the device under test respectively to obtain the S-parameter matrix S of the half-through de-embedding. halfthru S-parameter matrix S for pass-through embedding thru S-parameter matrix S of the device under test meas The S-parameter matrix is ​​converted into an ABCD matrix, which yields the ABCD matrix A for semi-through insert removal. halfthru A through-insertion ABCD matrix thru And the ABCD matrix A of the device under test meas ; Step 2: Solve for the ABCD matrix A of the virtual interconnection of GSG PAD on the left and right sides of the fixture. pad : A pad =A halfthru A -1 thru A halfthru =A pad_left A pad_right (1) Step 3: Transform the ABCD matrix A pad Converted into the S-parameter matrix S of the virtual interconnection of GSG PADs on the left and right sides of the fixture pad : S pad = (2) Among them, S 11 S 12 S 21 S 22 These are the input reflection coefficient, the reverse transmission coefficient, the forward transmission coefficient, and the output reflection coefficient, respectively. Step 4: Convert the S-parameter matrix S pad Equivalent to an error model, using four error parameters S 11L S 21L S 12L S 22L The parasitic network of the GSG PAD on the left side of the fixture is characterized using four error parameters S. 11R S 21R S 12R S 22R Characterizing the parasitic GSG PAD network on the right side of the fixture, the S-parameter matrix S pad Obtained by the signal flow graph method: (3) because (4) Therefore, we get: (5) Step 5: Using TDR technology, solve for the error parameter S in the error model. 11L and S 22R The specific solution process is as follows: Step 5.1: Use ADS software to view the time-domain waveforms of the virtual interconnection of the GSG PADs on both sides of the fixture, including the input waveform T. 11 First response waveform T 12 Second response waveform T 21 and output waveform T 22 ; Record the second response waveform T 21 The peak pulse time t is used as the center of the virtual interconnection of the GSG PAD on both sides of the fixture. Step 5.2: Centered on time t, analyze the input waveform T. 11 Perform time-domain gating, retaining the time-domain signal at the center left end as T. 11L ; For the output waveform T 22 Perform time-domain gating, retaining the time-domain signal at the center left end as T. 22R ; Step 5.3: Through Fourier transform, T 11L Converting to the frequency domain yields the error parameter S. 11L , will T 22R Converting to the frequency domain yields the error parameter S. 22R ; Step 6: According to formula (5) and the obtained error parameter S 11L S 22R Solve for the error parameter S 21L S 12L S 22L S 11R S 21R and S 12R This leads to the S-parameter matrix S. pad Convert to ABCD matrix A pad After that, we obtained A. pad_left and A pad_right ; Step 7: Solve for the ABCD matrix A of transmission line of length L. line : A line =A -1 pad_left A halfthru A -1 pad_right After removing the parasitic GSG PADs and interconnect transmission lines on both sides, the ABCD matrix A of the device under test is obtained. dut : A dut =A -1 line A -1 pad_left A meas A -1 pad_right A -1 line A dut Transform into S-parameter matrix S dut This enables the removal of the device under test from the embedded state.

2. The L-2L de-embedding method based on TDR technology according to claim 1, characterized in that, The device under test is an active HEMT or a passive capacitor.