Multilayer electronic component

Abstract

The present application provides a kind of laminated electronic components, which has the element main body formed by the dielectric layer and internal electrode layer alternately laminated, the molar ratio of MgO in dielectric layer relative to SiO2 is 1-5, the molar ratio of MgO in dielectric layer relative to MnO is 5-13, the element main body contains segregation phase, when the total content of MgO, NiO, MnO and Cr2O3 in segregation phase is set to 100 mole parts, the content of MgO in segregation phase is 63.0-99.5 mole parts, and the content of MnO in segregation phase is 0.5-12.6 mole parts.

Description

Technical Field

[0001] This invention relates to stacked electronic components. Background Technology

[0002] Patent document 1 discloses a laminated electronic component for the purpose of improving mechanical strength and reliability. In this laminated electronic component, needle-like segregants containing Mg and Cr as main components exist at the interface between the dielectric layer and the internal electrode layer.

[0003] In addition, Patent Document 2 discloses a dielectric ceramic composition that exhibits good properties even when the dielectric layer is thinned, the dielectric ceramic composition containing a specified amount of Mg and a specified amount of Mn.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent No. 5251993

[0007] Patent Document 2: Japanese Patent No. 5541318 Summary of the Invention

[0008] The technical problem that the invention aims to solve

[0009] The present invention was made in view of the above circumstances, and its object is to provide a laminated electronic component that can achieve improved reliability and maintain a high relative permittivity even when thinned.

[0010] Technical solutions for solving technical problems

[0011] To achieve the above objectives, the present invention provides a stacked electronic component having a component body comprising alternating layers of dielectric layers and internal electrode layers. The dielectric layers have a main component and a secondary component represented by the general formula ABO3. Site A contains at least one selected from Ba, Ca, and Sr, and site B contains at least one selected from Ti and Zr. The secondary component contains MgO, SiO2, and MnO. The molar ratio of MgO to SiO2 in the dielectric layer (MgO / SiO2) is 1 to 5, and the molar ratio of MgO to MnO in the dielectric layer (MgO / MnO) is 5 to 13. The component body contains a segregated phase. When the total content of MgO, NiO, MnO, Cr2O3, and SiO2 in the segregated phase is set to 100 molar parts, the content of MgO in the segregated phase is 63.0 to 99.5 molar parts, and the content of MnO in the segregated phase is 0.5 to 12.6 molar parts.

[0012] The laminated electronic component according to the present invention achieves improved reliability and maintains a high relative permittivity even when thinned. This is attributed to the fact that the laminated electronic component of the present invention contains a segregated phase having a predetermined composition based on the Mg-Mn-O system.

[0013] The Mg-Mn-O segregated phase formed in this invention has a defined composition. Therefore, the ratio of long particle size to short particle size is limited to a defined range, resulting in an approximately spherical shape. Furthermore, the long particle size is sufficiently shortened compared to the thickness of the dielectric layer. That is, the Mg-Mn-O segregated phase is smaller than the thickness of the dielectric layer and is dispersed within it. Therefore, it is possible to prevent the Mg-Mn-O segregated phase from bridging one internal electrode layer adjacent to the dielectric layer with another. Moreover, it is possible to ensure a high number of particles in the stacking direction of the dielectric layer. As a result, the stacked electronic component according to this invention can be considered to have improved reliability. Reliability can be judged by the ±PTV failure rate, etc.

[0014] Furthermore, according to this application, the occurrence of segregated phases can be suppressed. Because the dielectric constant of segregated phases is low, suppressing the occurrence of segregated phases can increase the ratio of ABO3 (principal component) with high dielectric constant, thereby increasing the relative dielectric constant of the stacked electronic components.

[0015] Furthermore, in this invention, the presence of Mg, an element that forms a secondary component of the dielectric layer, suppresses the growth of dielectric particles containing the main component. This allows for a smaller particle size of the dielectric particles (crystalline particles) containing the main component in this invention, and also improves the relative permittivity, thus making it suitable for thin-layer stacked electronic components.

[0016] For the reasons stated above, the stacked electronic components according to the present invention can achieve improved reliability and maintain a high relative permittivity even when the layers are thinned.

[0017] When the long particle size of the above-mentioned segregated phase is defined as DL and the short particle size of the above-mentioned segregated phase is defined as DS, it is preferable that the above-mentioned DL and the above-mentioned DS satisfy the relationship 1 < DL / DS < 2.

[0018] This enables further improvements in reliability, and maintains a higher relative permittivity even with thinner layers.

[0019] When the thickness of the dielectric layer is set as Td and the long particle size of the segregated phase is set as DL, it is preferable that Td / DL is greater than 1.4.

[0020] This enables further improvements in reliability, and maintains a higher relative permittivity even with thinner layers.

[0021] When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the above segregated phase is set to 100 molar parts, the content of NiO in the above segregated phase can be 0 to 36 molar parts.

[0022] When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the above segregated phase is set to 100 moles, the content of Cr2O3 in the above segregated phase can be 0 to 0.1 moles.

[0023] When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the above segregated phase is set to 100 molar parts, the content of SiO2 in the above segregated phase can be 0 to 0.01 molar parts.

[0024] When the content of the main component in the dielectric layer is set to 100 moles, the content of R2O3 in the dielectric layer can be 0.4 to 2.0 moles, and R can be at least one selected from Y, Dy, Ho and Yb.

[0025] When the content of the main component in the dielectric layer is set to 100 moles, the content of MgO in the dielectric layer can be 0.5 to 2.0 moles.

[0026] When the content of the main component in the dielectric layer is set to 100 molar parts, the content of MnO in the dielectric layer can be 0.01 to 0.20 molar parts.

[0027] When the content of the main component in the dielectric layer is set to 100 moles, the content of SiO2 in the dielectric layer can be 0.18 to 2.95 moles.

[0028] Preferably, the equivalent circle diameter (Da) of the above-mentioned segregated phase is 0.12 to 1.0 μm.

[0029] This allows for further improvements in reliability, and maintains a higher relative permittivity even with thinner layers. Furthermore, when Da is within the aforementioned range, high-temperature load life is improved compared to when Da exceeds this range, and the strength of the stacked electronic components is also enhanced.

[0030] When the segregated phase located in the capacitance region that contributes to capacitance is designated as the capacitance region segregated phase, and the segregated phase located in the lead-out region that does not contribute to capacitance is designated as the lead-out region segregated phase, and the area ratio of the capacitance region segregated phase within a specified range of the capacitance region is set as S1, and the area ratio of the lead-out region segregated phase within a specified range of the lead-out region is set as S2, it is preferable that S1 / S2 is less than 1.

[0031] This enables further improvements in reliability, and maintains a higher relative permittivity even with thinner layers. Attached Figure Description

[0032] Figure 1 This is a cross-sectional view of a multilayer ceramic capacitor according to one embodiment of the present invention.

[0033] Figure 2 yes Figure 1 Enlarged view of Part II.

[0034] Figure 3 yes Figure 2 Enlarged view of Part III.

[0035] Figure 4 This is an enlarged cross-sectional view of the capacitance region of an existing multilayer ceramic capacitor.

[0036] Figure 5 It is a graph with the x-axis representing the particle size [μm] of the dielectric particles and the y-axis representing the relative permittivity.

[0037] Explanation of reference numerals in the attached figures

[0038] 2: Multilayer ceramic capacitor (capacitor sample); 4: Component body; 6A, 6B: External electrodes; 10: Inner dielectric layer; 11: External region; 12: Internal electrode layer; 121: Discontinuity; 124: Internal electrode layer of capacitance region; 125A, 125B: Internal electrode layer of lead-out region; 13: Internal region; 14: Capacitance region; 15A, 15B: Lead-out region; 18: Segregated phase; 184: Segregated phase of capacitance region; 185: Segregated phase of lead-out region. Detailed Implementation

[0039] As one embodiment of the ceramic electronic component of the present invention, the overall structure of the multilayer ceramic capacitor will be described. Figure 1 This is a cross-sectional view of a typical multilayer ceramic capacitor 2.

[0040] The multilayer ceramic capacitor 2 has an inner dielectric layer 10 (dielectric ceramic composition) and an inner electrode layer 12 that are substantially parallel to a plane including the X-axis and Y-axis, and an element body 4 having the inner dielectric layer 10 and the inner electrode layer 12 alternately stacked along the Z-axis.

[0041] Here, "substantially parallel" means that they are mostly parallel, but there may be some slightly non-parallel parts, which means that the inner dielectric layer 10 and the inner electrode layer 12 may also have slight unevenness or tilt.

[0042] In this embodiment, the X-axis, Y-axis, and Z-axis are perpendicular to each other. Furthermore, in this embodiment, "inner side" refers to the side closest to the center of the multilayer ceramic capacitor 2, and "outer side" refers to the side furthest from the center of the multilayer ceramic capacitor 2.

[0043] In this embodiment, one alternately stacked inner electrode layer 12 is electrically connected to the inner side of an outer electrode 6A formed on the outer side of one end of the element body 4 in the X-axis direction. Additionally, another alternately stacked inner electrode layer 12 is electrically connected to the inner side of an outer electrode 6B formed on the outer side of the other end of the element body 4 in the X-axis direction.

[0044] like Figure 1 As shown, the stacked ceramic capacitor 2 of this embodiment has an element body 4 and external electrodes 6A and 6B.

[0045] In the component body 4, the portion where the inner dielectric layer 10 and the inner electrode layer 12 are alternately stacked is the inner mounting region 13. On the other hand, the portions of the component body 4 formed at both ends in the stacking direction Z (Z-axis) are the outer mounting regions 11. The outer mounting regions 11 are formed by stacking multiple outer dielectric layers that are thicker than the inner dielectric layers 10 constituting the inner mounting regions 13. Hereinafter, the inner dielectric layer 10 and the outer dielectric layers are sometimes collectively referred to as "dielectric layers".

[0046] One alternately stacked inner electrode layer 12 has a lead-out region inner electrode layer 125A electrically connected to the inner side of the outer electrode 6A formed on the outer side of the first end of the element body 4 in the X-axis direction. Additionally, another alternately stacked inner electrode layer 12 also has a lead-out region inner electrode layer 125B electrically connected to the inner side of the outer electrode 6B formed on the outer side of the second end of the element body 4 in the X-axis direction.

[0047] In addition, the internal electrode layer 12 has a capacity region internal electrode layer 124 inside the internal electrode layers 125A and 125B in the lead-out region.

[0048] The internal region 13 has a capacity region 14 and lead-out regions 15A and 15B. The capacity region 14 is the capacity region of the internal electrode layer 124, which is the region where the internal electrode layer 124 is stacked along the stacking direction with the inner dielectric layer 10.

[0049] The lead-out region 15A is the lead-out region of the internal electrode layer 12 connected to the external electrode 6A. The internal electrode layer 125A is the region where the inner dielectric layer 10 is stacked along the stacking direction.

[0050] The lead-out region 15B is the lead-out region of the internal electrode layer 12 connected to the external electrode 6B. The internal electrode layer 125B is the region where the inner dielectric layer 10 is stacked along the stacking direction.

[0051] Furthermore, the capacitance region 14 and the lead-out regions 15A and 15B are also shown as follows. That is, the capacitance region 14 is a region in which the inner electrode layer 124 of the capacitance region connected to the external electrode 6A and the inner electrode layer 124 of the capacitance region connected to the external electrode 6B are alternately stacked, sandwiching the inner dielectric layer 10. Similarly, the lead-out region 15A is a region in which the inner electrode layer 12A of the lead-out region connected to the external electrode 6A and the inner dielectric layer 10 are alternately stacked. And the lead-out region 15B is a region in which the inner electrode layer 12B of the lead-out region connected to the external electrode 6B and the inner dielectric layer 10 are alternately stacked.

[0052] In addition, capacitance region 14 is the region that contributes to capacitance. On the other hand, lead-out regions 15A and 15B are regions that do not contribute to capacitance.

[0053] In this embodiment, the shape and size of the component body 4 are not particularly limited. The shape can be elliptical cylinder, cylindrical, or other prismatic shapes, etc. The length L0 of the component body 4 in the X-axis direction can, for example, be 0.6 to 5.7 mm. The length W0 of the component body 4 in the Y-axis direction can, for example, be 0.3 to 5.0 mm. The length T0 of the component body 4 in the Z-axis direction can, for example, be 0.3 to 2.0 mm.

[0054] The thickness of the inner dielectric layer 10 is not particularly limited. For example, the thickness Td of the inner dielectric layer 10 sandwiched between the inner electrode layer 12 is preferably 30 μm or less, more preferably 15 μm or less, and even more preferably 10 μm or less. In order to achieve a thinner layer in the multilayer ceramic capacitor 2 of this embodiment, the thickness of the inner dielectric layer 10 can be reduced to about 0.5 μm.

[0055] The number of layers of the inner dielectric layer 10 is not particularly limited, but is preferably 20 or more, more preferably 50 or more, and even more preferably 100 or more.

[0056] The material of the dielectric layer is not particularly limited. In this embodiment, the dielectric layer contains a perovskite-type compound represented by ABO3 as the main component.

[0057] "The dielectric layer contains a perovskite-type compound represented by ABO3 as the main component" means that the perovskite-type compound represented by ABO3 in the dielectric layer accounts for more than 90% by mass.

[0058] In the perovskite-type compound represented by ABO3 in this embodiment, site A contains at least one selected from Ba, Ca, and Sr, and site B contains at least one selected from Ti and Zr. That is, the perovskite-type compound represented by ABO3 is, for example, a compound containing at least one selected from Ba... 1-a-b Sr a Cab ) m (Ti 1-c-d Zr c Hf d )O3 represents perovskite-type compounds.

[0059] m represents the element ratio of site A to site B, for example, 0.94 < m < 1.1.

[0060] a represents the elemental ratio of Sr, for example, 0≤a≤1, preferably 0≤a<1, and more preferably 0≤a≤0.5.

[0061] b represents the elemental ratio of Ca, 0≤b≤1, preferably 0≤b<1, and more preferably 0≤b≤0.5.

[0062] c represents the elemental ratio of Zr, 0≤c≤1, preferably 0≤c<1, and more preferably 0≤c≤0.15.

[0063] d represents the elemental ratio of Hf, 0≤d≤1, preferably 0≤d<1, and more preferably 0≤d≤0.05.

[0064] Furthermore, the elemental ratio of oxygen (O) in the above composition can deviate slightly from the stoichiometric composition.

[0065] In addition to the main components, the dielectric layer of this embodiment also includes secondary components. The secondary components of this embodiment include MgO, SiO2, and MnO. Furthermore, the secondary components of this embodiment may also include R2O3, NiO, and Cr2O3. Wherein, R is a rare earth element, and R is not particularly limited, but is at least one selected from Y, Dy, Ho, and Yb, more preferably Y or Dy. There may be only one rare earth element or two or more. In addition, the secondary components of this embodiment may contain at least one element selected from V, Ta, Nb, Mo, and W.

[0066] In this embodiment, the molar ratio of MgO to SiO2 in the dielectric layer (MgO / SiO2) is 1 to 5.

[0067] When MgO / SiO2 is within the above-mentioned range, compared with the case where MgO / SiO2 is below the above-mentioned range, the formation of segregated phases in the Mg-Si-O system can be suppressed. As a result, the specified Mg-Mn-O system segregated phase 18 can be easily obtained.

[0068] When the MgO / SiO2 ratio is within the aforementioned range, SiO2 is more likely to function as a sintering aid compared to when the MgO / SiO2 ratio exceeds this range. As a result, the strength of the multilayer ceramic capacitor 2 can be improved.

[0069] In this embodiment, the molar ratio of MgO to MnO in the dielectric layer (MgO / MnO) is 5 to 13.

[0070] When MgO / MnO is within the above range, compared with the case where MgO / MnO is below the above range, Mn is less likely to react with Ni constituting the internal electrode layer 12, and discontinuities 121 are less likely to be generated, thus making it easier to suppress electrode interruption.

[0071] When the MgO / MnO ratio is within the aforementioned range, the reduction resistance of MnO is more readily utilized compared to when the MgO / MnO ratio exceeds this range. As a result, the high-temperature load life can be improved.

[0072] In this embodiment, when the content of the main component in the dielectric layer is set to 100 moles, the content of R2O3 in the dielectric layer is 0.4 to 2.0 moles.

[0073] In this embodiment, when the content of the main component in the dielectric layer is set to 100 moles, the content of MgO in the dielectric layer is 0.5 to 2.0 moles.

[0074] In this embodiment, when the content of the main component in the dielectric layer is set to 100 moles, the content of MnO in the dielectric layer is 0.01 to 0.20 moles.

[0075] In this embodiment, when the content of the main component in the dielectric layer is set to 100 moles, the content of SiO2 in the dielectric layer is 0.18 to 2.95 moles.

[0076] The dielectric layer comprises dielectric particles, grain boundaries (not shown) formed between adjacent dielectric particles, and segregated phases described later. In this embodiment, the dielectric particles may be crystalline particles of the main component (ABO3) alone, or particles of secondary component elements that have dissolved (diffused) relative to the main component.

[0077] The particle size of the dielectric particles is not particularly limited, but is preferably 0.1 to 0.5 μm.

[0078] The conductive material contained in the internal electrode layer 12 is not particularly limited, but examples include Ni, Ni-based alloys, Cu, or Cu-based alloys. The Ni, Ni-based alloys, Cu, or Cu-based alloys may contain trace elements such as P, up to approximately 0.1% by mass. When the internal electrode layer 12 is primarily composed of Ni or a Ni-based alloy, it may contain one or more secondary components selected from Mn, Cu, Cr, Fe, etc. As a Ni-based alloy, an alloy of Ni with one or more elements selected from Mn, Cr, Co, and Al is preferred, and the Ni content in the alloy is preferably 95% by mass or more.

[0079] The thickness of the internal electrode layer 12 can be appropriately determined according to the application, etc., and is usually preferably 0.1 to 3 μm, and particularly preferably about 0.2 to 2.0 μm.

[0080] In this embodiment, the external electrodes 6A and 6B are formed on the component body 4 in such a way that they are electrically connected to at least a portion of the internal electrode layer 12.

[0081] The conductive materials contained in the external electrodes 6A and 6B are not particularly limited. For example, known conductive materials such as Ni, Cu, Sn, Ag, Pd, Pt, Au, or their alloys, and conductive resins can be used. The thickness of the external electrodes 6A and 6B can be appropriately determined according to the application, and is usually preferably around 10 to 50 μm.

[0082] Figure 2 yes Figure 1 An enlarged view of Part II. (See image below.) Figure 2 As shown, the component body 4 of this embodiment has a segregated phase 18. The location of the segregated phase 18 is not particularly limited; for example, it may be contained within the layer in which the inner dielectric layer 10 is formed. Furthermore, the segregated phase 18 may not be in contact with the inner electrode layer 12, or it may be in contact with it by being embedded in the inner electrode layer 12. Moreover, the segregated phase 18 may also exist in the discontinuity 121 of the inner electrode layer 12. That is, the discontinuity 121 of the inner electrode layer 12 is composed of the components of the inner dielectric layer 10, and the segregated phase 18 may exist therein. Additionally, the segregated phase 18 may also be contained in the outer mounting region 11.

[0083] In addition, Figure 2 In the cross-section shown, the inner electrode layer 12 appears discontinuous due to the discontinuities 121, but the discontinuities 121 exist as scattered points on the main surface of the inner electrode layer 12. Therefore, although in Figure 2 The internal electrode layer 12 is discontinuous on the cross-section shown, but continuous on other cross-sections, ensuring the conductivity of the internal electrode layer 12. Each internal electrode layer 12 exists not only along the X-axis direction, but also along the Y-axis direction.

[0084] Figure 3 yes Figure 2 An enlarged view of Part III. (See image below.) Figure 3 As shown, in this embodiment, when the long particle size of the segregated phase 18 is set as DL and the short particle size of the segregated phase 18 is set as DS, DL and DS preferably satisfy the relationship 1 < DL / DS < 2, and more preferably satisfy 1 ≤ DL / DS ≤ 1.5.

[0085] In addition, in this embodiment, when the thickness of the inner dielectric layer 10 is set as Td and the long particle size of the segregated phase 18 is set as DL, Td / DL is preferably greater than 1.4, and more preferably 1.4≤Td / DL≤4.7.

[0086] In this embodiment, the equivalent circle diameter (Da) of the segregated phase 18 is preferably 0.12 to 1.0 μm. Here, the equivalent circle diameter (Da) represents the diameter of a circle having an area equal to the area of ​​this shape. When Da is within the above range, compared to when Da exceeds the above range, the high-temperature load life can be improved, and the strength of the multilayer ceramic capacitor 2 can be improved.

[0087] The segregated phase 18 located in capacity region 14 is designated as capacity region segregated phase 184. Furthermore, the area ratio of the capacity region segregated phase 184 within a defined range of capacity region 14 is set to S1. Additionally, the segregated phase 18 located in extraction region 15 is designated as extraction region segregated phase 185. Moreover, the area ratio of the extraction region segregated phase 185 within a defined range of extraction region 15 is set to S2. In this embodiment, it is preferable that S1 / S2 is less than 1, and more preferably that 0.2 ≤ S1 / S2 ≤ 1.0. That is, in this embodiment, compared to capacity region 14, extraction region 15 contains more segregated phase 18.

[0088] The specified range is not specifically limited; for example, it can be a quadrilateral with one side ranging from 20 to 100 μm.

[0089] The long particle size (DL), short particle size (DS) of segregated phase 18, the equivalent circle diameter (Da) of the extraction region segregated phase 185, the area ratio (S1) of the capacity region segregated phase 184, and the area ratio (S2) of the extraction region segregated phase 185 can be determined by cross-sectional observation using an electron beam microanalyzer (EPMA).

[0090] First, reflectance electron images and elemental images were simultaneously acquired using EPMA. Then, using plotting software and a drawing tablet, the outline of the segregated phase 18 in the scale bar and reflectance electron images was drawn.

[0091] Based on the relationship between the length of the drawn scale and the number of pixels, the length of each pixel is used as a correction value.

[0092] Next, the number of pixels corresponding to the long grain size (DL) and the number of pixels corresponding to the short grain size (DS) of the obtained segregated phase 18 are collected using analysis software. The number of pixels corresponding to the long grain size (DL) is converted to length using correction values. Similarly, the number of pixels corresponding to the short grain size (DS) is converted to length using correction values. Thus, the lengths of the long grain size (DL) and the short grain size (DS) are determined.

[0093] In addition, the number of pixels inside the outline of the delineated segregated phase 18 is collected using analytical software. The number of pixels inside the outline is converted into area using a correction value. The area of ​​the segregated phase 18 is then calculated. The equivalent circle diameter (Da) can be determined based on the area of ​​the obtained segregated phase 18.

[0094] Furthermore, the area ratio (S1) of the segregated phase 184 in the capacity region or the area ratio (S2) of the segregated phase 185 in the extraction region can be determined based on the area of ​​the field of view and the total area of ​​the segregated phase 18 in the field of view.

[0095] The composition of the segregated phase 18 can be determined by component analysis using EPMA or similar methods during cross-sectional observation. Component analysis is preferably performed at at least three sites, and the composition of the segregated phase 18 is calculated by averaging the measurement results. In this embodiment, when performing component analysis using EPMA, an EDS (energy dispersive X-ray spectroscopy) or WDS (wavelength dispersive X-ray spectroscopy) can be used as the X-ray spectrometer.

[0096] In this embodiment, when the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregated phase 18 is set to 100 molar parts, the content of MgO in the segregated phase 18 is preferably 63.0 to 99.5 molar parts.

[0097] In this embodiment, when the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregated phase 18 is set to 100 molar parts, the content of MnO in the segregated phase 18 is preferably 0.5 to 12.6 molar parts.

[0098] In this embodiment, when the total content of MgO, NiO, MnO, Cr2O3, and SiO2 in the segregated phase 18 is set to 100 molar parts, the content of NiO in the segregated phase 18 is preferably 0 to 36 molar parts. The segregated phase 18 can be a solid solution of Mg, Mn, and Ni constituting the internal electrode layer 12.

[0099] In this embodiment, when the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregated phase 18 is set to 100 molar parts, the content of Cr2O3 in the segregated phase 18 is preferably 0 to 0.1 molar parts.

[0100] When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in segregated phase 18 is set to 100 molar parts, the content of SiO2 in segregated phase 18 is preferably 0 to 0.01 molar parts.

[0101] Below, on Figure 1 An example of the manufacturing method of the stacked ceramic capacitor 2 shown will be described.

[0102] First, a slurry of a gel-like compound or a solution of an element contained in the main component (ABO3) and a secondary component of the dielectric ceramic composition is prepared. There are no particular limitations on the gel-like compound; gel-like hydroxides, gel-like carbides, gel-like oxides, etc., are preferred. In this embodiment, a gel-like hydroxide is prepared.

[0103] Furthermore, there are no particular limitations on the solution of the element contained in the by-product, but an aqueous solution of the element contained in the by-product is preferred. In this embodiment, an aqueous solution of the element is prepared. As the metal salt used to prepare the aqueous solution, it is preferably used in the form of acetate, citrate, succinate, etc. In this embodiment, acetate is used.

[0104] Regarding Si, a gel slurry using ethanol as a solvent or an aqueous dispersion of Si particles (aqueous dispersion) is prepared. As an aqueous dispersion of Si particles, a dispersion formed by dispersing silica particles with water is prepared.

[0105] There are no particular restrictions on the raw material powder used as the main component. Oxides or mixtures of the above-mentioned components or composite oxides can be used. In addition, various compounds that are formed into the above-mentioned oxides or composite oxides by firing, such as carbonates, oxalates, nitrates, hydroxides, organometallic compounds, etc., can be appropriately selected and mixed for use.

[0106] The raw materials for the main components can be those obtained by the so-called solid-phase method, or those obtained by various liquid-phase methods (such as oxalate method, hydrothermal synthesis method, alkoxide method, sol-gel method, etc.).

[0107] Furthermore, the total amount of metal elements contained in the by-products may not be added in the form of gel-like hydroxide slurry or aqueous solution. For example, the dielectric ceramic composition of this embodiment can be manufactured using Mg gel-like hydroxide slurry and Mg oxide powder.

[0108] The hydroxide particles in the gel-like hydroxide slurry are very fine, for example, with a particle size of about 5-10 nm. These hydroxide particles are uniformly dispersed together with the raw material powder of the main component in the mixing process described later, and after drying, they coat the surface of the main component particles (ABO3 particles). Additionally, elements dissolved in the aqueous solution also coat the surface of the main component particles after drying.

[0109] Next, in this embodiment, the raw material powder of the main component and the gel-like hydroxide slurry or aqueous solution of the aforementioned by-component elements are pre-dispersed together with water. This pre-dispersion is performed to gently disperse the raw material powder of the main component with the gel-like hydroxide slurry, and is not intended to break down the raw material powder of the main component. The pre-dispersion is performed, for example, using a ball mill for about 1 to 2 hours. Alternatively, a mixer or other type of agitator besides a ball mill can also be used.

[0110] Next, the pre-dispersed mixture is dispersed using a media-stirred disperser to obtain a raw material mixture. In this embodiment, a bead mill is used as the media-stirred disperser. There are no particular limitations on the dispersion and mixing conditions; for example, it is preferable to use... The following media.

[0111] In this dispersion, the raw material powder of the main component is crushed, and the raw material powder of the main component and the elements constituting the secondary components (gel-like hydroxides or added metal elements in aqueous solutions) are uniformly dispersed. As a result, after drying, gel-like hydroxides, etc., coat the surface of the main component particles. Furthermore, in this dispersion, a hydrophilic dispersant is preferably added to further improve the dispersibility of the raw material mixture. Examples of hydrophilic dispersants include, for instance, polycarboxylic acid-based dispersants.

[0112] The obtained raw material mixture is dried. The dried raw material mixture is in a state where the added metal element, in the form of a gel-like hydroxide slurry or aqueous solution, is coated on the surface of the main component particles. That is, the element added in the form of a gel-like hydroxide slurry or aqueous solution is physically adsorbed and coated onto the main component particles.

[0113] There are no particular restrictions on the drying method; any suitable method can be selected from static drying, spray drying, freeze drying, etc. Furthermore, there are no particular restrictions on the drying temperature, as long as it is sufficient to remove the solvent from the raw material mixture.

[0114] By preparing the raw material mixture through such a process, damage to the main component particles can be minimized, the crystallinity of the main component particles can be maintained, and the elements constituting the secondary components can be uniformly coated on the main component particles.

[0115] Therefore, in order to maintain the crystallinity of the main component particles, the specific surface area of ​​the main component raw material powder contained in the dried raw material mixture and coated therein, as determined by the BET method, is preferably less than 1.4 times the specific surface area of ​​the main component raw material powder before pre-dispersion.

[0116] Next, the dried raw material mixture is heat-treated. This heat treatment causes the added component elements coating the surface of the main component particles to adhere more firmly to the particles. For example, a rotary furnace, tunnel furnace, or batch furnace can be used for this heat treatment. The holding temperature during heat treatment is preferably in the range of 400–900°C. Furthermore, the holding time is preferably 0.2–3.0 hours. Moreover, the drying and heat treatment of the raw material mixture can also be performed simultaneously. Examples of methods for simultaneous processing include spray pyrolysis.

[0117] After heat treatment, the raw material mixture aggregates, so it can be broken up to the point where the aggregate disperses. This breaking up can also be performed during the preparation of the dielectric layer paste, which will be described later.

[0118] The particle size of the heat-treated raw material mixture (ceramic raw material powder) is typically around 0.1–1 μm on average. Next, the ceramic raw material powder is coated to prepare a paste for the dielectric layer. The dielectric layer paste can be an organic coating made by mixing the dielectric raw material (ceramic raw material powder) with an organic carrier, or it can be a water-based coating.

[0119] Organic carriers are formed by dissolving adhesives in organic solvents. There are no particular limitations on the adhesives used in organic carriers; appropriate selections can be made from a variety of commonly used adhesives such as ethyl cellulose and polyvinyl butyral. Similarly, there are no particular limitations on the organic solvents used; appropriate selections can be made from a variety of organic solvents such as terpineol, butyl carbitol, acetone, and toluene, depending on the application method, such as printing or sheet processing.

[0120] Furthermore, when the dielectric layer is formulated into a water-based coating using a paste, it is sufficient to mix the water-based carrier (made by dissolving water-soluble binders and dispersants in water) with the dielectric raw material. There are no particular limitations on the water-soluble binder used in the water-based carrier; for example, polyvinyl alcohol, cellulose, or water-soluble acrylic resin can be used.

[0121] The paste for the internal electrode layer is prepared by mixing a conductive material composed of the aforementioned conductive metals or alloys, or various oxides or organometallic compounds that become the aforementioned conductive materials after firing, with the aforementioned organic carrier. Additionally, the paste for the internal electrode layer may also contain a common material. There are no particular limitations on the common material, but it is preferable to have the same composition as the main component.

[0122] The paste for the external electrode can be prepared in the same way as the paste for the internal electrode layer described above.

[0123] There are no particular restrictions on the content of the organic carrier in the above-mentioned pastes; a typical content is acceptable, for example, about 1-5% by mass for the binder and about 10-50% by mass for the solvent. In addition, each paste may contain additives selected from various dispersants, plasticizers, dielectrics, insulators, etc., as needed. Their total content is preferably 10% by mass or less.

[0124] When using the printing method, the dielectric layer and the internal electrode layer are printed with paste and laminated on a substrate such as PET. After being cut into the specified shape, they are peeled off from the substrate to become a raw chip.

[0125] Alternatively, when using the wafer method, a green wafer is formed using a dielectric layer paste, and an internal electrode pattern is formed by printing an internal electrode layer paste on it. These are then stacked to form a green chip.

[0126] Before firing, the raw chip undergoes a binder removal process. For the binder removal conditions, the preferred heating rate is 5–300°C / hour, the preferred holding temperature is 180–400°C, and the preferred holding time is 0.5–24 hours. Furthermore, the binder removal atmosphere is either air or a reducing atmosphere.

[0127] In the firing of the green chip, the heating rate is preferably set to 500–2000 °C / hour. In this embodiment, by making the heating rate faster, the reaction between Mg and Si can be suppressed, and a segregated phase 18 containing a specified amount of Mg and Mn can be easily formed.

[0128] The firing temperature is preferably below 1300°C, more preferably 1100-1250°C, and the holding time is preferably 0.5-8 hours, more preferably 1-3 hours.

[0129] The firing atmosphere is preferably a reducing atmosphere, and the atmosphere gas can be a mixture of N2 and H2 that has been humidified before use.

[0130] Furthermore, the oxygen partial pressure during firing can be appropriately determined based on the type of conductive material in the paste used for the internal electrode layer. When using base metals such as Ni or Ni-based alloys as conductive materials, the oxygen partial pressure in the firing atmosphere is preferably set to 10. -14 ~10 -10 MPa. The preferred cooling rate is 50–2000℃ / hour.

[0131] After firing in a reducing atmosphere, it is preferable to anneal the component body 4. Annealing is a process used to re-oxidize the dielectric layer, which can significantly extend the IR lifetime (insulation resistance lifetime) and thus improve reliability.

[0132] The oxygen partial pressure in the annealing atmosphere is preferably set to 10. -9 ~10 -5 MPa.

[0133] The holding temperature during annealing is preferably set to below 1100°C, particularly 900–1100°C. The holding time is preferably set to 0–20 hours, more preferably 2–4 hours, and the cooling rate is preferably set to 50–500°C / hour, more preferably 100–300°C / hour. Furthermore, the annealing atmosphere gas is preferably, for example, humidified N2 gas.

[0134] In this embodiment, by setting the annealing to two stages, it is easy to form a segregated phase 18 containing a specified amount of Mg and Mn. Here, the two-stage annealing refers to annealing after the heating process of the first stage annealing, which is held at a temperature T °C lower than that of the first stage annealing, preferably T is greater than 0 and less than 200.

[0135] In the aforementioned debinding, firing, and annealing processes, a humidifier can be used to humidify the N2 gas or mixed gas. In this case, the water temperature is preferably around 5–75°C.

[0136] Debinding, firing, and annealing can be carried out continuously or independently.

[0137] The component body 4 obtained as described above is subjected to end face grinding, for example by tumbling or sandblasting, and then coated with external electrode paste and fired to form external electrodes 6A and 6B. Then, as needed, a coating layer is formed on the surface of the external electrodes 6A and 6B by plating or the like.

[0138] The multilayer ceramic capacitor 2 of this embodiment, thus manufactured, is mounted on a printed circuit board by brazing or the like, and used in various electronic devices.

[0139] The multilayer ceramic capacitor 2 according to this embodiment can achieve improved reliability and maintain a high relative permittivity even when the layer is thinned. This is because the multilayer ceramic capacitor 2 of this embodiment contains a segregated phase 18 having a predetermined composition based on the Mg-Mn-O system.

[0140] In existing multilayer ceramic capacitors, there exists the formation of... Figure 4 The needle-like segregated phase 18 is shown. The needle-like segregated phase 18 is a Mg-Si-O system segregated phase or a Mg-Cr-O system segregated phase. The needle-like segregated phase 18 tends to grow and has a long grain size. Therefore, it is sometimes formed by bridging one internal electrode layer 12 adjacent to the inner dielectric layer 10 with another internal electrode layer 12. This can be considered one of the reasons for decreased reliability or increased initial rejection rate.

[0141] In addition, since the needle-shaped segregated phase 18 is prone to grow, when the thickness of the inner dielectric layer 10 is reduced, there will be a part where the particles become a single particle in the stacking direction of the inner dielectric layer 10, which is not conducive to the thinning of the stacked ceramic capacitor 2.

[0142] In contrast, in this embodiment, such as Figure 2 and Figure 3 The Mg-Mn-O segregated phase 18 is shown. The Mg-Mn-O segregated phase 18 does not easily grow. Therefore, the ratio of the long particle size to the short particle size of the Mg-Mn-O segregated phase 18 is controlled within a specified range, resulting in an approximately spherical shape, with the long particle size (DL) being sufficiently short compared to the thickness (Td) of the inner dielectric layer 10. That is, the Mg-Mn-O segregated phase 18 is relatively well dispersed in the inner dielectric layer 10. Therefore, bridging between one inner electrode layer 12 adjacent to the inner dielectric layer 10 and another inner electrode layer 12 can be suppressed. Furthermore, a high number of particles in the stacking direction of the inner dielectric layer 10 can be ensured. As a result, it can be considered that the reliability of the multilayer ceramic capacitor 2 can be improved according to this embodiment.

[0143] Furthermore, the multilayer ceramic capacitor 2 according to this embodiment can suppress the particle size of dielectric particles to a smaller size and increase the relative permittivity, thus making it suitable for thin-layer multilayer ceramic capacitors 2. This can be attributed to the presence of Mg, which is an element constituting the inner dielectric layer 10. By containing Mg as an element constituting the inner dielectric layer 10, the growth of dielectric particles containing the main component can be suppressed. Therefore, it can be considered that the particle size of dielectric particles can be suppressed to a smaller size. In addition, the formation of segregated phases, which are normal dielectrics, can be suppressed, and the proportion of strong dielectrics (dielectric particles containing the main component represented by ABO3) in the dielectric layer can be increased, so it can be considered that the relative permittivity of the dielectric layer as a whole can be increased.

[0144] The present invention is not limited to the embodiments described above, and various modifications can be made within the scope of the present invention.

[0145] For example, the laminated electronic components of the present invention are not limited to laminated ceramic capacitors, but can be applied to other laminated electronic components. Other laminated electronic components refer to all electronic components having a dielectric layer, such as bandpass filters, laminated three-terminal filters, piezoelectric elements, PTC thermistors, NTC thermistors, rheostats, etc.

[0146] In this embodiment, the inner dielectric layer 10 and the inner electrode layer 12 are stacked along the Z-axis direction, but the stacking direction can also be the X-axis direction or the Y-axis direction. In this case, it is sufficient to form the outer electrodes 6A and 6B corresponding to the exposed surfaces of the inner electrode layer 12. Furthermore, the component body 4 may not be a stacked body and may be a single layer. Moreover, the inner electrode layer 12 may be led out to the outside of the component body 4 via a through-hole electrode, in which case the through-hole electrode is electrically connected to the outer electrodes 6A and 6B.

[0147] In addition, in the above embodiments, a raw material mixture is obtained by fixing the elements contained in the secondary components to the raw material powder of the main component through a coating method, and a paste for dielectric layer is obtained using the raw material mixture. However, a pre-calcined powder of the main component and a pre-calcined powder containing the elements constituting the segregated phase 18 can be prepared instead of the above raw material mixture.

[0148] However, from the viewpoint of improving reliability and increasing relative permittivity, it is preferable to use the paste for obtaining dielectric layers by coating the raw material mixture of the above-described embodiments.

[0149] One purpose of adding Mg as a byproduct is to inhibit particle growth of dielectric particles containing the main component. In the coating method of the above embodiment, elements constituting byproducts, represented by Mg, are pre-coated around the main component particles. Through coating, the byproducts physically prevent the main component particles from directly adhering to each other and thus preventing particle growth.

[0150] In contrast, if the byproducts are pre-calcined before addition, their dispersion is worse than in the coating method, making it easier for the dielectric particles containing the main component to grow. Therefore, compared to the case where the byproducts are pre-calcined, the coating method makes it difficult for the dielectric particles containing the main component to grow, suppressing particle size deviations in crystallization. As a result, deviations in electrical properties such as relative permittivity can also be suppressed, and reliability and relative permittivity are improved.

[0151] In addition, as mentioned above, the coating method can easily suppress the growth of dielectric particles containing the main component, which in turn can easily reduce the particle size of the dielectric particles, making it suitable for thin-layer multilayer ceramic capacitors.

[0152] Example

[0153] The present invention will be further described in detail below with reference to embodiments, but the present invention is not limited to these embodiments.

[0154] (Examples 1-3, Comparative Examples 1 and 2)

[0155] Prepare the elements constituting the main component and the elements constituting the secondary component according to the composition listed in Table 1, and obtain a paste for the dielectric layer using the raw material mixture fixed by the coating method.

[0156] Then, using the dielectric layer paste prepared above, a green sheet is formed on the PET film. The internal electrode layer paste is then screen-printed to form a green sheet.

[0157] Multiple green films are stacked and pressed together to form a green wafer stack. The green wafer stack is then cut to a specified size to obtain a green chip.

[0158] Next, the obtained raw chip is subjected to binder removal, firing and annealing under the following conditions to obtain a sintered body (component body 4).

[0159] The adhesive removal treatment conditions are as follows. In Example 3 only, the atmosphere was set to air.

[0160] Temperature range: 200–900℃

[0161] Atmospheric gas: Humidified N2 + H2 mixture

[0162] Oxygen partial pressure: 10 -12 MPa

[0163] The firing conditions are as follows.

[0164] Heating rate: as recorded in Table 2

[0165] Atmospheric gas: Humidified N2 + H2 mixture

[0166] Oxygen partial pressure: 10 -12 MPa

[0167] The annealing conditions are as follows.

[0168] Maintain temperature: 850~1081℃

[0169] Atmospheric gas: Humidified N2 gas

[0170] Oxygen partial pressure: 10 -7 MPa

[0171] A humidifier is used to humidify the atmosphere gas during firing and annealing.

[0172] Next, the end face surface of the obtained component body 4 was blasted using a roller mill. Then, Cu was coated onto the external electrodes 6A and 6B, followed by sintering under nitrogen atmosphere to obtain... Figure 1 The capacitor sample of the stacked ceramic capacitor 2 shown.

[0173] The dimensions of the main body 4 of the obtained capacitor sample 2 are L0×W0×T0=2.0mm×1.25mm×1.25mm. In addition, the number of inner dielectric layers 10 sandwiched by the inner electrode layer 12 is 360.

[0174] <Observation of Capacity Area>

[0175] On the cross-section of the obtained capacitor sample, the longest particle size of the segregated phase 184 in the capacitance region 14 was defined as the long particle size (DL), and the shortest particle size of the segregated phase 184 in the capacitance region was defined as the short particle size (DS). The DL / DS was calculated in each field of view, and the maximum and minimum DL / DS values ​​are shown in Table 2.

[0176] DL / Td was calculated based on the longest grain size (DL) among all the capacity region segregated phases 184 observed in the above fields of view and the average thickness (Td) of the inner dielectric layer 10 in each field of view. The results are shown in Table 2.

[0177] The average equivalent circle diameter (Da) of the segregated phase 184 in the capacity region observed in the above-mentioned fields of view was determined. The results are shown in Table 2. In the table, the shaded areas indicate those not measured.

[0178] Calculate the area ratio (S1) of the segregated phase 184 in the capacity region relative to the area of ​​each field of view mentioned above, and then calculate the average value.

[0179] <Observation of the Leading Area>

[0180] On the cross-section of the obtained capacitor sample, observe the 6μm×6μm field of view of the lead-out region 15. Define the longest particle size of the segregated phase 185 in the lead-out region 185 confirmed in a field of view as the long particle size (DL) and the shortest particle size of the segregated phase 185 in the lead-out region as the short particle size (DS). Calculate DL / DS in each field of view. The maximum and minimum values ​​of DL / DS are shown in Table 2.

[0181] DL / Td was calculated based on the longest grain size (DL) among all the segregated phases 185 observed in the above fields of view and the average thickness (Td) of the inner dielectric layer 10 in each field of view. The results are shown in Table 2.

[0182] Calculate the average equivalent circle diameter (Da) of the segregated phase 185 observed in the extraction region in each of the above fields of view. The results are shown in Table 2. The shaded areas indicate areas not measured.

[0183] Calculate the area ratio (S2) of the segregated phase 185 in the extraction region relative to the area of ​​each of the above-mentioned fields of view, and then calculate the average value.

[0184] <S1 / S2>

[0185] S1 / S2 was calculated based on S1 and S2 as described above. The results are shown in Table 2. The shaded areas indicate areas not measured.

[0186] <Density of dielectric particles>

[0187] The main body 4 of the component was cut along the stacking direction of the inner dielectric layer 10 and the inner electrode layer 12. The average area of ​​the dielectric particles on the cross section was measured, and the diameter was calculated as the equivalent circle diameter. The results are shown in Table 3.

[0188] <Relative permittivity (ε)>

[0189] For the capacitor samples, the capacitance was measured using a digital LCR meter (Agilent Technologies 4278A) at a reference temperature of 20°C, with a frequency of 1 kHz and an input signal level (measurement voltage) of 1.0 Vrms. The relative permittivity (unitless) was then calculated. The results are shown in Table 3.

[0190] <±PTV Failure Rate Index>

[0191] For all manufactured batches of capacitor samples, the rejection rate when applying voltages above the rated value was used as the ±PTV rejection rate. The evaluation was conducted using Comparative Example 2 as an index of 100. The results are shown in Table 3.

[0192] [Table 1]

[0193]

[0194] [Table 2]

[0195]

[0196] [Table 3]

[0197]

[0198] Figure 5 This is a graph based on Table 3, where the x-axis is set to the particle size [μm] of the dielectric particles and the y-axis is set to the relative permittivity. ■ represents Example 1, ◆ represents Example 2, ▲ represents Example 3, × represents Comparative Example 1, and + represents Comparative Example 2. The straight line L satisfies y = 20000x - 1500.

[0199] From Tables 1-3 and Figure 5It is known that the molar ratio of MgO to SiO2 in the dielectric layer (MgO / SiO2) is 1-5, and the molar ratio of MgO to MnO in the dielectric layer (MgO / MnO) is 5-13. When the total content of MgO, NiO, MnO, Cr2O3, and SiO2 in the segregated phase is set to 100 molar parts, the content of MgO in the segregated phase is 63.0-99.5 molar parts. When the content of MnO in the segregated phase is 0.5-12.6 molar parts (Examples 1-3), the content of MgO in the segregated phase is 63.0-99.5 molar parts. Figure 5 The straight line L is positioned to the left, which allows for a smaller particle size of the dielectric particles and an increase in the relative permittivity.

[0200] As shown in Tables 1-3, the molar ratio of MgO to SiO2 in the dielectric layer (MgO / SiO2) is 1-5, and the molar ratio of MgO to MnO in the dielectric layer (MgO / MnO) is 5-13. When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregated phase is set to 100 molar parts, the content of MgO in the segregated phase is 63.0-99.5 molar parts. When the content of MnO in the segregated phase is 0.5-12.6 molar parts (Examples 1-3), compared with the case where the content of MnO in the segregated phase is 0 molar parts (Comparative Examples 1 and 2), the ±PTV failure rate index is low, so the reliability is high.

Claims

1. A stacked electronic component having a component body comprising alternating layers of dielectric layers and internal electrode layers, wherein, The dielectric layer has a principal component and a secondary component represented by the general formula ABO3. Site A contains at least one selected from Ba, Ca, and Sr. Site B contains at least one selected from Ti and Zr. The byproducts contain MgO, SiO2, and MnO. The by-products may or may not contain NiO or Cr2O3. The molar ratio of MgO to SiO2 in the dielectric layer is 1 to 5. The molar ratio of MgO to MnO in the dielectric layer is 5 to 13. The main body of the component contains a segregated phase. When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregated phase is set to 100 molar parts, the content of MgO in the segregated phase is 63.0 to 99.5 molar parts, and the content of MnO in the segregated phase is 0.5 to 12.6 molar parts.

2. The stacked electronic component according to claim 1, wherein, When the long particle size of the segregated phase is defined as DL and the short particle size of the segregated phase is defined as DS, DL and DS satisfy the relationship 1 < DL / DS < 2.

3. The stacked electronic component according to claim 1, wherein, When the thickness of the dielectric layer is set as Td and the long particle size of the segregated phase is set as DL, Td / DL is greater than 1.

4.

4. The stacked electronic component according to claim 1, wherein, When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregated phase is set to 100 molar parts, the content of NiO in the segregated phase is 0 to 36 molar parts.

5. The stacked electronic component according to claim 1, wherein, When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregated phase is set to 100 molar parts, the content of Cr2O3 in the segregated phase is 0 to 0.1 molar parts.

6. The stacked electronic component according to claim 1, wherein, When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregated phase is set to 100 molar parts, the content of SiO2 in the segregated phase is 0 to 0.01 molar parts.

7. The stacked electronic component according to claim 1, wherein, The byproduct includes R2O3. When the content of the main component in the dielectric layer is set to 100 moles, the content of R2O3 in the dielectric layer is 0.4 to 2.0 moles. R is at least one selected from Y, Dy, Ho and Yb.

8. The stacked electronic component according to claim 1, wherein, When the content of the main component in the dielectric layer is set to 100 molar parts, the content of MgO in the dielectric layer is 0.5 to 2.0 molar parts.

9. The stacked electronic component according to claim 1, wherein, When the content of the main component in the dielectric layer is set to 100 molar parts, the content of MnO in the dielectric layer is 0.01 to 0.20 molar parts.

10. The stacked electronic component according to claim 1, wherein, When the content of the main component in the dielectric layer is set to 100 molar parts, the content of SiO2 in the dielectric layer is 0.18 to 2.95 molar parts.

11. The stacked electronic component according to claim 1, wherein, The equivalent circle diameter Da of the segregated phase is 0.12–1.0 μm.

12. The stacked electronic component according to any one of claims 1 to 11, wherein, When the segregated phase located in the capacitance region that contributes to the capacitance is designated as the capacitance region segregated phase, and the segregated phase located in the lead-out region that does not contribute to the capacitance is designated as the lead-out region segregated phase, and the area ratio of the capacitance region segregated phase within a specified range of the capacitance region is set as S1, and the area ratio of the lead-out region segregated phase within a specified range of the lead-out region is set as S2, S1 / S2 is less than 1.

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