Method for fabricating horizontal nanometer air channel transistor based on sacrificial layer

Abstract

The application provides a horizontal nanometer air channel transistor preparation method based on a sacrifice layer and belongs to the technical field of semiconductor transistors. In the method, a conductive film and a sacrifice layer film are sequentially deposited on an insulating substrate; a photoresist-sacrifice layer pattern is formed; part of the sacrifice layer film is laterally removed, so that the edge of the photoresist is suspended; a mask film is deposited to form a horizontal nanometer air channel; finally, the remaining part is peeled off to leave an electrode, and the preparation of the horizontal nanometer air channel diode is completed. In the method, the lateral removal depth of the sacrifice layer is controlled, so that the size control precision of the horizontal nanometer air channel can reach the nanometer level. Meanwhile, the method has the advantages of low cost, simplicity, good repeatability, stability and consistency, complete compatibility with the semiconductor process, and the like, is suitable for batch production of large-area wafer-level nanometer air channel transistor arrays, and has true practicability.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor transistor technology, specifically relating to a method for fabricating horizontal nano-air channel transistors based on a sacrificial layer. Background Technology

[0002] Vacuum is an ideal medium for high-speed ballistic electron transport. Electrons can travel at almost the speed of light in a vacuum, which is three orders of magnitude faster than in semiconductor media. This largely overcomes the limitations of diffusion and carrier transport rates in solid-state gates, further improving the response rate and operating frequency of semiconductor transistors, and also offering advantages in heat dissipation and power consumption. In recent years, the emerging nanoscale air-channel transistor combines the advantages of vacuum electronics and semiconductor electronics, reducing the distance between the cathode, anode or source, drain, and gate at the nanoscale. This reduces the size of the electron transport channel to below the mean free path in air, enabling ballistic electron transport in air. Compared to semiconductor transistors, nanoscale air-channel transistors offer significant advantages such as miniaturization, high integration, and mass production capabilities. Due to the drastically reduced channel size, they can operate at low voltages and can be fabricated using semiconductor micro / nanotechnology. Unlike traditional semiconductors, solid-state lattice scattering does not affect the electron transport process. With the same channel area, the response speed and operating frequency can be far higher than those of semiconductor transistors. It can operate in the millimeter-wave ultra-high frequency band, terahertz, and even petahertz frequencies, and has many advantages such as low heat generation, low power consumption, radiation resistance, and resistance to high and low temperatures. Therefore, the nano-air channel transistor is very likely to be the next revolutionary and disruptive transistor after existing vacuum transistors and solid-state semiconductor transistors.

[0003] Currently, most reported nano-air-channel transistors are typically fabricated using fine nanofabrication processes, such as electron beam lithography and focused ion beam etching. On the one hand, these methods require expensive nanofabrication equipment; on the other hand, they suffer from low yields and poor repeatability during the process, making them unsuitable for large-scale production. In recent years, some new methods for fabricating nano-air-channel transistors have been reported. For example, patent publication CN112103158A proposes a method for fabricating vertical nano-air-channel diodes by selectively etching nanofilms. However, this method is only applicable to devices with vertical nano-air-channel structures and is not suitable for horizontal nano-air-channel transistors with smaller capacitance and larger bandwidth. Patent publication CN 112951916A proposes a nano-air-channel transistor based on sidewall technology and its fabrication method, which can be used for fabricating transistors with horizontal nano-air-channel structures. However, the chemical mechanical polishing (CMP) process required is greatly affected by wafer warpage and has limited control precision, making it difficult to fabricate uniform device arrays on large-area wafers. Some literature also reports the use of semiconductor-incompatible processes such as self-assembled micro / nanosphere masks or metal fractures to create gaps to fabricate horizontal nano-air channel transistors. In general, a large-area wafer-level manufacturing process truly suitable for horizontal nano-air channel transistors remains a bottleneck. Therefore, there is an urgent need for a method with nanometer-level processing precision suitable for mass production on large-area wafers to reduce the manufacturing cost of nano-channel transistors and put them into practical production applications. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention proposes a method for fabricating horizontal nano-air channel transistors based on a sacrificial layer. The aim is to provide a method that achieves nanometer-level channel processing precision, is fully compatible with semiconductor processes, exhibits good repeatability, stability, and consistency, does not rely on expensive nanofabrication equipment, has low cost, high yield, and can be used to mass-produce nano-air channel transistors on large-area wafers.

[0005] The above-mentioned technical objective of the present invention is achieved through the following technical solution:

[0006] A method for fabricating a horizontal nano-air channel diode based on a sacrificial layer, characterized by comprising the following steps:

[0007] S1. A conductive thin film and a sacrificial layer thin film are sequentially deposited on an insulating substrate;

[0008] S2. A photoresist pattern is formed on the surface of the sacrificial layer film by photolithography, and then the sacrificial layer film is obtained by wet etching or etching to obtain the photoresist-sacrificial layer pattern;

[0009] S3. By etching or wet etching, part of the sacrificial layer film is removed laterally, leaving the edge of the photoresist suspended;

[0010] S4. Deposit the mask film, at which point a horizontal nano-air channel is formed between the sacrificial layer film and the mask film located on the same horizontal plane;

[0011] S5. Remove the photoresist and the mask film above it using a wet method with organic solvents;

[0012] S6. The nano-air channel is transferred into the underlying conductive film by wet etching or etching to form the cathode and anode; then the remaining sacrificial layer film and mask film are peeled off to complete the fabrication of the horizontal nano-air channel diode.

[0013] Furthermore, when the materials of the sacrificial layer film and the mask film are conductive materials, the fabrication method of the horizontal nano-air channel diode includes the following steps:

[0014] S1. Deposit a first conductive film on an insulating substrate; the first conductive film serves as both an electrode material and a sacrificial layer;

[0015] S2. A photoresist pattern is formed on the first conductive film by photolithography, and then the first conductive film is patterned by wet etching to obtain a photoresist-conductive film pattern.

[0016] S3. By etching or wet etching, a portion of the first conductive film is removed laterally, leaving the edge of the photoresist suspended.

[0017] S4. Deposit the second conductive film; at this time, a horizontal nano-air channel is formed between the first conductive film and the second conductive film located on the same horizontal plane;

[0018] S5. The horizontal nano-air channel diode is fabricated by removing the photoresist and the second conductive film above it using an organic solvent wet process.

[0019] Furthermore, the conductive thin film, the first conductive thin film, and the second conductive thin film are metal conductive thin films, metal-like conductive thin films, or semiconductor conductive thin films.

[0020] Furthermore, the material of the sacrificial layer film is SiO2, or a metal or semiconductor with different corrosion properties than the conductive film; the material of the mask film is SiO2, or a metal with different corrosion properties than the conductive film.

[0021] A method for fabricating a horizontal nano-air channel transistor based on a sacrificial layer, characterized by comprising the following steps:

[0022] S1. Deposit a metal gate film on an insulating substrate;

[0023] S2. A first photoresist pattern is formed on a metal gate film by photolithography, and then the gate is formed by wet etching or etching.

[0024] S3. Sequentially deposit a first sacrificial layer film, a source / drain film, and a second sacrificial layer film over the insulating substrate and the gate;

[0025] S4. A second photoresist pattern is formed on the second sacrificial layer film by photolithography, and then a photoresist-sacrificial layer pattern is formed by wet etching or dry etching.

[0026] S5. By etching or wet etching, a portion of the second sacrificial layer film is removed laterally, leaving the edge of the photoresist suspended.

[0027] S6. Deposit the mask film, at which time a horizontal nano-air channel is formed between the second sacrificial layer film and the mask film located on the same horizontal plane, and the nano-air channel is located directly above the gate;

[0028] S7. Remove the photoresist and the mask film above it by wet method with organic solvent;

[0029] S8. The nano-air channel is transferred into the lower source and drain film by wet etching or etching, forming the source and drain; then the remaining portion of the second sacrificial layer film and mask film are peeled off to complete the fabrication of the horizontal nano-air channel transistor. Further, the source and drain film is a metal film or a semiconductor conductive film.

[0030] The advantages of this invention are as follows:

[0031] 1. The preparation method proposed in this invention does not rely on expensive nanofabrication equipment, is low in cost, simple and easy to implement, is fully compatible with semiconductor processes, and has good repeatability, stability and consistency. It is suitable for mass production of large-area wafer-level nano-air channel transistor arrays and has real practicality.

[0032] 2. By controlling the lateral removal depth of the sacrificial layer, this invention can achieve nanometer-level precision in controlling the size of horizontal nano-air channels.

[0033] 3. The fabrication method proposed in this invention can achieve a horizontal nano-air channel structure with a high aspect ratio by using a thick sacrificial layer mask, without being limited by the aspect ratio of traditional photolithography patterning processes.

[0034] 4. The sacrificial layer mask method proposed in this invention enables the formation of channels and the alignment of the source, drain and gate in nano-air channel transistors with bottom gate structure, thus avoiding the overlay error problem when traditional photolithography generates nano-air channels and gates. Attached Figure Description

[0035] Figure 1 ,2 The images show a side cross-sectional view and a 3D schematic diagram of the process flow for fabricating a horizontal nano-air channel diode based on a sacrificial layer, as proposed in this invention. Wherein: 11, insulating substrate; 12, conductive thin film; 13, sacrificial layer thin film; 14, photoresist; 15, mask thin film; 16, nano-air channel.

[0036] Figure 3 , 4 The figures shown are a side cross-sectional view and a 3D schematic diagram of the method for fabricating a horizontal nano-air channel back-gate transistor based on a sacrificial layer proposed in this invention. Wherein: 31, insulating substrate; 32, metal gate film; 33, first sacrificial layer film; 34, source / drain film; 35, second sacrificial layer film; 36, photoresist; 37, SiO2 dielectric film; 38, horizontal nano-air channel.

[0037] Figure 5 , 6 The figures shown are a side cross-sectional view and a 3D schematic diagram of the horizontal nano-air channel diode fabrication method based on a cathode as a sacrificial layer proposed in this invention. Wherein: 51, insulating substrate; 52, first conductive film; 53, photoresist; 54, second conductive film; 55, horizontal nano-air channel.

[0038] Figure 7 This is a 3D schematic diagram illustrating the basic principle of the anode-surrounded horizontal nano-air channel diode fabrication method based on the sacrificial layer proposed in this invention. Wherein: 71, insulating substrate; 72, conductive metal thin film; 73, sacrificial layer thin film; 74, photoresist; 75, mask thin film; 76, horizontal nano-air channel.

[0039] Figure 8 This is a 3D schematic diagram of the single-sided gate horizontal nano-air channel crystal fabrication method based on a sacrificial layer proposed in this invention. Wherein: 81, insulating substrate; 82, metal gate; 83, photoresist; 84, metal anode thin film; 85, metal cathode thin film; 86, horizontal nano-air channel.

[0040] Figure 9 This is a 3D schematic diagram of the method for fabricating a horizontal nano-air channel crystal based on a sacrificial layer proposed in this invention. Wherein: 91, insulating substrate; 92, metal gate; 93, photoresist; 94, metal anode thin film; 95, metal cathode thin film; 96, horizontal nano-air channel. Detailed Implementation

[0041] The technical solutions of the present invention will be further described below with reference to the accompanying drawings and embodiments.

[0042] Example 1

[0043] A method for fabricating a horizontal nano-air channel diode based on a sacrificial layer, where both the anode and cathode are metallic, is described below. Figure 1 , 2 As shown, it includes the following steps:

[0044] S1. Sequentially deposit a metal conductive film (such as gold, aluminum, chromium, titanium, etc.) and a sacrificial layer film (such as SiO2 film, etc.) on an insulating substrate.

[0045] S2. A photoresist pattern is formed on the surface of the sacrificial layer film by photolithography, and then the sacrificial layer film is obtained by wet etching or etching to obtain the photoresist-sacrificial layer pattern.

[0046] S3. By etching or wet etching, part of the sacrificial layer film is removed laterally, leaving one edge of the photoresist suspended. A nano-air channel is formed in the area below the suspended part of the photoresist. By controlling the etching or wet etching time, the width of the nano-channel can be precisely controlled.

[0047] S4. Deposit a mask film. The mask film material is SiO2 or a metal with different corrosion properties than the conductive film. At this time, a horizontal nano-air channel is formed between the sacrificial layer film and the mask film located on the same horizontal plane.

[0048] S5. Remove the photoresist and the mask film above it by wet process with organic solvent.

[0049] S6. The nano-air channel is transferred into the underlying metal conductive film by wet etching or etching method, forming the cathode and anode; then the remaining sacrificial layer film and mask film are peeled off to complete the fabrication of the horizontal nano-air channel diode.

[0050] Example 2

[0051] A method for fabricating a horizontal nano-air channel diode based on a sacrificial layer, where both the anode and cathode are made of high-temperature resistant metals (such as TiN, HfN, ZrN, and ITO), is described below. Figure 1 , 2 As shown, it includes the following steps:

[0052] S1. A high-temperature resistant metal-like conductive film (such as TiN, HfN, ZrN, ITO, etc.) and a sacrificial layer film (such as SiO2, etc.) are sequentially deposited on an insulating substrate.

[0053] S2. A photoresist pattern is formed on the surface of the sacrificial layer film by photolithography, and then the sacrificial layer film is obtained by wet etching or etching to obtain the photoresist-sacrificial layer pattern.

[0054] S3. By etching or wet etching, part of the sacrificial layer film is removed laterally, leaving one edge of the photoresist suspended. A nano-air channel is formed in the area below the suspended part of the photoresist. By controlling the etching or wet etching time, the width of the nano-channel can be precisely controlled.

[0055] S4. Deposit a mask film. The mask film material is SiO2 or a metal with different corrosion properties than the conductive film. At this time, a horizontal nano-air channel is formed between the sacrificial layer film and the mask film located on the same horizontal plane.

[0056] S5. Remove the photoresist and the SiO2 mask film above it by wet solvent removal.

[0057] S6. The nano-air channel is transferred into the lower high-temperature resistant metal-like conductive film by wet etching or etching method, and the cathode and anode are formed; then the remaining sacrificial layer film and mask film are peeled off to complete the fabrication of the horizontal nano-air channel diode.

[0058] The difference between this embodiment and Embodiment 1 lies in the electrode material of the diode being prepared.

[0059] Example 3

[0060] A method for fabricating a horizontal nano-air channel back gate transistor based on a sacrificial layer, the process flow of which is as follows: Figure 3 , 4 As shown, it includes the following steps:

[0061] S1. Deposit a metal gate film (such as gold, chromium, titanium, etc.) on an insulating substrate.

[0062] S2. A first photoresist pattern is formed on a metal gate film by photolithography, and then the gate is formed by wet etching or etching.

[0063] S3. A first sacrificial layer film, a source / drain film, and a second sacrificial layer film are sequentially deposited over an insulating substrate and a gate; wherein the source / drain film is a metal film (such as gold, chromium, titanium, etc.) or a semiconductor film (such as P-type Si).

[0064] S4. A second photoresist pattern is formed on the second sacrificial layer film by photolithography, and then a photoresist-sacrificial layer pattern is formed by wet etching or dry etching.

[0065] S5. By etching or wet etching, a portion of the second sacrificial layer film is removed laterally, leaving one edge of the photoresist suspended. A nano-air channel is formed below the suspended portion of the photoresist, and the nano-air channel is located directly above the gate. By controlling the etching or etching duration, the width of the nano-air channel can be precisely controlled.

[0066] S6. Deposit a SiO2 dielectric film, at which point a horizontal nano-air channel is formed between the second sacrificial layer film and the SiO2 dielectric film located on the same horizontal plane.

[0067] S7. Remove the photoresist and the SiO2 dielectric film above it by wet solvent removal.

[0068] S8. The nano-air channel is transferred into the lower source and drain film by wet etching or etching method, and the source and drain are formed; then the remaining part of the second sacrificial layer film and SiO2 dielectric film are peeled off to complete the fabrication of the horizontal nano-air channel back gate transistor.

[0069] Example 4

[0070] A method for fabricating a horizontal nano-air channel diode based on a sacrificial layer, wherein the cathode is a semiconductor material and the anode is a metallic material, the process flow of which is as follows: Figure 5 , 6 As shown, it includes the following steps:

[0071] S1. Deposit a first conductive thin film on an insulating substrate; the first conductive thin film is a semiconductor thin film (such as Si, Ge, In GaAs, etc.) or a metal thin film (such as Al, etc.). In this embodiment, the first conductive thin film serves as both an electrode material and a sacrificial layer.

[0072] S2. A photoresist pattern is formed on the first conductive film by photolithography, and then the conductive film is patterned by wet etching to obtain a photoresist-conductive film pattern.

[0073] S3. By etching or wet etching, a portion of the first conductive film is removed laterally, leaving one edge of the photoresist suspended. An air channel is formed in the area below the suspended portion of the photoresist. By controlling the etching time, the width of the horizontal nano-air channel can be precisely controlled.

[0074] S4. Deposit a second conductive thin film, which is a semiconductor thin film (such as Si, Ge, InGaAs, etc.) or a metal thin film (such as Al, etc.); at this time, a horizontal nano-air channel is formed between the first conductive thin film and the second conductive thin film located on the same horizontal plane.

[0075] S5. The horizontal nano-air channel diode is fabricated by removing the photoresist and the second conductive film above it using an organic solvent wet process.

[0076] Example 5

[0077] A method for fabricating a horizontal nano-air channel diode with both anode and cathode being metallic, based on a sacrificial layer, is described below. Figure 7 As shown, it includes the following steps:

[0078] S1. Sequentially deposit a conductive metal thin film (such as gold, aluminum, chromium, titanium, etc.) and a sacrificial layer thin film (such as SiO2, etc.) on an insulating substrate.

[0079] S2. A photoresist pattern is formed on the surface of the sacrificial layer film by photolithography, and then the sacrificial layer film is obtained by wet etching or etching to obtain the photoresist-sacrificial layer pattern.

[0080] S3. By etching or wet etching, part of the sacrificial layer film is removed laterally, so that the side edges of the photoresist are all suspended; a nano-air channel is formed in the area below the suspended part of the photoresist. By controlling the etching time, the width of the nano-air channel can be precisely controlled.

[0081] S4. Deposit a mask film. The mask film material can be SiO2 or a metal with different corrosion properties than the conductive film. At this time, a horizontal nano-air channel is formed between the sacrificial layer film and the mask film located on the same horizontal plane.

[0082] S5. Remove the photoresist and the mask film above it by wet process with organic solvent.

[0083] S6. The nano-air channel is transferred into the underlying metal conductive film by wet etching or etching method, forming the cathode and anode; then the remaining sacrificial layer film and mask film are peeled off to complete the fabrication of the horizontal nano-air channel diode.

[0084] The difference between this embodiment and Embodiment 1 lies in the electrode structure of the diode being fabricated.

[0085] Example 6

[0086] A method for fabricating a horizontal nano-air channel single-side gate transistor based on a sacrificial layer, the process flow of which is as follows: Figure 8 As shown, it includes the following steps:

[0087] S1. Deposit a metal gate film (such as gold, chromium, titanium, etc.) on an insulating substrate.

[0088] S2. A first photoresist pattern is formed on a metal gate film by photolithography, and then a photoresist-gate pattern is formed by wet etching.

[0089] S3. By etching or wet etching, a portion of the metal gate film is removed laterally, leaving the edge of the photoresist suspended. A nano-air channel is formed below the suspended portion of the photoresist. By controlling the etching or etching time, the width of the nano-air channel can be precisely controlled.

[0090] S4. Deposit a first metal conductive film (such as gold, chromium, titanium, etc.) on the insulating substrate and photoresist.

[0091] S5. A second photoresist pattern is generated on the first conductive metal film by photolithography, and then a photoresist-source / drain pattern is formed by wet etching or dry etching. The photolithography shape in this step will affect the source / drain of the final device, so the photomask must be designed according to the source / drain shape.

[0092] S6. Part of the first metal conductive film is removed laterally by etching or wet etching.

[0093] S7. Deposit a second metallic conductive film.

[0094] S8. The first photoresist and the first metal gate film above it, the second photoresist and the second metal gate film above it are removed by wet organic solvent process. At this time, the remaining second metal conductive film serves as the drain / source, and the gate, source and drain are located on the same plane, thus completing the fabrication of the horizontal nano-air channel single-sided gate transistor.

[0095] Example 7

[0096] A method for fabricating a horizontal nano-air channel dual-gate transistor based on a sacrificial layer, the process flow of which is as follows: Figure 9 As shown, the method includes the following steps:

[0097] S1. Deposit a metal gate film (such as gold, chromium, titanium, etc.) on an insulating substrate.

[0098] S2. Two first photoresist patterns are formed on the metal gate film by photolithography, and then two photoresist-gate patterns are formed by wet etching.

[0099] S3. By etching or wet etching, a portion of the metal gate film is removed laterally, leaving the edge of the photoresist suspended. A nano-air channel is formed below the suspended portion of the photoresist. By controlling the etching or etching time, the width of the nano-air channel can be precisely controlled.

[0100] S4. Deposit a first metal conductive film (such as gold, chromium, titanium, etc.) on the insulating substrate and photoresist.

[0101] S5. A second photoresist pattern is generated on the first conductive metal film by photolithography, and then a photoresist-source / drain pattern is formed by wet etching or dry etching. The photolithography shape in this step will affect the source / drain of the final device, so the photomask must be designed according to the source / drain shape.

[0102] S6. Part of the first metal conductive film is removed laterally by etching or wet etching.

[0103] S7. Deposit a second metallic conductive film.

[0104] S8. The first photoresist and the first metal gate film above it, the second photoresist and the second metal gate film above it are removed by wet organic solvent process. At this time, the remaining second metal conductive film serves as the drain / source, and the dual gate, source and drain are located on the same plane, thus completing the fabrication of the horizontal nano-air channel dual-side gate transistor.

[0105] The difference between this embodiment and Embodiment 6 lies in the gate structure of the prepared transistor.

[0106] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for fabricating a horizontal nano-air channel diode based on a sacrificial layer, characterized in that, Includes the following steps: S1. A conductive thin film and a sacrificial layer thin film are sequentially deposited on an insulating substrate; S2. A photoresist pattern is formed on the surface of the sacrificial layer film by photolithography, and then the sacrificial layer film is obtained by wet etching or etching to obtain the photoresist-sacrificial layer pattern; S3. By etching or wet etching, part of the sacrificial layer film is removed laterally, leaving the edge of the photoresist suspended; S4. Deposit the mask film, at which point a horizontal nano-air channel is formed between the sacrificial layer film and the mask film located on the same horizontal plane; S5. Remove the photoresist and the mask film above it using a wet method with organic solvents; S6. The nano-air channel is transferred into the underlying conductive film by wet etching or etching to form the cathode and anode; then the remaining sacrificial layer film and mask film are peeled off to complete the fabrication of the horizontal nano-air channel diode.

2. The method for fabricating a horizontal nano-air channel diode based on a sacrificial layer as described in claim 1, characterized in that, When the materials of the sacrificial layer film and the mask film are conductive materials, the fabrication method of the horizontal nano-air channel diode includes the following steps: S1. Deposit a first conductive film on an insulating substrate; the first conductive film serves as both an electrode material and a sacrificial layer; S2. A photoresist pattern is formed on the first conductive film by photolithography, and then the first conductive film is patterned by wet etching to obtain a photoresist-conductive film pattern. S3. By etching or wet etching, a portion of the first conductive film is removed laterally, leaving the edge of the photoresist suspended. S4. Deposit the second conductive film; at this time, a horizontal nano-air channel is formed between the first conductive film and the second conductive film located on the same horizontal plane; S5. The horizontal nano-air channel diode is fabricated by removing the photoresist and the second conductive film above it using an organic solvent wet process.

3. A method for fabricating a horizontal nano-air channel diode based on a sacrificial layer as described in claim 1 or 2, characterized in that, The conductive film, the first conductive film, and the second conductive film are metal conductive films, metal-like conductive films, or semiconductor conductive films.

4. The method for fabricating a horizontal nano-air channel diode based on a sacrificial layer as described in claim 3, characterized in that, The sacrificial layer film is made of SiO2, or a metal or semiconductor with different corrosion properties than the conductive film; the mask film is made of SiO2, or a metal with different corrosion properties than the conductive film.

5. A method for fabricating a horizontal nano-air channel transistor based on a sacrificial layer, characterized in that, Includes the following steps: S1. Deposit a metal gate film on an insulating substrate; S2. A first photoresist pattern is formed on a metal gate film by photolithography, and then the gate is formed by wet etching or etching. S3. Sequentially deposit a first sacrificial layer film, a source / drain film, and a second sacrificial layer film over the insulating substrate and the gate; S4. A second photoresist pattern is formed on the second sacrificial layer film by photolithography, and then a photoresist-sacrificial layer pattern is formed by wet etching or dry etching. S5. By etching or wet etching, a portion of the second sacrificial layer film is removed laterally, leaving the edge of the photoresist suspended. S6. Deposit the mask film, at which time a horizontal nano-air channel is formed between the second sacrificial layer film and the mask film located on the same horizontal plane, and the nano-air channel is located directly above the gate; S7. Remove the photoresist and the mask film above it by wet method with organic solvent; S8. The nano-air channel is transferred into the lower source and drain film by wet etching or etching to form the source and drain; then the remaining part of the second sacrificial layer film and mask film are peeled off to complete the fabrication of the horizontal nano-air channel transistor.

6. The method for fabricating a horizontal nano-air channel transistor based on a sacrificial layer as described in claim 5, characterized in that, The source and drain thin films are metal thin films or semiconductor conductive thin films.

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