A GaAs-based flip-chip Mini LED chip and its fabrication method

Abstract

The application relates to a GaAs-based flip Mini LED chip and a preparation method thereof, and belongs to the LED chip preparation field. The epitaxial wafer comprises, from bottom to top, a substrate, a bonding layer, a P-GaP light window layer, a P-AlInP waveguide layer, an MQW light-emitting layer, an N-AlInP waveguide layer, an N-AlGaInP current expansion layer and an N-GaAs ohmic layer. N and P primary electrodes are respectively evaporated on the N-GaAs ohmic layer and the bonding layer. A DBR passivation layer is deposited on the surface of the epitaxial wafer. P and N electrode pads are respectively made above the P and N conductive holes. The bonding layer comprises an ITO film, an Al2O3 film and an SiO2 film. The application optimizes the bonding layer structure, improves the bonding yield after the substrate is replaced, saves the epitaxial cost, increases the light-emitting area to improve the brightness, simultaneously makes the P and N primary ohmic contact electrodes to reduce the chip cost and the production cycle.

Description

Technical Field

[0001] This invention relates to a GaAs-based flip-chip Mini LED and its fabrication method, belonging to the field of LED chip fabrication technology. Background Technology

[0002] 2021 was an extraordinary year for the display industry. Driven by terminal giants such as Huawei, Apple, Samsung, Skyworth, and TCL, Mini LED rapidly moved towards large-scale commercialization, shining brightly in fields such as TVs, monitors, laptops, tablets, automotive displays, and VR. However, the current application terminals are generally expensive, which is undoubtedly a stumbling block to the continued growth of the Mini LED market. Among them, the Mini LED chips, driver ICs, backplanes, and auxiliary materials, which account for the main costs, have high manufacturing costs due to factors such as technical routes, yield rates, and supply chain integration.

[0003] The current mainstream fabrication route for GaAs-based flip-chip Mini LEDs is as follows: epitaxial growth → substrate replacement → mesa fabrication → P-ohm contact electrode fabrication → N-ohm contact electrode fabrication → passivation layer fabrication → P and N pad fabrication → thinning → spot testing and sorting → warehousing. Epitaxial costs account for approximately 35%, chip manufacturing processes for approximately 40%, and spot testing and sorting for 25%. The GaP (gabium oxide) window layer in the epitaxial structure is typically 3-10 μm thick, a significant factor contributing to the high cost. The bonding materials in substrate replacement are generally transparent oxide materials such as alumina, silicon oxide, and silicon nitride. The method involves depositing a 2 μm to 6 μm layer of these oxides onto the roughened epitaxial P-GaP window layer. After CMP polishing, the oxide surface on the GaAs-based chip is bonded to the transparent sapphire substrate using a high-temperature, high-pressure process. Because the roughening morphology of the P-GaP window layer is difficult to control and it is difficult to obtain a good pyramid shape, a large number of voids exist at the contact surface between the oxide transparent material and the P-GaP window layer. After subsequent high-temperature and high-pressure chip manufacturing processes, cracks and gaps easily appear at the contact surface between the oxide and the P-GaP window layer, resulting in a significant decrease in chip yield and very unstable bonding yield. The mesa etching process mainly uses dry ICP etching to etch down to the P-GaP layer, which requires high etching uniformity. The method for fabricating P and N ohmic contact electrodes is to first perform P electrode photolithography → P electrode evaporation → P electrode stripping and cleaning → P electrode annealing, and then use the same method to fabricate N electrodes. The fabrication cycle is long. In addition, due to the need for current expansion, P electrodes are generally led, which will occupy the light-emitting area and thus affect the light extraction efficiency. Summary of the Invention

[0004] To address the shortcomings in Mini LED chip fabrication mentioned above, this invention provides a GaAs-based flip-chip Mini LED chip and its fabrication method.

[0005] The present invention adopts the following technical solution:

[0006] A GaAs-based flip-chip Mini LED chip comprises, from bottom to top, a substrate, a bonding layer, a P-GaP optical window layer, a P-AlInP waveguide layer, an MQW light-emitting layer, an N-AlInP waveguide layer, an N-AlGaInP current spreading layer, and an N-GaAs ohmic layer. An N-primary electrode and a P-primary electrode are deposited on the N-GaAs ohmic layer and the bonding layer. A DBR passivation layer is deposited on the surface of the epitaxial wafer. The DBR passivation layer directly above the P-primary electrode and the N-primary electrode is etched by ICP to form P-conductive holes and N-conductive holes, respectively. P-electrode pads and N-electrode pads are respectively fabricated above the P-conductive holes and the N-conductive holes.

[0007] The bonding layer includes an ITO film, an Al2O3 film, and a SiO2 film.

[0008] A method for fabricating the above-mentioned GaAs-based flip-chip Mini LED includes the following steps:

[0009] (1) Using the MOCVD method, GaInP cutoff layer, N-GaAs ohmic layer, N-AlGaInP current spreading layer, N-AlInP waveguide layer, MQW light emitting layer, P-AlInP waveguide layer and P-GaP optical window layer are grown sequentially on a temporary substrate to obtain an epitaxial wafer.

[0010] (2) Roughen the P-GaP optical window layer to obtain the roughened surface of the P-GaP optical window layer;

[0011] (3) Deposit an ITO thin film on the roughened surface of the P-GaP optical window layer, after alloying the ITO, deposit an Al2O3 thin film on the ITO thin film, and then deposit a SiO2 thin film on the Al2O3 thin film. The ITO thin film, Al2O3 thin film and SiO2 thin film form a bonding layer.

[0012] (4) The SiO2 film on the surface of the bonding layer is subjected to chemical mechanical polishing (CMP) to obtain a smooth and clean polished surface;

[0013] (5) After cleaning and activating the polished surfaces of the substrate and bonding layer, high-temperature and high-pressure bonding treatment is performed to obtain the bonded sheet;

[0014] (6) Remove the temporary substrate and GaInP stop layer from the obtained bonded wafer to complete the substrate replacement process;

[0015] (7) A photolithographic mask is applied to the surface of the N-GaAs ohmic layer, and wet etching is used to completely etch the epitaxial layer down to the ITO thin film of the bonding layer to form a mesa.

[0016] (8) Photolithography mask is used to etch N-GaAs ohmic layer, then P and N patterns are photolithographically etched, P primary electrode and N primary electrode are deposited by evaporation, and then furnace tube annealing is performed to complete the fabrication of P and N primary electrodes.

[0017] (9) Deposit a DBR passivation layer on the structure obtained in step (8), and use ICP to etch the DBR passivation layer directly above the P primary electrode and the N primary electrode to form P conductive holes and N conductive holes respectively.

[0018] (10) Fabricate P electrode pads and N electrode pads above P conductive holes and N conductive holes respectively.

[0019] (11) After thinning, cutting and sorting the epitaxial wafer obtained in step (10), GaAs-based flip-chip Mini LEDs can be obtained.

[0020] Preferably, in step (1), the thickness of the P-GaP optical window layer is 600-2000 nm.

[0021] Preferably, in step (2), the P-GaP optical window layer is roughened by wet etching, with a roughening time of 60-180s and a roughening temperature of 20-30℃.

[0022] Preferably, a mixed solution of sulfuric acid, water, iodic acid and hydrofluoric acid is used for roughening treatment. The mixed solution contains 2000-3000 mL of sulfuric acid, 3000-4000 mL of water, 80-100 g of iodic acid and 1500-2000 mL of hydrofluoric acid.

[0023] Preferably, in step (3), the ITO thin film is evaporated by electron beam evaporation, sputtering evaporation or RPD evaporation, the evaporation vacuum degree is between 1E-6 and 1E-5 Torr, the evaporation temperature is between 120 and 300°C, and the alloying conditions are furnace tube annealing at 390°C for 5-10 min.

[0024] The preferred method for depositing Al2O3 thin films is electron beam evaporation or ALD deposition. The thickness corresponds to the roughening depth of the P-GaP optical window layer and is slightly greater than the roughening depth of the P-GaP optical window layer. The thickness is 0.2-0.8 μm. The advantage is that the excellent compactness of Al2O3 completely covers the voids caused by the roughening of the P-GaP optical window layer.

[0025] The preferred method for depositing SiO2 thin films is electron beam evaporation or PECVD deposition. The refractive index is around 1.4, and the thickness corresponds to the CMP polishing precision. The better the polishing uniformity, the lower the thickness can be. The thickness is generally 2-8 μm.

[0026] Preferably, the SiO2 thin film is deposited using electron beam evaporation, which has a higher yield, with an evaporation vacuum of 1E10-6 to 1E-5 Torr and an evaporation temperature of 120-300℃.

[0027] Preferably, the evaporation thickness of the ITO thin film is adjusted according to the wavelength of the GaAs-based flip-chip Mini LED, and its thickness is: d = m(1λ / 4n), where d is the target thickness of the ITO thin film, m is an odd number, λ is the wavelength of the GaAs-based flip-chip Mini LED, and n is the refractive index of the ITO thin film. At this target thickness d, the block resistance is lowest and the relative transmittance is highest, reaching over 95%, at the center wavelength.

[0028] Preferably, in step (4), the remaining depth of the SiO2 film after polishing is 1-3 μm, and the surface roughness Ra < 0.1 μm.

[0029] Preferably, the substrate in step (5) is a sapphire substrate with a bonding temperature of 300-500℃ and a bonding pressure of 9-14KKG, at which point the bonding yield is optimal.

[0030] Preferably, in step (7), the wet etching solution is a mixed solution of bromine, water and HBr, wherein the proportion of bromine is 2-8%, the proportion of water is 86-91%, and the proportion of HBr is 1-12%. After preparation, it is left to stand for 1 day (24h) before use. It is etched at room temperature for 1-5 minutes, and the color of the ITO layer can be observed with the naked eye.

[0031] Preferably, in step (8), both the P primary electrode and the N primary electrode are Au / AuGeNi / Au / Pt / Au structures, wherein the thickness of the first Au layer is 5-50 nm, the thickness of the second AuGeNi layer is 80-120 nm, the thickness of the third Au layer is 280-400 nm, the thickness of the fourth Pt layer is 200-300 nm, the thickness of the fifth Au layer is 5-50 nm, and the furnace tube annealing temperature is 300-360℃ for 8-15 minutes.

[0032] Preferably, in step (9), the DBR passivation layer structure is a composite structure composed of n pairs of TiOx / SiOx, where n is an even number, preferably 32;

[0033] The DBR passivation layer is deposited using an optical coating machine with a vacuum level between 5E-4 and 3E-3 Torr, a heating temperature between 80 and 150°C, a TiOx deposition rate of 1-2 A / s, a SiOx deposition rate of 2-4 A / s, and a reflectivity >99.99%.

[0034] For any details not covered in this invention, please refer to the prior art.

[0035] Technical features of the present invention:

[0036] To address the problems of high epitaxial cost, low bonding yield, and long chip fabrication cycle in the fabrication of GaAs-based flip-chip Mini LEDs, this invention designs the following bonding layer structure: ITO thin film + Al2O3 thin film + SiO2 thin film, where ITO is the optical window layer, Al2O3 is the transparent capping layer, and SiO2 is the transparent bonding layer.

[0037] The beneficial effects of this invention are as follows:

[0038] 1. This invention provides a GaAs-based flip-chip Mini LED chip by optimizing the bonding layer structure: ITO thin film + Al2O3 thin film + SiO2 thin film, where ITO is the optical window layer, Al2O3 is the transparent capping layer, and SiO2 is the transparent bonding layer. Due to the excellent compactness of Al2O3, it can completely cover the voids caused by the coarsening of the P-GaP optical window layer, thereby improving the bonding yield after substrate replacement.

[0039] 2. This invention adds a special bonding dielectric layer, ITO, which, due to its excellent transparency, conductivity, current spreadability, and physicochemical properties, can partially replace the current spreadability and ESD resistance of P-GaP in the epitaxial structure. This enables the thinning of P-GaP and the miniaturization of the P-electrode pattern, thereby saving epitaxial costs and increasing the light-emitting area to improve brightness.

[0040] 3. This invention adds a special bonding dielectric layer, ITO thin film. Because of its presence, the mesa etching process can choose a more efficient wet etching process to directly etch to the ITO layer. ITO is used as the ohmic contact layer, and P / N ohmic contact electrodes are operated simultaneously. Compared with the existing method of first making P electrodes and then making N electrodes, the production cost and production cycle are significantly shortened. Attached Figure Description

[0041] Figure 1 This is a schematic diagram of the structure of the GaAs-based flip-chip Mini LED chip of the present invention;

[0042] Figure 2 This is a schematic diagram of an epitaxial wafer structure;

[0043] Figure 3 This is a schematic diagram of the epitaxial wafer structure after roughening treatment;

[0044] Figure 4 This is a schematic diagram of the epitaxial wafer structure after the bonding layer has grown;

[0045] Figure 5 This is a schematic diagram of the epitaxial wafer structure after the bonding layer has been polished.

[0046] Figure 6 This is a schematic diagram of the epitaxial wafer structure after activation bonding;

[0047] Figure 7 A schematic diagram of the epitaxial wafer structure after removing the temporary substrate and GaInP stop layer;

[0048] Figure 8 This is a schematic diagram of the structure of an epitaxial wafer after photolithography masking and wet etching of the mesa.

[0049] Figure 9 This is a schematic diagram of the structure of an epitaxial wafer after the P and N primary electrodes are completed.

[0050] Figure 10 This is a schematic diagram of the structure after the deposition of the DB passivation layer R on an epitaxial wafer to form P and N conductive holes;

[0051] Figure 11 A schematic diagram of the structure after P and N electrode pads are fabricated for the epitaxial wafer;

[0052] Among them, 1. Temporary substrate, 2. GaInP cutoff layer, 3. N-GaAs ohmic layer, 4. N-AlGaInP current spreading layer, 5. N-AlInP waveguide layer, 6. MQW light-emitting layer, 7. P-AlInP waveguide layer, 8. P-GaP optical window layer, 9. P-GaP optical window layer roughened surface, 10. Bonding layer, 11. Bonding layer polished surface, 12. Substrate; 13. P primary electrode, 14. N primary electrode, 15. DBR passivation layer, 16. P electrode pad, 17. N electrode pad. Detailed implementation method:

[0053] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments. However, this description is not limited thereto. All aspects not described in detail in the present invention are based on conventional techniques in the field.

[0054] Example 1:

[0055] A GaAs-based flip-chip Mini LED chip comprises, from bottom to top, a substrate 12, a bonding layer 10, a P-GaP optical window layer 8, a P-AlInP waveguide layer 7, an MQW light-emitting layer 6, an N-AlInP waveguide layer 5, an N-AlGaInP current spreading layer 4, and an N-GaAs ohmic layer 3. An N primary electrode 14 and a P primary electrode 13 are deposited on the N-GaAs ohmic layer 3 and the bonding layer 10, respectively. A DBR passivation layer 15 is deposited on the surface of the epitaxial wafer. The DBR passivation layer directly above the P primary electrode 13 and the N primary electrode 14 is etched by ICP to form P conductive holes and N conductive holes, respectively. P electrode pads 16 and N electrode pads 17 are fabricated above the P conductive holes and N conductive holes, respectively.

[0056] The bonding layer 10 includes an ITO film, an Al2O3 film, and a SiO2 film, such as Figure 1As shown.

[0057] Example 2:

[0058] A method for fabricating a GaAs-based flip-chip Mini LED includes the following steps:

[0059] (1) Using the MOCVD method, GaInP cutoff layer 2, N-GaAs ohmic layer 3, N-AlGaInP current spreading layer 4, N-AlInP waveguide layer 5, MQW light-emitting layer 6, P-AlInP waveguide layer 7, and P-GaP optical window layer 8 are sequentially grown on a temporary substrate 1 to obtain an epitaxial wafer, such as... Figure 2 ;

[0060] (2) The P-GaP optical window layer 8 is roughened to obtain the roughened surface 9 of the P-GaP optical window layer, as shown below. Figure 3 ;

[0061] (3) An ITO thin film is deposited on the roughened surface 9 of the P-GaP optical window layer. After alloying the ITO, an Al2O3 thin film is deposited on the ITO thin film, followed by a SiO2 thin film. The ITO thin film, Al2O3 thin film, and SiO2 thin film form a bonding layer 10. Figure 4 ;

[0062] (4) The SiO2 film on the surface of the bonding layer 10 is subjected to chemical mechanical polishing (CMP) to obtain a smooth and clean polished surface 11 of the bonding layer, such as... Figure 5 ;

[0063] (5) After cleaning and activating the polished surfaces of substrate 12 and bonding layer 10, high-temperature and high-pressure bonding treatment is performed to obtain a bonded sheet, such as... Figure 6 ;

[0064] (6) Remove the temporary substrate and GaInP stop layer from the obtained bonded wafer to complete the substrate replacement process, such as... Figure 7 ;

[0065] (7) A photolithographic mask is applied to the surface of the N-GaAs ohmic layer 3. Wet etching is then used to completely etch the epitaxial layer down to the ITO thin film of the bonding layer, forming mesa surfaces, such as... Figure 8 ;

[0066] (8) The N-GaAs ohmic layer 3 is etched using a photolithography mask, followed by photolithography of P and N patterns. P primary electrode 13 and N primary electrode 14 are then deposited by evaporation. Afterward, furnace tube annealing is performed to complete the fabrication of the P and N primary electrodes. Figure 9 ;

[0067] (9) A DBR passivation layer 15 is deposited on the structure obtained in step (8). The DBR passivation layer directly above the P primary electrode and the N primary electrode is etched using ICP to form P conductive holes and N conductive holes, respectively. Figure 10 ;

[0068] (10) Fabricate P-electrode pads 16 and N-electrode pads 17 above the P-conductive and N-conductive holes, respectively, as follows: Figure 11 ;

[0069] (11) After thinning, cutting and sorting the epitaxial wafer obtained in step (10), GaAs-based flip-chip Mini LEDs can be obtained.

[0070] Example 3:

[0071] A method for fabricating a GaAs-based flip-chip Mini LED, as described in Example 2, except that in step (1), the thickness of the P-GaP optical window layer is 1000 nm;

[0072] In step (2), the P-GaP optical window layer is roughened by wet etching, with a roughening time of 3*35s and a roughening temperature of 22.5℃.

[0073] The roughening treatment was carried out using a mixed solution of sulfuric acid, water, iodic acid and hydrofluoric acid. The mixed solution contained 2500 mL of sulfuric acid, 3500 mL of water, 90 g of iodic acid and 1600 mL of hydrofluoric acid.

[0074] Example 4:

[0075] A method for preparing a GaAs-based flip-chip Mini LED is described in Example 2, except that in step (3), the ITO thin film is prepared by electron beam evaporation with an evaporation vacuum of 3E-6 Torr, an evaporation temperature of 280°C, and an evaporation thickness of 280 nm. At this thickness, the block resistance is the lowest and the relative transmittance is the highest, reaching over 95%, at the center wavelength. The alloying conditions are furnace tube annealing at 390°C for 7 min.

[0076] The preferred method for depositing Al2O3 thin films is electron beam evaporation, with a thickness of 0.3 μm, which is comparable to the roughening depth of the P-GaP optical window layer.

[0077] The preferred method for depositing SiO2 thin films is electron beam evaporation, with a refractive index of around 1.4 and a thickness of 3 μm; the evaporation vacuum is 5E10-6 Torr, and the evaporation temperature is 150℃.

[0078] Example 5:

[0079] A method for fabricating a GaAs-based flip-chip Mini LED is described in Example 2, except that in step (4), the remaining depth of the SiO2 thin film after polishing is 1.6 μm and the surface roughness Ra < 0.1 μm.

[0080] The substrate in step (5) is a sapphire substrate, the bonding temperature is 450℃, the bonding pressure is 11KKG, and the time is 30 minutes.

[0081] Example 6:

[0082] A method for preparing a GaAs-based flip-chip Mini LED chip, as described in Example 2, except that in step (7), the wet etching solution is a mixed solution of bromine, water and HBr, wherein the proportion of bromine is 3%, the proportion of water is 90% and the proportion of HBr is 7%. After preparation, it is left to stand for 1 day (24h) before use, and etched at room temperature for 3min.

[0083] Example 7:

[0084] A method for fabricating a GaAs-based flip-chip Mini LED is described in Example 2, except that in step (8), both the P primary electrode and the N primary electrode are Au / AuGeNi / Au / Pt / Au structures, wherein the thickness of the first Au layer is 20 nm, the thickness of the second AuGeNi layer is 100 nm, the thickness of the third Au layer is 300 nm, the thickness of the fourth Pt layer is 200 nm, the thickness of the fifth Au layer is 40 nm, the furnace tube annealing temperature is 320 °C, and the time is 13 minutes.

[0085] Example 8:

[0086] A method for fabricating a GaAs-based flip-chip Mini LED is described in Example 2, except that in step (9), the DBR passivation layer structure is a composite structure composed of 32 pairs of TiOx / SiOx, where x is 2. It is deposited using an optical coating machine with a vacuum degree of 6E-4 Torr, a heating temperature of 120℃, a TiO2 deposition rate of 1-2 A / s, a SiO2 deposition rate of 4 A / s, and a reflectivity of >99.99%.

[0087] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for fabricating a GaAs-based flip-chip Mini LED, characterized in that, The epitaxial wafer of the GaAs-based flip-chip Mini LED chip, from bottom to top, includes a substrate, a bonding layer, a P-GaP optical window layer, a P-AlInP waveguide layer, an MQW light-emitting layer, an N-AlInP waveguide layer, an N-AlGaInP current spreading layer, and an N-GaAs ohmic layer. N-primary electrodes and P-primary electrodes are deposited on the N-GaAs ohmic layer and the bonding layer. A DBR passivation layer is deposited on the surface of the epitaxial wafer. The DBR passivation layer directly above the P-primary electrodes and N-primary electrodes is etched by ICP to form P-conductive holes and N-conductive holes, respectively. P-electrode pads and N-electrode pads are fabricated above the P-conductive holes and N-conductive holes, respectively. The bonding layer includes an ITO film, an Al2O3 film, and a SiO2 film; The preparation method includes the following steps: (1) Using the MOCVD method, GaInP cutoff layer, N-GaAs ohmic layer, N-AlGaInP current spreading layer, N-AlInP waveguide layer, MQW light emitting layer, P-AlInP waveguide layer and P-GaP optical window layer are grown sequentially on a temporary substrate to obtain an epitaxial wafer. (2) The P-GaP optical window layer is roughened to obtain the roughened surface of the P-GaP optical window layer; (3) Deposit an ITO thin film on the roughened surface of the P-GaP optical window layer, after alloying the ITO, deposit an Al2O3 thin film on the ITO thin film, and then deposit a SiO2 thin film on the Al2O3 thin film. The ITO thin film, Al2O3 thin film and SiO2 thin film form a bonding layer. (4) The SiO2 film on the surface of the bonding layer is subjected to chemical mechanical polishing to obtain a smooth and clean polished surface; (5) After cleaning and activating the polished surfaces of the substrate and bonding layer, high-temperature and high-pressure bonding treatment is performed to obtain the bonded sheet; (6) Remove the temporary substrate and GaInP stop layer from the obtained bonded wafer to complete the substrate replacement process; (7) A photolithographic mask is applied to the surface of the N-GaAs ohmic layer, and wet etching is used to completely etch the epitaxial layer down to the ITO thin film of the bonding layer to form a mesa; (8) The N-GaAs ohmic layer is etched by photolithography mask, and then P and N patterns are photolithographically etched. The P primary electrode and N primary electrode are deposited by vapor deposition. Then, furnace tube annealing is performed to complete the fabrication of P and N primary electrodes. (9) Deposit a DBR passivation layer on the structure obtained in step (8), and use ICP to etch the DBR passivation layer directly above the P primary electrode and the N primary electrode to form P conductive holes and N conductive holes respectively. (10) Fabricate P electrode pads and N electrode pads above P conductive holes and N conductive holes respectively; (11) After thinning, cutting and sorting the epitaxial wafer obtained in step (10), GaAs-based flip-chip MiniLEDs can be obtained.

2. The method for fabricating a GaAs-based flip-chip Mini LED according to claim 1, characterized in that, In step (1), the thickness of the P-GaP optical window layer is 600-2000 nm.

3. The method for fabricating a GaAs-based flip-chip Mini LED according to claim 1, characterized in that, In step (2), the P-GaP optical window layer is roughened by wet etching, with a roughening time of 60-180s and a roughening temperature of 20-30℃. The roughening treatment is carried out using a mixed solution of sulfuric acid, water, iodic acid and hydrofluoric acid. The mixed solution contains 2000-3000 mL of sulfuric acid, 3000-4000 mL of water, 80-100 g of iodic acid and 1500-2000 mL of hydrofluoric acid.

4. The method for fabricating a GaAs-based flip-chip Mini LED according to claim 1, characterized in that, In step (3), the ITO thin film is evaporated by electron beam evaporation, sputtering evaporation or RPD evaporation, the evaporation vacuum degree is between 1E-6 and 1E-5 Torr, the evaporation temperature is between 120 and 300℃, and the alloying conditions are furnace tube annealing at 390℃ for 5-10 min. The Al2O3 thin film was deposited by electron beam evaporation or ALD deposition, and its thickness was greater than the coarsening depth of the P-GaP optical window layer, with a thickness of 0.2-0.8 μm; SiO2 thin films are deposited by electron beam evaporation or PECVD deposition, with a thickness of 2-8 μm.

5. The method for fabricating a GaAs-based flip-chip Mini LED chip according to claim 4, characterized in that, The evaporation thickness of the ITO thin film is adjusted by the wavelength of the GaAs-based flip-chip Mini LED chip, and its thickness is: d=m(1λ / 4n), where d is the target thickness of the ITO thin film, m is an odd number, λ is the wavelength of the GaAs-based flip-chip Mini LED chip, and n is the refractive index of the ITO thin film.

6. The method for fabricating a GaAs-based flip-chip Mini LED according to claim 1, characterized in that, In step (4), the remaining depth of the SiO2 film after polishing is 1-3 μm, and the surface roughness Ra < 0.1 μm; The substrate in step (5) is a sapphire substrate, the bonding temperature is 300-500℃, and the bonding pressure is 9-14KKG.

7. The method for fabricating a GaAs-based flip-chip Mini LED chip according to claim 1, characterized in that, In step (7), the wet etching solution is a mixed solution of bromine, water and HBr, wherein the proportion of bromine is 2-8%, the proportion of water is 86-91%, and the proportion of HBr is 1-12%. After preparation, it is left to stand for 1 day before use, and the etching is carried out at room temperature for 1-5 minutes.

8. The method for fabricating a GaAs-based flip-chip Mini LED according to claim 1, characterized in that, In step (8), both the P primary electrode and the N primary electrode have an Au / AuGeNi / Au / Pt / Au structure, wherein the thickness of the first Au layer is 5-50 nm, the thickness of the second AuGeNi layer is 80-120 nm, the thickness of the third Au layer is 280-400 nm, the thickness of the fourth Pt layer is 200-300 nm, the thickness of the fifth Au layer is 5-50 nm, and the furnace tube annealing temperature is 300-360℃ for 8-15 minutes.

9. The method for fabricating a GaAs-based flip-chip Mini LED chip according to claim 1, characterized in that, In step (9), the DBR passivation layer structure is a composite structure composed of n pairs of TiOx / SiOx, where n is an even number, which is 32; The DBR passivation layer is deposited using an optical coating machine with a vacuum level between 5E-4 and 3E-3 Torr, a heating temperature between 80 and 150°C, a TiOx deposition rate of 1-2 A / s, a SiOx deposition rate of 2-4 A / s, and a reflectivity >99.99%.

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