Switching drive circuit and drive chip

Abstract

The application discloses a switch driving circuit and a driving chip. The switch driving circuit comprises a first switch connected between a first power signal end and a control end of a power semiconductor device; a second switch connected between a second power signal end and the control end of the power semiconductor device; a first driving module connected with the control end of the first switch; a second driving module connected with the control end of the second switch; and a control module used for adjusting the driving strength of the first driving module according to the voltage variation amplitude of the first power signal end, so as to adjust the switching speed of the first switch; and / or adjusting the driving strength of the second driving module according to the voltage variation amplitude of the second power signal end, so as to adjust the switching speed of the second switch. According to the embodiment of the application, the driving strength of the driving module can be adjusted when the voltage variation amplitude of the power signal end is large, so as to reduce the propagation delay of the switch driving circuit and the voltage variation amplitude of the power signal end.

Description

Technical Field

[0001] This application belongs to the field of switch control technology, and in particular relates to a switch driving circuit and a driving chip. Background Technology

[0002] Currently, power semiconductor devices are commonly used in inverters, frequency converters, motor drive control, and high-power power conversion to achieve switching control or power conversion. These power semiconductor devices can be IGBTs (Insulated Gate Bipolar Transistors), thyristors, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), BJTs (Bipolar Junction Transistors), GTOs (Gate-Turn-Off Thyristors), and PDs (Power Diodes), among others.

[0003] To achieve faster and lower-cost drive control of power semiconductor devices, a low-voltage front-end drive circuit is typically used to drive two high-voltage drive switches to provide on or off voltages for the power semiconductor devices, thereby enabling the on and off control of the power semiconductor devices.

[0004] However, due to the parasitic inductance in the current loop, a momentary voltage change will occur at the power supply terminal of the turn-on or turn-off voltage when the drive switch is turned on, which may easily lead to circuit abnormalities or misdiagnosis of faults. Summary of the Invention

[0005] This application provides a switch driving circuit and a driving chip, which can solve the technical problem that instantaneous voltage changes at the power supply terminal can easily cause abnormalities and faults when driving power semiconductor devices.

[0006] In a first aspect, embodiments of this application provide a switch driving circuit for driving a power semiconductor device to turn on or off. The switch driving circuit includes:

[0007] The first switch is connected between the first power signal terminal and the control terminal of the power semiconductor device, and is used to turn on in response to the first drive signal;

[0008] The second switch is connected between the second power signal terminal and the control terminal of the power semiconductor device, and is used to turn on in response to the second drive signal;

[0009] The first drive module is connected to the control terminal of the first switch and is used to output the first drive signal;

[0010] The second drive module is connected to the control terminal of the second switch and is used to output the second drive signal;

[0011] The control module is configured to adjust the driving intensity of the first driving module according to the voltage change amplitude of the first power signal terminal, so as to adjust the switching speed of the first switch; and / or, adjust the driving intensity of the second driving module according to the voltage change amplitude of the second power signal terminal, so as to adjust the switching speed of the second switch.

[0012] In some embodiments, the switch driving circuit further includes:

[0013] A bias voltage adjustment module, connected to the first drive module and the second drive module, is used to provide a first bias voltage and a second bias voltage to the first drive module and the second drive module, respectively.

[0014] The bias voltage adjustment module is further configured to adjust the first bias voltage according to the drive current of the first switch to adjust the current drive capability of the first switch; and / or, adjust the second bias voltage according to the drive current of the second switch to adjust the current drive capability of the second switch.

[0015] In some embodiments, the first drive module includes at least two first drive units;

[0016] Each first drive unit includes a first terminal, a second terminal, and a control terminal. The first terminal is connected to the bias voltage adjustment module, the second terminal is connected to the control terminal of the first switch, and the control terminal is connected to the control module.

[0017] The second drive module includes at least two second drive units;

[0018] Each second drive unit includes a first terminal, a second terminal, and a control terminal. The first terminal is connected to the bias voltage adjustment module, the second terminal is connected to the control terminal of the second switch, and the control terminal is connected to the control module.

[0019] The control module is used to adjust the number of first driving units in the first driving module that are turned on according to the voltage change amplitude of the first power signal terminal; and / or, to adjust the number of second driving units in the second driving module that are turned on according to the voltage change amplitude of the second power signal terminal.

[0020] In some embodiments, the first driving unit includes at least one first conducting branch, the first conducting branch including:

[0021] The first transistor has its first terminal connected to the control terminal of the first switch, and the control terminal of the first transistor is connected to the first bias voltage terminal of the bias voltage adjustment module.

[0022] The second transistor has a first terminal connected to the second terminal of the first transistor, a second terminal connected to the second power signal, and a control terminal connected to the first turn-on terminal of the control module.

[0023] The second driving unit includes at least one second conducting branch, the second conducting branch including:

[0024] The third transistor has its first terminal connected to the control terminal of the second switch, and its control terminal is connected to the second bias voltage terminal of the bias voltage adjustment module.

[0025] The fourth transistor has its first terminal connected to the second terminal of the third transistor, its second terminal connected to the first power signal, and its control terminal connected to the second turn-on terminal of the control module.

[0026] In some embodiments, the first conducting branch further includes:

[0027] The first logic control module is connected between the control terminal of the second transistor and the first turn-on terminal of the control module, and the control terminal of the first logic control module is connected to the first logic signal terminal of the control module.

[0028] The second conductive branch also includes:

[0029] The second logic control module is connected between the control terminal of the fourth transistor and the second turn-on terminal of the control module. The control terminal of the second logic control module is connected to the second logic signal terminal of the control module.

[0030] In some embodiments, among the plurality of first driving units of the first driving module, at least one first driving unit's first conduction branch does not include the first logic control module;

[0031] In the plurality of second driving units of the second driving module, at least one second driving unit's second conduction branch does not include the second logic control module.

[0032] In some embodiments, in the first driving module, the number of first conducting branches of any two first driving units is different; in the second driving module, the number of second conducting branches of any two second driving units is different.

[0033] The control module is configured to, when the voltage change amplitude at the first power signal terminal reaches a first voltage threshold, adjust the conduction state of some first drive units in the first drive module through a first logic signal to reduce the total number of first conduction branches connected to the control terminal of the first switch; and / or, when the voltage change amplitude at the second power signal terminal reaches a second voltage threshold, adjust the conduction state of some second drive units in the second drive module through a second logic signal to reduce the total number of second conduction branches connected to the control terminal of the second switch.

[0034] In some embodiments, the first driving module further includes:

[0035] The fifth transistor has its first terminal connected to the control terminal of the first switch, its second terminal connected to the first power signal terminal, and its control terminal connected to the first shutdown terminal of the control module.

[0036] The second drive module also includes:

[0037] The sixth transistor has its first terminal connected to the control terminal of the second switch, its second terminal connected to the second power signal terminal, and its control terminal connected to the second shutdown terminal of the control module.

[0038] In some embodiments, the input terminal of the control module is connected to the conduction control signal terminal to receive the conduction control signal; the conduction control signal is a PWM signal.

[0039] The control module is configured to respond to a first signal of the PWM signal by outputting an enable signal through a first on terminal and a second off terminal, respectively; or, responding to a second signal of the PWM signal by outputting an enable signal through a second on terminal and a first off terminal, respectively; wherein...

[0040] The start time of the enable signal output by the first open terminal is after the start time of the enable signal output by the second closed terminal; the start time of the enable signal output by the second open terminal is after the start time of the enable signal output by the first closed terminal.

[0041] In some embodiments, the bias voltage adjustment module is used to adjust the first bias voltage output from the first bias voltage terminal when the maximum instantaneous drive current of the first switch is lower than the first current threshold, so as to increase the gate-source voltage difference when the first switch is turned on.

[0042] Secondly, embodiments of this application provide a driver chip, including the switch driver circuit of the first aspect.

[0043] Compared with the prior art, the switch driving circuit and driving chip provided in this application embodiment, by setting a first driving module and a second driving module, can provide conduction signals to the first switch and the second switch respectively, so as to realize the conduction control of the power semiconductor device. The control module can detect the voltage change amplitude of the two power signal terminals respectively. When the voltage change amplitude of the power signal terminals is large, the driving strength of the corresponding driving module can be reduced to reduce the switching speed of the corresponding switch, thereby avoiding excessive voltage change amplitude. By adaptively adjusting the switching speed of the switch by the voltage change amplitude of the power signal terminals, the propagation delay of the switch driving circuit can be reduced and the power loss during the switching process can be reduced, while avoiding malfunctions or failures caused by excessive voltage change amplitude. Attached Figure Description

[0044] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0045] Figure 1 This is a schematic diagram of the circuit structure of a switch driving circuit provided in an embodiment of this application;

[0046] Figure 2 This is a schematic diagram of the circuit structure of a switch driving circuit provided in another embodiment of this application;

[0047] Figure 3 This is a signal timing diagram of the bias voltage adjustment current driving capability provided in one embodiment of this application;

[0048] Figure 4 This is a signal timing diagram for adjusting the switching speed of the drive intensity according to an embodiment of this application;

[0049] Figure 5 This is a schematic diagram of the circuit structure of a switch driving circuit provided in another embodiment of this application;

[0050] Figure 6 This is a schematic diagram of the circuit structure of a switch driving circuit provided in another embodiment of this application;

[0051] Figure 7 This is a schematic diagram of the circuit structure of a switch driving circuit provided in another embodiment of this application;

[0052] Figure 8 This is a schematic diagram of the circuit structure of a switch driving circuit provided in another embodiment of this application;

[0053] Figure 9This is a signal timing diagram of the first enable signal and the second disable signal provided in an embodiment of this application;

[0054] Figure 10 This is a signal timing diagram of the second enable signal and the first disable signal provided in an embodiment of this application;

[0055] Figure 11 This is a schematic diagram of the circuit structure of a switch driving circuit provided in another embodiment of this application;

[0056] Figure 12 This is a signal timing diagram of logic signal control of drive strength provided in an embodiment of this application;

[0057] Figure 13 This is a schematic diagram of the structure of a driver chip provided in an embodiment of this application.

[0058] In the attached image:

[0059] SRC, First Switch; SNK, Second Switch; 10, First Drive Module; 11, First Drive Unit; 111, First Logic Control Module; 20, Second Drive Module; 21, Second Drive Unit; 211, Second Logic Control Module; 30, Control Module; A, Second Closed Terminal; B, First Open Terminal; C, First Closed Terminal; D, Second Open Terminal; 40, Bias Voltage Adjustment Module; 50, Power Semiconductor Device; VDD, First Power Signal Terminal; GND, Second Power Signal Terminal; VCtrlP, First Bias Voltage; VCtrlN, Second Bias Voltage; M1, First Transistor; M2, Second Transistor; M3, Third Transistor; M4, Fourth Transistor; M5, Fifth Transistor; M6, Sixth Transistor. Detailed Implementation

[0060] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0061] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0062] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The embodiments will now be described in detail with reference to the accompanying drawings.

[0063] Currently, power semiconductor devices are commonly used in inverters, frequency converters, motor drive control, and high-power power conversion to achieve switching control or power conversion. These power semiconductor devices can be IGBTs (Insulated Gate Bipolar Transistors), thyristors, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), BJTs (Bipolar Junction Transistors), GTOs (Gate-Turn-Off Thyristors), and PDs (Power Diodes), among others.

[0064] To achieve faster and lower-cost drive control of power semiconductor devices, a low-voltage front-end drive circuit is typically used to drive two high-voltage drive switches to provide on or off voltages for the power semiconductor devices, thereby enabling the on and off control of the power semiconductor devices.

[0065] However, due to the parasitic inductance in the current loop, a momentary voltage change will occur at the power supply terminal of the turn-on or turn-off voltage when the drive switch is turned on, which may easily lead to circuit abnormalities or misdiagnosis of faults.

[0066] To address the aforementioned technical problems, embodiments of this application provide a switch driving circuit and a driving chip. The switch driving circuit provided in this application embodiment will be described below.

[0067] Figure 1 A schematic diagram of a switch driving circuit according to an embodiment of this application is shown. The switch driving circuit can drive the power semiconductor device 50 to turn on or off. The switch driving circuit may include a first switch SRC, a second switch SNK, a first driving module 10, a second driving module 20, and a control module 30.

[0068] The first switch SRC is connected between the first power signal terminal VDD and the control terminal of the power semiconductor device 50. The first switch SRC can be turned on when it receives the first drive signal, connecting the first power signal terminal VDD and the power semiconductor device 50. The power semiconductor device 50 can be turned on when it receives the first power signal at the control terminal.

[0069] The second switch SNK is connected between the second power signal terminal GND and the control terminal of the power semiconductor device 50. The second switch SNK can be turned on when it receives the second drive signal, connecting the second power signal terminal GND and the power semiconductor device 50. The power semiconductor device 50 can be turned on when it receives the second power signal at the control terminal.

[0070] The first power signal output from the first power signal terminal VDD can be a high-level signal, and the second power signal output from the second power signal terminal GND can be a low-level signal. Of course, in another embodiment, the first power signal can also be a low-level signal and the second power signal can be a high-level signal; this is not a limitation.

[0071] It should be noted that, in order to avoid a short circuit caused by direct connection between the first power signal terminal VDD and the second power signal terminal GND, at most one of the first switch SRC and the second switch SNK can be in the on state at the same time.

[0072] The first drive module 10 can be connected to the control terminal of the first switch SRC. The first drive module 10 can output a first drive signal to the control terminal of the first switch SRC so that the first switch SRC turns on in response to the first drive signal.

[0073] The second drive module 20 can be connected to the control terminal of the second switch SNK. The second drive module 20 can output a second drive signal to the control terminal of the second switch SNK so that the second switch SNK is turned on in response to the second drive signal.

[0074] The control module 30 can be electrically connected to the first drive module 10. The control module 30 can detect the voltage change amplitude of the first power signal at the first power signal terminal VDD, and adjust the drive intensity of the first drive module 10 according to the voltage change amplitude of the first power signal to adjust the switching speed of the first switch SRC.

[0075] When the first switch SRC is turned on, due to the parasitic inductance in the current loop and the switching speed of the first switch SRC, the first power signal output from the first power signal terminal VDD will generate a certain voltage drop ΔV. The voltage drop ΔV can satisfy the following formula:

[0076] △V=L*(di / dt);

[0077] Where L is the parasitic inductance in the current loop, and di / dt is the rate of change of current in the first switch SRC per unit time. It can be understood that the rate of change of current in the first switch SRC is positively correlated with the switching speed of the first switch SRC; as the switching speed of the first switch SRC increases, the rate of change of current also increases accordingly.

[0078] The control module 30 can detect the voltage drop on the first power signal terminal VDD. When the voltage drop is large, the glitch current detected by the control module 30 will also increase accordingly. When the glitch current is large, the control module 30 may erroneously trigger the UVLO (under voltage lockout) mode, thereby causing the switch drive circuit to stop driving the power semiconductor device 50.

[0079] To prevent excessive voltage drop across the first power signal terminal VDD, the control module 30 can reduce the driving strength of the first drive module 10 when the voltage change amplitude of the first power signal reaches a certain threshold or range, thereby reducing the switching speed of the first switch SRC. When the first switch SRC turns on again, the reduced driving strength of the first drive module 10 slows down the switching speed of the first switch SRC. Consequently, the current change rate di / dt of the first switch SRC also decreases, thus reducing the voltage drop ΔV across the first power signal and preventing excessive ΔV from causing risks such as misoperation or malfunction.

[0080] It is understandable that the first switch SRC will generate a certain power loss during the switching process, and this power loss is negatively correlated with the switching speed of the first switch SRC. That is, as the switching speed of the first switch SRC increases, the power consumed by the first switch SRC in switching states will decrease. Therefore, in order to reduce the power loss during the switching process, the control module 30 can also increase the driving strength of the first drive module 10 when it detects that the voltage change amplitude of the first power supply signal is less than a certain threshold or a certain range, so as to increase the switching speed of the first switch SRC and reduce the switching power loss of the first switch SRC.

[0081] Understandably, the control module 30 adjusts the switching speed of the first switch SRC so that the voltage change amplitude at the first power signal terminal VDD does not exceed a preset threshold or range, thereby increasing the switching speed of the first switch SRC as much as possible, so as to reduce the power loss of the first switch SRC while avoiding the risk of misoperation or failure caused by excessive ΔV.

[0082] Similarly, the control module 30 can also be electrically connected to the first drive module 10. The control module 30 can also detect the voltage change amplitude of the second power signal at the second power signal terminal GND, and adjust the drive intensity of the second drive module 20 according to the voltage change amplitude of the second power signal to adjust the switching speed of the second switch SNK.

[0083] Similar to how control module 30 adjusts the switching speed of the first switch SRC, if the switching speed of the second switch SNK is too fast, a large voltage drop ΔV will also occur in the second power supply signal. This can cause the switch drive circuit to erroneously trigger the UVLO mode or cause other malfunctions, affecting the normal drive control of the power semiconductor device 50. To avoid the risk of malfunctions or failures caused by excessive ΔV, control module 30 can also adjust the drive strength of the second drive module 20 according to the voltage change of the second power supply signal terminal GND, so that the switching speed of the second switch SNK can be kept within a suitable range and the voltage drop of the second power supply signal will not be too large.

[0084] Understandably, in order to reduce the power loss of the second switch SNK, the control module 30 may also increase the switching speed of the second switch SNK as much as possible when the voltage drop of the second power signal does not exceed a preset threshold or range, so as to reduce the power loss of the first switch SRC.

[0085] In this embodiment, by setting the first driving module 10 and the second driving module 20, conduction signals can be provided to the first switch SRC and the second switch SNK respectively, so as to realize the conduction control of the power semiconductor device 50. The control module 30 can detect the voltage change amplitude of the two power signal terminals respectively. When the voltage change amplitude of the power signal terminals is large, the driving strength of the corresponding driving module can be reduced to reduce the switching speed of the corresponding switch, thereby avoiding excessive voltage change amplitude. By adaptively adjusting the switching speed of the switch by the voltage change amplitude of the power signal terminals, the propagation delay of the switch driving circuit can be reduced, the power loss during the switching process can be reduced, and the driving power consumption of the power semiconductor device 50 can be reduced, while avoiding malfunctions or failures caused by excessive voltage change amplitude.

[0086] Please refer to Figure 2 In some embodiments, the switch driving circuit described above may further include a bias voltage adjustment module 40.

[0087] The bias voltage adjustment module 40 can be connected to the first drive module 10 and provide the first drive module 10 with a first bias voltage VCtrlP. The bias voltage adjustment module 40 can also be connected to the second drive module 20 and provide the second drive module 20 with a second bias voltage VCtrlN.

[0088] The bias voltage can be adjusted according to the drive current of the first switch SRC to regulate the current drive capability of the first switch SRC.

[0089] The first switch SRC can be a transistor. Taking a MOSFET as an example, the formula for calculating the current when the MOSFET is turned on is as follows:

[0090] I = K * (Vgs - Vth) 2 ;

[0091] Where Vgs is the gate-source voltage difference of the MOSFET, Vth is the threshold voltage of the MOSFET, and K is the current coefficient.

[0092] As shown in the above formula, the conduction time of a MOSFET is positively correlated with the difference between the gate-source voltage difference and the threshold voltage. When the gate-source voltage difference increases, the difference between the gate-source voltage difference and the threshold voltage increases, and the current flowing through the MOSFET increases accordingly; when the gate-source voltage difference decreases, the difference between the gate-source voltage difference and the threshold voltage decreases, and the current flowing through the MOSFET also decreases accordingly.

[0093] The bias voltage adjustment module 40 can adjust the signal voltage of the first drive signal received by the control terminal of the first switch SRC by adjusting the first bias voltage VCtrlP. Taking the first switch SRC as a MOSFET as an example, the control terminal of the first switch SRC is the gate of the MOSFET. By adjusting the first bias voltage VCtrlP, the gate voltage received by the MOSFET can be adjusted. Depending on whether the MOSFET is an N-channel MOSFET or a P-channel MOSFET, the gate-source voltage difference of the MOSFET can be adjusted by increasing or decreasing the first bias voltage VCtrlP, thereby adjusting the current drive capability of the MOSFET.

[0094] Similarly, the bias voltage VCtrlN can be adjusted according to the drive current of the second switch SNK to regulate the current drive capability of the second switch SNK. By adjusting the second bias voltage VCtrlN, the signal voltage of the second drive signal received by the second switch SNK can be changed, thereby changing the gate-source voltage difference of the second switch SNK and thus adjusting the current drive capability of the second switch SNK.

[0095] It should be noted that, in the above embodiment, taking the single opening process of the first switch SRC as an example, during the single opening process of the first switch SRC, the control module 30 can detect the voltage change amplitude of the first power signal terminal VDD, and adjust the driving strength of the first drive module 10 when the first switch SRC is opened after the opening process ends. When the first switch SRC performs the next opening process, the first drive module 10 can provide a first drive signal to the first switch SRC through the adjusted driving strength, so that the first switch SRC can realize the change adjustment of the switching speed from the next opening process.

[0096] Similarly, during a single turn-on process of the first switch SRC, the bias voltage adjustment module 40 can detect the maximum instantaneous current value of the drive current of the first switch SRC during the turn-on process. If the maximum instantaneous current value is too small, the bias voltage adjustment module 40 can adjust the first bias voltage VCtrlP after the turn-on process ends and the first switch SRC is turned off, so as to increase the current drive capability of the first switch SRC in the next turn-on process. That is, whether adjusting the switching speed of the first switch SRC or adjusting the power drive capability of the first switch SRC, the voltage change amplitude or drive current magnitude is detected during the previous turn-on process, and the drive strength of the first drive module 10 or the first bias voltage VCtrlP is adjusted when the first switch SRC is in the off state between two turn-on processes, so as to change the switching speed or current drive capability of the first switch SRC in the subsequent turn-on process.

[0097] In some embodiments, the bias voltage adjustment module 40 can detect the instantaneous drive current on the first switch SRC during a single turn-on process and obtain the maximum instantaneous drive current. If the maximum instantaneous drive current is lower than the first current threshold, the bias voltage adjustment module 40 can adjust the first bias voltage VCtrlP output from the first bias voltage terminal to increase the gate-source voltage difference of the first switch SRC when it is turned on, so that the first switch SRC can increase its current drive capability during the next turn-on process.

[0098] As an alternative implementation, when the performance of the switch drive circuit is degraded due to the parasitic inductance of the external circuit during use, which easily leads to overdrive or underdrive, the overdrive or underdrive can be compensated by adjusting the bias voltage to improve the performance degradation problem, thereby meeting the system design requirements and reducing the system design difficulty.

[0099] Please refer to Figure 3The OUT terminal is the common node for the first switch SRC, the second switch SNK, and the control terminal of the power semiconductor device 50. Taking the first switch SRC as a P-type transistor as an example, Figure 3 The diagram illustrates the voltage and drive current trends at the control terminal of the power semiconductor device 50 during the two switching processes of the first switch SRC. The voltage at point PG is the control terminal voltage of the power semiconductor device 50, and Isrc is the instantaneous drive current on the first switch SRC.

[0100] During the previous turn-on process, the bias voltage adjustment module 40 detected that the maximum instantaneous drive current on the first switch SRC was low. At this time, the bias voltage adjustment module 40 can reduce the first bias voltage VCtrlP when the first switch SRC ends its current turn-on process and enters the off state. When the first switch SRC enters the next turn-on process, the voltage at point PG, i.e., the signal voltage of the first drive signal received by the first switch SRC, decreases accordingly due to the decrease in the first bias voltage VCtrlP. Since the first switch SRC is a P-type transistor, the absolute value of the gate-source voltage difference increases when the gate voltage decreases. According to the above formulas relating current, gate-source voltage difference, and threshold voltage, a decrease in the signal voltage of the first drive signal received by the first switch SRC increases the drive current of the first switch SRC when it is on. That is, during the subsequent turn-on process, the drive current of the first switch SRC when it is on increases, and the maximum instantaneous drive current is higher than the maximum instantaneous drive current during the previous turn-on process, thereby improving the current drive capability of the first switch SRC.

[0101] Similarly, the bias voltage adjustment module 40 can also detect the instantaneous drive current on the second switch SNK during a single turn-on process and obtain the maximum instantaneous drive current. If the maximum instantaneous drive current is lower than the second current threshold, the bias voltage adjustment module 40 can increase the second bias voltage VCtrlN output from the second bias voltage terminal to increase the gate-source voltage difference of the second switch SNK, so that the second switch SNK can increase its current drive capability during the next turn-on process.

[0102] Please refer to Figure 4 The OUT terminal is the common node for the first switch SRC, the second switch SNK, and the control terminal of the power semiconductor device 50. Taking the first switch SRC as a P-type transistor as an example, Figure 4 The diagram shows the voltage and current changes at the first power signal terminal VDD during the two switching processes of the first switch SRC. The voltage at point PG is the control terminal voltage of the power semiconductor device 50. VDD This is the glitch current at the first power signal terminal VDD.

[0103] During the previous power-on process, the control module 30 detected that the voltage change of the first power signal terminal VDD was large, exceeding the preset threshold or range. At this time, the control module 30 can adjust the driving strength of the first driving signal output by the first driving module 10 when the first switch SRC ends the current power-on process and the first switch SRC enters the off state.

[0104] When the first switch SRC enters its next turn-on process, the reduced drive strength of the first drive signal increases the time it takes for the voltage at point PG to change from the first power supply voltage to near the first bias voltage VCtrlP, meaning the rate of voltage change decreases. It can be understood that the voltage at point PG is the gate voltage of the first switch SRC. When the rate of change of the gate voltage from the disabled to the enabled range decreases, the output current of the first switch SRC per unit time will also decrease. Therefore, the reduced rate of change of the current in the first switch SRC slows down its switching speed, thereby reducing the voltage and current changes at the first power supply signal terminal VDD during the next turn-on process.

[0105] Similarly, the bias voltage adjustment module 40 can also detect the voltage change amplitude of the second power supply signal terminal GND during a single turn-on process of the second switch SNK, and reduce the current change rate of the second switch SNK and the switching speed of the second switch SNK by adjusting the driving strength of the second driving signal output by the second driving module 20, thereby reducing the voltage change amplitude and current change amplitude of the second power supply signal terminal GND during the next turn-on process.

[0106] Please refer to Figure 5 In some embodiments, the first driving module 10 may include at least two first driving units 11.

[0107] Each first drive unit 11 may include a first terminal, a second terminal, and a control terminal. The first terminal is connected to the bias voltage adjustment module 40 and can receive the first bias voltage VCtrlP output by the bias voltage adjustment module 40. The second terminal is connected to the control terminal of the first switch SRC. The control terminal is connected to the control module 30.

[0108] The control module 30 can send a control signal to the first drive unit 11 to control the first drive unit 11 to turn on and off. When the first drive unit 11 is turned on, it can output a first drive signal to the control terminal of the first switch SRC according to the received first bias voltage VCtrlP.

[0109] When the first switch SRC is turned on, the control module 30 can detect the voltage change amplitude of the first power signal terminal VDD. If the voltage change amplitude of the first power signal terminal VDD exceeds a preset threshold or range, the control module 30 can adjust the number of first drive units 11 turned on in the first drive module 10.

[0110] As an optional implementation, the first driving module 10 may include three first driving units 11. During a certain opening process of the first switch SRC, all three first driving units 11 are in a conducting state. If the control module 30 detects that the voltage change at the first power signal terminal VDD is too large, the control module 30 may reduce the number of conducting first driving units 11 when the first switch SRC ends the current opening process and enters the de-energized state. During the next opening process of the first switch SRC, at least one first driving unit 11 is not conducting. It can be understood that each first driving unit 11 can serve as a signal branch providing the first driving signal. As the number of signal branches increases, the driving strength of the first driving signal gradually increases; conversely, as the number of signal branches decreases, the driving strength of the first driving signal decreases.

[0111] In this embodiment, if the voltage change at the first power signal terminal VDD is too large during one of the opening processes of the first switch SRC, the control module 30 can reduce the number of first drive units 11 that will be turned on in the next opening process, thereby reducing the driving strength of the first drive signal. When the driving strength of the first drive signal decreases, the switching speed of the first switch SRC will decrease, thereby reducing the voltage drop across the first power signal terminal VDD.

[0112] like Figure 5 As shown, the second drive module 20 may also include at least two second drive units 21.

[0113] Each second drive unit 21 may include a first terminal, a second terminal, and a control terminal. The first terminal is connected to the bias voltage adjustment module 40 and can receive the second bias voltage VCtrlN output by the bias voltage adjustment module 40. The second terminal is connected to the control terminal of the second switch SNK. The control terminal is connected to the control module 30.

[0114] The control module 30 can send a control signal to the second drive unit 21 to control the conduction and cutoff of the second drive unit 21. When the second drive unit 21 is on, it can output a second drive signal to the control terminal of the second switch SNK according to the received second bias voltage VCtrlN.

[0115] Similarly, following the same principle as adjusting the drive strength of the first drive module 10, when the second drive unit 21 is turned on, it can serve as a signal branch providing the second drive signal. Increasing the number of signal branches will increase the drive strength of the second drive signal; decreasing the number of signal branches will decrease the signal strength of the second drive signal. By adjusting the number of turned-on second drive units 21, the drive strength of the second drive signal can be adjusted. Thus, when the voltage change at the second power signal terminal GND is too large, the driving strength of the second drive signal is reduced, thereby decreasing the switching speed of the second switch SNK and reducing the voltage drop across the second power signal terminal GND.

[0116] Please refer to Figure 6 In some embodiments, the first driving unit 11 may include at least one first conducting branch, which may include a first transistor M1 and a second transistor M2.

[0117] The first terminal of the first transistor M1 is connected to the control terminal of the first switch SRC, and the control terminal of the first transistor M1 is connected to the first bias voltage terminal of the bias voltage adjustment module 40. The first terminal of the second transistor M2 is connected to the second terminal of the first transistor M1, the second terminal of the second transistor M2 is connected to the second power supply signal, and the control terminal of the second transistor M2 is connected to the first turn-on terminal B of the control module 30.

[0118] The control module 30 can output a first turn-on signal to the control terminal of the second transistor M2 to control the second transistor M2 to conduct. When the first transistor M1 and the second transistor M2 are conducting, the control terminal of the first switch SRC can be connected to the second power supply signal. The first bias voltage VCtrlP can be used as a voltage-controlled current source for the first transistor M1, adjusting the conduction amplitude of the first transistor M1 so that the first drive signal received by the control terminal of the first switch SRC is close to the first bias voltage VCtrlP. It can be understood that the signal voltage of the first drive signal is the sum of the first bias voltage VCtrlP and the threshold voltage Vm1 of the first transistor M1.

[0119] When the first conducting branch is turned on, the signal voltage of the first driving signal received by the control terminal of the first switch SRC is approximately the first bias voltage VCtrlP, and the control terminal of the first switch SRC turns on when it receives the first driving signal.

[0120] It is understood that in the plurality of first driving units 11 included in the first driving module 10, each first driving unit 11 may include at least one first conducting branch.

[0121] It is understood that a single first conducting branch can include two transistors, namely the first transistor M1 and the second transistor M2. The number of transistors in the first driving unit 11 is twice the number of the first conducting branches.

[0122] Please refer to Figure 7 The second driving unit 21 mentioned above may include at least one second conducting branch, and the second conducting branch may include a third transistor M3 and a fourth transistor M4.

[0123] The first terminal of the third transistor M3 is connected to the control terminal of the second switch SNK, and the control terminal of the third transistor M3 is connected to the second bias voltage terminal of the bias voltage adjustment module 40. The first terminal of the fourth transistor M4 is connected to the second terminal of the third transistor M3, the second terminal of the fourth transistor M4 is connected to the first power supply signal, and the control terminal of the fourth transistor M4 is connected to the second turn-on terminal D of the control module 30.

[0124] The control module 30 can output a second turn-on signal to the control terminal of the fourth transistor M4 to control the fourth transistor M4 to conduct. When the third transistor M3 and the fourth transistor M4 are conducting, the control terminal of the second switch SNK can be connected to the first power supply signal. The second bias voltage VCtrlN can be used as a voltage-controlled current source for the third transistor M3, adjusting the conduction amplitude of the third transistor M3 so that the first drive signal received by the control terminal of the second switch SNK is close to the second bias voltage VCtrlN. It can be understood that the signal voltage of the second drive signal is the difference between the second bias voltage VCtrlN and the threshold voltage Vm3 of the third transistor M3.

[0125] When the second conducting branch is turned on, the signal voltage of the second driving signal received by the control terminal of the second switch SNK is approximately the second bias voltage VCtrlN, and the control terminal of the second switch SNK turns on when it receives the second driving signal.

[0126] Please refer to Figure 6 In some embodiments, the first conducting branch may further include a first logic control module 111.

[0127] The first logic control module 111 can be connected between the control terminal of the second transistor M2 and the first enable terminal B of the control module 30. The control terminal of the first logic control module 111 is connected to the first logic signal terminal of the control module 30.

[0128] When the control module 30 outputs the enable signal of the first logic signal, the first logic control module 111 is turned on. At this time, the first turn-on signal output by the control signal can be sent to the control terminal of the second transistor M2 so that the first conduction branch can be turned on under the first turn-on signal.

[0129] When the control module 30 outputs the non-enable signal of the first logic signal, the first logic control module 111 is disconnected. At this time, the control terminal of the second transistor M2 cannot receive the first enable signal output by the control signal, and the first conduction branch is disconnected under the first enable signal.

[0130] The control module 30 can adjust the number of first conducting branches that can be turned on when the first turn-on signal is output by sending an enable signal or a disable signal of the first logic signal to the first conducting branch of each first driving unit 11. When the voltage change amplitude of the first power signal terminal VDD is too large, the control module 30 can reduce the driving strength of the first driving signal and reduce the switching speed of the first switch SRC by increasing the number of non-conducting first conducting branches, thereby reducing the voltage change amplitude of the first power signal terminal VDD during the next turn-on process.

[0131] Similarly, as Figure 7 As shown, the second conducting branch may include the second logic control module 211.

[0132] The second logic control module 211 can be connected between the control terminal of the fourth transistor M4 and the second enable terminal D of the control module 30. The control terminal of the second logic control module 211 is connected to the second logic signal terminal of the control module 30.

[0133] When the control module 30 outputs the enable signal of the second logic signal, the second logic control module 211 is turned on. At this time, the second turn-on signal output by the control signal can be sent to the control terminal of the fourth transistor M4 so that the second conduction branch can be turned on under the second turn-on signal.

[0134] When the control module 30 outputs the in enable signal of the second logic signal, the second logic control module 211 is disconnected. At this time, the control terminal of the fourth transistor M4 cannot receive the second enable signal output by the control signal, and the second conduction branch is disconnected under the second enable signal.

[0135] By adjusting the output second logic signal, the control module 30 can adjust the number of second conducting branches that can be turned on when the second turn-on signal is output, thereby reducing the voltage change amplitude of the first power signal terminal VDD during the next turn-on process.

[0136] Please refer to Figure 6 In some embodiments, among the plurality of first driving units 11 included in the first driving module 10, at least one first driving unit 11 does not include a first logic control module 111 in its first conduction branch.

[0137] In a plurality of first driving units 11, at least one first driving unit 11 may be configured such that its first conduction branch does not include the first logic control module 111. That is, in this first conduction branch, the control terminal of the second transistor M2 is directly connected to the first turn-on terminal B of the control module 30. When the control module 30 outputs the first turn-on signal, this first conduction branch is always on.

[0138] It is understandable that, in order to provide a first drive signal to the first switch SRC when the control module 30 outputs a first turn-on signal, at least one of the multiple first conduction branches corresponding to the multiple first drive units 11 should be able to conduct under the first turn-on signal. Therefore, for some of the first drive units 11, the first logic control module 111 may not be provided in the first conduction branch, so that the first conduction branch of these first drive units 11 can always remain on under the first turn-on signal and will not be affected by the first logic signal output by the control module 30.

[0139] Similarly, as Figure 7 As shown, among the multiple second driving units 21 included in the second driving module 20, at least one second driving unit 21 does not include a second logic control module 211 in its second conduction branch.

[0140] In a plurality of second driving units 21, at least one second driving unit 21 may be configured such that its second conduction branch does not include the second logic control module 211. That is, in this second conduction branch, the control terminal of the time transistor is directly connected to the second turn-on terminal D of the control module 30. When the control module 30 outputs the second turn-on signal, this second conduction branch is always on.

[0141] In some embodiments, in the first driving module 10 described above, the number of first conducting branches included in any two first driving units 11 are different from each other.

[0142] Taking the first driving module 10 as an example, which includes three first driving units 11, the three first driving units 11 may respectively include one first conducting branch, two first conducting branches and four first conducting branches.

[0143] When all three first drive units 11 are turned on, the first turn-on signal can control the seven first conduction branches to be turned on, and provide the first drive signal to the control terminal of the first switch SRC respectively.

[0144] When the two first driving units 11 are turned on, by adjusting the turned-on first driving units 11, it is possible to turn on 3 first conducting branches, 5 first conducting branches, or 6 first conducting branches respectively.

[0145] When a single first driving unit 11 is turned on, by adjusting the turned-on first driving unit 11, one first conducting branch can be turned on, two first conducting branches can be turned on, or four first conducting branches can be turned on respectively.

[0146] It is understandable that the driving strength of the first driving signal will differ depending on the number of first conducting branches. Even without adjusting the total number of first driving units 11, simply driving different first driving units 11 to conduct can achieve adjustment of the driving strength of the first driving signal. For example, if the two conducting first driving units 11 include one first conducting branch and four first conducting branches respectively, and the voltage change amplitude of the first power signal terminal VDD is detected to be too large, the two conducting first driving units 11 can be adjusted to include one first conducting branch and two first conducting branches respectively. At this time, the first turn-on signal can still drive the two first driving units 11 to conduct, but as the total number of first conducting branches decreases, the driving strength of the first driving signal also decreases accordingly, the switching speed of the first switch SRC decreases, and the voltage change amplitude of the first power signal terminal VDD decreases.

[0147] The control module 30 can detect the voltage change amplitude of the first power signal terminal VDD. When the voltage change amplitude reaches the first voltage threshold, the control module 30 can adjust the first logic signal to change the conduction state of some of the first drive units 11 in the first drive module 10. That is, some of the first drive units 11 can change from being able to conduct under the first turn-on signal to remaining in the off state when the first turn-on signal is received, or some of the first drive units 11 can change from remaining in the off state when the first turn-on signal is received to being able to conduct under the first turn-on signal.

[0148] The control module 30 can adjust the total number of first conducting branches connected to the control terminal of the first switch SRC by adjusting the conduction state of each first driving unit 11. If the voltage change amplitude of the first power signal terminal VDD reaches the first voltage threshold, the control module 30 can reduce the driving strength of the first driving signal by reducing the total number of first conducting branches, and thus reduce the voltage change amplitude of the first power signal terminal VDD by reducing the switching speed of the first switch SRC.

[0149] Similarly, in the second drive module 20, the number of second conduction branches contained in any two second drive units 21 are different.

[0150] Similar to the principle that the number of first conducting branches contained in each first driving unit 11 in the first driving module 10 is different, the control module 30 can detect the voltage change amplitude of the second power signal terminal GND, and adjust the conduction state of some second driving units 21 according to the voltage change amplitude, so as to adjust the total number of second conducting branches connected to the control terminal of the second switch SNK.

[0151] If the voltage change amplitude of the second power signal terminal GND reaches the second voltage threshold, the control module 30 can reduce the driving strength of the second driving signal by reducing the total number of the second conducting branches, and thus reduce the voltage change amplitude of the second power signal terminal GND by reducing the switching speed of the second switch SNK.

[0152] Please continue to refer to Figure 5 In some embodiments, the first driving module 10 described above may further include a fifth transistor M5.

[0153] The first terminal of the fifth transistor M5 is connected to the control terminal of the first switch SRC, the second terminal of the fifth transistor M5 is connected to the first power signal terminal VDD, and the control terminal of the fifth transistor M5 is connected to the first shutdown terminal C of the control module 30.

[0154] When the control module 30 outputs the first shutdown signal, the fifth transistor M5 is turned on, the control terminal of the first switch SRC receives the first power signal, and the first switch SRC is turned off. That is, the control module 30 can control the first switch SRC to turn on by outputting the first turn-on signal, and control the first switch SRC to turn off by outputting the first turn-off signal.

[0155] Similarly, the second drive module 20 described above may also include a sixth transistor M6.

[0156] The first terminal of the sixth transistor M6 is connected to the control terminal of the second switch SNK, the second terminal of the sixth transistor M6 is connected to the second power signal terminal GND, and the control terminal of the sixth transistor M6 is connected to the second shutdown terminal A of the control module 30.

[0157] When the control module 30 outputs the second off signal, the sixth transistor M6 is turned on, the control terminal of the second switch SNK receives the second power signal, and the second switch SNK is turned off. That is, the control module 30 can control the second switch SNK to turn on by outputting the second on signal, and control the second switch SNK to turn off by outputting the second off signal.

[0158] Please refer to Figure 8 In some embodiments, the input terminal of the control module 30 can be connected to the turn-on control signal terminal IN to receive a turn-on control signal. This turn-on control signal can be a PWM signal.

[0159] The PWM signal can include a first signal and a second signal, where the first signal can be a high-level signal and the second signal can be a low-level signal. Of course, the first signal and the second signal can also be a low-level signal and a high-level signal, respectively.

[0160] When the control module 30 receives the first PWM signal, it can output enable signals through the first on terminal B and the second off terminal A, respectively. These enable signals are the first on signal and the second off signal.

[0161] The first enable signal can control at least one first drive unit 11 in the first drive module 10 to turn on, providing a first drive signal to the control terminal of the first switch SRC, thereby turning on the first switch SRC. The second disable signal can control the sixth transistor M6 in the second drive module 20 to turn on, providing a second power signal to the control terminal of the second switch SNK, thereby turning off the second switch SNK. That is, when the control module 30 receives the first signal, it can turn on the first switch SRC and turn off the second switch SNK.

[0162] Understandably, to avoid a short circuit between the first power signal and the second power signal caused by both the first switch SRC and the second switch SNK being in the ON state at the same time, the control module 30 can adjust the start time of the first ON terminal B outputting the first ON signal and the start time of the second OFF terminal A outputting the second OFF signal. For example... Figure 9 As shown, the control module 30 can first output a second shut-off signal through the second shut-off terminal A to disconnect the second switch SNK, and then output a first open signal through the first open terminal B to turn on the first switch SRC.

[0163] When the control module 30 receives the second PWM signal, it outputs an enable signal through the second enable terminal D and the first disable terminal C, respectively. This enable signal is the second enable signal and the first disable signal.

[0164] Similarly, the second turn-on signal can control at least one second drive unit 21 in the second drive module 20 to turn on, providing a second drive signal to the control terminal of the second switch SNK, thereby turning on the second switch SNK. The first turn-off signal can control the fifth transistor M5 in the first drive module 10 to turn on, providing a first power signal to the control terminal of the first switch SRC, thereby turning off the first switch SRC. That is, when the control module 30 receives the second signal, it can turn on the second switch SNK and turn off the first switch SRC.

[0165] To prevent the first power signal from short-circuiting with the second power signal due to both the first switch SRC and the second switch SNK being in the ON state at the same time, the control module 30 can also adjust the start time of the second ON terminal D outputting the second ON signal and the start time of the first OFF terminal C outputting the first OFF signal. For example... Figure 10 As shown, the control module 30 can first output a first shut-off signal through the first shut-off terminal C to disconnect the first switch SRC, and then output a second open signal through the second open terminal D to turn on the second switch SNK.

[0166] As an optional implementation method, please refer to Figures 11 to 12 SEL is the first logic signal output by the control module 30. When SEL is 10, it means that the first logic signal SEL1 output by the control module 30 is 1 and SEL0 is 0.

[0167] like Figure 11 As shown, taking the first switch SRC as an example, the first drive module 10 includes three first drive units 11. Among the three first drive units 11, one first drive unit 11 does not have a first logic control module 111. The gate of the second transistor M2 of this first drive unit 11 is directly connected to the first turn-on terminal B of the control module 30. The other two first drive units 11 are equipped with first logic control modules 111, which are controlled by the first logic signal SEL1 and the first logic signal SEL0, respectively.

[0168] Among the three first driving units, the number of first conducting branches included in the first driving unit 11 from left to right can be gradually increased. For example, the three first driving units 11 include two first conducting branches, four first conducting branches, and eight first conducting branches from left to right, respectively.

[0169] When the first logic signal output by the control module 30 is 10, the first drive unit 11 corresponding to the first logic signal SEL1 can receive the first turn-on signal output by the control module 30. That is, at this time, the left and right first drive units 11 can be turned on, and the total number of first conduction branches connected by the first switch SRC is 2+8=10.

[0170] The control module 30 can change the output first logic signal from 10 to 01 when the first switch SRC is in the off state between two opening processes. At this time, the first drive unit 11 corresponding to the first logic signal SEL0 can receive the first opening signal output by the control module 30. That is, at this time, the two first drive units 11 on the left and middle can be turned on, and the total number of first conducting branches connected to the first switch SRC is 2+4=6.

[0171] By adjusting the signal level of the first logic signal, the control module 30 can reduce the total number of first conducting branches connected to the first switch SRC, thereby reducing the driving strength of the first driving signal output by the first driving module 10, reducing the switching speed and current change rate of the first switch SRC, and ultimately reducing the voltage and current change amplitude of the first power signal terminal VCC during the next turn-on process.

[0172] This application also provides a driver chip; please refer to [link / reference]. Figure 13 The driver chip can drive power semiconductor devices to turn on or off, and the driver chip may include the switch driving circuit provided in the embodiments of this application.

[0173] The functional blocks shown in the above-described structural diagram can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of this application are programs or code segments used to perform the required tasks. Programs or code segments can be stored on a machine-readable medium or transmitted over a transmission medium or communication link via data signals carried on a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, etc. Code segments can be downloaded via computer networks such as the Internet, intranets, etc.

[0174] It should be noted that, in this document, the terms “comprising,” “including,” or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0175] This document uses specific examples to illustrate the principles and implementation methods of this application. The examples are merely for the purpose of helping to understand the method and core ideas of this application. The above are only preferred embodiments of this application. It should be noted that due to the limitations of written expression, and the existence of an infinite number of specific structures, those skilled in the art can make several improvements, modifications, or changes without departing from the principles of this application, and can also combine the above technical features in an appropriate manner. These improvements, modifications, changes, or combinations, or the direct application of the concept and technical solution of this application to other situations without modification, should all be considered within the scope of protection of this application.

Claims

1. A switch driving circuit, characterized in that, The switch driving circuit is used to drive power semiconductor devices to turn on or off, and includes: A first switch is connected between a first power signal terminal and a control terminal of the power semiconductor device, and is used to turn on in response to a first drive signal; The second switch is connected between the second power signal terminal and the control terminal of the power semiconductor device, and is used to turn on in response to the second drive signal; The first driving module is connected to the control terminal of the first switch and is used to output the first driving signal; The second drive module is connected to the control terminal of the second switch and is used to output the second drive signal; The control module is configured to adjust the driving strength of the first driving module according to the voltage drop amplitude at the first power signal terminal, so as to adjust the switching speed of the first switch; and / or, adjust the driving strength of the second driving module according to the voltage drop amplitude at the second power signal terminal, so as to adjust the switching speed of the second switch.

2. The switch driving circuit according to claim 1, characterized in that, The switch driving circuit further includes: A bias voltage adjustment module, connected to the first drive module and the second drive module, is used to provide a first bias voltage and a second bias voltage to the first drive module and the second drive module, respectively. The bias voltage adjustment module is further configured to adjust the first bias voltage according to the drive current of the first switch to adjust the current driving capability of the first switch; and / or adjust the second bias voltage according to the drive current of the second switch to adjust the current driving capability of the second switch.

3. The switch driving circuit according to claim 2, characterized in that, The first driving module includes at least two first driving units; Each first drive unit includes a first terminal, a second terminal, and a control terminal. The first terminal is connected to the bias voltage adjustment module, the second terminal is connected to the control terminal of the first switch, and the control terminal is connected to the control module. The second drive module includes at least two second drive units; Each second drive unit includes a first terminal, a second terminal, and a control terminal. The first terminal is connected to the bias voltage adjustment module, the second terminal is connected to the control terminal of the second switch, and the control terminal is connected to the control module. The control module is configured to adjust the number of first driving units in the first driving module that are turned on according to the voltage drop amplitude at the first power signal terminal; and / or adjust the number of second driving units in the second driving module that are turned on according to the voltage drop amplitude at the second power signal terminal.

4. The switch driving circuit according to claim 3, characterized in that, The first driving unit includes at least one first conducting branch, the first conducting branch including: A first transistor, the first terminal of which is connected to the control terminal of the first switch, and the control terminal of the first transistor is connected to the first bias voltage terminal of the bias voltage adjustment module; The second transistor has a first terminal connected to the second terminal of the first transistor, a second terminal connected to a second power signal, and a control terminal connected to the first power-on terminal of the control module. The second driving unit includes at least one second conducting branch, the second conducting branch including: The third transistor has its first terminal connected to the control terminal of the second switch, and its control terminal connected to the second bias voltage terminal of the bias voltage adjustment module. The fourth transistor has a first terminal connected to the second terminal of the third transistor, the second terminal of the fourth transistor connected to the first power signal, and the control terminal of the fourth transistor connected to the second turn-on terminal of the control module.

5. The switch driving circuit according to claim 4, characterized in that, The first conducting branch also includes: A first logic control module is connected between the control terminal of the second transistor and the first turn-on terminal of the control module, and the control terminal of the first logic control module is connected to the first logic signal terminal of the control module. The second conducting branch also includes: The second logic control module is connected between the control terminal of the fourth transistor and the second turn-on terminal of the control module, and the control terminal of the second logic control module is connected to the second logic signal terminal of the control module.

6. The switch driving circuit according to claim 5, characterized in that, In the plurality of first driving units of the first driving module, at least one first driving unit's first conduction branch does not include the first logic control module; In the second driving module, at least one of the second driving units has a second conduction branch that does not include the second logic control module.

7. The switch driving circuit according to claim 5, characterized in that, In the first driving module, the number of first conducting branches of any two first driving units is different; in the second driving module, the number of second conducting branches of any two second driving units is different. The control module is used to adjust the conduction state of some first drive units in the first drive module through a first logic signal when the voltage drop at the first power signal terminal reaches a first voltage threshold, thereby reducing the total number of first conduction branches connected to the control terminal of the first switch. And / or, when the voltage drop at the second power signal terminal reaches the second voltage threshold, the conduction state of some second drive units in the second drive module is adjusted by the second logic signal to reduce the total number of second conduction branches connected to the control terminal of the second switch.

8. The switch driving circuit according to claim 4, characterized in that, The first driver module also includes: The fifth transistor has a first terminal connected to the control terminal of the first switch, a second terminal connected to the first power signal terminal, and a control terminal connected to the first shutdown terminal of the control module. The second drive module also includes: The sixth transistor has a first terminal connected to the control terminal of the second switch, a second terminal connected to the second power signal terminal, and a control terminal connected to the second shutdown terminal of the control module.

9. The switch driving circuit according to claim 8, characterized in that, The input terminal of the control module is connected to the conduction control signal terminal to receive the conduction control signal; the conduction control signal is a PWM signal. The control module is configured to, in response to a first signal of the PWM signal, output enable signals through a first on terminal and a second off terminal respectively; or, in response to a second signal of the PWM signal, output enable signals through a second on terminal and a first off terminal respectively; wherein... The start time of the enable signal output by the first open terminal is after the start time of the enable signal output by the second closed terminal; the start time of the enable signal output by the second open terminal is after the start time of the enable signal output by the first closed terminal.

10. The switch driving circuit according to claim 2, characterized in that, The bias voltage adjustment module is used to adjust the first bias voltage output from the first bias voltage terminal when the maximum instantaneous drive current of the first switch is lower than the first current threshold, so as to increase the gate-source voltage difference when the first switch is turned on.

11. A driver chip, characterized in that, The driver chip includes the switch driver circuit according to any one of claims 1-10.

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