Resonant conversion apparatus and universal serial bus circuit
Patent Information
- Application Number
- CN202210156467.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2022-01-24
- Filing Date
- 2022-02-21
- Publication Date
- 2026-10-09
- Estimated Expiration
- 2042-02-21
AI Technical Summary
但因为切换式电源供应器的控制功率开关在导通或截止时,电压与电流不为零,将会造成在切换时电压和电流具有较高的重叠区域面积,亦即较高的切换损失
[0007] Based on the above, some embodiments of the present invention avoid efficiency reduction through a single-stage design. Some embodiments of the present invention achieve wide output voltage and improved efficiency by switching the operating mode and control method of the full-bridge LLC converter circuit based on the indicated voltage. Some embodiments of the present invention further improve efficiency by using frequency conversion control within a specific voltage and load range.
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Figure CN116526851B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a resonant converter, and more particularly to a full-bridge LLC resonant converter with a hybrid control mechanism. Background Technology
[0002] To meet the demands for small size and high power density, switching power supplies are gradually replacing traditional linear power supplies. However, because the control power switches in switching power supplies are not zero in terms of voltage and current when they are on or off, a large overlap area between voltage and current occurs during switching, resulting in higher switching losses. This generates heat and leads to decreased efficiency. Furthermore, as the switching frequency increases, switching losses and electromagnetic interference also increase. LLC resonant converters have gained increasing attention in recent years due to their advantages of zero-voltage switching and voltage regulation capabilities. To adapt to complex application scenarios and simultaneously achieve a wide output voltage range and improved efficiency, there is an urgent need in this field for a novel full-bridge LLC resonant converter with a hybrid control mechanism. Summary of the Invention
[0003] In view of this, embodiments of the present invention provide a resonant converter and a universal sequence bus circuit to improve the problems of the prior art.
[0004] An embodiment of the present invention provides a resonant converter. The resonant converter includes an input filter circuit, a full-bridge LLC converter circuit, a transformer circuit, a rectifier filter circuit, and a controller. The input filter circuit receives a DC input voltage and filters it to output a filtered DC voltage. The full-bridge LLC converter circuit receives the filtered DC voltage and outputs a converted voltage. The transformer circuit includes a primary side and a secondary side. The primary side of the transformer circuit is coupled to the full-bridge LLC converter circuit to receive the converted voltage. The secondary side of the transformer circuit senses the converted voltage to generate an induced voltage. The rectifier filter circuit is coupled to the secondary side of the transformer circuit and receives, rectifies, and filters the induced voltage to output a DC output voltage. The controller is coupled to the full-bridge LLC converter circuit and the rectifier filter circuit. The controller can detect the DC output voltage and receive voltage commands from an external source. The controller is configured to determine whether the indicated voltage of the voltage command is less than or equal to a threshold and perform the following steps: in response to the indicated voltage being less than or equal to the threshold, controlling the full-bridge LLC converter circuit to enter a half-bridge operation mode, and performing half-bridge burst mode control on the full-bridge LLC converter circuit based on the DC output voltage to regulate the DC output voltage; and in response to the indicated voltage being greater than the threshold, performing full-bridge burst mode control on the full-bridge LLC converter circuit based on the DC output voltage to regulate the DC output voltage.
[0005] Another embodiment of the present invention provides a resonant converter. The resonant converter includes an input filter circuit, a full-bridge LLC converter circuit, a transformer circuit, a rectifier filter circuit, a load detection circuit, and a controller. The input filter circuit receives a DC input voltage and filters the DC input voltage to output a filtered DC voltage. The full-bridge LLC converter circuit receives the filtered DC voltage and outputs a converted voltage. The transformer circuit includes a primary side and a secondary side. The primary side of the transformer circuit is coupled to the full-bridge LLC converter circuit to receive the converted voltage. The secondary side of the transformer circuit senses the converted voltage to generate an induced voltage. The load detection circuit detects the load condition of the resonant converter. The rectifier filter circuit is coupled to the secondary side of the transformer circuit and receives, rectifies, and filters the induced voltage to output a DC output voltage. The controller is coupled to the full-bridge LLC converter circuit, the load detection circuit, and the rectifier filter circuit. The controller can detect the DC output voltage, receive the load condition, and receive voltage commands from an external source. The controller is configured to determine whether the indicated voltage of the voltage command is less than or equal to a threshold and perform the following steps: in response to the indicated voltage being less than or equal to the threshold, controlling the full-bridge LLC converter circuit to enter a half-bridge operation mode, and performing half-bridge generator-converter switching mode control on the full-bridge LLC converter circuit based on the DC output voltage to regulate the DC output voltage; and in response to the indicated voltage being greater than the threshold, performing full-bridge generator-converter switching mode control on the full-bridge LLC converter circuit based on the DC output voltage to regulate the DC output voltage.
[0006] One embodiment of the present invention provides a Universal Serial Bus (USB) circuit including the aforementioned resonant converter. The USB circuit issues voltage commands to the resonant converter based on requests from external devices.
[0007] Based on the above, some embodiments of the present invention avoid efficiency reduction through a single-stage design. Some embodiments of the present invention achieve wide output voltage and improved efficiency by switching the operating mode and control method of the full-bridge LLC converter circuit based on the indicated voltage. Some embodiments of the present invention further improve efficiency by using frequency conversion control within a specific voltage and load range. Attached Figure Description
[0008] Figure 1 This is a block diagram of a resonant converter according to an embodiment of the present invention;
[0009] Figure 2-1 The circuit structure diagram of the resonant converter device is shown according to an embodiment of the present invention;
[0010] Figure 2-2 The circuit structure diagram of the resonant converter device is shown according to an embodiment of the present invention;
[0011] Figure 3-1The circuit structure diagram of the resonant converter device is shown according to an embodiment of the present invention;
[0012] Figure 3-2 The circuit structure diagram of the resonant converter device is shown according to an embodiment of the present invention;
[0013] Figure 4 The equivalent circuit diagram shown is for the series branch in a full-bridge LLC converter circuit according to an embodiment of the present invention.
[0014] Figure 5 The diagram illustrates the response of the switched-gain resonant slot gain product to the normalized frequency according to an embodiment of the present invention.
[0015] Figure 6 This is a timing diagram of a switch control signal drawn according to an embodiment of the present invention;
[0016] Figure 7 This is a timing diagram of a switch control signal drawn according to an embodiment of the present invention;
[0017] Figure 8 This is a timing diagram of a switch control signal drawn according to an embodiment of the present invention;
[0018] Figure 9 The diagram illustrates a control flow chart of a resonant converter according to an embodiment of the present invention.
[0019] Figure 10 This is a control flowchart illustrated according to an embodiment of the present invention;
[0020] Figure 11 This is a control flowchart illustrated according to an embodiment of the present invention;
[0021] Figure 12 The diagram illustrates a control flow chart of a resonant converter according to an embodiment of the present invention.
[0022] Figure 13 This is a control flowchart illustrated according to an embodiment of the present invention;
[0023] Figure 14 This is a control flowchart illustrated according to an embodiment of the present invention;
[0024] Figure 15 This is a control flowchart illustrated according to an embodiment of the present invention;
[0025] Figure 16 This is a control flowchart illustrated according to an embodiment of the present invention;
[0026] Figure 17 This is a control flowchart illustrated according to an embodiment of the present invention;
[0027] Figure 18 This is a control flowchart illustrated according to an embodiment of the present invention;
[0028] Figure 19 This is a block diagram of a general serial bus circuit and external device according to an embodiment of the present invention;
[0029] Figure 20 A comparison of the efficiency of the resonant converter under light load;
[0030] Figure 21 This is a comparison chart of the efficiency of the resonant converter under heavy load.
[0031] Figure 22 A comparison of the efficiency of half-bridge burst mode control and half-bridge frequency conversion control in a resonant converter.
[0032] Figure 23 This is a comparison chart of the efficiency of full-bridge burst mode control and full-bridge frequency conversion control in a resonant converter.
[0033] [Symbol Explanation]
[0034] 100, 1901: Resonant converter
[0035] 101: Input Filtering Circuit
[0036] 102: Full-bridge LLC converter circuit
[0037] 103: Transformer Circuit
[0038] 104: Rectifier and Filter Circuit
[0039] 105: Controller
[0040] 106: Analog-to-digital conversion circuit
[0041] 107: Processor
[0042] 108: Digital-to-Analog Conversion Circuit
[0043] 109: Load Detection Circuit
[0044] 1900: Universal Serial Bus Circuit
[0045] 1902: External Devices
[0046] V in DC input voltage
[0047] C in : Filter capacitor
[0048] Q1: First switch
[0049] Q2: Second switch
[0050] Q3: Third switch
[0051] Q4: Fourth Switch
[0052] Q5, Q9: Fifth Switch
[0053] Q6, Q 10 Sixth Switch
[0054] Q7: Seventh Switch
[0055] Q8: Eighth Switch
[0056] L r First resonant inductor
[0057] L m Second resonant inductor
[0058] C r Resonant capacitor
[0059] D Q1 D Q2 D Q3 D Q4 :diode
[0060] C Q1 C Q2 C Q3 C Q4 :capacitance
[0061] L1: Primary coil
[0062] L2, L3: Secondary coils
[0063] D1, D5: First forward conduction element
[0064] D2, D6: Second forward conduction element
[0065] D3: Third forward conduction element
[0066] D4: Fourth forward conduction element
[0067] C out Capacitor
[0068] V o DC output voltage of resonant converter 100
[0069] 1011: The first terminal of the input filter circuit 101
[0070] 1012: The second terminal of the input filter circuit 101
[0071] 1021: The first terminal of the first switch Q1
[0072] 1022: The first terminal of the second switch Q2
[0073] 1023: The first terminal of the third switch Q3
[0074] 1024: The first terminal of the fourth switch Q4
[0075] 1025: The first end of the series branch
[0076] 1026: The second end of the series branch
[0077] 1027: The second terminal of the first switch Q1
[0078] 1028: The second terminal of the second switch Q2
[0079] 1029: The second terminal of the third switch Q3
[0080] 1030: The second terminal of the fourth switch Q4
[0081] 1031: The first terminal of secondary coil L2
[0082] 1032: The second terminal of secondary coil L2
[0083] 1033: The first terminal of secondary coil L3
[0084] 1034: The second terminal of secondary coil L3
[0085] 1035: Center tap contact
[0086] 1091: First terminal of the first forward conducting element D1
[0087] 1092: The first terminal of the second forward conducting element D2
[0088] 1093: The first terminal of the third forward conducting element D3
[0089] 1094: The first terminal of the fourth forward conducting element D4
[0090] 1095: Capacitor C out The first end
[0091] 1096: Capacitor C out The second end
[0092] 1097: The second terminal of the first forward conducting element D1
[0093] 1098: The second terminal of the second forward conducting element D2
[0094] 1099: The second terminal of the third forward conducting element D3
[0095] 10910: The second terminal of the fourth forward conducting element D4
[0096] 10911: First terminal of the first forward conducting element D5
[0097] 10912: The first terminal of the second forward conducting element D6
[0098] 10913: The second terminal of the first forward conducting element D5
[0099] 10914: The second terminal of the second forward conducting element D6
[0100] 10915: Capacitor C out The first end
[0101] 10916: Capacitor C out The second end
[0102] 2091: The second terminal of the fifth switch Q5
[0103] 2092: The second terminal of the sixth switch Q6
[0104] 2093: The second terminal of the seventh switch Q7
[0105] 2094: The second terminal of the eighth switch Q8
[0106] 2097: The first terminal of the fifth switch Q5
[0107] 2098: The first terminal of the sixth switch Q6
[0108] 2099: The first terminal of the seventh switch Q7
[0109] 20910: The first terminal of the eighth switch Q8
[0110] 20911: The second terminal of the fifth switch Q5
[0111] 20912: Sixth Switch Q 10 The second end
[0112] 20913: The first terminal of the fifth switch Q9
[0113] 20914: Sixth Switch Q 10 The first end
[0114] s: Laplace operator
[0115] R ac Reflective load resistor
[0116] f r Resonant frequency
[0117] f sSwitching frequency
[0118] T r :cycle
[0119] V GSQ1 The voltage between the gate and source of the first switch Q1
[0120] V GSQ2 The voltage between the gate and source of the second switch Q2
[0121] V GSQ3 The voltage between the gate and source of the third switch Q3
[0122] V GSQ4 The voltage between the gate and source of the fourth switch Q4
[0123] T1, T2, T3, T4, T5, T6, T7, T8, T9, T 10 T 11 T 12 T 13 T 14 T 15 T 16 T 17 Time point
[0124] S901~S904, S1001~S1003, S1101~S1102, S1201~S1204, S1301~S1305, S1401~S1407, S1501~S1504, S1601~S1607: Steps Detailed Implementation
[0125] The foregoing and other technical contents, features, and effects of the present invention will be clearly presented in the following detailed description of embodiments with reference to the accompanying drawings. The thickness or dimensions of the elements in the drawings are exaggerated, omitted, or generalized for the understanding and reading of those skilled in the art. The dimensions of each element are not exactly their actual dimensions and are not intended to limit the implementation of the invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments in size, without affecting the effects and objectives achieved by the invention, should still fall within the scope of the technical content disclosed in the present invention. The same reference numerals will be used to denote the same or similar elements in all the drawings. The terms "coupled" or "connected" as used in the following embodiments can refer to any direct or indirect means of connection.
[0126] Figure 1 This is a block diagram of a resonant converter according to an embodiment of the present invention. Please also refer to... Figure 1The resonant converter 100 includes an input filter circuit 101, a full-bridge LLC converter circuit 102, a transformer circuit 103, a rectifier filter circuit 104, and a controller 105. The input filter circuit 101 receives a DC input voltage and filters it to output a filtered DC voltage. The full-bridge LLC converter circuit 102 is a resonant switching converter, comprising a resonant slot composed of a resonant inductor, a resonant capacitor, and a magnetizing inductor. The full-bridge LLC converter circuit 102 receives the filtered DC voltage and outputs a converted voltage via the aforementioned resonant slot composed of the resonant inductor, resonant capacitor, and magnetizing inductor. Specific implementations of the full-bridge LLC converter circuit 102 will be described in detail in later embodiments.
[0127] The transformer circuit 103 includes a primary side and a secondary side. The primary side of the transformer circuit 103 is coupled to a full-bridge LLC converter circuit to receive the converted voltage output from the aforementioned resonant slot. The secondary side of the transformer circuit 103 senses the converted voltage to generate an induced voltage. A rectifier-filter circuit 104 is coupled to the secondary side of the transformer circuit 103 to receive the induced voltage generated by the secondary side of the transformer circuit 103. The rectifier-filter circuit 104 rectifies and filters the induced voltage to output a DC output voltage as the output of the resonant converter 100.
[0128] Controller 105 is coupled to the output of full-bridge LLC converter circuit 102 and rectifier-filter circuit 104. Controller 105 detects the DC output voltage of rectifier-filter circuit 104 and receives voltage commands from an external source. The aforementioned voltage commands include an indicator voltage to indicate the value of the DC output voltage of resonant converter 100. In some embodiments, controller 105 further receives load conditions.
[0129] In some embodiments, the indicated voltage includes 5V, 9V, 15V, 20V, 28V, 36V, and 48V. The aforementioned indicated voltages meet the Universal Serial Bus PD 3.1 specification (USB Power Delivery Specification Revision 3.1, Version 1.0).
[0130] The controller 105 controls the full-bridge LLC converter circuit 102 based on the aforementioned voltage command and the detected DC output voltage value of the rectifier filter circuit 104.
[0131] Figure 9This is a control flowchart of a resonant converter according to an embodiment of the present invention. In some embodiments of the present invention, the controller 105, based on the indicated voltage of the externally received voltage and the detected DC output voltage value of the rectifier-filter circuit 104, sends a control signal to the full-bridge LLC converter circuit 102, causing the rectifier-filter circuit 104 of the resonant converter 100 to output a DC output voltage corresponding to the indicated voltage. Please also refer to... Figure 1 and Figure 9 . Figure 9 The illustrated steps are executed by controller 105. In step S901, controller 105 detects the DC output voltage of rectifier-filter circuit 104 and receives a voltage command from the outside. In step S902, controller 105 determines whether the indicated voltage of the voltage command is less than or equal to a threshold. When the indicated voltage is less than or equal to the aforementioned threshold, controller 105 controls the full-bridge LLC converter circuit 102 to enter half-bridge operation mode, and performs half-bridge burst mode control on the full-bridge LLC converter circuit 102 to adjust the DC output voltage based on the DC output voltage value detected by controller 105. When the indicated voltage is greater than the aforementioned threshold, controller 105 performs full-bridge burst mode control on the full-bridge LLC converter circuit 102 to adjust the DC output voltage based on the DC output voltage value detected by controller 105.
[0132] Figure 12 The diagram illustrates a control flowchart of a resonant converter according to an embodiment of the present invention. Please also refer to... Figure 1 and Figure 12 . Figure 12 The illustrated steps are executed by the controller 105. In some embodiments of the present invention, the controller 105 sends a control signal to the full-bridge LLC converter circuit 102 based on the indicated voltage of the externally received voltage, the load condition, and the detected DC output voltage value of the rectifier filter circuit 104, so that the rectifier filter circuit 104 of the resonant converter 100 outputs the corresponding indicated DC output voltage.
[0133] In step S1201, the controller 105 detects the DC output voltage of the rectifier-filter circuit 104, receives the load status, and receives a voltage command from an external source. In step S1202, the controller 105 determines whether the indicated voltage of the voltage command is less than or equal to a threshold. When the indicated voltage is less than or equal to the aforementioned threshold, the controller 105 controls the full-bridge LLC converter circuit 102 to enter a half-bridge operation mode, and based on the DC output voltage value detected by the controller 105 from the rectifier-filter circuit 104, performs half-bridge generator-inverter switching mode control on the full-bridge LLC converter circuit 102 to adjust the DC output voltage. When the indicated voltage is greater than the aforementioned threshold, the controller 105 performs full-bridge generator-inverter switching mode control on the full-bridge LLC converter circuit 102 based on the DC output voltage value detected by the controller 105 from the rectifier-filter circuit 104 to adjust the DC output voltage.
[0134] Figure 2-1 This is a circuit diagram of a resonant converter device according to an embodiment of the present invention. Please also refer to... Figure 1 and Figure 2-1 In some embodiments of the present invention, the resonant converter 100 receives a DC input voltage V from an external source. in The input filter circuit 101 includes a filter capacitor C. in Filter capacitor C in Parallel DC input voltage V in With filtered DC input voltage V in The output is a filtered DC voltage. The full-bridge LLC converter circuit 102 includes a first switch Q1, a second switch Q2, a third switch Q3, a fourth switch Q4, and a series branch. Among them, the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 are n-type MOS field-effect transistors.
[0135] The first terminal 1021 of the first switch Q1 is coupled to the first terminal 1011 of the input filter circuit 101. The first switch Q1 is connected in parallel with diode D. Q1 With capacitor C Q1 The first terminal 1022 of the second switch Q2 is coupled to the first terminal 1021 of the first switch Q1 and the first terminal 1011 of the input filter circuit 101. A diode D is connected in parallel to the second switch Q2. Q2 With capacitor C Q2 The first terminal 1023 of the third switch Q3 is coupled to the second terminal 1027 of the first switch Q1, and the second terminal 1029 of the third switch Q3 is coupled to the second terminal 1012 of the input filter circuit 101. The third switch Q3 is connected in parallel with diode D. Q3 With capacitor C Q3The first terminal 1024 of the fourth switch Q4 is coupled to the second terminal 1028 of the second switch Q2, and the second terminal 1030 of the fourth switch Q4 is coupled to the second terminal 1029 of the third switch Q3. A diode D is connected in parallel to the fourth switch Q4. Q4 With capacitor C Q4 .
[0136] The series branch includes the first resonant inductor L connected in series. r Second resonant inductor L m With resonant capacitor C r Among them, the first resonant inductor L r The resonant inductor of the aforementioned full-bridge LLC converter circuit 102, the second resonant inductor L m The magnetizing inductor and resonant capacitor C of the aforementioned full-bridge LLC converter circuit 102 are... r This is the resonant capacitor of the aforementioned full-bridge LLC converter circuit 102. The first resonant inductor L... r Second resonant inductor L m With resonant capacitor C r The resonant slots that make up the full-bridge LLC converter circuit 102. The first terminal 1025 of the series branch is coupled between the second terminal 1027 of the first switch Q1 and the first terminal 1023 of the third switch Q3. The second terminal 1026 of the series branch is coupled between the second terminal 1028 of the second switch Q2 and the first terminal 1024 of the fourth switch Q4.
[0137] The primary side of transformer circuit 103 includes a primary coil L1. The secondary side of transformer circuit 103 includes a secondary coil L2. The turns ratio of the primary coil L1 to the secondary coil L2 is N1:N2. The second resonant inductor L... m The primary coil L1 is connected to the primary side of the parallel transformer circuit 103. The secondary coil L2 includes a first end 1031 and a second end 1032. The rectifier and filter circuit 104 is coupled to the secondary side of the transformer circuit 103 via the first end 1031 and the second end 1032 of the secondary coil L2.
[0138] The resonant converter 100 includes a load detection circuit 109. The load detection circuit 109 is coupled to the output of the rectifier-filter circuit 104 to detect the DC output voltage and load current of the rectifier-filter circuit 104. The load detection circuit 109 obtains the load condition through the DC output voltage and load current of the rectifier-filter circuit 104.
[0139] The rectifier filter circuit 104 includes a first forward conducting element D1, a second forward conducting element D2, a third forward conducting element D3, a fourth forward conducting element D4, and a capacitor C. outThe first forward conducting element D1, the second forward conducting element D2, the third forward conducting element D3, and the fourth forward conducting element D4 are all diodes. The first terminal 1091 of the first forward conducting element D1 is coupled to the second terminal 1099 of the third forward conducting element D3. The first terminal 1031 of the secondary coil L2 on the secondary side of the transformer circuit 103 is coupled between the first terminal 1091 of the first forward conducting element D1 and the second terminal 1099 of the third forward conducting element D3. The first terminal 1092 of the second forward conducting element D2 is coupled to the second terminal 10910 of the fourth forward conducting element D4. The second terminal 1032 of the secondary coil L2 on the secondary side of the transformer circuit 103 is coupled between the first terminal 1092 of the second forward conducting element D2 and the second terminal 10910 of the fourth forward conducting element D4. The second terminals 1097 of the first forward conducting element D1 and 1098 of the second forward conducting element D2 are connected to the capacitor C. out The first terminals 1095 are coupled to each other. The first terminal 1093 of the third forward conducting element D3 and the first terminal 1094 of the fourth forward conducting element D4 are coupled to capacitor C. out The second terminals 1096 are coupled to each other. Capacitor C out The voltage across the rectifier filter circuit 104 is used as the DC output voltage. The DC output voltage V of the resonant converter 100 is... o This is the DC output voltage of the rectifier filter circuit 104.
[0140] The controller 105 includes a processor 107, an analog-to-digital converter 106, and a digital-to-analog converter 108.
[0141] The analog-to-digital converter circuit 106 of the controller 105 receives the load status from the load detection circuit 109, digitizes the load status, and transmits it to the processor 107. The analog-to-digital converter circuit 106 also receives the DC output voltage from the rectifier and filter circuit 104, digitizes the DC output voltage from the rectifier and filter circuit 104, and transmits it to the processor 107.
[0142] The processor 107 receives voltage commands from an external source and obtains an indication voltage from the received voltage commands. The indication voltage is used to indicate the value of the DC output voltage of the resonant converter 100.
[0143] It should be noted that in the above embodiment, the controller 105 is implemented digitally; however, the controller 105 can also be implemented analogically. In this case, the controller 105 receives the DC output voltage, load current, and load status of the rectifier-filter circuit 104 detected by the load detection circuit 109, and outputs control signals for the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 after analog calculation.
[0144] Figure 2-2 This is a circuit diagram of a resonant converter device drawn according to another embodiment of the present invention. Compared to Figure 2-1 The resonant converter shown in the figure, Figure 2-2 The rectifier-filter circuit 104 in the illustrated resonant converter 100 includes a fifth switch Q5, a sixth switch Q6, a seventh switch Q7, an eighth switch Q8, and a capacitor C. out The fifth switch Q5, the sixth switch Q6, the seventh switch Q7, and the eighth switch Q8 are all n-type MOS field-effect transistors. The second terminal 2091 of the fifth switch Q5 is coupled to the first terminal 2099 of the seventh switch Q7. The first terminal 1031 of the secondary coil L2 on the secondary side of the transformer circuit 103 is coupled between the second terminal 2091 of the fifth switch Q5 and the first terminal 2099 of the seventh switch Q7. The second terminal 2092 of the sixth switch Q6 is coupled to the first terminal 20910 of the eighth switch Q8. The second terminal 1032 of the secondary coil L2 on the secondary side of the transformer circuit 103 is coupled between the second terminal 2092 of the sixth switch Q6 and the first terminal 20910 of the eighth switch Q8. The first terminals 2097 of the fifth switch Q5 and 2098 of the sixth switch Q6 are connected to capacitor C. out The first terminals 1095 are coupled to each other. The second terminal 2093 of the seventh switch Q7 and the second terminal 2094 of the eighth switch Q8 are coupled to capacitor C. out The second terminals 1096 are coupled to each other. Capacitor C out The voltage across the rectifier filter circuit 104 is used as the DC output voltage. The DC output voltage V of the resonant converter 100 is... o This is the DC output voltage of the rectifier and filter circuit 104. The controller 105 sends appropriate control signals to the fifth switch Q5, the sixth switch Q6, the seventh switch Q7, and the eighth switch Q8 to rectify and induce the voltage.
[0145] In some embodiments of the present invention, the controller 105 sends appropriate control signals to the fifth switch Q5, the sixth switch Q6, the seventh switch Q7, and the eighth switch Q8, so that the functions of the fifth switch Q5, the sixth switch Q6, the seventh switch Q7, and the eighth switch Q8 are the same as those of the present invention. Figure 2-1 The first forward conducting element D1, the second forward conducting element D2, the third forward conducting element D3, and the fourth forward conducting element D4 are the same.
[0146] Figure 3-1 This is a circuit diagram of a resonant converter device drawn according to another embodiment of the present invention. Compared to Figure 2-1 The resonant converter shown in the figure, Figure 3-1The primary side of the transformer circuit 103 in the illustrated resonant transformer device 100 includes a primary coil L1. The secondary side of the transformer circuit 103 includes a secondary coil L3. The secondary coil L3 includes a first terminal 1033, a second terminal 1034, and a center tap contact 1035. The rectifier-filter circuit 104 is coupled to the secondary side of the transformer circuit 103 via the first terminal 1033, the second terminal 1034, and the center tap contact 1035 of the secondary coil L3. The rectifier-filter circuit 104 includes a first forward conducting element D5, a second forward conducting element D6, and a capacitor C. out The second terminal 10913 of the first forward conducting element D5 is coupled to the first terminal 1033 of the secondary coil L3, and the second terminal 10914 of the second forward conducting element D6 is coupled to the second terminal 1034 of the secondary coil L3. The first terminal 10912 of the second forward conducting element D6 is coupled to capacitor C. out The second terminal 10916, the first terminal 10911 of the first forward conducting element D5 is coupled to the first terminal 10912 of the second forward conducting element D6 and the capacitor C. out Between the second end and 10916. Capacitor C out The first end, 10915, is coupled to the center tap contact 1035. Capacitor C out The voltage across the rectifier filter circuit 104 is used as the DC output voltage. The DC output voltage V of the resonant converter 100 is... o This is the DC output voltage of the rectifier filter circuit 104.
[0147] Figure 3-2 The diagram below illustrates the circuit structure of a resonant converter according to an embodiment of the present invention. Please refer to... Figure 3-2 Compared to Figure 3-1 The resonant converter shown in the figure, Figure 3-2 The rectifier-filter circuit 104 in the illustrated resonant converter 100 includes a fifth switch Q9 and a sixth switch Q. 10 With capacitor C out The first terminal 20913 of the fifth switch Q9 is coupled to the first terminal 1033 of the secondary coil L3. The sixth switch Q... 10 The first terminal 20914 is coupled to the second terminal 1034 of the secondary coil L3, and the sixth switch Q is connected. 10 The second terminal 20912 is coupled to capacitor C. out The second terminal is 10916. The second terminal of the fifth switch, 20911, is coupled to the sixth switch Q. 10 The second terminal 20912 is connected to capacitor C out Between the second end and 10916. Capacitor C out The first end, 10915, is coupled to the center tap contact 1035. Capacitor C outThe voltage across the rectifier filter circuit 104 is used as the DC output voltage. The DC output voltage V of the resonant converter 100 is... o This is the DC output voltage of the rectifier and filter circuit 104. The controller 105 sends appropriate control signals to the fifth switch Q9 and the sixth switch Q. 10 The rectified induced voltage.
[0148] In some embodiments of the present invention, the controller 105 sends appropriate control signals to the fifth switch Q5 and the sixth switch Q6, causing the fifth switch Q9 and the sixth switch Q6 to... 10 Functions and manifestations Figure 3-1 The first forward conducting element D5 and the second forward conducting element D6 are the same.
[0149] The full-bridge LLC converter circuit 102 has two operating modes. One mode involves the controller 105 simultaneously controlling switches Q1, Q2, Q3, and Q4 to regulate the DC output voltage; this is called the full-bridge operating mode. The other mode involves the controller 105 controlling switch Q2 to be off and switch Q4 to be on. In this mode, switch Q2 is open-circuited, and switch Q4 is short-circuited. The controller 105 only controls switches Q1 and Q3 to regulate the DC output voltage; this is called the half-bridge operating mode.
[0150] Figure 4 The equivalent circuit diagram shown is for the series branch in a full-bridge LLC converter circuit according to an embodiment of the present invention. Please also refer to... Figure 2-1 and Figure 4 , Figure 4 In this context, 's' represents the Laplace operator, and the gain of the resonant slot in the full-bridge LLC converter circuit 102 is...
[0151] ,
[0152] in, For quality factor, For the reflective load resistor, The output impedance is the distance from capacitor Cout to the capacitor. To standardize the switching frequency, The resonant frequency, To switch frequencies, .
[0153] The conversion gain of the full-bridge LLC converter circuit 102, transformer circuit 103, and rectifier-filter circuit 104 can be determined by the following equations.
[0154] Conversion gain = Switching gain * Resonant slot gain * Ratio of turns of primary coil L1 to secondary coil L2 (N2 / N1).
[0155] The switching gain is 1 in full-bridge operation mode and 0.5 in half-bridge operation mode. That is, the switching gain in full-bridge operation mode is twice that in half-bridge operation mode. Figure 5 This is a response graph of the switched-gain resonant slot gain product versus the normalized frequency, illustrated according to an embodiment of the present invention. Figure 5 In this case, m=6, Q=0.53, L r =420μH, L m =2.1mH, C r The following diagram illustrates an example with a primary coil L1 and secondary coil L2 turns ratio of 6.031 nF and a ratio of N1:N2 = 8:1. When the full-bridge LLC converter circuit 102 is in full-bridge operation mode, the switching gain * resonant slot gain is at the resonant frequency. The value is 1. When the full-bridge LLC converter circuit 102 is in half-bridge operation mode, the switching gain * resonant slot gain is at the resonant frequency. The value is 0.5. Switching gain * resonant slot gain at the switching frequency. Greater than the resonant frequency When the time is less than 1, and when the frequency is switched... As the switching frequency increases, the switching gain multiplied by the resonant slot gain decreases. It's worth noting that when the switching frequency... Greater than or equal to the resonant frequency At this time, the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 in the full-bridge LLC converter circuit 102 have zero-voltage switching characteristics. Therefore, in the following embodiments, the full-bridge LLC converter circuit 102 will operate at a switching frequency greater than or equal to the resonant frequency. Within the interval.
[0156] The processor 107 transmits the control signals to the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 of the full-bridge LLC converter circuit 102 to the digital-to-analog converter circuit 108. The digital-to-analog converter circuit 108 converts the received control signals into appropriate drive signals and then transmits them to the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 of the full-bridge LLC converter circuit 102 to drive the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4.
[0157] Figure 6 This is a timing diagram of a switch control signal according to an embodiment of the present invention. Figure 7 This is a timing diagram of a switch control signal according to an embodiment of the present invention. Figure 10 This is a control flowchart illustrated according to an embodiment of the present invention. Figure 11 This is a control flowchart illustrated according to an embodiment of the present invention. Please also refer to... Figure 2-1 , Figure 6 , Figure 7 , Figure 10 and Figure 11 .in Figure 6 The recorded V GSQ1 V represents the voltage between the gate and source of the first switch Q1. GSQ2 V represents the voltage between the gate and source of the second switch Q2. GSQ3 V represents the voltage between the gate and source of the third switch Q3. GSQ4 This represents the voltage between the gate and source of the fourth switch Q4.
[0158] like Figure 10 As illustrated, the aforementioned step 903 further includes steps S1001 and S1002. In step S1001, in response to an indication voltage being less than or equal to a threshold, the processor 107 causes the digital-to-analog converter 108 to transmit the signal as shown in the diagram. Figure 6 The recorded V GSQ2 and V GSQ4 The driving signal controls the voltage between the gate and source of the second switch Q2 and the gate and source of the fourth switch Q4, causing the second switch Q2 to be turned off and the fourth switch Q4 to be turned on. At this time, the full-bridge LLC conversion circuit 102 enters the half-bridge operation mode.
[0159] In step S1002, the controller 105 detects the DC output voltage of the rectifier filter circuit 104. When the DC output voltage exceeds a first preset voltage, the processor 107 causes the digital-to-analog converter circuit 108 to transmit the voltage as specified in step S1002. Figure 6 The recorded V GSQ1 and V GSQ3 The driving signal of the signal waveform before time point T1 controls the voltage between the gate and source of the first switch Q1 and the voltage between the gate and source of the third switch Q3, so that the first switch Q1 and the third switch Q3 are turned off.
[0160] When the controller 105 detects that the DC output voltage is less than the second preset voltage, such as Figure 6 As shown in the graph from time point T1 to time point T2, processor 107 causes digital-to-analog converter 108 to transmit a first signal (such as...). Figure 6 The recorded V GSQ1 The signal waveform from time point T1 to time point T2 drives the first switch, and the second signal (such as...) Figure 6 The recorded V GSQ3 The signal waveform from time point T1 to time point T2 drives the third switch Q3. The first and second signals are periodic pulse signals with a duty cycle of 50% and a frequency equal to the burst mode frequency, and the first and second signals are complementary. The burst mode frequency is... T r The period is the interval between the first signal and the second signal. When the controller 105 detects that the DC output voltage is greater than the first preset voltage at time point T2, the processor 107 causes the digital-to-analog converter 108 to transmit a drive signal to control the voltage between the gate and source of the first switch Q1 and the voltage between the gate and source of the third switch Q3, as shown below. Figure 6 The recorded V GSQ1 and V GSQ3 The signal waveform from time point T2 to time point T3 is used to cut off the first switch Q1 and the third switch Q3.
[0161] The first preset voltage is greater than the indicated voltage, and the second preset voltage is less than the indicated voltage. The controller 105 controls the DC output voltage to be within the range of the first and second preset voltages. The actual values of the first and second preset voltages are set according to the design specifications.
[0162] In step S1003, the controller 105 will continue to execute S1002 until the processor 107 receives a stop signal.
[0163] like Figure 11 As illustrated, step S904 further includes steps S1101 and S1102. In step S1101, the controller 105 detects the DC output voltage of the rectifier filter circuit 104. When the DC output voltage is greater than a first preset voltage, the processor 107 causes the digital-to-analog converter circuit 108 to send a drive signal to control the voltage between the gate and source of the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4. Figure 7 The recorded V GSQ1 V GSQ2 V GSQ3 With V GSQ4 The signal waveform before time point T1 is used to cut off the first switch Q1, the second switch Q2, the third switch Q3 and the fourth switch Q4.
[0164] When the controller 105 detects that the DC output voltage is less than the second preset voltage, such as Figure 7 As shown in the graph from time point T4 to time point T5, processor 107 causes digital-to-analog converter 108 to transmit a first signal (such as...). Figure 7 The recorded V GSQ1 The signal waveform from time point T4 to time point T5 drives the first switch and the fourth switch Q4, as well as the second signal (such as...). Figure 7 The recorded V GSQ2 The signal waveform from time point T4 to time point T5 drives the second switch Q2 and the third switch Q3. The first and second signals are periodic pulse signals with a duty cycle of 50% and a frequency equal to the burst mode frequency, and the first and second signals are complementary. The burst mode frequency is... T r The period is the period between the first signal and the second signal.
[0165] In some embodiments of the present invention, the aforementioned burst mode frequency is selected as the aforementioned resonant frequency. In some embodiments of the present invention, the aforementioned burst mode frequency is the resonant frequency including the resonant converter. In some embodiments of the present invention, the aforementioned burst mode frequency is the resonant frequency including the full-bridge LLC converter circuit 102. .
[0166] In some embodiments of the present invention, the aforementioned threshold is the resonant frequency of the resonant converter 100. The operating point is designed to be half of the highest output voltage. For example, to cover the aforementioned indicated voltages of 5V, 9V, 15V, 20V, 28V, 36V, and 48V, the resonant converter 100 is set at a resonant frequency. The highest output voltage at the operating point is designed to be 50V, while the aforementioned threshold is chosen to be 25V.
[0167] Figure 8 The diagram below illustrates a switching control signal timing diagram according to an embodiment of the present invention. Please also refer to... Figure 2-1 , Figure 6 , Figure 7 and Figure 8 If the first switch Q1 and the third switch Q3 are simultaneously turned on, or the second switch Q2 and the fourth switch Q4 are simultaneously turned on, a large current will be generated, damaging the first switch Q1 and the third switch Q3, or the second switch Q2 and the fourth switch Q4. Therefore... Figure 6 , Figure 7 The first recorded signal (such as) Figure 6 The recorded V GSQ1 The signal waveform from time point T1 to time point T2) and the second signal (such as...) Figure 6 The recorded V GSQ3 The signal waveform from time point T1 to time point T2 will be designed as follows: Figure 8 The V shown GSQ1 With V GSQ3 The waveform. From time point T7 to time point T8 (corresponding to time point T) 13 At time T 14 (Time point T9 to time point T) 10 (corresponding time point T) 15 At time T 16 ), Time point T 10 At time T 11 (corresponding time point T) 16 At time T 17 ) and time point T 12 At time T 13Set the dead time; during the dead time, controller 105 controls V. GSQ1 V GSQ2 V GSQ3 With V GSQ4 Being at a low potential causes the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 to be turned off, so as to prevent the first switch Q1 and the third switch Q3 or the second switch Q2 and the fourth switch Q4 from being turned on at the same time, which would damage the first switch Q1 and the third switch Q3 or the second switch Q2 and the fourth switch Q4.
[0168] In some embodiments of the present invention, the duty cycle of the first signal and the second signal, excluding dead time, is 50%.
[0169] Figure 13 This is a control flowchart illustrated according to an embodiment of the present invention. Please also refer to... Figure 6 and Figure 13 ,like Figure 13 As illustrated, the aforementioned step S1203 further includes steps S1301 to S1305. In step S1301, in response to an indication voltage being less than or equal to a threshold, the processor 107 causes the digital-to-analog converter 108 to transmit the signal as shown in the diagram. Figure 6 The recorded V GSQ2 and V GSQ4 The driving signal controls the voltage between the gate and source of the second switch Q2 and the voltage between the gate and source of the fourth switch Q4, causing the second switch Q2 to be turned off and the fourth switch Q4 to be turned on. At this time, the full-bridge LLC conversion circuit 102 enters the half-bridge operation mode.
[0170] In step S1302, the processor 107 determines whether the indicated voltage of the voltage command is within the first voltage range. If the processor 107 determines that the indicated voltage of the voltage command is not within the first voltage range, then step S1304 is executed. If the processor 107 determines that the indicated voltage of the voltage command is within the first voltage range, then step S1303 is executed. In step S1303, it is further determined whether the load condition is light load. If yes, then step S1304 is executed; otherwise, step S1305 is executed. In step S1304, the processor 107 performs half-bridge burst mode control on the full-bridge LLC converter circuit 102 based on the DC output voltage to adjust the DC output voltage. In step S1305, the processor 107 performs half-bridge frequency conversion control on the full-bridge LLC converter circuit 102 based on the difference between the DC output voltage and the indicated voltage to adjust the DC output voltage.
[0171] Figure 14 This is a control flowchart illustrated according to an embodiment of the present invention. Please also refer to... Figure 6 and Figure 14 .like Figure 14 As illustrated, step S1304 further includes steps S1401 and S1402. In step S1401, the controller 105 detects the DC output voltage of the rectifier filter circuit 104. When the DC output voltage is greater than a first preset voltage, the processor 107 causes the digital-to-analog converter circuit 108 to transmit the voltage as shown in the diagram. Figure 6 The recorded V GSQ1 and V GSQ3 The driving signal of the signal waveform before time point T1 controls the voltage between the gate and source of the first switch Q1 and the voltage between the gate and source of the third switch Q3, so that the first switch Q1 and the third switch Q3 are turned off.
[0172] When the controller 105 detects that the DC output voltage is less than the second preset voltage, such as Figure 6 As shown in the graph from time point T1 to time point T2, processor 107 causes digital-to-analog converter 108 to transmit a first signal (such as...). Figure 6 The recorded V GSQ1 The signal waveform from time point T1 to time point T2 drives the first switch, and the second signal (such as...) Figure 6 The recorded V GSQ3 The signal waveform from time point T1 to time point T2 drives the third switch Q3. The first and second signals are periodic pulse signals with a duty cycle of 50% and a frequency equal to the burst mode frequency, and the first and second signals are complementary. The burst mode frequency is... T r The period is the interval between the first signal and the second signal. When the controller 105 detects that the DC output voltage is greater than the first preset voltage at time point T2, the processor 107 causes the digital-to-analog converter 108 to transmit a drive signal to control the voltage between the gate and source of the first switch Q1 and the voltage between the gate and source of the third switch Q3, as shown below. Figure 6 The recorded V GSQ1 and V GSQ3 The signal waveform from time point T2 to time point T3 is used to cut off the first switch Q1 and the third switch Q3.
[0173] In step S1402, the controller 105 continues to execute step S1401 until the processor 107 receives a stop signal.
[0174] Figure 15 This is a control flowchart illustrated according to an embodiment of the present invention. Figure 15As illustrated, the aforementioned step S1305 further includes steps S1403 to S1407. In this embodiment, the processor 107 causes the digital-to-analog converter circuit 108 to transmit a third signal to drive the first switch Q1 and a fourth signal to drive the third switch Q3. The third and fourth signals are frequency-converting periodic pulse signals with a duty cycle of 50%, and are complementary. In step S1403, the processor 107 determines whether the difference between the DC output voltage and a preset voltage is greater than 0. If the difference is greater than 0, step S1404 is executed. In step S1404, the processor 107 increases the frequency of the third and fourth signals. If the difference is less than 0, step S1405 is executed. In step S1405, the processor 107 decreases the frequency of the third and fourth signals. If the difference is 0, the frequency of the third and fourth signals remains unchanged.
[0175] In step S1406, the processor 107 causes the digital-to-analog converter 108 to send a third signal to drive the first switch Q1 and a fourth signal to drive the third switch Q3. In step S1407, the controller 105 continues to execute the aforementioned steps S1403 to S1406 until the processor 107 receives a stop signal.
[0176] Figure 16 This is a control flowchart illustrated according to an embodiment of the present invention. Please also refer to... Figure 7 and Figure 16 ,like Figure 16 As illustrated, the aforementioned step S1204 further includes steps S1301 to S1305. In step S1501, the processor 107 determines whether the indicated voltage of the voltage command is in the second voltage range. If the processor 107 determines that the indicated voltage of the voltage command is not in the second voltage range, then step S1503 is executed. If the processor 107 determines that the indicated voltage of the voltage command is in the second voltage range, then step S1502 is executed. In step S1305, it is further determined whether the load condition is light load. If yes, then step S1503 is executed; otherwise, step S1504 is executed. In step S1503, the processor 107 performs full-bridge burst mode control on the full-bridge LLC converter circuit 102 based on the DC output voltage to adjust the DC output voltage. In step S1504, based on the difference between the DC output voltage and the indicated voltage, the full-bridge LLC converter circuit 102 performs full-bridge frequency conversion control to adjust the DC output voltage.
[0177] Figure 17 This is a control flowchart illustrated according to an embodiment of the present invention. Figure 17As illustrated, step S1503 also includes steps S1601 and S1602. Since step S1601 is the same as the aforementioned step S1101, and step S1602 is the same as the aforementioned step S1102, they will not be described again here.
[0178] Figure 18 This is a control flowchart illustrated according to an embodiment of the present invention. Figure 18 As illustrated, the aforementioned step S1504 further includes steps S1603 to S1607. In this embodiment, the processor 107 causes the digital-to-analog converter circuit 108 to transmit a third signal to drive the first switch Q1 and the fourth switch Q4, and to transmit a fourth signal to drive the second switch Q2 and the third switch Q3. The third and fourth signals are frequency-converting periodic pulse signals with a duty cycle of 50%, and are complementary. In step S1603, the processor 107 determines whether the difference between the DC output voltage and the preset voltage is greater than 0. If the difference is greater than 0, step S1604 is executed. In step S1404, the processor 107 increases the frequency of the third signal and the frequency of the fourth signal. If the difference is less than 0, step S1605 is executed. In step S1605, the processor 107 decreases the frequency of the third signal and the frequency of the fourth signal. If the difference is 0, the frequency of the third signal and the frequency of the fourth signal are not changed.
[0179] In step S1606, the processor 107 causes the digital-to-analog converter 108 to transmit a third signal to drive the first switch Q1 and the fourth switch Q4, and to transmit a fourth signal to drive the second switch Q2 and the third switch Q3. In step S1607, the controller 105 continues to execute the aforementioned steps S1603 to S1606 until the processor 107 receives a stop signal.
[0180] In some embodiments of the present invention, the aforementioned burst mode frequency is selected as the aforementioned resonant frequency. In some embodiments of the present invention, the aforementioned burst mode frequency is the resonant frequency including the resonant converter. In some embodiments of the present invention, the aforementioned burst mode frequency is the resonant frequency including the full-bridge LLC converter circuit 102. .
[0181] In some embodiments of the present invention, the aforementioned second voltage range includes the resonant frequency of the resonant converter 100. The first voltage range is a range containing the aforementioned threshold, representing the highest output voltage at the operating point. At the resonant frequency of the aforementioned resonant converter 100... The highest output voltage at the operating point is designed to be 50V. In the aforementioned embodiment where the threshold is selected as 25V, the second voltage range is 48 to 50 volts, and the first voltage range is 24 to 25 volts.
[0182] Figure 19 This is a block diagram illustrating a Universal Serial Bus (USB) circuit and external device according to an embodiment of the present invention. Please refer to... Figure 19 The Universal Serial Bus (USB) circuit 1900 includes a resonant converter 1901. The resonant converter 1901 can be the resonant converter 100 described in any of the preceding embodiments. The USB circuit 1900 is connected to an external device 1902. The USB circuit 1900 issues a voltage command to the resonant converter 1901 according to the needs of the external device 1902, causing the resonant converter 1901 to provide a fixed voltage to the external device 1902.
[0183] Figure 20 This is a comparison chart of the efficiency of the resonant converter under light load. Figure 21 This is a comparison chart of the efficiency of the resonant converter under heavy load. Please also refer to... Figure 20 and Figure 21 , Figure 20 and Figure 21 Based on Figure 2-1 The described resonant converter 100, with m=6, Q=0.53, L r =420μH, L m =2.1mH, C r Taking a primary coil L1 and secondary coil L2 with a winding ratio of 6.031 nF and a winding ratio of N1:N2=8:1 as an example, the efficiency comparison charts of different control methods are shown at 10% load and 100% load. Figure 20 As shown, at 10% load, below 25V, the efficiency of half-bridge cluster mode control is better than that of full-bridge cluster mode control. Between 25V and 48V, the efficiency of full-bridge cluster mode control is better than that of traditional full-bridge phase-shift mode control. Figure 21 As shown, at 100% load, the efficiency of half-bridge cluster mode control is better than that of full-bridge cluster mode control below 25V. Between 25V and 48V, the efficiency of full-bridge cluster mode control is better than that of traditional full-bridge phase-shift mode control. Figure 20 and Figure 21 The results shown can verify the above. Figure 9 The control method of the resonant converter shown has good efficiency.
[0184] Figure 22 This is a comparison of the efficiency of half-bridge burst mode control and half-bridge frequency conversion control in a resonant converter. Figure 23This is a comparison chart of the efficiency of full-bridge burst mode control and full-bridge frequency converter control in a resonant converter. Please also refer to... Figure 22 and Figure 23 , Figure 22 and Figure 23 Based on Figure 2-1 The described resonant converter 100, with m=6, Q=0.53, L r =420μH, L m =2.1mH, C r Taking a primary coil L1 and secondary coil L2 with a turns ratio of 6.031nF and a winding ratio of N1:N2=8:1 as an example, the efficiency comparison graphs of different control methods are shown for DC output voltages of 25V and 48V respectively. Figure 22 As shown, when the DC output voltage is 25V, the efficiency of half-bridge burst mode control is better than that of half-bridge frequency converter control when the load is below 40%, while the efficiency of half-bridge frequency converter control is better than that of half-bridge burst mode control when the load is above 40%. Figure 23 As shown, when the DC output voltage is 48V, the efficiency of using full-bridge burst mode control is better than that of using full-bridge frequency converter control when the load is below 30%, while the efficiency of using full-bridge frequency converter control is better than that of using full-bridge burst mode control when the load is above 30%. Figure 22 and Figure 23 The results shown can verify the above. Figure 12 The control method of the resonant converter shown has good efficiency.
[0185] Based on the above, some embodiments of the present invention avoid efficiency reduction through a single-stage design. Some embodiments of the present invention achieve wide output voltage and improved efficiency by switching the operating mode and control method of the full-bridge LLC converter circuit based on the indicated voltage. Some embodiments of the present invention further improve efficiency by using frequency conversion control within a specific voltage and load range.
Claims
1. A resonant converter, characterized in that, Include: An input filter circuit receives a DC input voltage, filters the DC input voltage, and outputs a filtered DC voltage. The full-bridge LLC converter circuit includes: a first switch, the first terminal of which is coupled to the first terminal of the input filter circuit; a second switch, the first terminal of which is coupled to the first terminal of the first switch; a third switch, the first terminal of which is coupled to the second terminal of the first switch and the second terminal of the input filter circuit; and a fourth switch, the first terminal of which is coupled to the second terminal of the second switch and the second terminal of the third switch. And a series branch, including a resonant capacitor, a first resonant inductor and a second resonant inductor connected in series; wherein, the first end of the series branch is coupled between the second end of the first switch and the first end of the third switch, the second end of the series branch is coupled between the second end of the second switch and the first end of the fourth switch, and the second resonant inductor is connected in parallel to the primary side. This full-bridge LLC converter circuit receives the filtered DC voltage and outputs the converted voltage. A transformer circuit includes a primary side and a secondary side, the primary side being coupled to the full-bridge LLC converter circuit to receive the converted voltage, and the secondary side sensing the converted voltage to generate an induced voltage; A rectifier and filter circuit, coupled to the secondary side, receives, rectifies, and filters the induced voltage to output a DC output voltage; and A controller, coupled to the full-bridge LLC converter circuit and the rectifier-filter circuit, is used to detect the DC output voltage and receive voltage commands from an external source; wherein, the controller is used to determine whether the indicated voltage of the voltage command is less than or equal to a threshold and perform the following steps: In response to the indicated voltage being less than or equal to the threshold, the full-bridge LLC converter circuit is controlled to enter a half-bridge operation mode, and half-bridge burst mode control is applied to the full-bridge LLC converter circuit based on the DC output voltage to adjust the DC output voltage; and In response to the indicated voltage being greater than the threshold, the controller performs full-bridge burst mode control on the full-bridge LLC converter circuit based on the DC output voltage to adjust the DC output voltage; wherein the step of the controller performing half-bridge burst mode control on the full-bridge LLC converter circuit based on the DC output voltage to adjust the DC output voltage includes: in response to the DC output voltage being greater than a first preset voltage, turning off the first switch and the third switch; and in response to the DC output voltage being less than a second preset voltage, driving the first switch with a first signal and driving the third switch with a second signal, wherein the duty cycle of the first signal and the second signal, excluding dead time, is 50%, and the frequency is burst mode. The steps of adjusting the DC output voltage by performing full-bridge burst mode control on the full-bridge LLC converter circuit based on the DC output voltage include: in response to the DC output voltage being greater than a first preset voltage, turning off the first switch, the second switch, the third switch, and the fourth switch; and in response to the DC output voltage being less than a second preset voltage, driving the first switch and the fourth switch with the first signal, and driving the second switch and the third switch with the second signal, wherein the duty cycle of the first signal and the second signal, excluding dead time, is 50%, the frequency is the burst mode frequency, and the first signal and the second signal are complementary.
2. The resonant converter as described in claim 1, characterized in that, In response to the indicated voltage being less than or equal to the threshold, the controller controls the second switch to turn off and the fourth switch to turn on, so that the full-bridge LLC conversion circuit enters the half-bridge operation mode.
3. The resonant converter as described in claim 2, characterized in that, The burst mode frequency includes the resonant frequency of the resonant converter.
4. The resonant converter as described in claim 1, characterized in that, This threshold is half of the designed maximum output voltage of the resonant converter at the resonant frequency operating point.
5. The resonant converter as described in claim 1, characterized in that, The secondary side includes a secondary coil, which has a first end and a second end. The rectifier-filter circuit is coupled to the secondary side via the first end and the second end of the secondary coil.
6. The resonant converter as described in claim 5, characterized in that, The rectifier and filter circuit includes a first forward conducting element, a second forward conducting element, a third forward conducting element, a fourth forward conducting element, and a capacitor. The first end of the first forward conducting element is coupled to the second end of the third forward conducting element. The first end of the secondary coil on the secondary side is coupled between the first end of the first forward conducting element and the second end of the third forward conducting element. The first end of the second forward conducting element is coupled to the second end of the fourth forward conducting element. The second end of the secondary coil on the secondary side is coupled between the first end of the second forward conducting element and the second end of the fourth forward conducting element. The second end of the first forward conducting element and the second end of the second forward conducting element are coupled to each other, as are the first ends of the third forward conducting element and the first ends of the fourth forward conducting element and the second end of the capacitor. The voltage across the capacitor serves as the DC output voltage.
7. The resonant converter as described in claim 5, characterized in that, The rectifier and filter circuit includes a fifth switch, a sixth switch, a seventh switch, an eighth switch, and a capacitor. The second terminal of the fifth switch is coupled to the first terminal of the seventh switch, and the first terminal of the secondary coil on the secondary side is coupled between the second terminal of the fifth switch and the first terminal of the seventh switch. The second terminal of the sixth switch is coupled to the first terminal of the eighth switch, and the second terminal of the secondary coil on the secondary side is coupled between the second terminal of the sixth switch and the first terminal of the eighth switch. The first terminals of the fifth switch and the sixth switch are coupled to the first terminal of the capacitor, and the second terminals of the seventh switch and the eighth switch are coupled to the second terminal of the capacitor. The voltage across the capacitor serves as the DC output voltage.
8. The resonant converter as described in claim 1, characterized in that, The secondary side includes a secondary coil, which has a first end, a second end, and a center tap contact. The rectifier-filter circuit is coupled to the secondary side via the first end, the second end, and the center tap contact of the secondary coil.
9. The resonant converter as described in claim 8, characterized in that, The rectifier and filter circuit includes a first forward conducting element, a second forward conducting element, and a capacitor. The second end of the first forward conducting element is coupled to the first end of the secondary coil. The second end of the second forward conducting element is coupled to the second end of the secondary coil. The first end of the second forward conducting element is coupled to the second end of the capacitor. The first end of the first forward conducting element is coupled between the first end of the second forward conducting element and the second end of the capacitor. The first end of the capacitor is coupled to the center tap contact. The voltage across the capacitor is used as the DC output voltage.
10. The resonant converter as described in claim 8, characterized in that, The rectifier and filter circuit includes a fifth switch, a sixth switch, and a capacitor. The first end of the fifth switch is coupled to the first end of the secondary coil, the first end of the sixth switch is coupled to the second end of the secondary coil, the second end of the sixth switch is coupled to the second end of the capacitor, the second end of the fifth switch is coupled between the second end of the sixth switch and the second end of the capacitor, and the first end of the capacitor is coupled to the center tap contact. The voltage across the capacitor is used as the DC output voltage.
11. A resonant converter, characterized in that, Include: The input filter circuit receives the DC input voltage, filters the DC input voltage, and outputs a filtered DC voltage. A full-bridge LLC converter circuit receives the filtered DC voltage and outputs a converted voltage; wherein the full-bridge LLC converter circuit includes: a first switch, the first terminal of which is coupled to the first terminal of the input filter circuit; a second switch, the first terminal of which is coupled to the first terminal of the first switch; a third switch, the first terminal of which is coupled to the second terminal of the first switch and the second terminal of the input filter circuit; and a fourth switch, the first terminal of which is coupled to the second terminal of the second switch and the second terminal of the third switch. And a series branch, including a resonant capacitor, a first resonant inductor and a second resonant inductor connected in series; wherein, the first end of the series branch is coupled between the second end of the first switch and the first end of the third switch, the second end of the series branch is coupled between the second end of the second switch and the first end of the fourth switch, and the second resonant inductor is connected in parallel to the primary side. A transformer circuit includes a primary side and a secondary side, the primary side being coupled to the full-bridge LLC converter circuit to receive the converted voltage, and the secondary side sensing the converted voltage to generate an induced voltage; A rectifier and filter circuit, coupled to the secondary side, receives, rectifies, and filters the induced voltage to output a DC output voltage; The load detection circuit detects the load condition of the resonant converter; and A controller, coupled to the full-bridge LLC converter circuit, the load detection circuit, and the rectifier filter circuit, is used to detect the DC output voltage, receive the load condition, and receive voltage commands from an external source. The controller determines whether the indicated voltage of the voltage command is less than or equal to a threshold and performs the following steps: In response to the indicated voltage being less than or equal to the threshold, the full-bridge LLC converter circuit is controlled to enter half-bridge operation mode, and half-bridge generator-to-frequency converter switching mode control is applied to the full-bridge LLC converter circuit based on the DC output voltage to adjust the DC output voltage; and In response to the indicated voltage being greater than the threshold, the controller performs full-bridge burst-converter switching mode control on the full-bridge LLC converter circuit based on the DC output voltage to adjust the DC output voltage; the step of the controller performing half-bridge burst-converter switching mode control on the full-bridge LLC converter circuit based on the DC output voltage to adjust the DC output voltage includes: in response to the indicated voltage of the voltage command in a first voltage range, determining whether the load condition is light load, and performing the following steps: (a) in response to the load condition being light load, performing half-bridge burst-converter mode control on the full-bridge LLC converter circuit based on the DC output voltage to adjust the DC output voltage; and (b) in response to the load condition not being light load, adjusting the DC output voltage based on the DC output voltage and the indicated voltage. The difference between the DC output voltage and the DC output voltage of the full-bridge LLC converter circuit is used to perform half-bridge frequency conversion control to adjust the DC output voltage; and in response to the voltage command indicating that the voltage is not in the first voltage range, the full-bridge LLC converter circuit is used to perform half-bridge burst mode control to adjust the DC output voltage based on the DC output voltage; the step of the controller performing full-bridge burst-frequency conversion switching mode control to adjust the DC output voltage of the full-bridge LLC converter circuit based on the DC output voltage includes: in response to the voltage command indicating that the voltage is in the second voltage range, determining whether the load condition is light load, and performing: (d) in response to the load condition being light load, performing full-bridge burst mode control to adjust the DC output voltage of the full-bridge LLC converter circuit based on the DC output voltage. The controller performs full-bridge frequency conversion control on the full-bridge LLC converter circuit to adjust the DC output voltage based on the difference between the DC output voltage and the indicated voltage, in response to the load condition not being light-load; and performs full-bridge burst mode control on the full-bridge LLC converter circuit to adjust the DC output voltage based on the DC output voltage, in response to the indicated voltage of the voltage command not being in the second voltage range; the step of the controller performing half-bridge burst mode control on the full-bridge LLC converter circuit to adjust the DC output voltage based on the DC output voltage includes: turning off the first switch and the third switch in response to the DC output voltage being greater than a first preset voltage; and turning off the first signal in response to the DC output voltage being less than a second preset voltage. The first switch is driven by a signal, and the third switch is driven by a second signal, wherein the duty cycle of the first signal and the second signal, excluding dead time, is 50%, the frequency is the burst mode frequency, and the first signal and the second signal are complementary; the step of the controller performing half-bridge frequency conversion control on the full-bridge LLC converter circuit to adjust the DC output voltage based on the difference between the DC output voltage and the indicated voltage includes: when the difference is less than zero, the controller reduces the frequency of the third signal and the frequency of the fourth signal; when the difference is greater than zero, the controller increases the frequency of the third signal and the frequency of the fourth signal; and the first switch is driven by the third signal, and the third switch is driven by the fourth signal, wherein the third signal and the fourth signal are complementary.
12. The resonant converter as described in claim 11, characterized in that, The first voltage range is 24 to 25 volts.
13. The resonant converter as described in claim 11, characterized in that, The second voltage range is 48 to 50 volts.
14. The resonant converter as described in claim 11, characterized in that, In response to the indicated voltage being less than or equal to the threshold, the controller controls the second switch to turn off and the fourth switch to turn on, so that the full-bridge LLC conversion circuit enters the half-bridge operation mode.
15. The resonant converter as described in claim 14, characterized in that, The burst mode frequency includes the resonant frequency of the resonant converter.
16. The resonant converter as described in claim 11, characterized in that, The steps of adjusting the DC output voltage by performing full-bridge burst mode control on the full-bridge LLC converter circuit based on the DC output voltage include: In response to the DC output voltage being greater than a first preset voltage, the first switch, the second switch, the third switch, and the fourth switch are turned off; and In response to the DC output voltage being less than the second preset voltage, the first switch and the fourth switch are driven by the first signal, and the second switch and the third switch are driven by the second signal. The duty cycle of the first signal and the second signal, excluding the dead time, is 50%, the frequency is the burst mode frequency, and the first signal and the second signal are complementary.
17. The resonant converter as described in claim 16, characterized in that, The burst mode frequency includes the resonant frequency of the resonant converter.
18. The resonant converter as described in claim 11, characterized in that, The steps for adjusting the DC output voltage by performing full-bridge frequency conversion control on the full-bridge LLC converter circuit based on the DC output voltage include: When the difference is less than zero, the controller decreases the frequency of the third signal and the frequency of the fourth signal; when the difference is greater than zero, the controller increases the frequency of the third signal and the frequency of the fourth signal. The third signal drives the first switch and the fourth switch, and the fourth signal drives the second switch and the third switch, wherein the third signal and the fourth signal are complementary.
19. The resonant converter as described in claim 11, characterized in that, This threshold is half of the designed maximum output voltage of the resonant converter at the resonant frequency operating point.
20. The resonant converter as described in claim 11, characterized in that, The secondary side includes a secondary coil, which has a first end and a second end. The rectifier-filter circuit is coupled to the secondary side via the first end and the second end of the secondary coil.
21. The resonant converter as described in claim 20, characterized in that, The rectifier and filter circuit includes a first forward conducting element, a second forward conducting element, a third forward conducting element, a fourth forward conducting element, and a capacitor. The first end of the first forward conducting element is coupled to the second end of the third forward conducting element. The first end of the secondary coil on the secondary side is coupled between the first end of the first forward conducting element and the second end of the third forward conducting element. The first end of the second forward conducting element is coupled to the second end of the fourth forward conducting element. The second end of the secondary coil on the secondary side is coupled between the first end of the second forward conducting element and the second end of the fourth forward conducting element. The second end of the first forward conducting element and the second end of the second forward conducting element are coupled to each other, as are the first ends of the third forward conducting element and the first ends of the fourth forward conducting element and the second end of the capacitor. The voltage across the capacitor serves as the DC output voltage.
22. The resonant converter as described in claim 20, characterized in that, The rectifier and filter circuit includes a fifth switch, a sixth switch, a seventh switch, an eighth switch, and a capacitor. The second terminal of the fifth switch is coupled to the first terminal of the seventh switch, and the first terminal of the secondary coil on the secondary side is coupled between the second terminal of the fifth switch and the first terminal of the seventh switch. The second terminal of the sixth switch is coupled to the first terminal of the eighth switch, and the second terminal of the secondary coil on the secondary side is coupled between the second terminal of the sixth switch and the first terminal of the eighth switch. The first terminals of the fifth switch and the sixth switch are coupled to the first terminal of the capacitor, and the second terminals of the seventh switch and the eighth switch are coupled to the second terminal of the capacitor. The voltage across the capacitor serves as the DC output voltage.
23. The resonant converter as described in claim 11, characterized in that, The secondary side includes a secondary coil, which has a first end, a second end, and a center tap contact. The rectifier-filter circuit is coupled to the secondary side via the first end, the second end, and the center tap contact of the secondary coil.
24. The resonant converter as described in claim 23, characterized in that, The rectifier and filter circuit includes a first forward conducting element, a second forward conducting element, and a capacitor. The second end of the first forward conducting element is coupled to the first end of the secondary coil. The second end of the second forward conducting element is coupled to the second end of the secondary coil. The first end of the second forward conducting element is coupled to the second end of the capacitor. The first end of the first forward conducting element is coupled between the first end of the second forward conducting element and the second end of the capacitor. The first end of the capacitor is coupled to the center tap contact. The voltage across the capacitor is used as the DC output voltage.
25. The resonant converter as described in claim 23, characterized in that, The rectifier and filter circuit includes a fifth switch, a sixth switch, and a capacitor. The first end of the fifth switch is coupled to the first end of the secondary coil, the first end of the sixth switch is coupled to the second end of the secondary coil, the second end of the sixth switch is coupled to the second end of the capacitor, the second end of the fifth switch is coupled between the second end of the sixth switch and the second end of the capacitor, and the first end of the capacitor is coupled to the center tap contact. The voltage across the capacitor is used as the DC output voltage.
26. A universal sequence bus circuit including the resonant converter as claimed in claim 1, the universal sequence bus circuit issuing the voltage command to the resonant converter based on a request from an external device.
27. A universal sequence bus circuit including the resonant converter as claimed in claim 11, the universal sequence bus circuit issuing the voltage command to the resonant converter based on a request from an external device.
Citation Information
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