Clock synchronization methods, open radio units and radio access network architecture

Abstract

This invention discloses a clock synchronization method, an open radio unit, and a radio access network structure. The invention parses received network data and determines a coarse alignment method for clock synchronization based on the parsed data packet type. Specifically, when the parsed data packets only include PTP packets, coarse clock alignment is performed using their corresponding clock compensation parameters. When the parsed data packets include both PTP and SyncE packets, coarse alignment is performed using the synchronization frequency difference corresponding to the SyncE packets. Then, the output clock is frequency-modulated or phase-modulated according to the clock compensation parameters corresponding to the received network data after coarse clock alignment, thereby achieving clock synchronization. Therefore, this invention can achieve time transfer and clock synchronization through PTP or PTP+SyncE, simplifying the time synchronization configuration of O-RU and O-RAN and improving their applicability.

Description

Technical Field

[0001] This invention relates to the field of communications, and more particularly to a clock synchronization method, an open wireless unit, and a radio access network structure. Background Technology

[0002] In current communication networks, wireless access networks (RANs) established by telecom operators for public services, such as 2G / 3G / 4G / 5G, are common public RANs. However, traditional RANs are mostly closed, meaning the hardware and application software are proprietary to each vendor. Equipment from different vendors cannot be directly interchanged. This forces network operators (such as China Mobile and China Telecom) to choose only one vendor's hardware and application software when planning network base stations. To address this issue, China Mobile and other domestic and international network operators have proposed Open Radio Access Network (O-RAN). This involves separating existing RAN functions from proprietary hardware and embedded operating system platforms, migrating them to general-purpose hardware, operating systems, and cloud platforms, and attempting to open software interfaces and even open-source the software.

[0003] The O-RU (Open Radio Unit) is a key component in the entire O-RAN network architecture, directly facing users and carrying out the transmission and reception of user data traffic. As a communication network, time synchronization is required between all node units to ensure low latency in data exchange with users. Time synchronization is also necessary between O-RUs and O-DUs (Open Distributed Units). Therefore, achieving time synchronization is crucial in O-RAN. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a clock synchronization method, an open radio unit, and a radio access network structure to achieve clock synchronization, simplify the time synchronization configuration of O-RU and O-RAN, and improve the applicability of O-RU and O-RAN.

[0005] In a first aspect, embodiments of this application provide a clock synchronization method, the method comprising:

[0006] Receive network data information;

[0007] In response to the inclusion of a high-precision time synchronization protocol data packet in the network data information, a first compensation clock is determined according to the high-precision time synchronization protocol;

[0008] Perform coarse time alignment based on the first compensation clock until the second compensation clock does not exceed the threshold clock.

[0009] In response to the network data information including high-precision time synchronization protocol data packets and synchronous Ethernet data packets, a second compensation clock and a first synchronization frequency difference are determined based on the network data information.

[0010] Time coarse alignment is performed based on the first synchronization frequency difference until the second compensation clock does not exceed the threshold clock.

[0011] The third compensation clock is determined based on the network data information received after coarse time alignment.

[0012] The output clock is adjusted according to the third compensation clock to achieve clock synchronization.

[0013] Furthermore, the adjustment based on the third compensation clock to determine the output clock includes:

[0014] In response to the third compensation clock exceeding a predetermined time, the output clock is first frequency-modulated and then phase-modulated according to the third compensation clock.

[0015] In response to the third compensation clock not exceeding a predetermined time, the output clock is phase-modulated according to the third compensation clock.

[0016] Furthermore, the method also includes:

[0017] In response to the loss of network data, the output clock is maintained to ensure clock timekeeping.

[0018] Furthermore, the method also includes:

[0019] Calculate the average of the historical synchronization frequency differences corresponding to the first synchronization frequency difference and the network data information received in the previous cycle;

[0020] In response to the loss of network data, the output clock is adjusted according to the average value to maintain clock time.

[0021] Furthermore, the method also includes:

[0022] The response is that network data information, including high-precision time synchronization protocol packets and synchronous Ethernet packets, is lost.

[0023] The phase-locked loop module is adjusted according to the average synchronization frequency difference to achieve clock timekeeping.

[0024] Furthermore, adjusting the output clock according to the third compensation clock includes:

[0025] The output clock is frequency-modulated and / or phase-modulated using a phase-locked loop module.

[0026] Furthermore, the method also includes: restarting clock synchronization in response to the recovery of network data information.

[0027] Secondly, embodiments of the present invention provide an open wireless unit, the open wireless unit comprising:

[0028] Phase-locked loop module;

[0029] The control module is configured to parse the received network data information, obtain the corresponding compensation clock and / or synchronization frequency difference, and control the phase-locked loop module to jointly complete the clock synchronization method as described in the first aspect.

[0030] The photoelectric conversion module is configured to convert the signal input to the open wireless unit from an optical signal into an electrical signal, generate and send the network data information to the control module;

[0031] The clock generation module is configured to provide a reference clock to the phase-locked loop module;

[0032] The signal transceiver module is configured to perform down-conversion demodulation or up-conversion debugging on the received or transmitted signals.

[0033] A power conversion module is configured to supply power to each module in the open wireless unit.

[0034] Furthermore, the control module includes:

[0035] The servo drive unit is configured to control the phase-locked loop unit in the phase-locked loop module to perform clock adjustment, and to receive the second pulse signal fed back by the phase-locked loop unit in the phase-locked loop module to complete clock synchronization;

[0036] The port physical layer unit is configured to receive network data information and send the network data information to the servo drive unit.

[0037] Thirdly, embodiments of the present invention provide an open radio access network architecture, the open radio access network architecture including a clock-synchronized open distribution unit and an open radio unit, the open distribution unit and the open radio unit performing clock synchronization based on any of the clock synchronization methods described in the first aspect.

[0038] By parsing the received network data information and determining the corresponding coarse alignment method for clock synchronization based on the parsed data packet type, the clock coarse alignment is performed when the parsed data packets only include PTP data packets, using their corresponding clock compensation parameters. When the parsed data packets include both PTP and SyncE data packets, coarse alignment is performed using the synchronization frequency difference corresponding to the SyncE data packets. Then, the output clock is frequency-modulated or phase-modulated according to the clock compensation parameters corresponding to the received network data information after coarse alignment, thus achieving clock synchronization. Therefore, this embodiment of the invention can achieve time transfer and clock synchronization through PTP or PTP+SyncE, simplifying the time synchronization configuration of O-RU and O-RAN and improving the applicability of O-RU and O-RAN. Attached Figure Description

[0039] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0040] Figure 1 This is a schematic diagram of a clock-synchronized open wireless unit according to an embodiment of this application;

[0041] Figure 2 This is a flowchart of a clock synchronization method according to an embodiment of this application;

[0042] Figure 3 This is a schematic diagram illustrating the clock synchronization application principle of an embodiment of this application;

[0043] Figure 4 This is a schematic diagram illustrating the application principle of a time synchronization process according to an embodiment of this application;

[0044] Figure 5 This is a schematic diagram of clock synchronization clock message transmission according to an embodiment of this application;

[0045] Figure 6 This is a flowchart of the clock adjustment process in the clock synchronization process according to an embodiment of this application;

[0046] Figure 7 This is a flowchart of clock adjustment in a time synchronization process according to an embodiment of this application;

[0047] Figure 8 This is a flowchart of a clock keeping method according to an embodiment of this application;

[0048] Figure 9 This is a schematic diagram of a clock-synchronized open radio access network structure according to an embodiment of this application. Detailed Implementation

[0049] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0050] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0051] Furthermore, it should be understood that in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by electrical or electromagnetic connections. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to another element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0052] Unless the context explicitly requires it, words such as "including" or "contains" in the instruction manual should be interpreted as including rather than exclusive or exhaustive; that is, meaning "including but not limited to".

[0053] In the description of this invention, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0054] Related technologies typically achieve clock synchronization using PTP (Precision Time Protocol), SyncE (Synchronous Ethernet), or PTP+SyncE, offering high accuracy. Furthermore, both PTP messages and SyncE clocks can be transmitted via network data packets, sharing cabling with network data transmission and reception without requiring additional cabling for time synchronization. However, different sites may support different clock synchronization protocols; for example, some sites may only support PTP, while others may support PTP+SyncE. This makes configuring clock synchronization schemes in O-RAN complex. Therefore, this embodiment provides a clock synchronization method, an open radio unit, and a radio access network structure to achieve clock synchronization, simplifying the time synchronization configuration of O-RU and O-RAN and improving their applicability.

[0055] Figure 1 This is a schematic diagram of a clock-synchronized open wireless unit according to an embodiment of the present invention.

[0056] like Figure 1 As shown, the clock-synchronized open wireless unit of this embodiment includes a photoelectric conversion module 100, a control module 110, a phase-locked loop module 120, a signal transceiver module 130, a clock generation module 140, and a power conversion module 150. The photoelectric conversion module 100 converts the signal input to the open wireless unit from an optical signal into an electrical signal, acquires it, and sends network data information to the control module 110. The control module 110 is configured to parse the received network data information. When the corresponding base station only has clock synchronization functionality (i.e., PTP), it can parse high-precision time synchronization protocol data packets. When the corresponding base station has both clock synchronization functionality (PTP) and Ethernet synchronization functionality (SyncE), it can parse high-precision time synchronization protocol data packets and synchronous Ethernet data packets.

[0057] Furthermore, the high-precision time synchronization protocol data packet includes Dely_Req messages, Sync messages, Follow_Up messages, and Delay_Response messages. The Sync message contains the estimated time when the master clock sends the message. After the Sync message is sent, the master clock sends a Follow_Up message, which contains the precise time when the master clock sent the message. The Dely_Req message is sent by the slave clock and contains the precise time when the message left the slave clock. The Delay_Response message contains the precise time when the master clock received the message.

[0058] Furthermore, when the corresponding base station site only has clock synchronization functionality (i.e., PTP), the control module 110 acquires high-precision time synchronization protocol data packets from the network data. Further, the control module 110 parses the data information in the high-precision time synchronization protocol data packets. By using the precise time values ​​of the transmitted and received messages contained in the Dely_Req, Sync, Follow_Up, and Delay_Response messages, a first compensation clock can be determined. Based on the first compensation clock, coarse clock alignment is performed. For example, for time deviations greater than a second, this is directly processed in the timestamp processing process until the first compensation clock does not exceed a threshold clock. In this embodiment, clock fine-tuning is performed after coarse clock alignment to achieve clock synchronization.

[0059] Further, the clock fine-tuning can specifically involve: determining a third compensation clock based on the network data information received after coarse time alignment, and sending the third compensation clock as a control signal to the phase-locked loop module 120. Simultaneously, the control module 110 sends a PTP data packet to the phase-locked loop module 120, the PTP data packet containing a reference value T1 required for the fine-tuning. The reference value T1 is used to compare with the third compensation clock to determine the accuracy of clock synchronization after coarse alignment. Based on the comparison result, the phase-locked loop module 120 internally adjusts the output clock according to the third compensation clock output by the control module 110 to achieve clock synchronization.

[0060] When the corresponding base station site has clock synchronization (PTP) and Ethernet synchronization (SyncE) functions, the control module 110 parses the acquired network data information to obtain high-precision time synchronization protocol data packets and synchronization Ethernet data packets. The control module 110 sends the reference clock contained in the synchronization Ethernet data packet to the phase-locked loop module 120. The phase-locked loop module 120 determines the synchronization frequency difference information based on the reference clock provided by the clock generation module 140 and the reference clock obtained by the control module 110 from parsing the synchronization Ethernet data packet.

[0061] Furthermore, the control module 110 parses the data information in the high-precision time synchronization protocol data packet. The second compensation clock can be determined by the precise time values ​​of the transmitted and received messages contained in the Dely_Req, Sync, Follow_Up, and Delay_Response messages. The phase-locked loop module 120 performs coarse time alignment based on the first synchronization frequency difference until the second compensation clock does not exceed the threshold clock. In this embodiment, clock fine-tuning is performed after coarse clock alignment to achieve clock synchronization.

[0062] Furthermore, the clock fine-tuning can specifically involve: determining a third compensation clock based on the network data information received after coarse time alignment, and sending the third compensation clock to the phase-locked loop module 120. The phase-locked loop module 120 internally adjusts the output clock according to the third compensation clock output by the control module 110 to achieve clock synchronization.

[0063] Furthermore, the signal transceiver module 130 in the clock-synchronized open wireless unit is configured to perform down-conversion demodulation or up-conversion debugging on the received or transmitted signals. The power conversion module is configured to supply power to each module in the open wireless unit.

[0064] This invention parses received network data and determines a coarse alignment method for clock synchronization based on the parsed data packet type. Specifically, when the parsed data packets only include PTP packets, coarse clock alignment is performed using their corresponding clock compensation parameters. When the parsed data packets include both PTP and SyncE packets, coarse alignment is performed using the synchronization frequency difference corresponding to the SyncE packets. Then, the output clock is frequency-modulated or phase-modulated according to the clock compensation parameters corresponding to the received network data after coarse clock alignment, thus achieving clock synchronization. Therefore, this invention can achieve time transfer and clock synchronization through PTP or PTP+SyncE, simplifying the time synchronization configuration of O-RU and O-RAN and improving their applicability.

[0065] Figure 2 This is a flowchart of a clock synchronization method according to an embodiment of this application. In this embodiment, the clock synchronization method includes the following steps:

[0066] Step S210: Receive network data information.

[0067] Specifically, this embodiment parses the received network data information. When the corresponding base station only has clock synchronization function (i.e., PTP), high-precision time synchronization protocol data packets can be obtained. When the corresponding base station has both clock synchronization function (PTP) and Ethernet synchronization function (SyncE), high-precision time synchronization protocol data packets and synchronous Ethernet data packets can be obtained.

[0068] The high-precision time synchronization protocol data packet includes Dely_Req, Sync, Follow_up, and Delay_Response messages. The Sync message contains the estimated time when the master clock sends the message. After the Sync message is sent, the master clock sends a Follow_up message, which contains the precise time when the master clock sent the message. The Dely_Req message is sent by the slave clock and contains the precise time when the message leaves the slave clock. The Delay_Response message contains the precise time value when the master clock receives the message. The synchronous Ethernet data packet includes a synchronous Ethernet clock (i.e., a reference clock). The synchronous Ethernet data packet includes the corresponding reference clock.

[0069] Step S220: In response to the inclusion of a high-precision time synchronization protocol data packet in the network data information, a first compensation clock is determined according to the high-precision time synchronization protocol.

[0070] Figure 3This is a schematic diagram illustrating the clock synchronization application principle of an embodiment of this application. The clock synchronization application principle is applied when the corresponding base station site only has clock synchronization function (i.e., PTP).

[0071] like Figure 3 As shown, in this embodiment of the invention, the control module 310 includes a port physical layer (PHY) unit 311, a media access control sublayer (MAC) unit 312, a servo unit 313, a 1588 Stack unit 314, a Time Stamp Engine unit 315, and a 1588Timer unit 316. The port physical layer (PHY) unit 311 and the media access control sublayer (MAC) unit 312 are used for data transmission. The 1588 Stack unit 314 and the 1588Timer unit 316 are used for 1588 protocol processing, and the Time Stamp Engine unit 315 is used for timestamp processing (e.g., adding timestamps). The servo unit 313 is used to control the phase-locked loop module.

[0072] Furthermore, the port physical layer unit 311 is configured to receive network data information and send the network data information to the servo drive unit. The servo drive unit 313 is configured to control the phase-locked loop unit in the phase-locked loop module 320 to perform clock adjustment, and to receive the second pulse signal fed back by the phase-locked loop unit in the phase-locked loop module 320 to complete clock synchronization.

[0073] In one alternative implementation, this embodiment may initialize and configure the Holdover mode of the phase-locked loop module 320. The Holdover mode of the phase-locked loop module 320 enables clock stability during clock switching. It should be understood that this embodiment does not limit the Holdover mode of the phase-locked loop module 320; it can be configured according to specific application requirements.

[0074] In this embodiment of the invention, the phase-locked loop module 320 includes a first phase-locked loop unit 321 and at least one synchronous phase-locked loop unit 322. The network data information includes high-precision time synchronization protocol data packets, which contain Dely_Req messages, Sync messages, Follow_Up messages, and Delay_Response messages. The Sync message contains the estimated time when the master clock sends the message. After the Sync message is sent, the master clock sends a Follow_Up message, which contains the precise time when the master clock sends the message. The Dely_Req message is sent by the slave clock and contains the precise time when the message leaves the slave clock. The Delay_Response message contains the precise time value when the master clock receives the message. The 1588Stack unit 314, Time Stamp Engine unit 315, and 1588Timer unit 316 are configured to jointly participate in clock synchronization. The 1588Stack unit 314 and 1588Timer unit 316 are used for 1588 protocol processing, while the Time Stamp Engine unit 315 is used for timestamping (e.g., adding timestamps). The first phase-locked loop unit 321 is configured in voltage-controlled oscillator mode. The first phase-locked loop unit 321 is further configured to receive control signals and information from the high-precision time synchronization protocol data packet sent by the Servo unit 313, and to send the output second pulse signal to the corresponding control module 310 and each synchronous phase-locked loop unit 322.

[0075] Furthermore, Figure 5 This is a schematic diagram illustrating the clock synchronization clock message transmission according to an embodiment of this application. Figure 5 As shown, the Sync message contains the estimated time when the master clock sends the message. After the Sync message is sent, the master clock sends a Follow_up message. The precise time T1 for the message to leave the master clock is contained in both the Sync and Follow_up messages. Simultaneously, the slave clock records the precise time T2 for the Sync message to arrive at the slave clock. The Delay_Req message is sent by the slave clock and contains the precise time T3 for the message to leave the slave clock. Simultaneously, the master clock records the precise time T4 for the Delay_Req message to arrive at the slave clock. The master clock then sends a Delay_Response message containing T4 to the slave clock.

[0076] Furthermore, the first compensation clock (T) is determined based on the precise time contained in each message of the high-precision time synchronization protocol. adj ).

[0077]

[0078] Step S230: Perform coarse time alignment based on the first compensation clock until the first compensation clock does not exceed the threshold clock.

[0079] Specifically, according to the first compensation clock T adj Coarse alignment of the clock is performed to initially eliminate output clock deviation. Compensation clock T adj The precise time is determined by the messages contained in the high-precision time synchronization protocol after coarse clock alignment. The compensation clock T... adj The determination method is the same as the first compensation clock determination method, but the precise time contained in each message in the high-precision time synchronization protocol differs between the two. Optionally, step S230 can be executed multiple times until the compensation clock T is reached. adj The threshold clock value is a preset value. Optionally, a smaller threshold clock value results in more accurate clock synchronization but also increases the number of cycles. Conversely, a larger threshold clock value reduces the number of clock synchronization cycles but decreases accuracy. The threshold clock value can be set according to different requirements to meet various accuracy and clock synchronization cycle requirements.

[0080] In other words, in this embodiment, when the corresponding station only has PTP clock synchronization function, coarse alignment is performed using the compensation clock corresponding to the received network data information.

[0081] Step S240 responds to the network data information including high-precision time synchronization protocol data packets and synchronous Ethernet data packets, and determines the second compensation clock and the first synchronization frequency difference based on the network data information.

[0082] Figure 4 This is a schematic diagram illustrating the application principle of a clock synchronization process according to an embodiment of this application. The application principle of the clock synchronization process is applied when the corresponding base station site has clock synchronization function (PTP) and Ethernet synchronization function (SyncE).

[0083] like Figure 4As shown, in this embodiment of the invention, the control module 410 includes a port physical layer (PHY) unit 411, a media access control sublayer (MAC) unit 412, a servo unit 413, a 1588 Stack unit 414, a TimeStamp Engine unit 415, and a 1588Timer unit 416. In this embodiment, the phase-locked loop (PLL) module 420 includes a first PLL unit 421 and at least one synchronous PLL unit 422. A reference clock is provided by the clock generation module 430. The port physical layer (PHY) unit 411 and the media access control sublayer (MAC) unit 412 are used to implement data transmission. The 1588 Stack unit 414 and the 1588Timer unit 416 are used to implement 1588 protocol processing, and the Time Stamp Engine unit 415 is used for timestamp processing (e.g., adding timestamps). The servo unit 413 is used to control the PLL module.

[0084] Furthermore, the port physical layer unit 411 is configured to receive network data information and send the network data information to the servo drive unit. The servo drive unit 414 is configured to control the phase-locked loop unit in the phase-locked loop module 420 to perform clock adjustment and receive the second pulse signal fed back by the phase-locked loop unit in the phase-locked loop module 420 to complete clock synchronization.

[0085] The PHY unit 411 in the control module 410 receives network data information and sends it to the MAC unit 412. The network data information includes high-precision time synchronization protocol data packets and synchronous Ethernet data packets. The control module 410 parses the synchronous Ethernet data packets to obtain a reference clock and sends it to at least one synchronous phase-locked loop (PLL) unit 422 in the phase-locked loop (PLL) module 420. The PLL unit 422 determines the synchronization frequency difference information based on the reference clock provided by the clock generation module 430 and the reference clock obtained by the control module 410 from parsing the synchronous Ethernet data packets, and sends the synchronization frequency difference information to the first PLL unit 421.

[0086] Step S250 performs coarse time alignment based on the first synchronization frequency difference until the second compensation clock does not exceed the threshold clock.

[0087] Specifically, the clock is coarsely aligned based on the synchronization frequency difference to initially eliminate the output clock deviation. The second compensation clock T adj After coarse clock alignment, the precise time values ​​of the transmitted and received messages contained in the Dely_Req, Sync, Follow_Up, and Delay_Response messages of the high-precision time synchronization protocol are used to determine the clock. Optionally, step S240 can be executed multiple times until the compensated clock T is reached. adjThe threshold clock value is a preset value. Optionally, a smaller threshold clock value results in more accurate clock synchronization but also increases the number of cycles. Conversely, a larger threshold clock value reduces the number of clock synchronization cycles but decreases accuracy. The threshold clock value can be set according to different requirements to meet various accuracy and clock synchronization cycle requirements.

[0088] Step S260 determines the third compensation clock based on the network data information received after coarse time alignment.

[0089] Specifically, when the corresponding base station site only has clock synchronization function (PTP) or the corresponding base station site has clock synchronization function (PTP) and Ethernet synchronization function (SyncE), the third compensation clock is determined by performing the same calculation as the first compensation clock or the second compensation clock based on the message in the high-precision time synchronization protocol data packet contained in the clock that has completed the coarse clock alignment.

[0090] Step S270 adjusts the output clock according to the third compensation clock to achieve clock synchronization.

[0091] Specifically, in response to the third compensation clock exceeding a predetermined time, the output clock is first frequency-modulated and then phase-modulated according to the third compensation clock. In response to the third compensation clock not exceeding a predetermined time, the output clock is phase-modulated according to the third compensation clock.

[0092] In other words, the determined third compensation clock is sent to the Servo unit in the control module, and the Servo unit performs frequency and / or phase modulation on the first phase-locked loop unit in the phase-locked loop module. It is then determined whether the third compensation clock exceeds T1, where T1 is the precise time the Sync message contained in the Follow_Up message leaves the master clock. If the third compensation clock exceeds T1, it indicates insufficient clock synchronization, requiring frequency modulation followed by phase modulation of the output clock to achieve clock synchronization. Conversely, if the third compensation clock does not exceed T1, it indicates relatively accurate clock synchronization, requiring only phase modulation of the output clock to achieve clock synchronization.

[0093] Figure 6 This is a flowchart of the clock adjustment process in the clock synchronization process of this application embodiment.

[0094] When the corresponding base station site only has clock synchronization function (i.e., PTP), the clock adjustment of the clock synchronization process is as follows: Figure 6 As shown.

[0095] Specifically, clock adjustment in the clock synchronization process is divided into coarse adjustment and fine adjustment, and the clock synchronization process is a closed-loop cyclic process. The decision to perform coarse or fine adjustment is made by determining whether the compensation clock exceeds a threshold clock. Coarse adjustment is performed in response to the compensation clock exceeding the threshold clock, and the coarse adjustment includes the following steps:

[0096] Step 610: Receive network data information.

[0097] Step 620: Parse the network data information to obtain high-precision time synchronization protocol data packets.

[0098] The high-precision time synchronization protocol data packets parsed include Dely_Req messages, Sync messages, Follow_Up messages, and Delay_Response messages.

[0099] Step 630: Determine the compensation clock.

[0100] The compensation clock is determined by calculating the precise time values ​​of the transmitted and received messages contained in the Dely_Req, Sync, Follow_Up, and Delay_Response messages. The specific calculation process is similar to that in the above embodiment and will not be repeated here.

[0101] Step 640: Determine whether the compensation clock exceeds the threshold clock.

[0102] If the compensation clock exceeds the threshold clock, step 650 will be performed to perform coarse clock alignment based on the compensation clock.

[0103] If the compensation clock does not exceed the threshold clock, step 660 will be performed to adjust the clock according to the compensation clock.

[0104] Step S650: If the corresponding compensation clock exceeds the threshold clock during the current network data reception period, coarse clock alignment is performed based on the compensation clock. For example, for time deviations exceeding one second, a coarse alignment operation is performed directly during the timestamp processing process.

[0105] After performing the coarse alignment operation, continue to step S610 to receive network data information and determine whether the compensation clock corresponding to the network data information after the coarse alignment of the previous cycle exceeds the threshold clock in the current network data information reception period. If it exceeds the threshold clock, continue to perform coarse alignment until the compensation clock corresponding to the received network data information does not exceed the threshold clock, and then execute step S660.

[0106] Step S660: Adjust the clock according to the compensation clock. It should be understood that the clock adjustment in this embodiment is different from... Figure 3 The adjustment principle of the phase-locked loop module shown is similar, and will not be described in detail here.

[0107] Therefore, in this embodiment, when the corresponding base station site only has clock synchronization function (i.e., PTP), the clock is first coarsely aligned by the size of the compensation clock corresponding to the PTP data packet in the received network data information, and then fine-tuned based on the phase-locked loop module to achieve clock synchronization, which improves the clock synchronization efficiency.

[0108] Figure 7 This is a flowchart of clock adjustment in a clock synchronization process according to an embodiment of this application.

[0109] When the corresponding base station site only has clock synchronization function (PTP) and Ethernet synchronization function (SyncE), the clock adjustment of the clock synchronization process is as follows: Figure 7 As shown.

[0110] Specifically, clock adjustment in the clock synchronization process is divided into coarse adjustment and fine adjustment, and the clock synchronization process is a closed-loop cyclic process. The decision to perform coarse or fine adjustment is made by determining whether the compensation clock exceeds a threshold clock. Coarse adjustment is performed in response to the compensation clock exceeding the threshold clock, and the coarse adjustment includes the following steps:

[0111] Step 710: Receive network data information.

[0112] Step 720: Parse the network data information to obtain high-precision time synchronization protocol data packets and synchronous Ethernet data packets.

[0113] The high-precision time synchronization protocol data packets parsed include Dely_Req messages, Sync messages, Follow_Up messages, and Delay_Response messages, and the parsed synchronous Ethernet data packets include a reference clock.

[0114] Step 730: Determine the compensation clock and synchronization frequency difference.

[0115] The compensation clock is determined by calculating the precise time values ​​of the transmitted and received messages contained in the Dely_Req, Sync, Follow_Up, and Delay_Response messages. The synchronization frequency difference is determined by comparing the reference clock and the base clock. The specific calculation process is similar to that in the above embodiment and will not be repeated here.

[0116] Step 740: Determine whether the compensation clock exceeds the threshold clock.

[0117] If the compensation clock exceeds the threshold clock, step 750 will be performed to perform coarse clock alignment based on the synchronization frequency difference.

[0118] If the compensation clock does not exceed the threshold clock, step 760 will be performed to adjust the clock according to the compensation clock.

[0119] Step S750: In the current network data information reception cycle, if the corresponding compensation clock exceeds the threshold clock, then perform coarse clock alignment based on the synchronization frequency difference.

[0120] After performing the coarse alignment operation, continue to step S710 to receive network data information and determine whether the compensation clock corresponding to the network data information after the coarse alignment of the previous cycle exceeds the threshold clock in the current network data information reception cycle. If it exceeds the threshold clock, perform coarse alignment again according to the synchronization frequency difference of this cycle until the compensation clock corresponding to the received network data information does not exceed the threshold clock, and then execute step S760.

[0121] Step S760: Adjust the clock according to the compensation clock. It should be understood that the clock adjustment in this embodiment is different from... Figure 4 The adjustment principle of the phase-locked loop module shown is similar, and will not be described in detail here.

[0122] Therefore, in this embodiment, when the corresponding base station site has clock synchronization function (PTP) and Ethernet synchronization function (SyncE), the synchronization frequency difference is determined by the reference clock in the synchronous Ethernet data packet in the received network data information and the reference clock provided by the clock generation module, and the synchronization frequency difference is used for coarse clock alignment. Then, fine-tuning is performed based on the phase-locked loop module to achieve clock synchronization, which improves the clock synchronization efficiency.

[0123] The aforementioned clock synchronization method enables the parsing of received network data and the determination of a coarse clock alignment method based on the parsed data packet type. Specifically, when the parsed data packets consist only of PTP packets, coarse clock alignment is performed using their corresponding clock compensation parameters. When the parsed data packets include both PTP and SyncE packets, coarse alignment is performed using the synchronization frequency difference corresponding to the SyncE packets. Finally, the output clock is frequency-modulated or phase-modulated based on the clock compensation parameters corresponding to the received network data after coarse clock alignment, thus achieving clock synchronization. Therefore, this embodiment of the invention can achieve time transfer and clock synchronization via PTP or PTP+SyncE, simplifying the time synchronization configuration of O-RU and O-RAN and improving their applicability.

[0124] Furthermore, network data may be lost during clock synchronization.

[0125] When the corresponding base station site only has clock synchronization function (PTP), in response to the loss of network data information, the output clock is maintained to achieve clock timekeeping. Maintaining the output clock means keeping the frequency of the output clock unchanged in order to realize the time transfer and clock synchronization between O-RU and O-DU.

[0126] Figure 8 This is a flowchart of a clock keeping method according to an embodiment of this application.

[0127] When the corresponding base station site has clock synchronization function (PTP) and Ethernet synchronization function (SyncE), such as Figure 8 As shown, the clockkeeping steps include:

[0128] Step 810: Calculate the average of the historical synchronization frequency differences corresponding to the first synchronization frequency difference and the network data information received in the previous cycle.

[0129] Specifically, when the corresponding base station site has clock synchronization (PTP) and Ethernet synchronization (SyncE) functions, the first synchronization frequency difference between the reference clock and the reference clock can be obtained in each clock coarse alignment cycle and clock fine adjustment cycle during the clock synchronization process. The first synchronization frequency difference and the average of the historical synchronization frequency differences corresponding to the network data information received in the previous cycle are calculated.

[0130] Step 820: In response to the loss of network data information, adjust the output clock according to the average value to achieve clock timekeeping.

[0131] Specifically, the average of the obtained synchronization frequency difference is sent to at least one synchronous phase-locked loop (PLL) unit, and clock timing is performed using the average of the synchronization frequency difference. Clock timing using the average of the synchronization frequency difference can better maintain clock frequency synchronization when network data is lost, preventing special events such as clock frequency jumps that cause clock frequency instability. Using this method, even when the corresponding base station site has clock synchronization (PTP) and Ethernet synchronization (SyncE) functions and network data is lost, it can maintain the output clock while using the average of the synchronization frequency difference for more accurate clock timing, thereby achieving time transfer and clock synchronization between the O-RU and O-DU.

[0132] Figure 9 This is a schematic diagram of a clock-synchronized open radio access network structure according to an embodiment of this application.

[0133] Specifically, as a communication network, all node units within the network need to achieve time synchronization to ensure low latency in data exchange with users. Time synchronization is also required between O-RUs and O-DUs. For example... Figure 9 As shown, the open distributed unit 910 and the open wireless unit 920 can exchange and synchronize time or clock via PTP or PTP+SyncE. The above method for clock synchronization and timekeeping based on a single O-RU can also be applied to O-DUs.

[0134] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can be modified and varied in various ways. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the present invention should be included within the scope of protection of the present invention.

Claims

1. A clock synchronization method, characterized in that, The method includes: Receive network data information; In response to the inclusion of a high-precision time synchronization protocol data packet in the network data information, a first compensation clock is determined according to the high-precision time synchronization protocol; Perform coarse time alignment based on the first compensation clock until the first compensation clock does not exceed the threshold clock. In response to the network data information including high-precision time synchronization protocol data packets and synchronous Ethernet data packets, a second compensation clock and a first synchronization frequency difference are determined based on the network data information. Time coarse alignment is performed based on the first synchronization frequency difference until the second compensation clock does not exceed the threshold clock. The third compensation clock is determined based on the network data information received after coarse time alignment. The output clock is adjusted according to the third compensation clock to achieve clock synchronization.

2. The method according to claim 1, characterized in that, The adjustment based on the third compensation clock to determine the output clock includes: In response to the third compensation clock exceeding a predetermined time, the output clock is first frequency-modulated and then phase-modulated according to the third compensation clock. In response to the third compensation clock not exceeding a predetermined time, the output clock is phase-modulated according to the third compensation clock.

3. The method according to claim 1, characterized in that, The method further includes: In response to the loss of network data, the output clock is maintained to ensure clock timekeeping.

4. The method according to claim 1, characterized in that, The method further includes: Calculate the average of the historical synchronization frequency differences corresponding to the first synchronization frequency difference and the network data information received in the previous cycle; In response to the loss of network data, the output clock is adjusted according to the average value to maintain clock time.

5. The method according to claim 1, characterized in that, The method further includes: The response is that network data information, including high-precision time synchronization protocol packets and synchronous Ethernet packets, is lost. The phase-locked loop module is adjusted based on the average synchronization frequency difference to achieve clock timekeeping.

6. The method according to claim 1, characterized in that, Adjusting the output clock according to the third compensation clock includes: The output clock is frequency-modulated and / or phase-modulated using a phase-locked loop module.

7. The method according to claim 3 or 4, characterized in that, The method further includes: In response to the recovery of network data, clock synchronization will resume.

8. An open wireless unit, characterized in that, The open wireless unit includes: Phase-locked loop module; The control module is configured to parse the received network data information, obtain the corresponding compensation clock and / or synchronization frequency difference, and control the phase-locked loop module to jointly execute the clock synchronization method as described in any one of claims 1-7; The photoelectric conversion module is configured to convert the signal input to the open wireless unit from an optical signal into an electrical signal, acquire the network data information and send it to the control module. The clock generation module is configured to provide a reference clock to the phase-locked loop module; The signal transceiver module is configured to perform down-conversion demodulation or up-conversion debugging on the received or transmitted signals. A power conversion module is configured to supply power to each module in the open wireless unit.

9. The open wireless unit according to claim 8, characterized in that, The control module includes: The servo drive unit is configured to control the phase-locked loop unit in the phase-locked loop module to perform clock adjustment, and to receive the second pulse signal fed back by the phase-locked loop unit in the phase-locked loop module to complete clock synchronization; The port physical layer unit is configured to receive network data information and send the network data information to the servo drive unit.

10. An open radio access network architecture, the open radio access network architecture comprising a clock-synchronized open distributed unit and an open radio unit, characterized in that, The open distributed unit and the open wireless unit perform clock synchronization based on the clock synchronization method as described in any one of claims 1-7.

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