Wiring substrate, electronic device, and electronic module

Abstract

The wiring substrate includes: an insulating substrate having a first surface, a second surface opposite to the first surface, and a through-hole extending from the first surface to the second surface; a through-conductor located in the through-hole and on an opening of the through-hole on the first surface side; and a wiring conductor located on the first surface and connected to the through-conductor. The through-conductor and the wiring conductor contain copper as a main component, and the average size of Cu grains in the through-conductor is larger than the average size of Cu grains in the wiring conductor.

Description

Technical Field

[0001] This disclosure relates to wiring boards, electronic devices, and electronic modules. Background Technology

[0002] Electromigration is a phenomenon in which defects are created in the conductors of a wiring substrate by the movement of conductor atoms accompanying an electric current. International Publication No. 2008 / 084867 discloses a semiconductor device that improves electromigration resistance by using a seed layer, a noble metal pad layer, and a copper wiring film to form the wiring of the wiring substrate. Summary of the Invention

[0003] -Methods used to solve problems-

[0004] The wiring substrate disclosed herein comprises: an insulating substrate having a first surface, a second surface opposite to the first surface, and a through hole extending from the first surface to the second surface; a through conductor located within the through hole and on the opening of the through hole on the first surface side; and a wiring conductor located on the first surface and connected to the through conductor, wherein the through conductor and the wiring conductor contain copper as the main component, and the average size of the Cu grains in the through conductor is larger than the average size of the Cu grains in the wiring conductor.

[0005] The electronic device disclosed herein includes: the wiring substrate described above; and electronic components mounted on the wiring substrate.

[0006] The electronic module disclosed herein includes: the electronic device described above; and a module substrate on which the electronic device is mounted. Attached Figure Description

[0007] Figure 1 This is a perspective view of the wiring substrate involved in the embodiments of this disclosure.

[0008] Figure 2 It means Figure 1 A cross-sectional view of the main part of the wiring substrate.

[0009] Figure 3 This is a diagram illustrating the method for measuring the size of Cu grains.

[0010] Figure 4A This is a cross-sectional view showing the main parts of the wiring substrate.

[0011] Figure 4B This is a top view showing the main parts of the wiring board.

[0012] Figure 5 This is an explanatory diagram illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0013] Figure 6 This is a diagram illustrating the electronic device and electronic module involved in the embodiments of this disclosure. Detailed Implementation

[0014] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Figure 1 This is a perspective view of the wiring substrate involved in the embodiments of this disclosure. Figure 2 It means Figure 1 A cross-sectional view of the main part of the wiring substrate. Figure 2 This indicates the cross-section of the portion where the through conductor 25 of the wiring substrate 1 is located.

[0015] The wiring substrate 1 of this embodiment includes: an insulating substrate 10 having a first surface 11, a second surface 12 opposite to the first surface 11, and a through hole 13 extending from the first surface 11 to the second surface 12; a wiring conductor 21 located on the first surface 11; a through conductor 25 located on the through hole 13 and its opening 13a; and a wiring conductor 23 located on the second surface 12. The through conductor 25 is also located on the opening 13b on the second surface 12 side (opposite to the through hole 13). The through conductor 25 is connected to the wiring conductors 21 and 23.

[0016] The insulating substrate 10 may contain ceramics with aluminum nitride, silicon nitride, silicon carbide, aluminum oxide, zirconium oxide, etc. as the main components.

[0017] like Figure 2 As shown by a dashed line, the through-hole 13 has an opening 13a on the first surface 11 and an opening 13b on the second surface 12. Because the through-hole 13 and openings 13a and 13b are provided with the through conductor 25, the space is not open. The inner diameters of openings 13a and 13b are larger than the inner diameter of the middle portion 13i of the through-hole 13. The middle portion 13i refers to the planar portion within the through-hole 13 parallel to the first surface 11, between openings 13a and 13b. The inner diameter of the through-hole 13 gradually increases from the middle portion 13i to the opening 13a on the first surface 11. Similarly, the inner diameter of the through-hole 13 gradually increases from the middle portion 13i to the opening 13b on the second surface 12. According to this structure, during the manufacturing stage of the wiring substrate 1, the control of the Cu grains t1 filling the through conductor 25 of the through-hole 13 becomes easier.

[0018] In addition, the cross-sectional shape of the through hole 13 (the cross-sectional shape parallel to the first surface 11) does not need to be circular. If it is not circular, the "inner diameter" mentioned above can be replaced with "maximum width".

[0019] The wiring conductor 21 includes: a main conductor portion 211 containing Cu (copper) as the main component; and an intermediate layer 212 located between the main conductor portion 211 and the first surface 11. The through conductor 25 includes: a main conductor portion 251 containing Cu as the main component; and an intermediate layer 252 located between the main conductor portion 251 and the inner peripheral surface of the through hole 13. The wiring conductor 23 includes: a main conductor portion 231 containing Cu as the main component; and an intermediate layer 232 located between the main conductor portion 231 and the second surface 12. The intermediate layers 212, 232, and 252 contain Cu, Ti (titanium), and O (oxygen). The term "main component" as used herein means that the content is 80 mass% or more.

[0020] The main conductor portions 211, 231 of the wiring conductors 21, 23 and the main conductor portion 251 of the through conductor 25 are polycrystalline metals formed by a plurality of aggregated Cu crystal grains t1. In Figure 2 , Figure 3 , Figure 4A and Figure 4B , the Cu crystal grains t1 are schematically depicted. The actual Cu crystal grains t1 have various shapes such as granular and columnar, and their sizes vary.

[0021] The intermediate layers 212, 232 of the wiring conductors 21, 23 and the intermediate layer 252 of the through conductor 25 are polycrystalline metals formed by a plurality of aggregated Cu crystal grains and a plurality of aggregated titanium oxide crystal grains.

[0022] <Size of Cu Crystal Grains>

[0023] Next, the sizes of the Cu crystal grains t1 of the wiring conductors 21, 23, the Cu crystal grains t1 of the through conductor 25, and the Cu crystal grains of the intermediate layers 212, 232, 252 will be described. Hereinafter, when referring only to the Cu crystal grains t1 of the wiring conductors 21, 23 and the Cu crystal grains t1 of the through conductor 25, these refer to the Cu crystal grains t1 in the main conductor portions 211, 231, 251. The size of a Cu crystal grain refers to a size represented by a length unit.

[0024] The wiring conductor 21 and the through conductor 25 are distinguished by different average sizes of the Cu crystal grains t1. The average size of the Cu crystal grains t1 of the through conductor 25 is larger than the average size of the Cu crystal grains t1 of the wiring conductor 21. The difference in the average size of the Cu crystal grains t1 is a difference at a level exceeding an error. The difference at a level exceeding an error may refer to a difference of 1.5 times or more, or 2 times or more of the standard deviation σ of the sizes of the Cu crystal grains t1 measured at any arbitrary portion.

[0025] Electromigration is easily generated around the opening 13a of the through-hole 13, where the current direction changes and the current is concentrated, as charge flows from the wiring conductor 21 to the through conductor 25. However, the average size of the Cu grains t1 in the through conductor 25 is larger than that in the wiring conductor 21. In the through conductor 25, the Cu grains t1 become less mobile, which can improve the electromigration resistance around the opening 13a of the through-hole 13.

[0026] Furthermore, the difference between the average size of the Cu grains t1 in the through conductor 25 and the average size of the Cu grains t1 in the wiring conductor 21 is less than 3 μm. According to this structure, the difference in the size of the Cu grains t1 becomes smaller at the boundary between the wiring conductor 21 and the through conductor 25, thereby improving the resistance to electromigration at this boundary.

[0027] The above description pertains to the first side 11, but the same applies to the second side 12. That is, the average size of the Cu grains t1 in the through conductor 25 can be larger than the average size of the Cu grains t1 in the wiring conductor 23 on the second side 12. The difference in average size can be above the error level, but less than 3 μm. According to this structure, on the second side 12, the resistance to electromigration that easily occurs around the opening 13b when charge flows from the wiring conductor 23 to the through conductor 25 can also be improved.

[0028] Since Cu grains t1 have various shapes such as granular and columnar, the average size of each Cu grain t1 is obtained through the following steps 1 to 3. Figure 3 This is a diagram illustrating the method for measuring the size of Cu grains. In Figure 3 In this model, Cu grain t1 is simplified, and the number of Cu grains t1 within the target region Rt differs from the actual number.

[0029] 1. Extract the boundary (grain boundary) lines of each Cu grain t1 from the SEM (Scanning Electron Microscope) image or SIM (Scanning Ion Microscope) image of the cross section containing the through conductor 25 and the wiring conductor 21.

[0030] 2. From the above image, arbitrarily select a region containing 20 to 100 Cu grains of size t1 as the target region Rt. The target region Rt is selected from multiple locations in the main part of the conductor of the object being measured (if it is a through conductor 25, then it is the main conductor part 251; if it is a wiring conductor 21 or 23, then it is the main conductor part 211 or 231).

[0031] 3. Count the number of Cu grains t1 within each target region Rt, and calculate the average cross-sectional area of ​​one Cu grain t1 by dividing the area of ​​each target region Rt by the number of grains. Furthermore, assuming that the cross-sectional shape of each Cu grain t1 is circular, calculate the diameter of the circle based on the area, and use this diameter as the average size of the Cu grain t1.

[0032] <Example>

[0033] If the average size of Cu grains t1 is measured on the wiring substrate 1 with respect to an embodiment of the present disclosure for the through conductor 25 and the wiring conductor 21, the result of measurement result 1 is obtained.

[0034] [Table 1]

[0035] [Measurement Result 1]

[0036]

[0037] The results show that the average size of Cu grains t1 in the through conductor 25 is larger than the average size of Cu grains t1 in the wiring conductor 21, with a difference of less than 3 μm.

[0038] <Boundary between wiring conductors and through conductors>

[0039] Figure 4A as well as Figure 4B It is a diagram illustrating the boundary between wiring conductors and through conductors. Figure 4A This is a cross-sectional view of the main parts of the wiring substrate. Figure 4B This is a top view of the main part. Figure 4A The cross section is the section that passes through the through hole 13 and is perpendicular to the first surface 11.

[0040] A large number of target regions Rt are set around the opening 13a of the through hole 13. The average size of Cu grains t1 is measured for each target region Rt, and the boundary line of the step-like change in average size is extracted. Figure 4A (shown as a dotted line in the middle), thus, the boundary line can be defined as the boundary E1 between the through conductor 25 and the wiring conductor 21.

[0041] Boundary E1 at Figure 4AThe boundary E1 can be located outside the through-hole 13 (i.e., further outward than the opening 13a of the through-hole 13). Alternatively, the entire boundary E1 can be located outside the through-hole 13. Electromigration tends to occur around the opening 13a of the through-hole 13, where the current direction changes and the current is concentrated, as charge flows from the wiring conductor 21 to the through conductor 25. However, with the aforementioned boundary E1 structure, since the Cu grains t1 of the through conductor 25 occupy both inside and outside the opening 13a, the difference in size between the Cu grains t1 inside and outside the opening 13a becomes smaller. Therefore, the resistance to electromigration can be improved around the opening 13a of the through-hole 13.

[0042] Boundary E1 exhibits the same tendency regardless of the orientation of the cross section (the orientation of the rotational direction centered on the central axis of the through-hole 13). Therefore, if the wiring substrate 1 is viewed from a direction perpendicular to the first surface 11, it appears as follows: Figure 4B As shown, the boundary E1 has a portion that overlaps with the opening 13a of the through-hole 13 of the insulating substrate 10. Within the aforementioned overlap area, the difference in size of the Cu grains t1 becomes smaller inside and outside the opening 13a. Therefore, according to this structure, the resistance to electromigration can be improved around the opening 13a of the through-hole 13. The boundary E1 can overlap with the opening 13a in the entire circumferential direction of the opening 13a of the through-hole 13. According to this structure, the resistance to electromigration can be improved in the entire circumferential direction of the opening 13a of the through-hole 13.

[0043] Furthermore, in Figure 4A In the cross-section, boundary E1 includes a first boundary line E1a on the left and a second boundary line E1b on the right. The distance between the first boundary line E1a and the second boundary line E1b becomes narrower as they move further away from the through hole 13 (opening 13a). Furthermore, the width of the through conductor 25 also becomes narrower as it moves further away from the through hole 13 (opening 13a). According to this structure, the difference in the size of Cu grains t1 can be reduced at locations where the direction of current changes and the current concentrates as charge flows from the wiring conductor 21 to the through conductor 25. Therefore, the resistance to electromigration at these locations can be improved. Furthermore, in the above cross-section, the angle between each part of boundary E1 and the line segment representing the opening 13a becomes smaller as it gets closer to the edge of the opening 13a. According to this structure, the difference in the size of Cu grains t1 can be reduced at locations where the direction of charge changes and the charge flow concentrates. Therefore, the resistance to electromigration at these locations can be improved.

[0044] The above description pertains to the first surface 11, but the same principle applies to the second surface 12. That is, the boundary E1 between the wiring conductor 23 and the through conductor 25, in relation to the opening 13b on the second surface 12, can have the same relationship as the boundary E1 between the first surface 11 and the opening 13a. According to this structure, when charge flows from the wiring conductor 23 to the through conductor 25, the size difference of Cu grains t1 can be reduced at locations where the charge orientation changes and the charge flow is concentrated. Therefore, the electromigration resistance at these locations can be improved.

[0045] <Intermediate Layer>

[0046] As previously described, the intermediate layers 212, 232, and 252 contain at least Cu, Ti, and O, and are polycrystalline metals composed of multiple Cu grains and multiple titanium oxide grains. Comparing the intermediate layer 252 of the through conductor 25 with the main conductor portion 251 of the through conductor 25, the average size of the Cu grains is larger in the main conductor portion 251. Similarly, comparing the intermediate layers 212 and 232 of the wiring conductors 21 and 23 with the main conductor portions 211 and 231 of the wiring conductors 21 and 23, the average size of the Cu grains is larger in the main conductor portions 211 and 231.

[0047] The intermediate layers 212 and 232 of the wiring conductors 21 and 23 and the intermediate layer 252 of the through conductor 25 can make the composition and the average size of the Cu grains approximately the same.

[0048] With intermediate layers 212, 232, and 252 in between, even when thermal stress is generated between the insulating substrate 10 and the wiring conductors 21 and 23, and between the insulating substrate 10 and the through conductor 25, the concentration of thermal stress can be mitigated, thereby improving the TCT (temperature cycling test) resistance of the wiring substrate 1.

[0049] <Manufacturing Method>

[0050] Figure 5 This is a diagram illustrating an example of a method for manufacturing a wiring substrate according to an embodiment.

[0051] The manufacturing method of this embodiment, in chronological order, includes a substrate forming process J1, a Ti film coating process J2, a firing process J3, a Cu plating and sintering process J4, an electrolytic plating process J5, and a resist stripping process J6.

[0052] In the substrate forming process J1, the ceramic green sheet before sintering is formed into a substrate shape through punching or die forming, forming a substrate 70 before firing. The substrate 70 has a through hole 73 spanning a first surface 71 and a second surface 72 opposite to the first surface 71, and a side groove 74. The diameter of the through hole 73 at its central depth (the height between the first surface 71 and the second surface 72) is smaller than the diameter of the opening on the first surface 71 and the opening on the second surface 72. Next, by firing the substrate 70, it becomes a ceramic insulating substrate 10. The through hole 73 and side groove 74 of the substrate 70 before firing retain the same shape, becoming a through hole 13 and a side groove 14. Alternatively, the through hole 13 and side groove 14 can be formed after firing the ceramic green sheet by laser processing or sandblasting.

[0053] In Ti film coating process J2, organic Ti liquid 81 is coated on the fired insulating substrate 10. Organic Ti liquid 81 is also coated on the inner wall surfaces of the through holes 73 and the side grooves 74. Organic Ti liquid 81 can be coated with the same thickness on the first surface 71, the second surface 72, the inner wall surfaces of the through holes 73 and the inner wall surfaces of the side grooves 74.

[0054] In the firing process J3, the organic Ti liquid 81 coated on the insulating substrate 10 is fired, and the coated organic Ti liquid 81 becomes an oxide Ti film 83.

[0055] In the Cu plating and sintering process J4, firstly, electroless Cu plating is performed on the Ti oxide film 83 on the surface of the insulating substrate 10. Next, a sintering process is performed to diffuse elements at the interface between the Ti oxide film 83 and the Cu plating film. Through the sintering process, Cu diffuses into the Ti oxide film 83, forming a seed layer 85. The seed layer 85 corresponds to the intermediate layers 212, 232, and 252 in the wiring substrate 1 after the manufacturing process.

[0056] In the electrolytic plating process J5, a resist pattern 91 is formed except for the portions of wiring conductors 21, 23, and through conductor 25. Electrolytic Cu plating is then performed on the seed layer 85, which is not covered by the resist pattern 91. Cu deposited conductors 88 are formed on the seed layer 85 by electrolytic Cu plating, and the through holes 13 and side trenches 14 are filled by the Cu deposited conductors 88. The Cu deposited conductors 88 correspond to the main conductor portions 211 and 231 of wiring conductors 21 and 23, and the main conductor portion 251 of through conductor 25. Electrolytic Cu plating can use a plating solution containing copper sulfate for filling through holes and vias (e.g., JCU VF-II). A substrate is placed on a conductive support. After degreasing and acid treatment of the substrate, the substrate is immersed in the plating solution and subjected to an A / dm² pressure. 2 A certain amount of current is applied, thereby forming Cu deposited conductor 88.

[0057] In the resist stripping process J6, the seed layer 85, which is not covered by the Cu deposited conductor 88, is etched by removing the resist pattern 91 to manufacture the wiring substrate 1. By the above manufacturing method, wiring substrates 1 with different average sizes of Cu grains t1 in the wiring conductors 21, 23 and through conductor 25 as described above can be manufactured. Figure 5 Wiring substrate 1 in Figure 1 The structure is supplemented with wiring conductors 21a and 21b and castrations 25a and 25b.

[0058] <Electronic Devices and Electronic Modules>

[0059] Figure 6 This is a cross-sectional view showing the electronic device and electronic module involved in the embodiments of this disclosure.

[0060] The electronic device 60 according to this embodiment is configured by mounting electronic components 50 on a wiring substrate 1. Alternatively, the terminals of the electronic components 50 may be connected to the wiring conductor 21, and the terminals may be connected to the wiring conductor 23 on the second surface 12 side via the wiring conductor 21 and the through conductor 25. Alternatively, a Ni film may be provided on the surface of the wiring conductors 21 and 23.

[0061] As an electronic component 50, it can utilize various electronic components such as optical elements (LD, PD, LED, etc.), imaging elements (CCD, CMOS, etc.), piezoelectric oscillators (such as crystal oscillators), surface acoustic wave elements, semiconductor integrated circuit elements (IC, etc.), capacitors, inductors, or resistors.

[0062] The electronic module 100 according to this embodiment is configured by mounting an electronic device 60 on a module substrate 110. In addition to the electronic device 60, other electronic devices, electronic components, and electrical components may also be mounted on the module substrate 110. Electrode pads 111 may also be provided on the module substrate 110, and the wiring conductors 23 of the electronic device 60 may be bonded to the electrode pads 111 via bonding materials 113 such as solder.

[0063] According to this embodiment, the electronic device 60 and electronic module 100 can improve their reliability by using a wiring substrate 1 with improved resistance to electromigration at the periphery of the opening 13a.

[0064] The embodiments of this disclosure have been described above. However, the wiring substrate, electronic device, and electronic module of this disclosure are not limited to the above embodiments. For example, in the above embodiments, a structure is shown in which wiring conductors are exposed on the outer surface of the wiring substrate and through conductors are located between the two wiring conductors exposed on the outer surface of the wiring substrate. However, the wiring conductors may be wiring layers located inside the substrate of a multilayer wiring substrate, and the through conductors may be interlayer vias of the multilayer wiring substrate. Furthermore, the through conductor may be a conductor forming a via or a conductor forming a basalt.

[0065] Industrial availability

[0066] This disclosure can be used in wiring boards, electronic devices, and electronic modules.

[0067] -Symbol Explanation-

[0068] 1 Wiring substrate

[0069] 10 Insulating substrate

[0070] 11 Page 1

[0071] 12 Page 2

[0072] 13 Through holes

[0073] 13a, 13b Openings

[0074] 13i Middle Section

[0075] 21, 23 Wiring conductors

[0076] 25 Through conductor

[0077] 211, 231, 251 Dominant body parts

[0078] 212, 232, 252 Intermediate Layer

[0079] t1 Cu grains

[0080] E1 boundary

[0081] E1a First Boundary Line

[0082] E1b Second Boundary Line

[0083] 50 Electronic Components

[0084] 60 Electronic devices

[0085] 100 Electronic Modules

[0086] 110 Module Baseboard.

Claims

1. A wiring substrate, comprising: An insulating substrate made of ceramic has a first surface, a second surface opposite to the first surface, and a through hole extending from the first surface to the second surface; A through conductor, located within the through hole and on the opening of the through hole on the first surface side; and A wiring conductor, located on the first surface, is connected to the through conductor; The through conductor and the wiring conductor contain copper as the main component; The average size of Cu grains in the through conductor is larger than the average size of Cu grains in the wiring conductor. The wiring conductor comprises: a main conductor portion with Cu as the main component, and an intermediate layer located between the main conductor portion and the first surface; The intermediate layer is a polycrystalline metal composed of multiple Cu grains and multiple titanium oxide grains.

2. The wiring substrate according to claim 1, wherein, The difference between the average size of Cu grains in the through conductor and the average size of Cu grains in the wiring conductor is less than 3 μm.

3. The wiring substrate according to claim 1 or 2, wherein, The boundary between the through conductor and the wiring conductor is located outside the through hole.

4. The wiring substrate according to claim 1 or 2, wherein, When viewed from a direction perpendicular to the first surface, the boundary between the through conductor and the wiring conductor includes a portion that overlaps with the through conductor.

5. The wiring substrate according to claim 1 or 2, wherein, In a cross-section passing through the through hole and perpendicular to the first surface, the distance between the first boundary line, representing the left boundary between the through conductor and the wiring conductor, and the second boundary line, representing the right boundary between the through conductor and the wiring conductor, becomes narrower as it moves further away from the through hole.

6. The wiring substrate according to claim 1 or 2, wherein, In a cross-section passing through the through hole and perpendicular to the first surface, the angles of the boundary lines representing the boundary between the through conductor and the wiring conductor, and the angles of the line segments representing the opening of the through hole, are smaller as they approach the edge of the opening.

7. An electronic device comprising: Wiring substrate according to any one of claims 1 to 6; and Electronic components mounted on the wiring substrate.

8. An electronic module, comprising: The electronic device according to claim 7; and A substrate for a module that carries the electronic device.

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