Deterministic streaming method and apparatus

Abstract

The application provides a deterministic streaming method and device. The method comprises: determining a target time slot number corresponding to an arrival time of a received data packet in a case that the data packet belongs to a deterministic flow and no CSQF field scheduling information is carried in the data packet; querying a time slot scheduling period mapping table of an out interface of the data packet according to the target time slot number to determine a target period scheduling queue corresponding to the target time slot number; wherein the time slot scheduling period mapping table is determined according to intra-node jitter of the network node and is used to record a mapping relationship between a time slot number and a queue number of a period scheduling queue; and the data packet is scheduled to the target period scheduling queue of the out interface of the data packet. Through the embodiment of the application, intra-node jitter in a deterministic flow scheduling process can be effectively absorbed.

Description

Technical Field

[0001] This application relates to network communication technology, and in particular to methods and devices for transmitting deterministic traffic (DT). Background Technology

[0002] Deterministic networks (DetNets) provide deterministic service functions for carried services within a network domain. These deterministic service functions may include latency, packet loss rate, etc. Taking a time-sensitive network (TSN) implemented based on a local area network as an example, TSNs ensure deterministic transmission latency along the entire forwarding path at the forwarding layer by employing cyclic queuing and forwarding (CQF).

[0003] To achieve deterministic transmission over wide area networks, the industry has proposed Cycle Specified Queuing and Forwarding (CSQF) based on segmented routing.

[0004] The CSQF scheme employs a global controller that collects information from each node, including sending capacity, interface, cycle count, and maximum jitter within the node. Applications request deterministic transmission needs from the controller. After calculation, the controller determines sufficient transmission resources and allocates a transmission path for the application. Simultaneously, it distributes the path information to the application's network nodes. Upon receiving the packet to be forwarded, each network node adds information about each node in the path, including its node identifier, sending interface, and the specified transmission cycle. When data arrives at a node, its forwarding layer retrieves the corresponding interface and cycle information and stores the data packet in a cycle-mapped queue. Nodes then cycle through the various CSQF queues, sending one packet per cycle.

[0005] For ease of description, service flows with deterministic service functions, such as latency and packet loss rate, transmitted in a deterministic network are called deterministic flows. Other service flows that differ from deterministic flows, when forwarded using existing forwarding devices such as software forwarding devices or hardware forwarding devices based on switching chips or NPs in a best-effort forwarding manner, can be called best-effort flows. Summary of the Invention

[0006] This application provides a deterministic stream transmission method and apparatus to absorb intra-node jitter during deterministic stream scheduling.

[0007] This application provides a deterministic streaming method, which is applied to a network node and includes:

[0008] If it is determined that the received data packet belongs to a deterministic flow and the data packet does not carry CSQF scheduling information, the target timeslot number corresponding to the arrival time of the data packet is determined;

[0009] Based on the target timeslot number, the timeslot scheduling cycle mapping table of the outgoing interface of the data packet is queried to determine the target periodic scheduling queue corresponding to the target timeslot number; wherein, the timeslot scheduling cycle mapping table is determined based on the intra-node jitter of the network node and is used to record the mapping relationship between timeslot numbers and queue numbers of periodic scheduling queues;

[0010] The data packet is scheduled to the target periodic scheduling queue of the data packet's outgoing interface.

[0011] This application also provides an electronic device. The electronic device includes: a processor and a machine-readable storage medium;

[0012] The machine-readable storage medium stores machine-executable instructions that can be executed by the processor;

[0013] The processor is used to execute machine-executable instructions to implement the steps of the disclosed method.

[0014] As can be seen from the above technical solutions, this embodiment determines the mapping relationship between the time slot number and the queue number of the periodic scheduling queue based on the intra-node jitter of the network node, so as to construct a time slot scheduling periodic mapping table, which effectively absorbs the intra-node jitter in the deterministic flow scheduling process. Attached Figure Description

[0015] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0016] Figure 1 A flowchart of a deterministic streaming method provided in the embodiments of this application;

[0017] Figure 2 This is a diagram illustrating the arrival time and queuing cycle of data packets for User1.

[0018] Figure 3 This is a diagram illustrating the periodic queue being scheduled when User1's data packet arrives.

[0019] Figure 4 A schematic diagram illustrating the implementation process for determining the target timeslot number corresponding to the arrival time of a data packet, as provided in an embodiment of this application;

[0020] Figure 5 A schematic diagram illustrating the implementation process of determining the queue number of the periodic scheduling queue corresponding to the time slot number, as provided in an embodiment of this application;

[0021] Figure 6 This is a schematic diagram illustrating the implementation process of determining the scheduling offset provided in an embodiment of this application;

[0022] Figure 7 This is a schematic diagram of a calendar schedule.

[0023] Figure 8 A schematic diagram of the time slot distribution for deterministic business packet transmission;

[0024] Figure 9 This is a schematic diagram of the time slot update table;

[0025] Figure 10 A schematic flowchart illustrating the deterministic stream transmission method provided in this application embodiment;

[0026] Figure 11 A schematic diagram of intra-node delay decomposition of the forwarding model of edge nodes of the CSQF domain for deterministic flow data packets provided in the embodiments of this application;

[0027] Figure 12 A schematic diagram of a forwarding model for a distributed device Switch Process provided in an embodiment of this application;

[0028] Figure 13 This is a schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0029] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0030] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0031] To enable those skilled in the art to better understand the technical solutions provided in the embodiments of this application, and to make the above-mentioned objectives, features and advantages of the embodiments of this application more apparent and understandable, the technical solutions provided in the embodiments of this application are described below in conjunction with the accompanying drawings.

[0032] The deterministic streaming method provided in the embodiments of this application is described below with reference to the accompanying drawings:

[0033] See Figure 1 , Figure 1 This is a flowchart illustrating a deterministic streaming method provided in an embodiment of this application. This process is applied to a network node. This embodiment does not specifically limit the specific structural form of the network node; for example, it can be a low-to-mid-range router, a high-end router with high performance requirements and support for more CPU cores, or a high-end, core router based on network processor (NP) forwarding. This embodiment is not specifically limited to ensure broad applicability and scalability.

[0034] like Figure 1 As shown, the process may include the following steps:

[0035] Step 101: If it is determined that the received data packet belongs to a deterministic flow and the data packet does not carry CSQF domain scheduling information, determine the target timeslot number corresponding to the arrival time of the data packet.

[0036] In this embodiment, data packets belonging to a deterministic flow will carry a deterministic flow property (DetProperty).

[0037] For example, deterministic flow attributes are not fixed, and the current specification does not provide specific specifications. Instead, they are set in a coordinated manner according to actual needs. For example, the values ​​of fields such as Differentiated Services CodePoint (DSCP) are set to characterize deterministic flow attributes. This embodiment does not specifically limit deterministic flow attributes. However, once the deterministic flow attributes are set and applied to step 101, it can be identified whether the current data packet carries deterministic flow attributes. If so, the current data packet is identified as belonging to a deterministic flow.

[0038] In this embodiment, if it is determined that the data packet belongs to a deterministic flow, the node can be determined as an edge node of the CSQF domain by depending on whether the data packet carries CSQF domain scheduling information.

[0039] For example, the CSQF domain scheduling information may include information indicating which periodic scheduling queue of the packet's outgoing interface it should be scheduled to.

[0040] In this embodiment, if it is determined that the received data packet belongs to a deterministic flow and the data packet does not carry CSQF domain scheduling information, this node can be determined as an edge node of the CSQF domain.

[0041] In this embodiment, considering that in the traditional CQSF scheme, in order to achieve end-to-end data transmission jitter of deterministic streams within 2 scheduling cycles (which can be denoted as 2T), the deterministic streams of a specific user are always forwarded at a specific node with a specified cycle. However, different services have different packet sending cycles. For example, the Internet of Vehicles uses a 150us cycle, and industrial control uses a 250us cycle. When the cycle width of the periodic deterministic stream is not an integer multiple of the large cycle of the scheduling cycle, scheduling the deterministic stream in this way will introduce a large amount of jitter.

[0042] For example, suppose user User1 sends packets every 150µs. The forwarding node divides the packet transmission into 8 cycles (Cycle 0-7) with a duration of T (T being 10µs) for periodic scheduling and forwarding, corresponding to 8 cycle scheduling queues Queue 0-7. According to the CSQF implementation, a specific user on a specific node will always forward packets at a specified cycle, such as... Figure 2 As shown, assume User1 is fixed at Cycle0 for forwarding at the edge node of the CSQF domain, i.e., entering Queue0. Also assume that when the first packet arrives, Cycle7 from the previous large loop is being scheduled. The first packet entering Queue0 is just right; that is, when the first packet arrives, the queue corresponding to Cycle7 from the previous round is being scheduled, and Queue0 will be scheduled after one cycle. 150us later, the second packet from User1 is received, and the queue corresponding to Cycle6 is being scheduled. However, because it is specified to enter queue 0, the second packet introduces a scheduling jitter of one cycle compared to the first packet. Similarly, after another 150us, the third packet arrives, precisely when Cycle5 is being scheduled, thus introducing a jitter of two cycles, and so on. Figure 3 As shown, when packets 1 to 8 arrive, the corresponding relationship of the cycle numbers being scheduled can be seen from these relationships. It can be seen that there are a maximum of 7 cycles of jitter.

[0043] Therefore, while assigning specific users to a fixed queue is simple, it introduces jitter of d(queue number)-1 cycles when the user packet sending cycle is not an integer multiple of the large loop and has no common divisor with the scheduling cycle. Thus, even if CSQF can guarantee two cycles of jitter end-to-end within the CSQF domain, the jitter introduced by the head node cannot be ignored.

[0044] Furthermore, considering that in real-world scenarios, within the edge node of the CSQF domain that receives data packets of deterministic flow, there will be significant latency jitter (potentially reaching 20µs to 50µs) between receiving the data packet and the CSQF scheduling and forwarding component.

[0045] For example, the analysis of intra-node latency jitter in a network node can be determined based on the forwarding model of deterministic flow packets by edge nodes in the CSQF domain, which will be discussed in detail below. Figure 11 Examples will be given, but will not be elaborated here.

[0046] Therefore, in order to solve the large jitter problem introduced by the aforementioned deterministic flow edge access, the deterministic flow data packets received by the edge nodes of the CSQF domain are no longer scheduled according to the method of forwarding the deterministic flow of a specific user to a specific node at a specified period. Instead, the corresponding timeslot number (which can be called the target timeslot number) can be determined based on the arrival time of the deterministic flow data packets, and the periodic scheduling queue of the deterministic flow data packets is based on the timeslot number.

[0047] In this embodiment, how a network node determines the target timeslot number corresponding to the arrival time of a data packet can be found below. Figure 4 The implementation process described in the example will not be repeated here.

[0048] In this embodiment, the scenario where a network node, acting as an edge node of the CSQF domain, receives deterministic flow data packets may include:

[0049] The network node is an edge node in the CSQF domain that connects to a nondeterministic network domain and receives data packets from a deterministic flow.

[0050] or,

[0051] Network nodes are edge nodes in wide-area deterministic networks that connect to non-wide-area deterministic networks (such as TSNs) and receive data packets from deterministic streams;

[0052] or,

[0053] The network node is a CSQF forwarding relay node for wide area deterministic networks and receives data packets of deterministic flow.

[0054] In the CSQF ultra-long path scenario, assuming that the number of hops corresponding to the number of labels supported by the edge node of the CSQF domain corresponds to a certain intermediate node in the forwarding path, for the next hop node of this intermediate node, since the received deterministic flow data packets lack label information, it cannot determine the periodic scheduling queue of the received deterministic flow data packets based on the label information. At this time, this next hop node can be called a CSQF forwarding relay node for wide area deterministic network ultra-long path.

[0055] Similarly, the first forwarding node outside the label coverage area of ​​a CSQF forwarding relay node for ultra-long paths in a wide-area deterministic network can also serve as a new CSQF forwarding relay node for ultra-long paths in a wide-area deterministic network.

[0056] Step 102: Based on the target timeslot number, query the timeslot scheduling cycle mapping table of the data packet's outgoing interface to determine the target cycle scheduling queue corresponding to the target timeslot number.

[0057] In this embodiment, for any output interface that supports CSQF, a time slot scheduling cycle mapping table can be implemented in the input interface processing unit. This time slot scheduling cycle mapping table can be used to record the mapping relationship between time slot numbers and queue numbers of the periodic scheduling queue. In the process of establishing the mapping relationship between time slot numbers and queue numbers of the periodic scheduling queue, the intra-node jitter of network nodes can be considered so as to absorb the intra-node jitter of network nodes in the deterministic flow scheduling process through this mapping relationship.

[0058] In this embodiment, the establishment of the mapping relationship between time slot numbers and queue numbers of the periodic scheduling queue, i.e., the construction process of the time slot scheduling period mapping table, can be found below. Figure 5 The implementation process described in the example will not be repeated here.

[0059] In this embodiment, based on the target time slot number determined in step 101, the time slot scheduling cycle mapping table of the data packet's outgoing interface can be queried to determine the queue number of the periodic scheduling queue mapped to the target time slot number, and the periodic scheduling queue identified by the queue number of the periodic scheduling queue can be determined as the periodic scheduling queue corresponding to the target time slot number (which can be called the target periodic scheduling queue).

[0060] Step 103: Schedule the data packet to the target periodic scheduling queue of the data packet's outgoing interface.

[0061] In this embodiment, if the target periodic scheduling queue is determined according to steps 101 to 102, the data packet can be scheduled to the target periodic scheduling queue of the data packet's outgoing interface.

[0062] Figure 1 The method shown determines the mapping relationship between time slot numbers and periodic scheduling queue numbers based on the intra-node jitter of network nodes, thereby constructing a time slot scheduling periodic mapping table. Thus, when a network node determines that a received data packet belongs to a deterministic flow and does not carry CSQF domain scheduling information, it queries the time slot scheduling periodic mapping table of the outgoing interface of the data packet based on the target time slot number corresponding to the arrival time of the data packet, determining the target periodic scheduling queue corresponding to the arrival time of the data packet. In other words, the periodic scheduling queue of the data packet is determined based on the arrival time of the deterministic flow data packet, instead of scheduling deterministic flows of a specific user at a specific node and always forwarding them at a specified period, effectively absorbing the intra-node jitter during the deterministic flow scheduling process.

[0063] This concludes the process. Figure 1 The process is shown below.

[0064] The following is through Figure 4 The flowchart shown describes the process of determining the target timeslot number corresponding to the arrival time of a data packet:

[0065] See Figure 4 , Figure 4 This is a schematic diagram illustrating the implementation process for determining the target timeslot number corresponding to the arrival time of a data packet, as provided in an embodiment of this application.

[0066] like Figure 4 As shown, the process may include the following steps:

[0067] Step 401: Obtain the receiving timestamp of the data packet.

[0068] In this embodiment, the data packet reception timestamp can be a reception timestamp added by the hardware to the received data packet. In some scenarios where the hardware does not support timestamps, the system clock of this node can also be obtained at the forwarding processing entry point and used as the data packet reception timestamp.

[0069] Step 402: Convert the received timestamp of the data packet into a number of time slots.

[0070] Step 403: Based on the number of time slots and the number of time slots in the time slot scheduling cycle mapping table, determine the target time slot number corresponding to the arrival time of the data packet.

[0071] Optionally, the target time slot number corresponding to the arrival time of the data packet can be obtained by taking the remainder of the number of time slots in the time slot scheduling period mapping table after converting the data packet's received timestamp into the number of time slots.

[0072] For example, assuming the number of time slots in the time slot scheduling period mapping table is 256, and the time slot number converted from the data packet reception timestamp is TimeSlotNum, then:

[0073] TimeSlotNum_Remainder=(TimeSlotNum&0xFF), or (TimeSlotNum%256)

[0074] Among them, TimeSlotNum_Remainder is the target timeslot number corresponding to the arrival time of the data packet.

[0075] For example, the time slot scheduling cycle mapping table can be queried based on TimeSlotNum_Remainder as the key to obtain the queue number of the corresponding cycle scheduling queue. The queue number of the cycle scheduling queue is the queue number of the cycle scheduling queue that the data packet needs to enter in the network node.

[0076] This concludes the process. Figure 4 The process is shown below.

[0077] The following is through Figure 5 The illustrated process describes the implementation of determining the mapping relationship between time slot numbers and queue numbers in periodic scheduling queues:

[0078] In this embodiment, for any CSQF-supporting output interface, the mapping relationship between the time slot number and the queue number of the periodic scheduling queue recorded in the time slot scheduling cycle mapping table of the output interface can be determined in the following way:

[0079] For any timeslot number, the queue number of the periodic scheduling queue corresponding to the timeslot number is determined based on the timeslot number, the scheduling offset, and the number of periodic scheduling queues of the outgoing interface.

[0080] The scheduling offset is determined based on the intra-node jitter of the network node.

[0081] For example, in this embodiment, the time slot scheduling cycle mapping table can also be called a calendar scheduling table.

[0082] Optionally, the calendar scheduling table may include the following information and characteristics:

[0083] 1. Time slot number (Calendar_Slot);

[0084] 2. The queue number (Calendar_Que_No) of the periodic scheduling queue that this time slot number maps to.

[0085] The number of time slots in the calendar scheduler is an integer multiple of the number of periodic scheduler queues. For example, when the number of periodic scheduler queues is 8, the number of time slots in the calendar scheduler is 8N (N is a positive integer), such as 256 time slots in the calendar scheduler.

[0086] See Figure 5 , Figure 5 This is a schematic diagram illustrating the implementation process of determining the queue number of the periodic scheduling queue corresponding to the time slot number, as provided in an embodiment of this application.

[0087] like Figure 5 As shown, the process may include:

[0088] Step 501: For any timeslot number, take the remainder of the sum of the timeslot number and the scheduling offset with respect to the number of periodic scheduling queues of the outgoing interface to obtain the first remainder result.

[0089] Step 502: Determine the first remainder result as the queue number of the periodic scheduling queue corresponding to the time slot number.

[0090] In this embodiment, for any timeslot number, the periodic scheduling queue corresponding to that timeslot number can be determined based on the sum of the timeslot number and the scheduling offset. Since the sum of the timeslot number and the scheduling offset may be greater than the number of periodic scheduling queues, the queue number of the periodic scheduling queue corresponding to that timeslot number can be determined by taking the remainder of the sum of the timeslot number and the scheduling offset divided by the number of periodic scheduling queues. The remainder result (i.e., the first remainder result) is then used to determine the queue number of the periodic scheduling queue corresponding to that timeslot number.

[0091] For example, the queue number Calendar_Que_No of the periodic scheduling queue corresponding to the time slot number can be determined in the following way:

[0092] Calendar_Que_No=(Calendar_Slot+Schedule_Offset)%Que_Num.

[0093] Where Calendar_Slot is the slot number, Schedule_Offset is the scheduling offset, and Que_Num is the number of periodic scheduling queues.

[0094] In this embodiment, the scheduling offset can be used to characterize the offset of the period corresponding to the CSQF periodic scheduling queue of the local node from the data packet received by the input forwarding processing unit in time slot 0, relative to the first period of the local node's CSQF. The method for determining it can be found below. Figure 6 The implementation process described in the example will not be repeated here.

[0095] This concludes the process. Figure 5 The process is shown below.

[0096] The following is through Figure 6 The flowchart shown describes the implementation process for determining the scheduling offset:

[0097] See Figure 6 , Figure 6 This is a schematic diagram illustrating the implementation process of determining the scheduling offset provided in an embodiment of this application.

[0098] like Figure 6 As shown, for any CSQF-enabled outgoing interface, the process for determining the scheduling offset may include:

[0099] Step 601: Based on the timestamp of the test message received in the input forwarding processing unit, determine the periodic scheduling queue of the output interface that the output interface processing unit is scheduling when the test message arrives at the output interface processing unit.

[0100] In this embodiment, a periodic measurement and calibration method can be used to determine the periodic scheduling queue of the output interface that the output interface processing unit is scheduling when the test message arrives at the output interface processing unit after being sent from the input forwarding processing unit.

[0101] Step 602: Determine the optimal periodic scheduling queue for the test packet based on the periodic scheduling queue of the output interface being scheduled by the output interface processing unit and the intra-node jitter of the network node.

[0102] In this embodiment, under ideal conditions, when the test message determined in step 601 arrives at the output interface processing unit, the next periodic scheduling queue of the periodic scheduling queue of the output interface that the output interface processing unit is scheduling is the most suitable periodic scheduling queue for the test message to enter.

[0103] However, since there will be a certain delay jitter (i.e., intra-node jitter of the network node) in the process of the test message being sent from the input forwarding processing unit to the output interface processing unit scheduling the test message into the queue, the optimal periodic scheduling queue of the test message can be obtained by offsetting the periodic scheduling queue that the test message needs to enter based on the delay jitter.

[0104] For example, suppose that when the test message arrives at the output interface processing unit, the periodic scheduling queue that the output interface processing unit is scheduling is queue 2, and the above-mentioned delay jitter is 30us, and a time slot is 10us, then the next periodic scheduling queue (i.e., queue 3) of queue 2 can be shifted to the periodic scheduling queue (queue 6) 3 queues later, and determined as the optimal scheduling queue for the test message.

[0105] Step 603: Determine the scheduling offset based on the optimal periodic scheduling queue, the number of periodic scheduling queues for the outgoing interface, and the timeslot number corresponding to the timestamp of the test message received in the input forwarding processing unit.

[0106] In this embodiment, based on the above steps, the optimal scheduling queue corresponding to the timeslot number corresponding to the received timestamp of the test message in the input forwarding processing unit can be determined, that is, a correspondence between a timeslot number and the optimal scheduling queue is obtained.

[0107] Since one time slot corresponds to one scheduling cycle, based on this correspondence and the offset between the time slot number and time slot 0, the optimal scheduling queue corresponding to time slot 0 can be determined, and the queue number of the optimal scheduling queue can be used as the aforementioned scheduling offset.

[0108] In this embodiment, when determining the scheduling offset, the test message (also known as the test data packet) can be constructed by the CPU and passed through the internal processing channel to the input forwarding processing unit. The input forwarding processing unit can stamp the test message with a receiving timestamp based on the system time of receiving the test message, and determine the periodic scheduling queue of the output interface of the test message that the output interface processing unit is scheduling when the test message arrives at the output interface processing unit based on the receiving timestamp.

[0109] Alternatively, the test message can also be constructed by the input forwarding processing unit. For example, the input forwarding processing unit can construct the test message when it receives a test command. In this case, the input forwarding processing unit can stamp the test message with a receiving timestamp based on the system time when the test message is constructed, and determine the periodic scheduling queue of the output interface of the test message that the output interface processing unit is scheduling when the test message arrives at the output interface processing unit based on the receiving timestamp.

[0110] It should be noted that after the input forwarding processing unit receives the test message, or after constructing the test message, it can forward the test message in the same way as the processing method after the deterministic flow data packet arrives at the input forwarding processing unit of the edge node in the CSQF domain, so as to realize the simulation of the forwarding processing of deterministic flow data packets by the edge node in the CSQF domain.

[0111] Furthermore, considering the actual forwarding process of deterministic flow data packets, when the deterministic flow data packet arrives at the edge node of the CSQF domain, the input interface processing unit timestamps the data packet and determines the corresponding timeslot number (i.e., the target timeslot number mentioned above) based on the timestamp. The periodic scheduling queue is then mapped in the manner described above. However, since the delay of the data packet from the input interface processing unit to the input forwarding processing unit is usually very small and the jitter is also very small, the scheduling offset obtained by testing in the manner described above can absorb the jitter within the node more accurately.

[0112] For example, to further improve the accuracy of the above test, the timestamp of the test message can be obtained by subtracting a fixed time (the delay of the message passing through the input interface processing unit to reach the input forwarding processing unit) from the system time when the input forwarding processing unit receives the test message or when the test message is constructed.

[0113] In one example, the scheduling offset is determined based on the optimal periodic scheduling queue, the number of periodic scheduling queues for the outgoing interface, and the timeslot number corresponding to the timestamp of the test packet received in the input forwarding processing unit. This includes:

[0114] The second remainder result is obtained by taking the remainder of the timeslot number corresponding to the timestamp of the test message received in the input forwarding processing unit and the number of the periodic scheduling queue.

[0115] The sum of the queue number of the optimal periodic scheduling queue and the number of periodic scheduling queues at the output interface is obtained.

[0116] The difference between the summation result and the second remainder result is taken modulo the number of periodic scheduling sequences for the output interface to obtain the third remainder result.

[0117] The third remainder result is determined as the scheduling offset.

[0118] For example, since the timeslot number corresponding to the timestamp of the test message received in the input forwarding processing unit is the timeslot difference between the timeslot number corresponding to the timestamp of the test message received in the input forwarding processing unit and timeslot 0, this timeslot difference should be consistent with the difference between the queue number of the optimal periodic scheduling queue of the test message and the queue number of the optimal periodic scheduling queue of timeslot 0.

[0119] For example, assuming the test message corresponds to the nth time slot in the input forwarding processing unit's receiving timestamp, and the optimal periodic scheduling queue number of the test message is RQ, then the optimal periodic scheduling queue number corresponding to time slot 0 should be the periodic scheduling queue after the periodic scheduling queue RQ has been rolled back n times.

[0120] Considering that n may be greater than the number of cycles, we can obtain the remainder result (i.e., the second remainder result) by taking the remainder of n modulo the number of cycle scheduling queues of the outgoing interface, and then roll back the optimal cycle scheduling queue RQ of the test packet by the second remainder result cycles.

[0121] Considering that RQ may be less than the second remainder result, when rolling back RQ, we can first add the number of the periodic scheduling queues of the output interface, and then roll back the second remainder result for several periods. The queue number of the obtained periodic scheduling queue is then modulo the number of the periodic scheduling queues of the output interface. The remainder result (i.e. the third remainder result) is the scheduling offset.

[0122] For example, the scheduling offset Schedule_Offset can be determined using the following strategy:

[0123] Schedule_Offset=(RQ+Que_Num-(n%Que_Num))%Que_Num

[0124] For example, suppose the timestamp of the test message received at the input forwarding processing unit is xxx433us. When the test message arrives at the output interface processing unit, the periodic scheduling queue of the output interface for this test message that the output interface processing unit is scheduling is queue 2. Then, queue 3 is theoretically the most suitable queue for the test message to enter. However, since there will be a certain time delay jitter from the time the test message is sent from the input forwarding processing unit to the time the test message is enqueued by the output interface processing unit, let's say it is 30us (assuming one time slot is 10us), the optimal periodic scheduling queue for the test message is queue 2 offset by 30us (i.e., 3 cycles), that is, queue 6 (i.e., RQ=6).

[0125] Based on this, it can be seen that the timeslot number 43 corresponding to the sending timestamp of the test message maps to the periodic scheduling queue 6. Since the timeslot difference between timeslot number 43 and timeslot 0 is 43, the queue number of the optimal periodic scheduling queue corresponding to timeslot 0, i.e., the value of Schedule_Offset, can be calculated using the following strategy (assuming the number of periodic scheduling queues at the outgoing interface of the test message is 15):

[0126] Schedule_Offset=(RQ+Que_Num-(n%Que_Num))%Que_Num=(6+15-(43%15))%15=8

[0127] This concludes the process. Figure 6 The process is shown below.

[0128] Furthermore, considering that when multiple deterministic flows are accessed, multiple flows may arrive in the same time slot, leading to traffic conflicts.

[0129] Due to traffic conflicts, some deterministic flows may not be scheduled to the nearest time slot and may need to be adjusted to a nearby scheduling time slot (as long as jitter requirements are met). Therefore, a time slot update table is needed to adjust the time slot number corresponding to the arrival time of each deterministic flow.

[0130] See Figure 7 and Figure 8 Assuming there are 10 periodic scheduling queues and 100 time slots in the time slot scheduling periodic table (taking Calendar as an example), Figure 8 User1 sends data packets every 730us (i.e., 73 scheduling cycles). The time slot number corresponding to the arrival time of the user's first data packet is 53, and the time slot number corresponding to the arrival time of the second data packet is 26.

[0131] Assuming there is a traffic conflict in time slots 72 and 74 of the data stream's outgoing interface, but the usage of time slot 73 is very low (which can be determined by the controller or manual monitoring), then... Figure 9 The time slot table is updated, and the time slot number of the data packets with time slot numbers 72 and 74 corresponding to the arrival time is updated to 73, that is, the data packets are scheduled to the periodic scheduling queue corresponding to time slot 73.

[0132] Assuming Figure 8 As shown, a calendar with 10 CSQF periodic queues and 100 time slots is implemented. Figure 13 Taking user USER1's data stream as an example, the periodic interval is 73 time slots (730us). The user's first data packet is in time slot 53, the second in time slot 26, and so on. Assuming that time slots 72 and 74 of the same CSQF interface are conflicted, while time slot 73 is used very little (or even not at all), then the time slot update table should be designed as follows: Figure 9 As shown, data packets that should have been in slots 72 and 74 are scheduled to the forwarding queue corresponding to slot 73.

[0133] like Figure 9 As shown, Calendar_Slot is the slot number calculated based on the data packet's received timestamp; Calendar_Slot_Replace is the updated slot number.

[0134] Furthermore, considering that for edge nodes in the CSQF domain that connect to nondeterministic network domains, there may be situations where a deterministic flow needs to cross nondeterministic network domains before reaching the node, which may cause some jitter in the time slots when the same deterministic flow arrives at the node, in order to eliminate these jitters and achieve the shaping of the input deterministic flow, for packets of the same deterministic flow, when the time slot number corresponding to their arrival time at the node is several adjacent time slot numbers, they can be updated and mapped to the same time slot number.

[0135] For example, for a certain deterministic flow, if the arrival time of the deterministic flow corresponds to the time slot number including 0, 1 and 2, then all of them can be mapped to time slot number 2 to achieve the shaping of the deterministic flow.

[0136] Accordingly, please see Figure 10 The process of deterministic stream transmission can be as follows: Figure 10 As shown.

[0137] like Figure 10 The process may include the following steps:

[0138] Step 1001: If it is determined that the received data packet belongs to a deterministic flow and the data packet does not carry CSQF domain scheduling information, determine the target timeslot number corresponding to the arrival time of the data packet.

[0139] Step 1002: Based on the target timeslot number, query the timeslot update table of the service flow to which the data packet belongs to obtain the updated timeslot number.

[0140] Step 1003: Based on the updated timeslot number, query the timeslot scheduling cycle mapping table of the outgoing interface of the data packet to determine the target cycle scheduling queue corresponding to the timeslot where the data packet arrives.

[0141] Step 1004: Schedule the data packet to the target periodic scheduling queue of the data packet's outgoing interface.

[0142] By generating a time slot update table, the problem of time slot conflict in deterministic flow scheduling at the edge nodes of the CSQF domain is effectively solved, enhancing the adaptability of CSQF and increasing the carrying capacity of deterministic traffic on the same path. In addition, the time slot update table can also be used to reshape deterministic flows.

[0143] It should be noted that, for edge nodes in a wide-area deterministic network connecting to non-wide-area deterministic networks (such as TSN), or CSQF forwarding relay nodes on ultra-long paths in a wide-area deterministic network, the deterministic flows they receive all originate from the deterministic domain. There is typically no need to reshape the deterministic flows, nor will there be situations where some time slots are used very little while others are used excessively. Furthermore, for edge nodes in a wide-area deterministic network connecting to non-wide-area deterministic networks (such as TSN), or CSQF forwarding relay nodes on ultra-long paths in a wide-area deterministic network, the number of deterministic flows they need to process is usually large. Configuring and issuing time slot update tables for each deterministic flow would consume enormous resources. Therefore, in practical applications, configuring and issuing time slot update tables is not necessary for edge nodes in a wide-area deterministic network connecting to non-wide-area deterministic networks (such as TSN), or CSQF forwarding relay nodes on ultra-long paths in a wide-area deterministic network.

[0144] For example, an edge node in the CSQF domain that connects to a nondeterministic network domain can issue a slot update table for each deterministic flow.

[0145] The following is through Figure 11 The forwarding model of deterministic flow packets by edge nodes in the CSQF domain is described as follows:

[0146] See Figure 11 , Figure 11 This is a schematic diagram of the intra-node delay decomposition of the forwarding model of deterministic flow data packets by edge nodes in the CSQF domain provided in the embodiments of this application.

[0147] like Figure 11 As shown, the forwarding process of deterministic flow packets within the CSQF domain edge node includes:

[0148] The process includes input, distribution, exchange, mapping, periodic scheduling, and output. Among these:

[0149] Input Process: Used for input timestamp anchoring.

[0150] For example, the input process mainly involves the function of the hardware controller to anchor the input timestamp.

[0151] Distribution process: used for cache distribution.

[0152] For example, the distribution process can be implemented by a hardware controller or by software.

[0153] Switch Process: Used for in-node forwarding related processing.

[0154] For example, the switching process may include software processing, where the NP's microcode works with hardware units to implement a pipeline. For distributed devices, it may also include switching processing from input interface board to network board to output interface board; see below for specific implementation details. Figure 12 The implementation process described in the example will not be repeated here.

[0155] Mapping: Used to map deterministic streaming data packets to periodic scheduling queues according to the period.

[0156] For example, the mapping process requires the participation of software (or microcode of NP) or field-programmable gate array (FPGA), which must be programmable to provide flexibility in implementation.

[0157] The scheduled by cycle process is used to schedule the periodic scheduling queue according to the scheduling cycle, and send the data in the sending periodic queue to the configured reserved highest priority hardware queue.

[0158] Output Process: Used for hardware data transmission processing.

[0159] For example, the output process can be configured to reserve the highest priority hardware queue as the hardware queue for sending deterministic traffic and stamp the output timestamp.

[0160] exist Figure 11 In the multi-stage latency decomposition shown, the Switch Process processing latency is uncertain, involving queuing within nodes, and may vary by as much as 20us to 50us.

[0161] Take the Switch Process in a distributed device as an example.

[0162] See Figure 12 This is a schematic diagram of the forwarding model of the distributed device Switch Process provided in the embodiments of this application, as shown below. Figure 12 As shown, the Switch Process processing latency may include the input forwarding processing unit (...). Figure 12 Taking IngressNP as an example), internal switching unit ( Figure 12 (Taking Fabric as an example) and output forwarding processing unit ( Figure 12 The processing latency of EgressNP (taking EgressNP as an example) can reach more than 20µs after the jitter in the middle is superimposed.

[0163] exist Figure 12 In the implementation shown, both the Mapping and Schedule by Cycle stages are handled by the output interface processing unit. Figure 12 This is implemented using FPGA2 as an example. The message enters the input interface processing unit ( Figure 12 Taking FPGA1 as an example, there is a large uncertain time delay jitter (i.e., the jitter within the above nodes) between the mapping process of the output interface processing unit and FPGA1.

[0164] For example, FPGA1 and FPGA2 can be different FPGAs or the same FPGA (such as for scenarios involving traffic loopback or implementing multiple external ports on the same FPGA).

[0165] To eliminate intra-node jitter, the scheduling offset can be determined through testing as described above.

[0166] For example, with Figure 12 Taking the implementation shown as an example, when determining the scheduling offset, the periodic scheduling queue of the outgoing interface of the test message that FPGA2 is scheduling when the test message arrives at FPGA2 can be determined based on the timestamp of the test message received at the Ingress NP. Based on the periodic scheduling queue and the intra-node delay, such as 30us, the optimal periodic scheduling queue of the test message can be determined. Based on the queue number of the optimal periodic scheduling queue and the timeslot number corresponding to the timestamp of the test message received at the Ingress NP, the scheduling offset is determined in the above manner.

[0167] This concludes the description of the method provided in the embodiments of this application. The electronic device provided in the embodiments of this application is described below:

[0168] See Figure 13 This is a schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application, such as... Figure 13As shown, the electronic device includes a processor and a machine-readable storage medium; the machine-readable storage medium stores machine-executable instructions that can be executed by the processor; the processor is used to execute the machine-executable instructions to implement the method disclosed in the above example of this application.

[0169] Specifically, the processor executes machine-executable instructions to: determine the target timeslot number corresponding to the arrival time of the received data packet when it is determined that the received data packet belongs to a deterministic flow and the data packet does not carry CSQF domain scheduling information;

[0170] Based on the target timeslot number, the timeslot scheduling cycle mapping table of the outgoing interface of the data packet is queried to determine the target periodic scheduling queue corresponding to the target timeslot number; wherein, the timeslot scheduling cycle mapping table is determined based on the intra-node jitter of the network node and is used to record the mapping relationship between timeslot numbers and queue numbers of periodic scheduling queues;

[0171] The data packet is scheduled to the target periodic scheduling queue of the data packet's outgoing interface.

[0172] In one example, the processor executes machine-executable instructions to: obtain the receiving timestamp of the data packet; convert the receiving timestamp of the data packet into a timeslot number; and determine the target timeslot number corresponding to the arrival time of the data packet based on the timeslot number and the timeslot number in the timeslot scheduling period mapping table.

[0173] In one example, the processor executes machine-executable instructions to: for any outgoing interface that supports periodic queuing forwarding (CSQF), determine the mapping relationship between the time slot number recorded in the time slot scheduling period mapping table of the outgoing interface and the queue number of the periodic scheduling queue in the following manner: for any time slot number, determine the queue number of the periodic scheduling queue corresponding to the time slot number based on the time slot number, the scheduling offset, and the number of periodic scheduling queues of the outgoing interface; wherein the scheduling offset is determined based on the intra-node jitter of the network node.

[0174] In one example, the processor executes machine-executable instructions to: take the remainder of the sum of the timeslot number and the scheduling offset relative to the number of periodic scheduling queues of the output interface to obtain a first remainder result; and determine the first remainder result as the queue number of the periodic scheduling queue corresponding to the timeslot number.

[0175] In one example, the processor executes machine-executable instructions to determine the scheduling offset by: determining the periodic scheduling queue of the output interface that the output interface processing unit is scheduling when the test packet arrives at the output interface processing unit based on the timestamp of the test packet received at the input forwarding processing unit; determining the optimal periodic scheduling queue of the test packet based on the periodic scheduling queue of the output interface processing unit and the intra-node jitter of the network node; and determining the scheduling offset based on the optimal periodic scheduling queue, the number of periodic scheduling queues of the output interface, and the timeslot number corresponding to the timestamp of the test packet received at the input forwarding processing unit.

[0176] In one example, the processor executes machine-executable instructions to: take the timeslot number corresponding to the received timestamp of the test packet at the input forwarding processing unit modulo the number of the periodic scheduling queues to obtain a second modulo result; sum the queue number of the optimal periodic scheduling queue with the number of the periodic scheduling queues of the outgoing interface to obtain a summation result; take the difference between the summation result and the second modulo result modulo the number of the periodic scheduling queues of the outgoing interface to obtain a third modulo result; and determine the third modulo result as the scheduling offset.

[0177] In one example, the processor also executes machine-executable instructions to: query the time slot update table of the service flow to which the data packet belongs, based on the target time slot number, to obtain the updated time slot number; and query the time slot scheduling cycle mapping table of the outgoing interface of the data packet, based on the updated time slot number, to determine the target cycle scheduling queue corresponding to the time slot where the data packet arrives.

[0178] In one example, the forwarding process of deterministic flow packets within a CSQF domain edge node includes:

[0179] The process includes input, distribution, exchange, mapping, periodic scheduling, and output; among which:

[0180] The input process is used for input timestamp anchoring;

[0181] The distribution process is used for cache distribution;

[0182] The switching process is used to perform intra-node forwarding related processing;

[0183] The mapping process is used to map deterministic streaming data packets to a periodic scheduling queue according to the period.

[0184] The periodic scheduling process is used to schedule the periodic scheduling queue according to the scheduling period, and send the data in the sending periodic queue to the configured reserved highest priority hardware queue.

[0185] The output process is used for hardware transmission processing.

[0186] In one example, intra-node jitter of a network node includes processing latency jitter during the switching process.

[0187] Based on the same application concept as the above method, this application embodiment also provides a machine-readable storage medium storing a plurality of computer instructions, which, when executed by a processor, can implement the method disclosed in the above examples of this application.

[0188] For example, the aforementioned machine-readable storage medium can be any electronic, magnetic, optical, or other physical storage device that can contain or store information such as executable instructions, data, etc. For instance, machine-readable storage media can be: RAM (Random Access Memory), volatile memory, non-volatile memory, flash memory, storage drives (such as hard disk drives), solid-state drives, any type of storage disk (such as optical discs, DVDs, etc.), or similar storage media, or combinations thereof.

[0189] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer, which can take the form of a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email sending and receiving device, game console, tablet computer, wearable device, or any combination of these devices.

[0190] For ease of description, the above devices are described separately by function as various units. Of course, in implementing this application, the functions of each unit can be implemented in one or more software and / or hardware.

[0191] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, embodiments of this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0192] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0193] Furthermore, these computer program instructions can also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in the process. Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0194] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0195] The above description is merely an embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of this application should be included within the scope of the claims of this application.

Claims

1. A deterministic stream transmission method, characterized in that, This method is applied to network nodes, and the method includes: If it is determined that the received data packet belongs to a deterministic flow and the data packet does not carry CSQF domain scheduling information for queuing forwarding at a specified period, the target timeslot number corresponding to the arrival time of the data packet is determined; wherein, the CSQF domain scheduling information is used to indicate the periodic scheduling queue information of the data packet at the outgoing interface; Based on the target timeslot number, the timeslot scheduling cycle mapping table of the outgoing interface of the data packet is queried to determine the target periodic scheduling queue corresponding to the target timeslot number; wherein, the timeslot scheduling cycle mapping table is determined based on the intra-node jitter of the network node and is used to record the mapping relationship between timeslot numbers and queue numbers of periodic scheduling queues; Schedule the data packet to the target periodic scheduling queue of the data packet's outgoing interface; For any CSQF-supporting output interface, the mapping relationship between the time slot number and the queue number of the periodic scheduling queue recorded in the time slot scheduling cycle mapping table of that output interface is determined in the following way: For any timeslot number, the queue number of the periodic scheduling queue corresponding to the timeslot number is determined based on the timeslot number, the scheduling offset, and the number of periodic scheduling queues of the outgoing interface. The scheduling offset is determined based on the intra-node jitter of the network node. The step of determining the queue number of the periodic scheduling queue corresponding to the timeslot number based on the timeslot number, the scheduling offset, and the number of periodic scheduling queues of the outgoing interface includes: The first remainder result is obtained by taking the remainder of the sum of the timeslot number and the scheduling offset relative to the number of periodic scheduling queues of the outgoing interface. The first remainder result is determined as the queue number of the periodic scheduling queue corresponding to the time slot number.

2. The method according to claim 1, characterized in that, Determining the timeslot number corresponding to the arrival time of the data packet includes: Obtain the received timestamp of the data packet; Convert the received timestamp of the data packet into a number of time slots; Based on the number of time slots and the number of time slots in the time slot scheduling cycle mapping table, the target time slot number corresponding to the arrival time of the data packet is determined.

3. The method according to claim 1, characterized in that, The scheduling offset is determined in the following way: Based on the timestamp of the test message received in the input forwarding processing unit, determine the periodic scheduling queue of the output interface that the output interface processing unit is scheduling when the test message arrives at the output interface processing unit. Based on the periodic scheduling queue of the output interface being scheduled by the output interface processing unit, and the intra-node jitter of the network node, the optimal periodic scheduling queue for the test packet is determined. The scheduling offset is determined based on the optimal periodic scheduling queue, the number of periodic scheduling queues for the outgoing interface, and the timeslot number corresponding to the timestamp of the test message received in the input forwarding processing unit.

4. The method according to claim 3, characterized in that, The determination of the scheduling offset based on the optimal periodic scheduling queue, the number of periodic scheduling queues for the outgoing interface, and the timeslot number corresponding to the timestamp of the test packet received in the input forwarding processing unit includes: The second remainder result is obtained by taking the remainder between the timeslot number corresponding to the timestamp of the test message received in the input forwarding processing unit and the number of the periodic scheduling queue. The queue number of the optimal periodic scheduling queue is summed with the number of periodic scheduling queues at the output interface to obtain the summation result; The difference between the summation result and the second remainder result is taken modulo the number of periodic scheduling queues of the outgoing interface to obtain the third remainder result; The third remainder result is determined as the scheduling offset.

5. The method according to claim 1, characterized in that, After determining the target timeslot number corresponding to the arrival time of the data packet, the method further includes: Based on the target timeslot number, query the timeslot update table of the service flow to which the data packet belongs to obtain the updated timeslot number; The step of querying the time slot scheduling cycle mapping table of the outgoing interface of the data packet based on the target time slot number to determine the target period scheduling queue corresponding to the time slot where the data packet arrives includes: Based on the updated timeslot number, the timeslot scheduling cycle mapping table of the outgoing interface of the data packet is queried to determine the target cycle scheduling queue corresponding to the timeslot where the data packet arrives.

6. The method according to claim 1, characterized in that, The forwarding process of deterministic flow packets within the CSQF domain edge node includes: The process includes input, distribution, exchange, mapping, periodic scheduling, and output; among which: The input process is used for input timestamp anchoring; The distribution process is used for cache distribution; The switching process is used to perform intra-node forwarding related processing; The mapping process is used to map deterministic streaming data packets to a periodic scheduling queue according to the period. The periodic scheduling process is used to schedule the periodic scheduling queue according to the scheduling period, and send the data in the sending periodic queue to the configured reserved highest priority hardware queue. The output process is used for hardware transmission processing.

7. The method according to claim 6, characterized in that, The intra-node jitter of the network node includes the processing delay jitter of the switching process.

8. An electronic device, characterized in that, The electronic device includes: a processor and a machine-readable storage medium; The machine-readable storage medium stores machine-executable instructions that can be executed by the processor; The processor is configured to execute machine-executable instructions to implement the method of any one of claims 1-7.

9. A non-transitory machine-readable storage medium, characterized in that, The non-transitory machine-readable storage medium stores instructions that cause a processor to implement the method of any one of claims 1-7.

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