Node system control method, device and equipment of heterogeneous computing platform, and medium

Abstract

The application discloses a node system control method and device of a heterogeneous computing platform, equipment and a medium, and relates to the technical field of heterogeneous computing. The method is applied to a mainboard management controller and comprises the following steps: obtaining a target heterogeneous computing node and a current program of a system on a chip of the target heterogeneous computing node; in the process of controlling the heterogeneous computing platform to restart, controlling the target heterogeneous computing node to be powered on and controlling a host computing node to be powered on; and using a flashing program package in the host computing node to update the current program to a target program. It can be seen that the method uses the mainboard management controller to realize node system control of the heterogeneous computing platform. Since the mainboard management controller is a general configuration of the heterogeneous computing platform, the application realizes independent control of the node system based on the heterogeneous computing platform itself, so that even if there is no host computer outside the system independent of the host computing node and the heterogeneous computing node, the control of the node system can be realized, and the application range is wider.

Description

Technical Field

[0001] This application relates to the field of heterogeneous computing technology, and in particular to a node system control method, apparatus, device and medium for a heterogeneous computing platform. Background Technology

[0002] In a heterogeneous computing platform, the heterogeneous computing node on-chip system running the operating system and application software can be flexibly configured and tailored according to the application scenario to achieve optimal configuration. Correspondingly, the heterogeneous computing node on-chip system needs to update its operating system and software packages, i.e., flash the firmware.

[0003] Currently, the relevant flashing technology involves using a host computer, independent of the system comprised of the host computing node and the heterogeneous computing node on-chip system, to flash the heterogeneous computing node on-chip system. Because it relies on a host computer, flashing the heterogeneous computing node on-chip system is impossible without one.

[0004] Therefore, in the absence of a host computer, realizing the updating of the on-chip system of heterogeneous computing nodes on a heterogeneous computing platform is a technical problem that urgently needs to be solved by those in the field. Summary of the Invention

[0005] The purpose of this application is to provide a node system control method, apparatus, device and medium for a heterogeneous computing platform, which can be used to update the on-chip system of the heterogeneous computing node of the heterogeneous computing platform in the absence of a host computer.

[0006] To address the aforementioned technical problems, this application provides a node system control method for a heterogeneous computing platform, applied to a motherboard management controller, the method comprising:

[0007] Obtain the target heterogeneous computing node and the current program of the target heterogeneous computing node's on-chip system;

[0008] During the process of restarting the heterogeneous computing platform, the target heterogeneous computing node is powered on and the host computing node is powered on.

[0009] The current program is updated to the target program using a flashing program package in the host computing node; wherein, the target program is the program corresponding to the target heterogeneous computing node on-chip system in the flashing program package.

[0010] Preferably, before powering on the target heterogeneous computing node and the host computing node, the method further includes:

[0011] The constraint pin of the target heterogeneous computing node is controlled to be low so that the target heterogeneous computing node is a peripheral configuration that does not conform to the high-speed serial computer expansion bus standard.

[0012] Preferably, before powering on the target heterogeneous computing node and the host computing node, the method further includes:

[0013] The motherboard power controller controls the constraint pin of the target heterogeneous computing node to a low level so that the target heterogeneous computing node is configured as a peripheral that does not conform to the high-speed serial computer expansion bus standard.

[0014] Preferably, the node system of the heterogeneous computing platform further includes: a channel selection router, and after controlling the power-on of the target heterogeneous computing node and the power-on of the host computing node, and before updating the current program to the target program using the flashing program package in the host computing node, the system further includes:

[0015] The channel selection router establishes a signal channel between the host computing node and the heterogeneous computing node.

[0016] Determine the target signal channel between the host computing node and the target heterogeneous computing node from the signal channel;

[0017] Correspondingly, updating the current program to the target program using the flashing package in the host computing node includes:

[0018] The flashing package in the host computing node is transmitted to the target heterogeneous computing node through the target signal channel;

[0019] The current program is updated to the target program using the flashing program package.

[0020] Preferably, before updating the current program to the target program using the flashing package in the host computing node, the method further includes:

[0021] Determine whether the flashing package exists on the host computing node;

[0022] If so, proceed to the step of updating the current program to the target program using the flashing program package in the host computing node;

[0023] If not, the flashing package is transmitted to the host computing node via the network, and the process proceeds to the step of updating the current program to the target program using the flashing package in the host computing node.

[0024] Preferably, transmitting the flashing package to the host computing node via the network includes:

[0025] The flashing package is transmitted to the host computing node via the network interface of the motherboard management controller and / or the network interface of the host computing node.

[0026] Preferably, after updating the current program to the target program using the flashing package in the host computing node, the method further includes:

[0027] Determine whether the target heterogeneous computing node exists;

[0028] If so, return to the step of obtaining the current program for the target heterogeneous computing node and the target heterogeneous computing node on-chip system;

[0029] If not, then control the heterogeneous computing platform to start.

[0030] To address the aforementioned technical issues, this application also provides a control device for a node system of a heterogeneous computing platform, including a motherboard management controller, a motherboard power controller, a host computing node, and a heterogeneous computing node, and further including: a channel selection router;

[0031] The channel selection router is used to establish a signal channel between the host computing node and the heterogeneous computing node;

[0032] The channel selection router is connected to the motherboard management controller;

[0033] The motherboard management controller is used to obtain the current program of the target heterogeneous computing node and the system-on-a-chip of the target heterogeneous computing node; during the process of controlling the restart of the heterogeneous computing platform, it controls or controls the power-on of the target heterogeneous computing node through the motherboard power controller, and controls or controls the power-on of the host computing node through the motherboard power controller; it determines the target signal channel between the host computing node and the target heterogeneous computing node from the signal channels; it transmits the flashing program package in the host computing node to the target heterogeneous computing node through the target signal channel; and it uses the flashing program package to update the current program to the target program.

[0034] Preferably, it further includes: a remote computer;

[0035] The remote computer is connected to the motherboard management controller via a network interface and is used to control the heterogeneous computing platform.

[0036] To address the aforementioned technical problems, this application also provides a node system control device for a heterogeneous computing platform, applied to a motherboard management controller, the device comprising:

[0037] The acquisition module is used to acquire the target heterogeneous computing node and the current program of the target heterogeneous computing node's on-chip system;

[0038] The control module is used to control the power-on of the target heterogeneous computing node and the host computing node during the process of controlling the restart of the heterogeneous computing platform.

[0039] An update module is used to update the current program to a target program using a flashing program package in the host computing node; wherein the target program is the program corresponding to the target heterogeneous computing node on-chip system in the flashing program package.

[0040] To address the aforementioned technical problems, this application also provides a node system control device for a heterogeneous computing platform, comprising:

[0041] Memory, used to store computer programs;

[0042] The processor is used to implement the steps of the above-described node system control method for a heterogeneous computing platform when executing the computer program.

[0043] To address the aforementioned technical problems, this application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the node system control method for the heterogeneous computing platform described above.

[0044] The node system control method for a heterogeneous computing platform provided in this application is applied to a motherboard management controller. The method includes: acquiring the target heterogeneous computing node and the current program of the target heterogeneous computing node's on-chip system; controlling the power-on of both the target heterogeneous computing node and the host computing node during the heterogeneous computing platform restart process; and updating the current program to the target program using a flashing package in the host computing node. The target program is the program corresponding to the target heterogeneous computing node's on-chip system in the flashing package. It is evident that this method utilizes the motherboard management controller to achieve node system control of the heterogeneous computing platform. Since the motherboard management controller is a common configuration for heterogeneous computing platforms, this application enables independent node system control based on the heterogeneous computing platform itself. This allows for node system control even without a host computer outside the system of the host and heterogeneous computing nodes, thus broadening its applicability.

[0045] In addition, this application also provides a node system control device for a heterogeneous computing platform, a computer-readable storage medium, and a node system control equipment for a heterogeneous computing platform, which have the same or corresponding technical features as the node system control method for the heterogeneous computing platform mentioned above, and have the same effect. Attached Figure Description

[0046] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 This application provides a typical system architecture diagram of a heterogeneous computing platform consisting of an x86 CPU and a heterogeneous computing node on-chip system.

[0048] Figure 2 A flowchart illustrating a node system control method for a heterogeneous computing platform applied to a motherboard management controller, provided in an embodiment of this application;

[0049] Figure 3 An architecture diagram of a control device for a node system of a heterogeneous computing platform provided in this application embodiment;

[0050] Figure 4 A structural diagram of a node system control device for a heterogeneous computing platform provided in an embodiment of this application;

[0051] Figure 5 A structural diagram of a node system control device for a heterogeneous computing platform provided in another embodiment of this application;

[0052] Figure 6 This application provides a flowchart of a heterogeneous computing platform configuration update process for heterogeneous computing nodes. Detailed Implementation

[0053] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0054] The core of this application is to provide a node system control method, device, equipment and medium for a heterogeneous computing platform, which can be used to update the on-chip system of the heterogeneous computing node of the heterogeneous computing platform in the absence of a host computer.

[0055] Heterogeneous computing platforms are a novel computing technology that integrates various computing resources (such as Central Processing Units (CPUs), Graphics Processing Units (GPUs), Field-Programmable Gate Arrays (FPGAs), and Application-Specific Integrated Circuits (ASICs)) to fully utilize these diverse resources for high-performance and efficient applications. Heterogeneous computing platforms can accelerate application execution and reduce energy consumption. The heterogeneous computing platform of this application is a System-on-Chip (SoC) that includes CPU resources, ARM CPU resources, and a neural network chip running artificial intelligence (AI) applications, enabling rapid deployment and intelligent applications. This heterogeneous computing platform supports deployment as a single computing node and also supports configuring its Peripheral Component Connect Express (PCIe) bus resources as a PCIe device. EP mode. Compared to compute nodes interconnected via Ethernet, systems that use a PCIe bus to interconnect host compute nodes (HOST) and heterogeneous compute nodes have lower data transmission latency, thus enabling multi-node compute platforms to achieve higher performance. Figure 1 This application provides a system architecture diagram of a typical heterogeneous computing platform composed of an x86 CPU and a heterogeneous computing node on-chip system, as illustrated in an embodiment of the present application. Figure 1 As shown, host computing node 1 is connected to multiple heterogeneous computing nodes 3 via PCIe switch 2 and the PCIe bus. (For...) Figure 1 The heterogeneous computing platform in this context uses AI computing nodes (heterogeneous computing nodes) as system-on-a-chip (SoCs). These nodes need to run their own software programs, including an operating system (OS). Unlike typical PCIe peripherals, the PCIe EP mode of heterogeneous computing nodes requires configuration after the operating system running on the node starts. During the platform's startup process, the heterogeneous computing nodes, acting as PCIe peripherals, need to complete configuration preparation before the host computing node initiates a PCIe device scan. Furthermore, under normal operating conditions, abnormal PCIe configurations of the heterogeneous computing nodes (PCIe EPs) can cause abnormal interruptions on the host computing node (CPU side), or even a host restart.

[0056] In a heterogeneous computing platform, the heterogeneous computing node on-chip system running the operating system and application software can be flexibly configured and tailored according to the application scenario to achieve optimal configuration. Correspondingly, the heterogeneous computing node on-chip system needs to update its operating system and software packages, i.e., flash the firmware.

[0057] Currently, relevant flashing techniques involve using a host computer, independent of the system comprised of the host computing nodes and the heterogeneous computing node on-chip systems, to flash the heterogeneous computing node on-chip systems. Because this relies on a host computer, flashing the heterogeneous computing node on-chip systems is impossible without one. Therefore, this application provides a node system control method for a heterogeneous computing platform, which allows for independent completion of the system configuration hardware architecture and software flashing process based on the heterogeneous computing platform.

[0058] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. Figure 2 A flowchart illustrating a node system control method for a heterogeneous computing platform applied to a motherboard management controller, as provided in this application embodiment, is shown below. Figure 2 As shown, the method includes:

[0059] S10: Obtain the current program of the target heterogeneous computing node and the on-chip system of the target heterogeneous computing node;

[0060] S11: During the process of controlling the restart of the heterogeneous computing platform, control the power-on of the target heterogeneous computing node and control the power-on of the host computing node;

[0061] S12: Update the current program to the target program using the flashing program package in the host computing node; where the target program is the program corresponding to the on-chip system of the target heterogeneous computing node in the flashing program package.

[0062] The target heterogeneous computing node is the heterogeneous computing node that needs to be flashed. There are no restrictions on the target heterogeneous computing node or its number; it is determined based on the actual situation. For example, in a heterogeneous computing platform, the host computing node is connected to heterogeneous computing node A, heterogeneous computing node B, and heterogeneous computing node C via a PCIe bus. In practice, when it is necessary to flash heterogeneous computing node A, then heterogeneous computing node A is the target heterogeneous computing node.

[0063] After identifying the target heterogeneous computing node, in order to flash the target computing node, the heterogeneous computing platform needs to have updated software programs. Typically, the updated software programs are pre-stored on the host computing node.

[0064] After identifying the target heterogeneous computing node and configuring the update program, the motherboard management controller restarts the heterogeneous computing platform to enter the flashing configuration state. During the restart process, it controls the power-on of both the target heterogeneous node and the host computing node. Based on the software program in the host, the flashing of the target heterogeneous computing node can then be performed.

[0065] The node system control method for a heterogeneous computing platform provided in this embodiment is applied to a motherboard management controller. The method includes: acquiring the target heterogeneous computing node and the current program of the target heterogeneous computing node's on-chip system; controlling the power-on of the target heterogeneous computing node and the host computing node during the process of controlling the heterogeneous computing platform restart; and updating the current program to the target program using a flashing package in the host computing node; wherein the target program is the program corresponding to the target heterogeneous computing node's on-chip system in the flashing package. It can be seen that this method utilizes the motherboard management controller to achieve node system control of the heterogeneous computing platform. Since the motherboard management controller is a common configuration for heterogeneous computing platforms, this embodiment achieves independent node system control based on the heterogeneous computing platform itself, enabling control of the node system even without a host computer outside the system of the host computing node and heterogeneous computing nodes, thus broadening its applicability.

[0066] Because, under normal operating conditions, heterogeneous computing nodes, acting as PCIe EPs, are susceptible to PCIe-related configuration errors that can cause abnormal interruptions of the host computing nodes, or even abnormal host startups. In practice, to minimize the risk of abnormal host computing node restarts, a preferred implementation includes, before powering on the target heterogeneous computing node and the host computing node, the following steps:

[0067] The constraint pin of the target heterogeneous computing node is set to a low level so that the target heterogeneous computing node is configured as a peripheral that does not conform to the high-speed serial computer expansion bus standard.

[0068] During the reboot process, the motherboard management controller controls the constraint pins of the heterogeneous compute node, adjusting the constraint pin level to low. After the target heterogeneous node and the host compute node are powered on, the target heterogeneous compute node enters the flashing state. Since the target heterogeneous compute node being flashed is not currently configured as a PCIe peripheral after the host compute node is powered on, the host starts normally and updates the target heterogeneous node's program according to the stored software program after startup.

[0069] This embodiment provides a method to adjust the level of the constraint pin of the target heterogeneous computing node to a low level before powering on the target heterogeneous computing node and the host computing node. This ensures that the host can start normally after the host computing node is powered on because the target heterogeneous computing node being flashed is not currently configured as a PCIe peripheral.

[0070] In the above embodiments, the constraint pins of the target heterogeneous computing node are controlled by the motherboard management controller to ensure the host starts up normally. In practice, to facilitate the control of the constraint pins of the target heterogeneous computing node, a preferred embodiment includes the following steps before controlling the power-on of the target heterogeneous computing node and the host computing node:

[0071] The motherboard power controller controls the constraint pin of the target heterogeneous computing node to a low level so that the target heterogeneous computing node is configured as a peripheral that does not conform to the high-speed serial computer expansion bus standard.

[0072] The motherboard power controller is a common configuration for heterogeneous computing platforms. It is typically implemented using a Complex Programmable Logic Device (CPLD) or an ASIC chip. When controlling the constraint pins of the target heterogeneous computing node through the motherboard power controller, only one pin of the motherboard power controller is needed.

[0073] The method provided in this embodiment for controlling the constraint pins of the target heterogeneous computing node through the motherboard power controller is easy to implement.

[0074] In practice, there may be multiple target heterogeneous computing nodes. For heterogeneous computing platforms composed of heterogeneous computing nodes that require an operating system and form a bus topology conforming to the high-speed serial computer extended bus standard, software system updates for these heterogeneous computing nodes require an independent configuration (flashing) environment (hardware host and its software). Specifically, when using a host computer independent of the system composed of the host computing node and the heterogeneous computing nodes to flash the target heterogeneous computing node, the host computing node can generally only connect to one target heterogeneous computing node during the flashing process. Especially in a computing platform containing multiple target heterogeneous computing nodes, manual selection of the hardware configuration channel and configuration program for the target device is required. Therefore, it is not suitable for batch product flashing and updates. In addition, heterogeneous computing platforms containing heterogeneous computing nodes are often deployed in batches in some edge application scenarios, where on-site system update and maintenance efficiency is low and the engineering difficulty is high. Therefore, it is not suitable for remote flashing and updates under the condition that the system has already been deployed. To enable automatic updates, a preferred implementation includes, in this case, a node system of the heterogeneous computing platform: a channel selection router; after controlling the power-on of the target heterogeneous computing node and before updating the current program to the target program using the flashing package in the host computing node, the system further includes:

[0075] A signal channel is established between host computing nodes and heterogeneous computing nodes through a channel selection router;

[0076] Determine the target signal channel between the host computing node and the target heterogeneous computing node from the signal channel;

[0077] Correspondingly, updating the current program to the target program using the flashing package in the host computing node includes:

[0078] The flashing program package in the host computing node is transmitted to the target heterogeneous computing node through the target signal channel;

[0079] Use a flashing program package to update the current program to the target program.

[0080] The host compute node can access various heterogeneous compute nodes through a channel selection router, which supports configuration updates for each heterogeneous node. Specifically, for Jetson node configuration updates, the configuration update path for Jetson nodes is the Universal Serial Bus (USB), and the hub for this signal path is a USB hub.

[0081] In the method provided in this embodiment, a signal channel is automatically established between the host computing node and the target heterogeneous computing node through a channel selection router, so that the software program in the host computing node can be transmitted to the target heterogeneous computing node through the signal channel, thereby realizing the flashing of the target heterogeneous computing node.

[0082] During the process of flashing a target heterogeneous computing node using software programs on the host computing node, the host computing node needs to have updated software programs; otherwise, the flashing process cannot be completed. Therefore, to maximize the chances of successful flashing of the target heterogeneous computing node, a preferred implementation includes the following steps before updating the current program to the target program using the flashing package on the host computing node:

[0083] Determine if a flashing program package exists on the host compute node;

[0084] If so, proceed to the step of updating the current program to the target program using the flashing program package in the host computing node;

[0085] If not, the flashing package is transmitted to the host computing node via the network, and the process proceeds to update the current program to the target program using the flashing package on the host computing node.

[0086] Specifically, transmitting the flashing package to the host computing node via the network includes:

[0087] The flashing package is transmitted to the host computing node via the network interface of the motherboard management controller and / or the network interface of the host computing node.

[0088] The software package provided in this embodiment is pre-stored under the host computing node, or the software package is transmitted to the host computing node via the network (the network interface of the motherboard management controller, or the network interface of the host computing node), so that there is an updated software program in the host computing node, thus ensuring that the target heterogeneous computing node can be successfully flashed as much as possible.

[0089] In implementation, to ensure that all target heterogeneous computing nodes can be flashed as much as possible, a preferred implementation method includes, after updating the current program to the target program using the flashing package in the host computing node, the following steps are also included:

[0090] Determine if a target heterogeneous computing node exists;

[0091] If so, return to the steps for obtaining the target heterogeneous computing node and the current program of the target heterogeneous computing node's on-chip system;

[0092] If not, then control the startup of the heterogeneous computing platform.

[0093] The presence of a target heterogeneous computing node can be determined by the user's decision on whether to flash the firmware, or by detecting the pin status. If the pin level is low, the system enters the flashing state.

[0094] In the method provided in this embodiment, if a target heterogeneous computing node exists, the target heterogeneous computing node is flashed; if no target heterogeneous computing node exists, the heterogeneous computing platform is started, which can ensure that the target heterogeneous computing node can be flashed as much as possible.

[0095] The above describes a control method for a node system of a heterogeneous computing platform. This embodiment also provides a control device for a node system of a heterogeneous computing platform. Figure 3 An architecture diagram of a control device for a node system of a heterogeneous computing platform provided in this application embodiment is shown below. Figure 3 As shown, the device includes a motherboard management controller 4, a motherboard power controller 5, a host computing node 1, a heterogeneous computing node 3, and also includes a channel selection router 6.

[0096] Channel selection router 6 is used to establish a signal channel between host computing node 1 and heterogeneous computing node 3;

[0097] Channel selection router 6 is connected to motherboard management controller 4;

[0098] The motherboard management controller 4 is used to obtain the target heterogeneous computing node and the current program of the target heterogeneous computing node's on-chip system; during the process of controlling the heterogeneous computing platform to restart, it controls or controls the target heterogeneous computing node to power on via the motherboard power controller 5, and controls or controls the host computing node 1 to power on via the motherboard power controller 5; it determines the target signal channel between the host computing node 1 and the target heterogeneous computing node from the signal channels; it transmits the flashing program package in the host computing node 1 to the target heterogeneous computing node through the target signal channel; and it uses the flashing program package to update the current program to the target program.

[0099] In practice, the control devices for the node systems of heterogeneous computing platforms also include: remote computers;

[0100] The remote computer connects to the motherboard management controller via a network interface to control the heterogeneous computing platform.

[0101] The control equipment of the node system of the heterogeneous computing platform provided in this embodiment has the hardware conditions for independently configuring heterogeneous computing nodes, mainly including the following three aspects:

[0102] (1) A motherboard management controller, which is called a Board Management Controller (BMC) in general-purpose servers or industrial control computers, can also be performed by a microcontroller (MCU) in embedded computers. This controller includes a network interface for external communication, through which a remote computer can access the motherboard management controller and further control the heterogeneous computing platform.

[0103] (2) The heterogeneous computing platform includes a motherboard power controller, which is generally implemented by a CPLD or ASIC chip. The motherboard management controller can control the power supply of the computing nodes on the heterogeneous computing platform through the power controller. In addition, the CPLD or motherboard management controller can control the constraint pins of the heterogeneous computing nodes, and control the heterogeneous computing nodes to enter the flashing state or the normal startup state.

[0104] (3) The host computing node can access each heterogeneous computing node through the channel selection router, which supports configuration updates for each heterogeneous node.

[0105] The control device for the node system of the heterogeneous computing platform provided in this embodiment has the same or corresponding technical features as the control method for the node system of the heterogeneous computing platform described above. The embodiments of the control method for the node system of the heterogeneous computing platform have been described in detail above, and the embodiments of the control device for the node system of the heterogeneous computing platform will not be repeated here. It has the same beneficial effects as the control method for the node system of the heterogeneous computing platform mentioned above.

[0106] The above embodiments have described in detail the node system control method for heterogeneous computing platforms, and this application also provides corresponding embodiments. It should be noted that this application describes the embodiments of the device portion from two perspectives: one based on functional modules, and the other based on hardware.

[0107] Figure 4 A structural diagram of a node system control device for a heterogeneous computing platform provided in one embodiment of this application. This embodiment, based on functional modules, includes:

[0108] The acquisition module 10 is used to acquire the target heterogeneous computing node and the current program of the target heterogeneous computing node's on-chip system;

[0109] Control module 11 is used to control the power-on of the target heterogeneous computing node and the host computing node during the process of controlling the restart of the heterogeneous computing platform.

[0110] The update module 12 is used to update the current program to the target program using the flashing program package in the host computing node; wherein, the target program is the program corresponding to the on-chip system of the target heterogeneous computing node in the flashing program package.

[0111] Since the embodiments of the apparatus and the method correspond to each other, please refer to the description of the embodiments in the method section for the apparatus embodiments, which will not be repeated here. Furthermore, it has the same beneficial effects as the node system control method for heterogeneous computing platforms mentioned above.

[0112] In addition, the node system control device of the heterogeneous computing platform also includes:

[0113] The first control module is used to control the constraint pin of the target heterogeneous computing node to be at a low level so that the target heterogeneous computing node is configured as a peripheral that does not conform to the high-speed serial computer expansion bus standard.

[0114] The node system control unit of the heterogeneous computing platform also includes:

[0115] The second control module is used to control the constraint pin of the target heterogeneous computing node to a low level through the motherboard power controller, so that the target heterogeneous computing node is configured as a peripheral that does not conform to the high-speed serial computer expansion bus standard.

[0116] The node system control unit of the heterogeneous computing platform also includes:

[0117] Establishment module, used to establish a signal channel between host computing nodes and heterogeneous computing nodes through channel selection router;

[0118] The determination module is used to determine the target signal channel between the host computing node and the target heterogeneous computing node from the signal channel;

[0119] The update module is specifically used to transmit the flashing program package in the host computing node to the target heterogeneous computing node through the target signal channel; and to update the current program to the target program using the flashing program package.

[0120] The node system control unit of the heterogeneous computing platform also includes:

[0121] The first judgment module is used to determine whether a flashing program package exists on the host computing node;

[0122] If so, then trigger the update module;

[0123] If not, the transmission module is triggered to transmit the flashing package to the host computing node via the network, and then the update module is triggered.

[0124] The transmission module is specifically used to transmit the flashing program package to the host computing node through the network interface of the motherboard management controller and / or the network interface of the host computing node.

[0125] The node system control unit of the heterogeneous computing platform also includes:

[0126] The second judgment module is used to determine whether a target heterogeneous computing node exists;

[0127] If so, the acquisition module will be triggered;

[0128] If not, then control the third control module, which is used to control the startup of the heterogeneous computing platform.

[0129] Figure 5 This is a structural diagram of a node system control device for a heterogeneous computing platform provided in another embodiment of this application. This embodiment is based on a hardware perspective, such as... Figure 5 As shown, the node system control device of the heterogeneous computing platform includes:

[0130] Memory 20 is used to store computer programs;

[0131] The processor 21 is used to implement the steps of the node system control method for the heterogeneous computing platform as mentioned in the above embodiments when executing a computer program.

[0132] The processor 21 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 21 may be implemented using at least one hardware form selected from Digital Signal Processors (DSPs), FPGAs, and Programmable Logic Arrays (PLAs). The processor 21 may also include a main processor and a coprocessor. The main processor, also known as a CPU, is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may integrate a GPU, which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 21 may also include an Artificial Intelligence (AI) processor, which handles computational operations related to machine learning.

[0133] The memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 20 is used to store at least the following computer program 201, which, after being loaded and executed by the processor 21, is capable of implementing the relevant steps of the node system control method for the heterogeneous computing platform disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, and the storage method may be temporary or permanent storage. The operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include, but is not limited to, the data involved in the node system control method for the heterogeneous computing platform mentioned above.

[0134] In some embodiments, the node system control device of the heterogeneous computing platform may further include a display screen 22, an input / output interface 23, a communication interface 24, a power supply 25, and a communication bus 26.

[0135] Those skilled in the art will understand that Figure 5 The structure shown does not constitute a limitation on the node system control device of a heterogeneous computing platform, and may include more or fewer components than shown.

[0136] The node system control device for a heterogeneous computing platform provided in this application includes a memory and a processor. When the processor executes the program stored in the memory, it can implement the following method: a node system control method for a heterogeneous computing platform, with the same effect as above.

[0137] This application also provides an embodiment corresponding to a computer-readable storage medium. The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps described in the above method embodiments.

[0138] It is understood that if the methods in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0139] The computer-readable storage medium provided in this application includes the node system control method for the heterogeneous computing platform mentioned above, and has the same effect.

[0140] To enable those skilled in the art to better understand the present application, the following description is provided in conjunction with the appendix. Figure 6 The present application will be further described in detail with reference to specific embodiments. Figure 6 This application provides a flowchart for configuring and updating heterogeneous computing nodes on a heterogeneous computing platform, as illustrated in an embodiment. Figure 6 As shown, the method includes:

[0141] S13: Input the target heterogeneous computing node for the update;

[0142] S14: Determine whether to proceed to the heterogeneous computing node flashing process; if yes, proceed to step S15; if no, proceed to step S18.

[0143] S15: Control the heterogeneous computing platform to restart;

[0144] S16: Control the hardware constraints of the target heterogeneous computing node, connect the flashing channel, and control the power-on of the target heterogeneous computing node;

[0145] S17: Power on the host computing node and update the program on the target heterogeneous computing node.

[0146] S18: Controls the startup and reset of heterogeneous nodes;

[0147] S19: Controls the host computing node to power on and start up, so that the host computing node can scan for devices that conform to the high-speed serial computer expansion bus standard;

[0148] S20: Confirm that the platform has started successfully.

[0149] The configuration update of heterogeneous computing nodes in this heterogeneous computing platform mainly includes the following steps:

[0150] (1) The heterogeneous computing platform needs to have updated software programs. These can be software packages that are pre-stored on the host computing node or software packages that are transmitted to the host computing node via the network (the network interface of the motherboard management controller or the network interface of the host computing node).

[0151] (2) Determine the target node and configuration update program that need to be updated by accessing the motherboard management controller.

[0152] (3) The motherboard management controller restarts the heterogeneous computing platform to enter the flashing configuration state. During the restart process, after the motherboard management controller or motherboard power controller controls the constraint pins of the target heterogeneous computing node, the target heterogeneous computing node powers on and starts up, and the target node enters the flashing state and connects to the refresh signal path. At this time, the host computing node powers on and starts up. Because the node being flashed is not currently configured to conform to the high-speed serial computer expansion bus standard peripheral configuration, the host computing node starts up normally and updates the target heterogeneous node with the flashing program package through the configuration path after startup.

[0153] (4) After the target node is updated, the motherboard management controller initiates the normal startup process of the heterogeneous computing platform.

[0154] As can be seen, the heterogeneous computing platform provided in this application includes heterogeneous computing nodes running operating systems and application software, and the platform's own host computing nodes can update the heterogeneous computing node system. It also solves the problem of abnormal host restarts during peripheral configuration changes conforming to the high-speed serial computer expansion bus standard.

[0155] The node system control method, apparatus, device, and medium of the heterogeneous computing platform provided in this application have been described in detail above. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

[0156] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A node system control method for a heterogeneous computing platform, characterized in that, Applied to a motherboard management controller, the method includes: Obtain the target heterogeneous computing node and the current program of the target heterogeneous computing node's on-chip system; During the process of restarting the heterogeneous computing platform, the target heterogeneous computing node is powered on and the host computing node is powered on. The current program is updated to the target program using a flashing program package in the host computing node; wherein, the target program is the program corresponding to the on-chip system of the target heterogeneous computing node in the flashing program package; Before powering on the target heterogeneous computing node and the host computing node, the method further includes: The constraint pin of the target heterogeneous computing node is controlled to be low so that the target heterogeneous computing node is a peripheral configuration that does not conform to the high-speed serial computer expansion bus standard.

2. The control method for the node system of the heterogeneous computing platform according to claim 1, characterized in that, Before powering on the target heterogeneous computing node and the host computing node, the method further includes: The motherboard power controller controls the constraint pin of the target heterogeneous computing node to a low level so that the target heterogeneous computing node is configured as a peripheral that does not conform to the high-speed serial computer expansion bus standard.

3. The control method for the node system of a heterogeneous computing platform according to claim 1 or 2, characterized in that, The node system of the heterogeneous computing platform further includes: a channel selection router, and after the control of powering on the target heterogeneous computing node and the control of powering on the host computing node, and before updating the current program to the target program using the flashing program package in the host computing node, it further includes: The channel selection router establishes a signal channel between the host computing node and the heterogeneous computing node. Determine the target signal channel between the host computing node and the target heterogeneous computing node from the signal channel; Correspondingly, updating the current program to the target program using the flashing package in the host computing node includes: The flashing package in the host computing node is transmitted to the target heterogeneous computing node through the target signal channel; The current program is updated to the target program using the flashing program package.

4. The control method for the node system of a heterogeneous computing platform according to claim 1, characterized in that, Before updating the current program to the target program using the flashing package in the host computing node, the method further includes: Determine whether the flashing package exists on the host computing node; If so, proceed to the step of updating the current program to the target program using the flashing program package in the host computing node; If not, the flashing package is transmitted to the host computing node via the network, and the process proceeds to the step of updating the current program to the target program using the flashing package in the host computing node.

5. The control method for the node system of a heterogeneous computing platform according to claim 4, characterized in that, The step of transmitting the flashing package to the host computing node via the network includes: The flashing package is transmitted to the host computing node via the network interface of the motherboard management controller and / or the network interface of the host computing node.

6. The control method for the node system of a heterogeneous computing platform according to claim 1, characterized in that, After updating the current program to the target program using the flashing package in the host computing node, the method further includes: Determine whether the target heterogeneous computing node exists; If so, return to the step of obtaining the current program for the target heterogeneous computing node and the target heterogeneous computing node on-chip system; If not, then control the heterogeneous computing platform to start.

7. A control device for a node system of a heterogeneous computing platform, comprising a motherboard management controller, a motherboard power controller, host computing nodes, and heterogeneous computing nodes, characterized in that, Also includes: Channel selection router; The channel selection router is used to establish a signal channel between the host computing node and the heterogeneous computing node; The channel selection router is connected to the motherboard management controller; The motherboard management controller is used to obtain the current program of the target heterogeneous computing node and the on-chip system of the target heterogeneous computing node; During the process of controlling the restart of the heterogeneous computing platform, the target heterogeneous computing node is powered on or controlled by the motherboard power controller, and the host computing node is powered on or controlled by the motherboard power controller; the target signal channel between the host computing node and the target heterogeneous computing node is determined from the signal channel; The flashing program package in the host computing node is transmitted to the target heterogeneous computing node through the target signal channel; The current program is updated to a target program using the flashing program package, wherein the target program is the program corresponding to the target heterogeneous computing node on-chip system in the flashing program package; before controlling the power-on of the target heterogeneous computing node and the power-on of the host computing node, the method further includes: controlling the constraint pin of the target heterogeneous computing node to a low level so that the target heterogeneous computing node is a peripheral configuration that does not conform to the high-speed serial computer extended bus standard.

8. The control device for the node system of the heterogeneous computing platform according to claim 7, characterized in that, Also includes: Remote computer; The remote computer is connected to the motherboard management controller via a network interface and is used to control the heterogeneous computing platform.

9. A node system control device for a heterogeneous computing platform, characterized in that, Applied to a motherboard management controller, the device includes: The acquisition module is used to acquire the target heterogeneous computing node and the current program of the target heterogeneous computing node's on-chip system; The control module is used to control the power-on of the target heterogeneous computing node and the host computing node during the process of controlling the restart of the heterogeneous computing platform. The update module is used to update the current program to the target program using the flashing program package in the host computing node; wherein the target program is the program corresponding to the target heterogeneous computing node on-chip system in the flashing program package; Also includes: The first control module is used to control the constraint pin of the target heterogeneous computing node to be at a low level so that the target heterogeneous computing node is configured as a peripheral that does not conform to the high-speed serial computer expansion bus standard.

10. A node system control device for a heterogeneous computing platform, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the node system control method for a heterogeneous computing platform as described in any one of claims 1 to 6 when executing the computer program.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the node system control method for a heterogeneous computing platform as described in any one of claims 1 to 6.

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