Wafer defect detection method and device, electronic equipment and storage medium

Abstract

The embodiment of the application provides a wafer defect detection method and device, electronic equipment and storage medium, and belongs to the field of semiconductors. The method comprises the following steps: acquiring a wafer sample image, performing image labeling on the wafer sample image to obtain image training data, training a pre-acquired neural network model based on the image training data to obtain a wafer defect detection model, acquiring a wafer to-be-detected image to be detected to obtain image to-be-detected data, inputting the image to-be-detected data into the wafer defect detection model for defect detection to obtain defect detection data, and judging whether the wafer to-be-detected image exists defects according to the defect detection data. The embodiment of the application can realize classification of wafer surface defects and foreign matters, improve the accuracy of the classification of wafer surface defects and foreign matters, and thus reduce the workload of artificial rechecking.

Description

Technical Field

[0001] This invention relates to the field of semiconductors, and more specifically to a method and apparatus for detecting wafer defects, an electronic device, and a storage medium. Background Technology

[0002] Currently, in the semiconductor field, automated inspection equipment is still unable to classify wafer defects. This is because the images acquired by automated inspection equipment are usually grayscale images, lacking color component information and identification features. Furthermore, even if feature information is present, traditional comparison methods cannot achieve feature recognition, still requiring manual re-inspection and classification by visual inspection. This is labor-intensive, and manual re-inspection is highly subjective, making it impossible to set unified standards and quantifiable inspection indicators. Therefore, how to classify wafer surface defects and foreign objects, and improve the accuracy of wafer surface defect and foreign object classification, thereby reducing the workload of manual re-inspection, has become an urgent technical problem to be solved. Summary of the Invention

[0003] The main objective of this application is to provide a method, apparatus, electronic device, and storage medium for detecting wafer defects, aiming to classify wafer surface defects and foreign matter, improve the accuracy of wafer surface defect and foreign matter classification, and thereby reduce the workload of manual re-inspection.

[0004] To achieve the above objectives, a first aspect of this application provides a method for detecting wafer defects, the method comprising:

[0005] Acquire a wafer sample image, wherein the wafer sample image is a color image;

[0006] Image annotation is performed on the wafer sample image to obtain image training data, wherein the image training data includes the wafer sample image and image labels;

[0007] The pre-acquired neural network model is trained based on the image training data to obtain a wafer defect detection model, wherein the neural network model is constructed according to a preset target detection network and attention mechanism;

[0008] Acquire the image of the wafer to be inspected to obtain the image inspection data;

[0009] The image to be detected is input into the wafer defect detection model for defect detection to obtain defect detection data. Based on the defect detection data, it is determined whether the wafer image to be detected has defects.

[0010] In some embodiments, the step of annotating the wafer sample image to obtain image training data includes:

[0011] The wafer sample image is labeled using a preset annotation tool to obtain the image label, wherein the image label includes the defect type and defect location information of the wafer sample image;

[0012] The image training data is obtained based on the wafer sample image and the image label.

[0013] In some embodiments, before training a pre-acquired neural network model based on the image training data to obtain a wafer defect detection model, the detection method further includes:

[0014] Perform color space transformation on the wafer sample images in the image training data;

[0015] Before inputting the image data to be detected into the wafer defect detection model for defect detection to obtain defect detection data, the detection method further includes:

[0016] The color space transformation is performed on the wafer image to be detected in the image detection data.

[0017] In some embodiments, training a pre-acquired neural network model based on the image training data to obtain a wafer defect detection model includes:

[0018] Based on the neural network model, defect detection is performed on the image training data to obtain sample detection data;

[0019] The neural network model is subjected to loss calculation based on the preset loss function, the sample detection data, and the image labels to obtain model loss data, wherein the loss function is the GIOU function;

[0020] The parameters of the neural network model are updated based on the model loss data to train the neural network model and obtain the wafer defect detection model.

[0021] In some embodiments, determining whether the wafer image to be inspected has defects based on the defect detection data includes:

[0022] If the image label corresponding to the wafer image to be inspected in the defect detection data is not empty, then the wafer image to be inspected has a defect;

[0023] If the image label corresponding to the wafer image to be inspected in the defect detection data is empty, then the wafer image to be inspected does not have defects.

[0024] In some embodiments, determining whether the wafer image to be inspected has defects based on the defect detection data includes:

[0025] If the image label corresponding to the wafer image to be inspected in the defect detection data is not empty, then the confidence level of each first defect in the wafer image to be inspected is extracted from the defect detection data. If the confidence level of all first defects is lower than a preset first threshold, then the wafer image to be inspected does not have a defect; if the confidence level of at least one first defect is not lower than the first threshold, then the wafer image to be inspected has a defect.

[0026] If the image label corresponding to the wafer image to be inspected in the defect detection data is empty, then the wafer image to be inspected does not have defects.

[0027] In some embodiments, determining whether the wafer image to be inspected has defects based on the defect detection data includes:

[0028] If the image label corresponding to the wafer image to be inspected in the defect detection data is not empty, then the confidence level and location information of each first defect in the wafer image to be inspected are extracted from the defect detection data, and second defects are selected from the first defects according to the location information and a second threshold; if the confidence level of all second defects is lower than the preset first threshold, then the wafer image to be inspected has no defects; if the confidence level of at least one second defect is not lower than the first threshold, then the wafer image to be inspected has defects.

[0029] If the image label corresponding to the wafer image to be inspected in the defect detection data is empty, then the wafer image to be inspected does not have defects.

[0030] To achieve the above objectives, a second aspect of this application provides a wafer defect detection device, the device comprising:

[0031] A sample image acquisition module is used to acquire wafer sample images, wherein the wafer sample images are color images;

[0032] An image annotation module is used to annotate the wafer sample image to obtain image training data, wherein the image training data includes the wafer sample image and image labels;

[0033] The training module is used to train a pre-acquired neural network model based on the image training data to obtain a wafer defect detection model, wherein the neural network model is constructed based on a preset target detection network and attention mechanism;

[0034] The target image acquisition module is used to acquire the image of the wafer to be inspected, and obtain the image inspection data;

[0035] The defect detection module is used to input the image to be detected into the wafer defect detection model to perform defect detection, obtain defect detection data, and determine whether there are defects in the wafer image to be detected based on the defect detection data.

[0036] Optionally, the wafer defect detection device further includes:

[0037] The data augmentation module is specifically used for:

[0038] Perform color space transformation on the wafer sample images in the image training data;

[0039] Perform color space transformation on the wafer image to be detected in the image detection data;

[0040] To achieve the above objectives, a third aspect of this application provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the method described in the first aspect.

[0041] To achieve the above objectives, a fourth aspect of the present application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in the first aspect.

[0042] The wafer defect detection method, apparatus, electronic device, and storage medium proposed in this application use wafer images containing color information as input data to train a target detection network with an attention mechanism as a wafer defect detection model. This enables the classification of wafer surface defects and foreign objects, improves the accuracy of wafer surface defect and foreign object classification, and reduces the workload of manual re-inspection.

[0043] Other features and advantages of this application will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing this disclosure. The objectives and other advantages of this application may be realized and obtained by means of the structures particularly pointed out in the description, claims and drawings. Attached Figure Description

[0044] Figure 1 This is a flowchart of a wafer defect detection method according to an embodiment of this application;

[0045] Figure 2 This is a specific form of an image label provided in one embodiment of this application;

[0046] Figure 3 This is a structural diagram of an object detection network according to an embodiment provided in this application;

[0047] Figure 4 This is a structural diagram of the backbone component of an object detection network according to an embodiment of this application;

[0048] Figure 5 This is a structural diagram of an attention mechanism provided in one embodiment of this application;

[0049] Figure 6 yes Figure 1 A flowchart of step 150 in the process;

[0050] Figure 7 yes Figure 1 Another flowchart for step 150 in the process;

[0051] Figure 8 yes Figure 1 Another flowchart for step 150 in the process;

[0052] Figure 9 This is a flowchart of a wafer defect detection method according to another embodiment of this application;

[0053] Figure 10 This is a schematic diagram of the structure of a wafer defect detection device according to an embodiment of this application;

[0054] Figure 11 This is a schematic diagram of the hardware structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0056] It should be noted that although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first," "second," etc., in the specification, claims, and the aforementioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0057] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0058] First, let's analyze some of the terms used in this application:

[0059] Wafer: A wafer is a silicon wafer used to fabricate silicon semiconductor circuits. Its raw material is silicon. High-purity polycrystalline silicon is dissolved and doped with silicon crystal seeds, then slowly pulled out to form a cylindrical single-crystal silicon ingot. After grinding, polishing, and slicing, the silicon crystal ingot is formed into a silicon wafer, or wafer.

[0060] Wafer defects: There are many types of defects on the wafer surface, which may be caused by the manufacturing process or by defects inherent in the material itself. Different defect detection methods may lead to different classifications of defects. Considering the physical properties of defects and the specificity of subsequent defect detection algorithms, defects can be simply classified into surface redundancies (particles, contaminants, etc.), crystal defects (slip line defects, stacking faults), scratches, and pattern defects (for patterned wafers).

[0061] Currently, in the semiconductor field, automated inspection equipment is still unable to classify wafer defects. This is because the images acquired by automated inspection equipment are usually grayscale images, lacking color component information and identification features. Furthermore, even if feature information is present, traditional comparison methods cannot achieve feature recognition, still requiring manual re-inspection and classification by visual inspection. This is labor-intensive, and manual re-inspection is highly subjective, making it impossible to set unified standards and quantifiable inspection indicators. Therefore, how to classify wafer surface defects and foreign objects, and improve the accuracy of wafer surface defect and foreign object classification, thereby reducing the workload of manual re-inspection, has become an urgent technical problem to be solved.

[0062] Based on this, embodiments of this application provide a method and apparatus for detecting wafer defects, an electronic device and a storage medium, which aim to classify wafer surface defects and foreign objects and improve the accuracy of wafer surface defects and foreign objects classification, thereby reducing the workload of manual re-inspection.

[0063] The wafer defect detection method, apparatus, electronic device, and storage medium provided in this application are specifically described through the following embodiments. First, the wafer defect detection method in this application is described.

[0064] The wafer defect detection method provided in this application relates to the semiconductor field. This wafer defect detection method can be applied to a terminal, a server, or software running on either a terminal or a server. In some embodiments, the terminal can be a smartphone, tablet, laptop, desktop computer, etc.; the server can be configured as an independent physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN, and big data and artificial intelligence platforms; the software can be an application implementing the wafer defect detection method, but is not limited to the above forms.

[0065] This application can be used in a wide variety of general-purpose or special-purpose computer system environments or configurations. Examples include: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, and distributed computing environments including any of the above systems or devices. This application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform specific tasks or implement specific abstract data types. This application can also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0066] It should be noted that in all specific embodiments of this application, when processing data related to user identity or characteristics, such as user information, user behavior data, user historical data, and user location information, user permission or consent is obtained first. Furthermore, the collection, use, and processing of this data comply with relevant laws, regulations, and standards of the relevant countries and regions. In addition, when embodiments of this application require access to sensitive personal information of users, separate permission or consent from the user is obtained through pop-ups or redirects to confirmation pages. Only after obtaining the user's separate permission or consent is the necessary user-related data for the proper functioning of the embodiments of this application obtained.

[0067] Figure 1 This is a flowchart of a wafer defect detection method according to an embodiment of this application. Figure 1 The method may include, but is not limited to, steps 110 to 150.

[0068] Step 110: Obtain wafer sample image;

[0069] Step 120: Image annotation is performed on the wafer sample image to obtain image training data;

[0070] Step 130: Train the pre-acquired neural network model based on the image training data to obtain the wafer defect detection model;

[0071] Step 140: Obtain the image of the wafer to be inspected, and obtain the image inspection data;

[0072] Step 150: Input the image data to be detected into the wafer defect detection model to perform defect detection, obtain defect detection data, and determine whether there are defects in the wafer image to be detected based on the defect detection data.

[0073] In step 110, the wafer sample image is a color image.

[0074] In step 110 of some embodiments, the wafer sample image is acquired using a color oblique illumination microscope. The color information in the wafer sample image can be used to enhance the feature information of defects. The resolution of the wafer sample image acquired by the color oblique illumination microscope is twice that of ordinary illumination, which is beneficial for subsequent defect detection. Wafer sample images can also be acquired by other methods, and are not limited to these.

[0075] In step 120, the image training data includes wafer sample images and image labels. See also... Figure 2 , Figure 2 This is a specific form of image labeling provided in one embodiment of this application. In some embodiments, wafer sample images are labeled using a preset annotation tool to obtain image labels. The image labels include defect type and defect location information of the wafer sample image. Image training data is obtained based on the wafer sample image and the image labels. It should be noted that one wafer sample image corresponds to one image label. If an image label is empty, it indicates that the wafer sample image corresponding to that image label has no defects; otherwise, it indicates that the wafer sample image corresponding to that image label contains defects. When the wafer sample image contains defects, in each row of data of the image label corresponding to the wafer sample image, the first number indicates the defect type; the second to fifth numbers indicate the defect location information. In one possible implementation, the defect is marked by a rectangular target box. The second number represents the x-coordinate of the center point of the rectangular target box divided by the width of the wafer sample image; the third number represents the y-coordinate of the center point of the rectangular target box divided by the height of the wafer sample image; the fourth number represents the width of the rectangular target box divided by the width of the wafer sample image; and the fifth number represents the height of the rectangular target box divided by the height of the wafer sample image. Figure 2The image label indicates that there are 6 defects in the wafer sample image corresponding to the image label, of which 4 are defects of type 0 and 2 are defects of type 1.

[0076] In step 130, the neural network model is constructed based on a pre-defined object detection network and attention mechanism. (See also...) Figure 3 In some embodiments, the YOLO v5 network is selected as the target detection network, such as... Figure 3 As shown, the YOLO v5 network comprises four sub-components: Input, Backbone, Neck, and Prediction. The YOLO v5 network offers advantages such as high detection speed and high accuracy, making it suitable for real-time monitoring in industrial production processes. Please refer to... Figure 5 In one possible implementation, the SENet architecture is chosen as the attention mechanism, such as... Figure 5 As shown, global pooling reduces the feature map dimension from H (height) x W (width) x C (number of channels) to 1x1xC; then a fully connected layer (FC) further reduces the dimension to 1x1xC / r, where r is a scaling parameter to reduce computation; then ReLU activation is applied; another fully connected layer (FC) restores the feature map dimension to 1x1xC; a sigmoid function is used to obtain normalized weights; finally, a scale function is used to apply the normalized weights to the features of each channel of the feature map. In the SENet structure, this approach of reducing and then restoring the feature map dimension better fits the complex correlations between channels while significantly reducing the number of parameters and computation. Figure 4 As shown, Figure 4This describes the specific structure of the Backbone sub-component of the YOLO v5 network. By replacing the CSP structure in the Backbone sub-component with the SENet structure, an attention mechanism is added to YOLO v5. The SENet structure learns the weights of features based on the loss function, resulting in higher weights for effective features and lower weights for ineffective or less effective features. This is beneficial for extracting important features and thus improving the model's accuracy. Therefore, using a YOLO v5 network with the SENet structure as a neural network model can achieve better detection results. In one possible implementation, the loss function used by the neural network model is the GIOU function, which can well represent the distance and overlap between the predicted defect location and the actual defect location. Preferably, in this embodiment, the neural network model is constructed based on the YOLO v5 network and the SENet attention mechanism, with the loss function set to the GIOU function, the batch size set to 8 images fed to the neural network each time, the number of training iterations set to 50, and the training image size set to 1280.

[0077] In one specific embodiment, the loss function is set to the GIOU function, and step 130 includes, but is not limited to, the following steps:

[0078] Defect detection is performed on image training data based on a neural network model to obtain sample detection data;

[0079] The model loss data is obtained by calculating the loss of the neural network model based on the loss function, sample detection data, and image labels.

[0080] The parameters of the neural network model are updated based on the model loss data to train the neural network model and obtain the wafer defect detection model.

[0081] In this specific implementation, defect detection is performed on each wafer sample image in the image training data using a YOLO v5 network and SENet structure of the neural network model, obtaining sample detection data corresponding to each wafer sample image. This sample detection data includes the detected defect type and location information of the wafer sample image. Further, based on the GIOU function, loss calculation is performed based on the detected defect type, detection location information, and defect type and location information in the image labels for each wafer sample image, obtaining model loss data. Finally, the parameters of the neural network model are continuously updated according to the model loss data until the model loss data meets preset iteration conditions. At this point, updating the neural network model parameters stops, and the parameters of the neural network model at this state are used as the final parameters. This final neural network model is then used as the trained wafer defect detection model.

[0082] In step 140, the wafer to be inspected image is acquired to obtain image inspection data. The wafer to be inspected image is a color image, and its acquisition method is similar to that of the wafer sample image acquisition method, which will not be described in detail here.

[0083] In step 150, the image to be detected is input into the wafer defect detection model for defect detection to obtain defect detection data, and the presence of defects in the wafer image to be detected is determined based on the defect detection data.

[0084] Please see Figure 6 In some embodiments, step 150 may include, but is not limited to, steps 610 to 640:

[0085] Step 610: Input the image data to be detected into the wafer defect detection model to perform defect detection and obtain defect detection data;

[0086] Step 620: If the image label corresponding to the wafer image to be inspected in the defect detection data is empty, then proceed to step 630; otherwise, proceed to step 640.

[0087] Step 630: The wafer image to be inspected does not contain any defects;

[0088] Step 640: The wafer image to be inspected has defects.

[0089] By using steps 610 to 640 above, it is possible to effectively determine whether there are defects in the wafer image to be inspected and reduce manual operation.

[0090] Please see Figure 7 In some embodiments, step 150 may include, but is not limited to, steps 710 to 760:

[0091] Step 710: Input the image data to be detected into the wafer defect detection model to perform defect detection and obtain defect detection data;

[0092] Step 720: If the image label corresponding to the wafer image to be inspected in the defect detection data is empty, then proceed to step 730; otherwise, proceed to step 740.

[0093] Step 730: The wafer image to be inspected does not contain any defects;

[0094] Step 740: Extract the confidence level of each first defect in the wafer image to be inspected from the defect detection data;

[0095] Step 750: If the confidence level of all first defects is lower than the preset first threshold, then proceed to step 730; otherwise, proceed to step 760.

[0096] Step 760: The wafer image to be inspected has defects.

[0097] In some possible implementations, the first threshold is determined when training the wafer defect detection model, and the accuracy of the defect detection data can be improved by filtering out first defects with confidence levels below the first threshold.

[0098] Please see Figure 8 In some embodiments, step 150 may include, but is not limited to, steps 810 to 870:

[0099] Step 810: Input the image data to be detected into the wafer defect detection model to perform defect detection and obtain defect detection data;

[0100] Step 820: If the image label corresponding to the wafer image to be inspected in the defect detection data is empty, then proceed to step 830; otherwise, proceed to step 840.

[0101] Step 830: The wafer image to be inspected does not contain any defects;

[0102] Step 840: Extract the confidence level and location information of each first defect in the wafer image to be inspected from the defect detection data;

[0103] Step 850: Select the second defect from the first defect based on the location information and the second threshold;

[0104] Step 860: If the confidence level of all second defects is lower than the preset first threshold, then proceed to step 830; otherwise, proceed to step 880.

[0105] Step 870: The wafer image to be inspected has defects.

[0106] In some possible implementations, the second threshold represents the possible location of the defect. In step 850, filtering the second defect from the first defect based on the location information and the second threshold means filtering out the defects in the first defect whose location intersects with the possible location of the defect, thus obtaining the second defect. In some possible implementations, the first threshold is determined when training the wafer defect detection model. By using the second threshold and the first threshold to filter the first and second defects respectively, the accuracy of the defect detection data can be further improved.

[0107] In some embodiments, before step 130, the wafer defect detection method further includes performing a color space transformation on the wafer sample image in the image training data; before step 150, the wafer defect detection method further includes performing a color space transformation on the wafer image to be detected in the image to be detected data.

[0108] Please see Figure 9Before step 130, the wafer defect detection method may include, but is not limited to, step 910; before step 150, the wafer defect detection method may include, but is not limited to, step 920.

[0109] Step 910: Perform color space transformation on the wafer sample images in the image training data;

[0110] Step 920: Perform color space transformation on the wafer image to be inspected in the image inspection data;

[0111] In some possible implementations, in step 910, the wafer sample image in the image training data is transformed into the HSV color space; in step 920, the wafer inspection image in the image inspection data is transformed into the HSV color space. The HSV color space uses hue, saturation, and value to represent color, which can separate brightness (image intensity) from chromaticity (color information), making it more suitable for image processing. In some possible implementations, when performing HSV color space transformation on the wafer sample image in the image training data and the wafer inspection image in the image inspection data, H (hue), S (saturation), and V (value) can also be adjusted or perturbed to achieve data augmentation. By performing color space transformation on the wafer sample image in the image training data and the wafer inspection image in the image inspection data, the color information in the image can be better utilized to achieve data augmentation, thereby improving the accuracy of the wafer defect detection model.

[0112] Please see Figure 10 This application also provides a wafer defect detection device that can implement the above-described wafer defect detection method. The device includes:

[0113] The sample image acquisition module 1010 is used to acquire wafer sample images, wherein the wafer sample images are color images;

[0114] The image annotation module 1020 is used to annotate the wafer sample image to obtain image training data, wherein the image training data includes the wafer sample image and image labels;

[0115] The training module 1030 is used to train a pre-acquired neural network model based on image training data to obtain a wafer defect detection model. The neural network model is constructed based on a preset target detection network and attention mechanism.

[0116] The target image acquisition module 1040 is used to acquire the image of the wafer to be inspected and obtain the image inspection data;

[0117] The defect detection module 1050 is used to input the image data to be detected into the wafer defect detection model for defect detection, obtain defect detection data, and determine whether there are defects in the wafer image to be detected based on the defect detection data.

[0118] Optionally, the wafer defect detection device further includes:

[0119] The data augmentation module (not shown) is specifically used for:

[0120] Perform color space transformation on the wafer sample images in the image training data;

[0121] Perform color space transformation on the wafer image to be inspected in the image inspection data;

[0122] The specific implementation of the wafer defect detection device is basically the same as the specific implementation of the wafer defect detection method described above, and will not be repeated here.

[0123] This application also provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the aforementioned method for detecting wafer defects. This electronic device can be any smart terminal, including tablet computers, in-vehicle computers, etc.

[0124] Please see Figure 11 , Figure 11 This is a schematic diagram of the hardware structure of an electronic device according to an embodiment of this application. The electronic device includes:

[0125] The processor 1110 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application.

[0126] The memory 1120 can be implemented as a read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory 1120 can store the operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 1120 and called and executed by the processor 1110 to execute the wafer defect detection method of the embodiments of this application.

[0127] The input / output interface 1130 is used to implement information input and output;

[0128] The communication interface 1140 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0129] Bus 1150 transmits information between various components of the device (e.g., processor 1110, memory 1120, input / output interface 1130, and communication interface 1140);

[0130] The processor 1110, memory 1120, input / output interface 1130 and communication interface 1140 are connected to each other within the device via bus 1150.

[0131] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described wafer defect detection method.

[0132] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0133] The wafer defect detection method, apparatus, electronic device, and storage medium of this application acquire wafer sample images, annotate the wafer sample images to obtain image training data, and can use wafer images containing color information as input data. Further, a pre-acquired neural network model is trained based on the image training data to obtain a wafer defect detection model. The neural network model is constructed based on a preset target detection network and attention mechanism. By incorporating an attention mechanism into the target detection network during training, the accuracy of the model in classifying wafer surface defects and foreign objects can be improved. Finally, an image of the wafer to be inspected is acquired to obtain image inspection data; the image inspection data is input into the wafer defect detection model for defect detection to obtain defect detection data; and the presence of defects in the wafer image is determined based on the defect detection data. This enables the classification of wafer surface defects and foreign objects, improves the accuracy of wafer surface defect and foreign object classification, and reduces the workload of manual re-inspection.

[0134] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0135] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0136] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0137] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0138] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0139] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0140] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0141] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0142] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0143] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing programs, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0144] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. A method for detecting wafer defects, characterized in that, include: Acquire a wafer sample image, wherein the wafer sample image is a color image; Image annotation is performed on the wafer sample image to obtain image training data, wherein the image training data includes the wafer sample image and image labels; The pre-acquired neural network model is trained based on the image training data to obtain a wafer defect detection model, wherein the neural network model is constructed according to a preset target detection network and attention mechanism; Acquire the image of the wafer to be inspected to obtain the image inspection data; The image to be detected is input into the wafer defect detection model to perform defect detection, and defect detection data is obtained. Based on the defect detection data, it is determined whether there are defects in the wafer image to be detected. The specific steps for determining whether the wafer image to be inspected has defects based on the defect detection data are as follows: If the image label corresponding to the wafer image to be inspected in the defect detection data is not empty, then the confidence level and location information of each first defect in the wafer image to be inspected are extracted from the defect detection data, and a second defect is selected from the first defects based on the location information and a second threshold; wherein, the second threshold represents the possible location of the defect, and selecting the second defect from the first defects based on the location information and the second threshold means selecting the defects whose location in the first defects intersects with the possible location of the defects, thus obtaining the second defect; If the confidence level of all second defects is lower than a preset first threshold, then the wafer image to be inspected has no defects; if the confidence level of at least one second defect is not lower than the first threshold, then the wafer image to be inspected has defects; if the image label corresponding to the wafer image to be inspected in the defect detection data is empty, then the wafer image to be inspected has no defects.

2. The detection method according to claim 1, characterized in that, The step of annotating the wafer sample image to obtain image training data includes: The wafer sample image is labeled using a preset annotation tool to obtain the image label, wherein the image label includes the defect type and defect location information of the wafer sample image; The image training data is obtained based on the wafer sample image and the image label.

3. The detection method according to claim 1, characterized in that, Before training the pre-acquired neural network model based on the image training data to obtain the wafer defect detection model, the detection method further includes: Perform color space transformation on the wafer sample images in the image training data; Before inputting the image data to be detected into the wafer defect detection model for defect detection to obtain defect detection data, the detection method further includes: The color space transformation is performed on the wafer image to be detected in the image detection data.

4. The detection method according to claim 1, characterized in that, The step of training a pre-acquired neural network model based on the image training data to obtain a wafer defect detection model includes: Based on the neural network model, defect detection is performed on the image training data to obtain sample detection data; The neural network model is subjected to loss calculation based on the preset loss function, the sample detection data, and the image labels to obtain model loss data, wherein the loss function is the GIOU function; The parameters of the neural network model are updated based on the model loss data to train the neural network model and obtain the wafer defect detection model.

5. The detection method according to any one of claims 1 to 4, characterized in that, The specific step of determining whether the wafer image to be inspected has defects based on the defect detection data is replaced by: If the image label corresponding to the wafer image to be inspected in the defect detection data is not empty, then the wafer image to be inspected has a defect; If the image label corresponding to the wafer image to be inspected in the defect detection data is empty, then the wafer image to be inspected does not have defects.

6. The detection method according to any one of claims 1 to 4, characterized in that, The specific step of determining whether the wafer image to be inspected has defects based on the defect detection data is replaced by: If the image label corresponding to the wafer image to be inspected in the defect detection data is not empty, then the confidence level of each first defect in the wafer image to be inspected is extracted from the defect detection data. If the confidence level of all first defects is lower than a preset first threshold, then the wafer image to be inspected does not have a defect; if the confidence level of at least one first defect is not lower than the first threshold, then the wafer image to be inspected has a defect. If the image label corresponding to the wafer image to be inspected in the defect detection data is empty, then the wafer image to be inspected does not have defects.

7. A wafer defect detection device, characterized in that, The device includes: A sample image acquisition module is used to acquire wafer sample images, wherein the wafer sample images are color images; An image annotation module is used to annotate the wafer sample image to obtain image training data, wherein the image training data includes the wafer sample image and image labels; The training module is used to train a pre-acquired neural network model based on the image training data to obtain a wafer defect detection model, wherein the neural network model is constructed based on a preset target detection network and attention mechanism; The target image acquisition module is used to acquire the image of the wafer to be inspected, and obtain the image inspection data; A defect detection module is used to input the image to be detected into the wafer defect detection model for defect detection, obtain defect detection data, and determine whether the wafer image to be detected has defects based on the defect detection data. Specifically, the steps for determining whether the wafer image to be detected has defects based on the defect detection data are as follows: if the image label corresponding to the wafer image to be detected in the defect detection data is not empty, then the confidence level and location information of each first defect in the wafer image to be detected are extracted from the defect detection data, and a second defect is selected from the first defects based on the location information and a second threshold. The second threshold represents the possible location of the defect. Selecting the second defect from the first defect based on the location information and the second threshold means selecting the first defect whose location intersects with the possible location of the defect, thus obtaining the second defect. If the confidence level of all second defects is lower than the preset first threshold, the wafer image to be inspected does not have a defect. If the confidence level of at least one second defect is not lower than the first threshold, the wafer image to be inspected has a defect. If the image label corresponding to the wafer image to be inspected in the defect detection data is empty, the wafer image to be inspected does not have a defect.

8. An electronic device, characterized in that, The electronic device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the wafer defect detection method according to any one of claims 1 to 6.

9. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the wafer defect detection method according to any one of claims 1 to 6.

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