Non-quadrilateral display

Abstract

A non-quadrangular display is disclosed. The display includes a plurality of pixels in a non-quadrangular display area and a plurality of first drive circuits and a plurality of second drive circuits in a peripheral area of the display area. Each pixel is connected to a first signal line in a first direction and a second signal line in a second direction crossing the first direction. Each first drive circuit outputs a first signal to the first signal line of a corresponding one of the pixels. Each second drive circuit outputs a second signal to the second signal line of a corresponding one of the pixels. The number of second drive circuits between adjacent first drive circuits varies depending on the location in the peripheral area.

Description

[0001] This application is a divisional application of the invention patent application "Non-quadrilateral Display" filed on February 5, 2016, with application number 201610080972.5. Technical Field

[0002] One or more embodiments described herein relate to a non-quadrilateral display. Background Technology

[0003] The display panel includes signal lines connected to pixels. Pixels are located in a display area with a quadrilateral shape, and drive circuitry for supplying signals to the signal lines is located in a border area surrounding the quadrilateral display area. The display area can be increased and the border area can be decreased to create a large panel.

[0004] Recently, there has been an increasing demand for displays with non-quadrilateral shapes (e.g., circular or elliptical). Such displays are suitable for use in wearable devices (e.g., smartwatches, smart glasses, and head-mounted displays) or in vehicle clusters. However, to increase the size of the display panel screen, the bezel area of ​​these displays may need to be reduced to a very narrow size. A narrower bezel area leaves less space for the driving circuitry. Summary of the Invention

[0005] According to one or more embodiments, a non-quadrilateral display includes: a plurality of pixels located in a non-quadrilateral display area, each pixel being connected to a first signal line in a first direction and a second signal line in a second direction intersecting the first direction; a plurality of first driving circuits located in a peripheral region of the display area, each first driving circuit being configured to output a first signal to a first signal line corresponding to the pixel; and a plurality of second driving circuits located in the peripheral region, each second driving circuit being configured to output a second signal to a second signal line corresponding to the pixel, wherein the number of second driving circuits between adjacent first driving circuits varies depending on their position in the peripheral region.

[0006] The first and second driving circuits can be adjacent to the circumference of the display area. The angle used to arrange the first and second driving circuits can be changed according to their positions. The angle changes in the same way as the normal direction of the circumference of the display area corresponding to the positions of the first and second driving circuits.

[0007] The area of ​​the first driving circuit corresponding to at least one pixel is different from the area of ​​the second driving circuit corresponding to at least one pixel. The sum of the widths of the display areas of the alternating and adjacent first and second driving circuits in the tangential direction is less than half the width of a pixel.

[0008] The display area may include curved regions, with the pixels arranged in a matrix within these curved regions. When a step is located between adjacent arrangements of the pixels, a first or second driving circuit in the peripheral region corresponds to the step, depending on its type.

[0009] A pixel may include multiple sub-pixels, each capable of emitting light of different colors. The sub-pixels are controlled by a second signal transmitted synchronously via a second signal line and a first signal transmitted via a first signal line. Each sub-pixel includes: multiple switching transistors, each including a first electrode connected as a gate electrode to one of the second signal lines and one of the first signal lines; and multiple driving transistors, each including a gate electrode connected to the second electrode of one of the switching transistors, a first electrode receiving a power supply voltage, and a second electrode connected to an organic light-emitting diode.

[0010] Each sub-pixel may receive an initialization voltage synchronously with a first signal transmitted via a first signal line corresponding to the previous pixel row. Each sub-pixel may include a compensation transistor connected between the gate electrode and the second electrode of the driving transistor, the gate electrode being included as part of the corresponding first signal line.

[0011] The first and second signal lines of a pixel may not intersect each other in the peripheral region. Each pixel may be connected to a third signal line in the first direction, and the display may include a plurality of third driving circuits alternately arranged with at least one of the second driving circuits, each third driving circuit outputting a third signal to the third signal line of at least one of the pixels in the region facing the first driving circuit in the peripheral region.

[0012] According to one or more other embodiments, a non-quadrilateral display includes: a display area including a curved portion, the display area including a plurality of pixels arranged such that steps in the row and column directions correspond to the curved portion; and a non-display area including a first driving circuit and a second driving circuit, wherein the first driving circuit is used to supply a first signal to each pixel in the row direction, and the second driving circuit is used to supply a second signal to each pixel in the column direction, and different numbers of the first driving circuit and the second driving circuit are arranged on the circumference of the display area.

[0013] At least one of the first driving circuits can be substantially positioned in the normal direction of the pixel having a step in the row direction. At least one of the second driving circuits can be substantially positioned in the normal direction of the pixel having a step in the column direction. The non-display area can have a predetermined width along the circumference of the display area. Each of the first and second driving circuits can have a substantially rectangular shape and substantially the same length of its long side. The width of the non-display area can be greater than the length of the long side and less than the sum of the lengths of the two long sides of the substantially rectangular shape. Attached Figure Description

[0014] Features will become apparent to those skilled in the art from the detailed description of exemplary embodiments with reference to the accompanying drawings, in which:

[0015] Figure 1 An embodiment of a non-quadrilateral display is shown;

[0016] Figure 2 An embodiment of the display panel is shown;

[0017] Figure 3 An example of a pixel is shown;

[0018] Figure 4 An example of a sub-pixel is shown;

[0019] Figure 5 An embodiment is shown including pixels and driving circuitry at a first location on the edge of the display panel;

[0020] Figure 6 An embodiment is shown including pixels and driving circuitry at a second location on the edge of the display panel;

[0021] Figure 7 An embodiment of pixels and driving circuitry at a third position on the edge of the display panel is shown;

[0022] Figure 8 Another embodiment of the display panel is shown;

[0023] Figure 9 Shown in Figure 8 An embodiment of pixels and driving circuitry at a first position on the edge of the display panel;

[0024] Figure 10 Shown in Figure 8 An embodiment of pixels and driving circuitry at a second position on the edge of the display panel;

[0025] Figure 11 Shown in Figure 8 An embodiment of a pixel and driving circuit at a third position on the edge of a display panel;

[0026] Figure 12 Another embodiment of the display panel is shown;

[0027] Figure 13 Shown in Figure 12 An embodiment of pixels and driving circuitry at a first position on the edge of a first region of a display panel;

[0028] Figure 14 Shown in Figure 12 An embodiment of pixels and driving circuitry at a second position on the edge of a first region of a display panel;

[0029] Figure 15 Shown in Figure 12 An embodiment of a pixel and driving circuit at a third position on the edge of the first region of the display panel;

[0030] Figure 16 Another embodiment of the display panel is shown;

[0031] Figure 17 Shown in Figure 16 An embodiment of pixels and driving circuitry in the first region of a display panel. Detailed Implementation

[0032] In the following description, exemplary embodiments will be described more fully with reference to the accompanying drawings; however, these exemplary embodiments may be implemented in different forms and should not be construed as limiting oneself to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey exemplary implementation to those skilled in the art. Embodiments may be combined to form other embodiments. The same reference numerals always denote the same elements.

[0033] It will be understood that when a component is referred to as "connected to" or "combined to" another component, that component can be directly connected to or combined to the other component, or has an intermediate component in which it is connected to or combined to the other component. On the other hand, it will be understood that when a component is referred to as "directly connected to or combined to" another component, that component can be connected to or combined to the other component without any other intermediate component in which it is connected.

[0034] Figure 1An embodiment of a non-quadrilateral display is shown, wherein the non-quadrilateral display includes a driver IC 10, a display panel 20, and a connector 15 for connecting the driver IC 10 and the display panel 20. The display panel 20 may have a predetermined non-quadrilateral shape, such as a circle, an ellipse, a polygon with a partial circle, or a polygon other than a quadrilateral. In one embodiment, any form may include a graphic partially configured with curves. The display panel 20 may be a flexible display panel including at least one curved portion.

[0035] The driver IC 10 outputs a drive signal for driving the drive circuitry of the display panel 20. The drive signal can be transmitted to the display panel 20 via connector 15. Based on the drive signal transmitted to the driver IC 10, the signal corresponding to the pixel can be appropriately transmitted to the signal lines formed on the display panel 20.

[0036] Figure 2 Show Figure 1 An embodiment of the display panel of the monitor. For example... Figure 2 As shown, the form or shape of the display area 30 can be determined based on the form or shape of the display panel 20. For example, when the display panel 20 is circular, the display area 30 can be circular, and / or when a portion of the display panel 20 is curved, the display area 30 corresponding to that portion can be curved. The non-display area 40, including the driving circuitry, is located in the area on the display panel 20 that excludes the display area 30.

[0037] Multiple pixels PX are located within the display area 30. Pixels PX can be arranged in a matrix within the display area 30. Pixels PX can be configured to correspond to curves within the display area 30. For example, when the display area 30 is circular, steps can be created between the arrangement of pixels at the edges of the display area 30.

[0038] For example, quadrilateral pixels PX are disposed on the curved edge of the display area 30 to form a stepped arrangement in the rows of pixels. In one embodiment, a step is formed between the pixel arrangement of the first row and the pixel arrangement of the second row by a predetermined number (e.g., eight) of pixels PX on the edge CA1 of the display area 30 corresponding to the first row and the second row.

[0039] The steps between adjacent rows or columns of pixels can vary depending on the location of the corresponding edges. For example, a step based on an eight-pixel difference can be created between the pixel arrangements in the first and second rows, and a step based on a six-pixel difference can be formed between the pixel arrangements in the second and third rows.

[0040] Depending on the shape of the display area 30, the driving circuitry is formed in the non-display area 40. For example, when the pixels PX are arranged in a circular shape, the driving circuitry for supplying signals to the pixels PX can be located in the circumferential region adjacent to the circle on which the pixels PX are disposed. When the display panel 20 is circular, the display area 30 including the pixels PX and the non-display area 40 including the driving circuitry can both be circular in shape. Furthermore, the non-display area 40 can be formed on the same substrate as the display area 30, adjacent to the circumference of the display area 30.

[0041] The shape of the non-display area 40 can be determined by the shape of the display area 30. For example, when the pixel PX is set in a circular manner, the non-display area 40 can be formed as a ring with a predetermined width on the circumference of the display area 30.

[0042] exist Figure 2 In one embodiment, the shape and size of pixels PX are the same. In another embodiment, the size of pixels PX in two or more regions of display area 30 may be different. For example, pixels in the central region of display area 30 may be larger than pixels on the edges of display area 30.

[0043] Figure 3 An embodiment of pixel PX is shown. Figure 4 An equivalent circuit diagram of an embodiment of the sub-pixels of pixel PX is shown. Figure 3 As shown, a pixel PX may include multiple sub-pixels that emit light of different primary colors. For example, a pixel PX may include three sub-pixels PX11, PX12, and PX13 that emit red, green, and blue light, respectively.

[0044] like Figure 4 As shown, sub-pixel PX11 includes multiple transistors connected to multiple signal lines, a storage capacitor (Cst), and an organic light-emitting diode (OLED). The transistors include a driving thin-film transistor T1, a switching thin-film transistor T2, a compensation transistor T3, an initialization transistor T4, an operation control transistor T5, an emission control transistor T6, and a bypass transistor T7.

[0045] The signal lines include a scan line (S[n]) for transmitting scan signals, a previous scan line (S[n-1]) for transmitting the previous scan signal to the initialization transistor T4, an emit control line (EM[n]) for transmitting emit control signals to the operation control transistor T5 and the emit control transistor T6, a data line (D[m]) that intersects the scan lines and transmits data signals, a power supply voltage line for transmitting power supply voltage, and an initialization voltage line for transmitting the initialization voltage of the initialization drive transistor T1.

[0046] The driving transistor T1 includes a first terminal connected to a first node N1, a gate connected to a second node N2, and a second terminal connected to a third node N3. The driving transistor T1 is turned on by a voltage applied to its gate to control the driving current supplied to the organic light-emitting diode (OLED).

[0047] The second transistor T2 includes a first terminal connected to a data line (D[m]) for supplying the corresponding data signal, a gate connected to a scan line (S[n]) for supplying the corresponding current scan signal, and a second terminal connected to the first node N1. The second transistor T2 is turned on by the scan signal to transmit the data signal to the first node N1.

[0048] The first capacitor Cst includes a first terminal connected to a power supply voltage line for supplying a first power supply voltage (ELVDD) and a second terminal connected to a second node N2.

[0049] The third transistor T3 includes a first terminal connected to the second node N2, a second terminal connected to the third node N3, and a gate connected to the current scan line (S[n]). The third transistor T3 is turned on by the current scan signal to connect the second node N2 and the third node N3.

[0050] The fourth transistor T4 includes a first terminal connected to the second node N2, a second terminal connected to an initialization line for supplying an initialization voltage (VINT), and a gate connected to a scan line (S[n-1]) set in the previous pixel row. The fourth transistor T4 is turned on by the scan signal of the scan line (S[n-1]) set in the previous pixel row to initialize the second node N2 using the initialization voltage (VINT).

[0051] The fifth transistor T5 includes a first terminal connected to the first power supply voltage (ELVDD), a second terminal connected to the first node N1, and a gate connected to the emitter line for supplying the corresponding emitter signal. The fifth transistor T5 is turned on by the emitter signal.

[0052] The sixth transistor T6 includes a first terminal connected to the third node N3, a second terminal connected to the anode of the organic light-emitting diode (OLED), and a gate connected to the emitter line for supplying an emission signal. The sixth transistor T6 is turned on by the emission signal to transfer the current flowing through the first transistor T1 to the organic light-emitting diode (OLED).

[0053] The seventh transistor T7 includes a first terminal connected to the anode of the organic light-emitting diode (OLED), a second terminal connected to the initialization line, and a gate connected to the scan line (S[n-1]) set in the previous pixel row. The seventh transistor T7 is turned on by the scan signal set in the previous pixel row to transfer the initialization voltage (VINT) to the anode of the organic light-emitting diode (OLED).

[0054] An organic light-emitting diode (OLED) includes an anode connected to the second terminal of a sixth transistor T6 and a cathode connected to a second power supply voltage (ELVSS). An OLED can emit one of the primary colors of light. Primary colors can include, for example, red, green, and blue, and the desired color can be displayed based on the spatial or temporal sum of the three primary colors.

[0055] An initialization voltage (Vint) is supplied synchronously with multiple scan signals supplied via scan lines (S[n-1]) set in the previous pixel row to the gate electrodes of the respective driving transistors T1 of sub-pixels PX11, PX12, and PX13. Multiple data signals are transmitted synchronously with the scan signals supplied via scan lines in the current sub-pixel row through data lines (D[m]) corresponding to each sub-pixel of PX11, PX12, and PX13. A first power supply voltage (ELVDD) supplied via multiple first power supply voltage lines is used to drive sub-pixels PX11, PX12, and PX13. The emission of the organic light-emitting diode (OLED) is controlled by an emission control signal supplied by an emission control line (EM[n]).

[0056] The driving circuit includes a first driving circuit for supplying scan signals to scan lines (S[n]), a second driving circuit for supplying transmit control signals to transmit control lines (EM[n]), and a third driving circuit for supplying data signals to data lines (D[m]). The driving circuit also includes a fourth driving circuit for supplying test voltage to the data lines (D[m]) to test whether the display panel 20 has errors during the manufacturing process.

[0057] A driving circuit is disposed on the display panel 20 and supplies appropriate signals to the pixels PX. The method for supplying signals to the pixels PX can depend on, for example, the type of driving circuit. For example, a first driving circuit and a second driving circuit supply signals in a first direction, and a third driving circuit and a fourth driving circuit supply signals in a second direction intersecting the first direction. When the pixels PX are arranged in a matrix, the first driving circuit and the second driving circuit supply signals for each row, and the third driving circuit and the fourth driving circuit supply signals for each column.

[0058] The driving circuit is arranged in the non-display area 40, so that the non-display area 40 occupies a narrow area on the display panel 20. However, when the pixels PX are arbitrarily arranged on the display panel 20, steps may appear between the pixel arrangements. In this case, the driving circuit is arranged in a different manner than the driving circuit in the quadrilateral display panel.

[0059] Figure 5 An embodiment of a pixel PX and driving circuitry at a first position A1 on the edge of the display panel 20 is shown. As shown, the driving circuitry is located in the non-display area 40.

[0060] In this embodiment, a first driving circuit DC1 and a fourth driving circuit DC4 are shown. Different types of driving circuits (first driving circuit, second driving circuit, third driving circuit, and fourth driving circuit) can be disposed at various locations in the non-display area 40. In one embodiment, the non-display area 40 may include an area in which the first driving circuit DC1 and the fourth driving circuit DC4 are disposed, an area in which the second driving circuit DC2 and the fourth driving circuit DC4 are disposed, an area in which the first driving circuit DC1 and the third driving circuit are disposed, and an area in which the second driving circuit DC2 and the third driving circuit are disposed.

[0061] Different types and numbers of driving circuits can be arranged along the circumference of the display area 30 in the non-display area 40. In this case, different types of driving circuits can be arranged for each pixel row or pixel column. For example, the first driving circuit DC1 can correspond to a pixel row, and the fourth driving circuit DC4 can correspond to a pixel column. As shown, at the first position A1, four first driving circuits DC1 correspond to four pixel rows, and twelve fourth driving circuits DC4 correspond to twelve pixel columns at the first position A1.

[0062] The area occupied by different types of driving circuits can be different. For example, the area of ​​a first driving circuit DC1 can be different from the area of ​​a fourth driving circuit DC4. When the first driving circuit DC1 and the fourth driving circuit DC4 are formed as rectangles and have the same long side length, their short side lengths can be different. The width of the non-display area 40 can be less than the sum of the long side lengths of the two driving circuits and greater than the long side length of one driving circuit. In one embodiment, the width of the non-display area 40 can be substantially the same as the long side length of one driving circuit, and the width of the non-display area 40 can be designed to be narrow.

[0063] The driving circuit can be tilted at a corresponding angle relative to the flat surface based on the shape of the display area 30. For example, the driving circuit can be tilted at an angle substantially the same as the normal angle on the boundary between the display area 30 and the non-display area 40, and can be located in the non-display area 40.

[0064] When the display area 30 is curved, the normal direction at the boundary between the display area 30 and the non-display area 40 changes along the circumference of the display area 30. Therefore, the setting angle of the drive circuits positioned along the circumference of the display area 30 relative to the reference line (Lref) changes in the normal direction. The leftmost fourth drive circuit DC4 is parallel to... Figure 5 The reference line (Lref) is located in the display area 30. However, the drive circuits DC1 and DC4, which are located to the right of the fourth drive circuit DC4 along the circumference of the display area 30, are tilted so that the angle between them and the reference line (Lref) gradually increases.

[0065] In the case of the same type of drive circuit DC4, the setting angles α1 and α2 relative to the reference line (Lref) can vary depending on the position of the pixel row or pixel column. For example, the setting angles α1 and α2 of the fourth drive circuit DC4 corresponding to different pixel columns are different from each other.

[0066] The driving circuits are arranged in series in the non-display area 40. The type of driving circuit is changed, and then they are arranged in a single column along the circumference of the display area 30. For example, in... Figure 5 In the display area 30, the driving circuits from the fourth driving circuit DC4 on the far left to the first driving circuit DC1 on the far right are arranged in a single column along the circumference of the display area 30, while the types of driving circuits DC1 and DC4 are changed.

[0067] When a step occurs between pixel arrangements, the type of driving circuit changes and is set according to the type of the corresponding step. When a step is generated between pixel arrangements in each row, the first driving circuit DC1 is set to correspond to the corresponding step. When a step is generated in each column, the fourth driving circuit DC4 is set to correspond to the corresponding step. The first driving circuit DC1 supplies signals to different pixel rows, and the fourth driving circuit DC4 supplies signals to different pixel columns.

[0068] A driving circuit supplies signals to pixels PX in a row or column. A pixel PX includes multiple sub-pixels PX11, PX12, and PX13. Therefore, a driving circuit supplies signals to sub-pixels PX11, PX12, and PX13 in a pixel row or column. Thus, multiple signal lines are formed by a driving circuit supplying signals to a pixel row or column. For example, a first driving circuit DC1 supplies scan signals to a pixel row, where multiple pixels PX, including R sub-pixels, G sub-pixels, and B sub-pixels, are formed. Scan line SL1 for supplying scan signals to multiple R sub-pixels, scan line SL2 for supplying scan signals to multiple G sub-pixels, and scan line SL3 for supplying scan signals to multiple B sub-pixels are formed corresponding to a first driving circuit DC1. This applies to other cases, for example, where signal lines are connected in a similar manner to different types of driving circuits DC2, DC3, and DC4.

[0069] The signal lines supplying signals to the driving circuitry of pixel PX are configured not to cross each other in the non-display area 40. Signal lines connecting to different types of driving circuits are also configured not to cross each other in the non-display area 40. For example, signal lines SL1 to SL3 connecting the adjacent first driving circuit DC1 and the pixel row are configured not to cross with signal lines TL1 to TL3 connecting the fourth driving circuit DC4 and the pixel column. Therefore, capacitive coupling caused by parasitic capacitance formed by the crossing of signal lines in the non-display area 40 is reduced.

[0070] Figure 6 An embodiment of a pixel PX and its driving circuitry at a second position A2 on the edge of the display panel 20 is shown. Figure 6 In the middle, the drive circuits DC1 and DC4 are in accordance with... Figure 5 A similar arrangement is used in the non-display area 40. Different types of drive circuits DC1 and DC4 can be configured to correspond to individual pixel rows or pixel columns. For example, the first drive circuit DC1 can correspond to a pixel row, and the fourth drive circuit DC4 can correspond to a pixel column. As shown, at the second position A2, five first drive circuits DC1 are configured to correspond to five pixel rows, and five fourth drive circuits DC4 are configured to correspond to five pixel columns.

[0071] The drive circuits DC1 and DC4 can tilt at an angle relative to the plane according to the shape of the display area 30. Figure 6 When measuring the angle of inclination relative to the reference line (Lref) in a clockwise direction, the angle α4 formed when the fourth drive circuit DC4, which is set on the far right, tilts from the reference line (Lref) is greater than the angle α3 formed when the first drive circuit DC1, which is set on the far left, tilts from the reference line (Lref).

[0072] Drive circuits DC1 and DC4 are arranged in series in the non-display area 40. The types of drive circuits DC1 and DC4 are changed, and they are arranged in columns along the circumference of the display area 30. For example, in... Figure 6 In the display area 30, the driving circuits, starting from the fourth driving circuit DC4 on the far left and ending at the first driving circuit DC1 on the far right, are arranged in a single column along the circumference of the display area 30, while the type of driving circuit changes.

[0073] When steps occur between pixel arrangements, the type of drive circuit changes and is set according to the type of step. When steps occur between pixel arrangements in different rows, the first drive circuit DC1 corresponds to the corresponding step. When steps occur in different columns, the fourth drive circuit DC4 corresponds to the corresponding step. The first drive circuit DC1 supplies signals to different pixel rows, and the fourth drive circuit DC4 supplies signals to different pixel columns. (About...) Figure 6 A step is generated in the row and column directions by a pixel PX, so the first driving circuit DC1 and the fourth driving circuit DC4 are set alternately.

[0074] The sum of the widths of the display area 30 along the tangential direction of the first driving circuit DC1 and the fourth driving circuit DC4, which are alternately arranged and adjacent to each other, can be less than half the width of the pixel PX. Furthermore, the sum of the widths of two adjacent driving circuits can be less than half the width of the pixel PX.

[0075] A driving circuit supplies signals to pixels PX in a row or column. A pixel PX includes multiple sub-pixels PX11, PX12, and PX13. Therefore, multiple signal lines for a driving circuit are configured to supply signals to a pixel row or a pixel column. The signal lines of driving circuits DC1 and DC4 that supply signals to pixels PX are configured not to cross each other in the non-display area 40. Signal lines connected to different types of driving circuits DC1 and DC4 are configured not to cross each other in the non-display area 40.

[0076] Figure 7 An embodiment of a pixel PX and its driving circuitry at a third position A3 on the edge of the display panel 20 is shown. Figure 7 In the middle, the drive circuit is in conjunction with Figure 5A similar arrangement is found in the non-display area 40. Different types of drive circuits DC1 and DC4 can correspond to individual pixel rows or pixel columns. For example, a first drive circuit DC1 can correspond to a pixel row, and a fourth drive circuit DC4 can correspond to a pixel column. As shown, at the third position A3, twelve first drive circuits DC1 correspond to twelve pixel rows, and three fourth drive circuits DC4 correspond to three pixel columns.

[0077] The drive circuits DC1 and DC4 can tilt at an angle relative to the plane according to the shape of the display area 30. Figure 7 When measuring the angle of inclination in the clockwise direction, the angle α6 formed when the first drive circuit DC1 set on the far right tilts from the reference line (Lref) is greater than the angle α5 formed when the first drive circuit DC1 set on the far left tilts from the reference line (Lref).

[0078] Drive circuits DC1 and DC4 are arranged in series in the non-display area 40. The types of drive circuits DC1 and DC4 are changed, and they are arranged in columns along the circumference of the display area 30. For example, in... Figure 7 In the display area 30, the driving circuits, starting from the fourth driving circuit DC4 on the far left and ending at the first driving circuit DC1 on the far right, are arranged in a single column along the circumference of the display area 30, while the type of driving circuit changes.

[0079] When steps occur between pixel arrangements, the type of driving circuit changes and is set according to the type of the corresponding step. When steps are generated between pixel arrangements for each row, the first driving circuit DC1 corresponds to the corresponding step. When steps are generated for each column, the fourth driving circuit DC4 corresponds to the corresponding step. The first driving circuit DC1 supplies signals to different pixel rows, and the fourth driving circuit DC4 supplies signals to different pixel columns.

[0080] A driving circuit supplies signals to pixels PX in a row or column. A pixel PX includes multiple sub-pixels PX11, PX12, and PX13. Therefore, a driving circuit supplies signals to multiple sub-pixels PX11, PX12, and PX13 in a pixel row or a pixel column. Thus, multiple signal lines for a driving circuit are configured to supply signals to a pixel row or a pixel column. The signal lines of driving circuits DC1 and DC4 that supply signals to pixels PX are configured not to cross each other in the non-display area 40. Signal lines connected to different types of driving circuits DC1 and DC4 are configured not to cross each other in the non-display area 40.

[0081] like Figures 5 to 7As shown, different numbers of drive circuits DC1 and DC4 can be arranged according to their positions on the display panel 20. For example, multiple fourth drive circuits DC4 are arranged at the first position A1 to create steps between the pixel arrangements of each column. Multiple first drive circuits DC1 are arranged at the third position A3 to create steps between the pixel arrangements of each row. Therefore, the type and number of drive circuits on the circumference of the display area 30 change.

[0082] Figure 8 A second embodiment of the display panel 20 is shown. Figure 8 In this context, the form of the display area 30 can be determined to correspond to the form of the display panel 20. For example, when the display panel 20 is elliptical, the display area 30 can also be elliptical. When a portion of the display panel 20 is bent, the display area 30 corresponding to that portion is bent. The non-display area 40, including the driving circuitry, is located in the area on the display panel 20 excluding the display area 30.

[0083] Multiple pixels PX are located within the display area 30. The pixels PX can be arranged in a matrix within the display area 30. The pixels PX are appropriately configured to correspond to curves within the display area 30. For example, when the display area 30 is elliptical, steps are created between the arrangement of pixels at the edges of the display area 30.

[0084] For example, quadrilateral pixels PX are located on the curved edge of display area 30, thus creating a step between the pixel arrangements. For example, a step is formed between the pixel arrangements of the first row and the pixel arrangements of the second row by the difference between the twelve pixels PX on the edge CA2 of the display area 30 corresponding to the first row and the second row.

[0085] The steps between adjacent rows or columns of pixels can vary depending on the location of the corresponding edges. For example, a step corresponding to the difference of twelve pixels (PX) can be created between the pixel arrangements in the first and second rows. A step corresponding to the difference of six pixels (PX) can be created between the pixel arrangements in the second and third rows.

[0086] The driving circuitry is appropriately formed in the non-display area 40 according to the shape of the display area 30. For example, when the pixel PX is in an elliptical form, the driving circuitry for supplying signals to the pixel PX is arranged along the circumference of the ellipse on which the pixel PX is disposed. When the display panel 20 is elliptical, the shape formed by the display area 30 including the pixel PX and the non-display area 40 including the driving circuitry can be elliptical.

[0087] exist Figure 8In this embodiment, the shape and size of pixels PX are the same. In one embodiment, the size of pixels PX in two or more regions of display area 30 may be different. For example, the pixels in the central region of display area 30 may be larger than the pixels at the edges of display area 30.

[0088] The driving circuit can be appropriately positioned in the non-display area 40, allowing the non-display area 40 to occupy a narrow area on the display panel 20. However, when the pixels PX are arbitrarily positioned on the display panel 20, steps appear between the pixel arrangements, so the driving circuit can be positioned differently from that of a display panel with quadrilateral pixel arrangements.

[0089] Figure 9 Showing includes Figure 8 An embodiment of the pixel PX and driving circuit at the first position B1 on the edge of the display panel 20. Figure 9 In the non-display area 40, the driving circuits include a first driving circuit DC1 and a fourth driving circuit DC4. Different types of driving circuits can be arranged at various locations within the non-display area 40. For example, the non-display area 40 may include an area containing the first driving circuit DC1 and the fourth driving circuit DC4, an area containing the second driving circuit and the fourth driving circuit DC4, an area containing the first driving circuit DC1 and the third driving circuit, and an area containing the second driving circuit and the third driving circuit. Different types and numbers of driving circuits can be arranged along the circumference of the display area 30 within the non-display area 40.

[0090] In this case, different types of driving circuits can be set for each pixel row or pixel column. For example, the first driving circuit DC1 can correspond to a pixel row, and the fourth driving circuit DC4 can correspond to a pixel column. At the first position B1, two first driving circuits DC1 correspond to two pixel rows, and ten fourth driving circuits DC4 correspond to ten pixel columns.

[0091] The area occupied by different types of drive circuits can be different. For example, the area of ​​a first drive circuit DC1 can be different from the area of ​​a fourth drive circuit DC4.

[0092] The drive circuits DC1 and DC4 can be tilted at an angle relative to the flat surface, depending on the shape of the display area 30. For example, the drive circuits can be tilted at an angle substantially the same as the normal angle at the boundary between the display area 30 and the non-display area 40, and can be positioned in the non-display area 40. When the display area 30 is curved, the normal direction of the boundary between the display area 30 and the non-display area 40 can change along the circumference of the display area 30. Therefore, the setting angle of the drive circuits along the circumference of the display area 30 relative to the reference line (Lref) is changed by the normal direction. The fourth drive circuit DC4, positioned on the far left, is parallel to... Figure 9 The reference line (Lref) in the display area 30. However, the drive circuits DC1 and DC4, which are located to the right of the fourth drive circuit DC4 along the circumference of the display area 30, are tilted so that their angles β1 and β2 with respect to the reference line (Lref) can gradually increase.

[0093] In the case of the same type of drive circuit, the setting angle relative to the reference line (Lref) can vary depending on the position of the pixel row or pixel column. For example, the setting angle of the fourth drive circuit DC4 corresponding to different pixel columns is different from each other.

[0094] The drive circuits DC1 and DC4 are arranged in series in the non-display area 40. The types of drive circuits DC1 and DC4 are changed, and they are arranged in a single column along the circumference of the display area 30. For example, in... Figure 9 In the display area 30, the driving circuits DC1 and DC4, from the fourth driving circuit DC4 on the far left to the first driving circuit DC1 on the far right, are arranged in a single column along the circumference of the display area 30, while the type of driving circuit changes.

[0095] When a step occurs between pixel arrangements, the type of driving circuit changes and is set according to the type of the corresponding step. When a step is generated between pixel arrangements in each row, the first driving circuit DC1 corresponds to the corresponding step. When a step is generated in each column, the fourth driving circuit DC4 corresponds to the corresponding step. The first driving circuit DC1 supplies signals to different pixel rows, and the fourth driving circuit DC4 supplies signals to different pixel columns.

[0096] A driving circuit supplies signals to pixels PX in a row or column. A pixel PX includes multiple sub-pixels PX11, PX12, and PX13. Therefore, a driving circuit supplies signals to sub-pixels PX11, PX12, and PX13 in a pixel row or column. Thus, multiple signal lines are formed by a driving circuit supplying signals to a pixel row or column. For example, a first driving circuit DC1 supplies scan signals to a pixel row, where multiple pixels PX, including R sub-pixels, G sub-pixels, and B sub-pixels, are formed. Therefore, scan lines for supplying scan signals to multiple R sub-pixels, scan lines for supplying scan signals to multiple G sub-pixels, and scan lines for supplying scan signals to multiple B sub-pixels are formed corresponding to a first driving circuit DC1. This can be applied to other cases where signal lines are connected to different types of driving circuits.

[0097] The signal lines supplying signals from drive circuits DC1 and DC4 to pixel PX are configured not to cross each other in the non-display area 40. Signal lines connecting to different types of drive circuits are also configured not to cross each other in the non-display area 40. For example, the signal line connecting the adjacent first drive circuit DC1 and the pixel row is configured not to cross with the signal line connecting the fourth drive circuit DC4 and the pixel column. Therefore, capacitive coupling caused by parasitic capacitance formed by the crossing of signal lines in the non-display area 40 is reduced.

[0098] Figure 10 Shown in Figure 8 An embodiment of the pixel PX and driving circuit at the second position B2 on the edge of the display panel 20. Figure 10 In the middle, the drive circuits DC1 and DC4 are in accordance with... Figure 9 A similar arrangement is used in the non-display area 40. Different types of drive circuits DC1 and DC4 are configured to correspond to individual pixel rows or pixel columns. For example, the first drive circuit DC1 may correspond to a pixel row, and the fourth drive circuit DC4 may correspond to a pixel column. At the second position B2, five first drive circuits DC1 correspond to five pixel rows, and five fourth drive circuits DC4 correspond to five pixel columns.

[0099] The drive circuits DC1 and DC4 can tilt at an angle relative to the plane according to the shape of the display area 30. Figure 10 When measuring the angle of inclination in the clockwise direction, the angle β4 formed when the first drive circuit DC1 on the right side tilts from the reference line (Lref) is greater than the angle β3 formed when the fourth drive circuit DC4 on the leftmost side tilts from the reference line (Lref).

[0100] Drive circuits DC1 and DC4 are arranged in series in the non-display area 40. The types of drive circuits DC1 and DC4 are changed, and they are arranged in columns along the circumference of the display area 30. For example, in... Figure 10 In the display area 30, the drive circuits DC1 and DC4, from the leftmost fourth drive circuit DC4 to the rightmost fourth drive circuit DC4, are arranged in a single column along the circumference of the display area 30, while the type of drive circuit changes.

[0101] When steps occur between pixel arrangements, the type of drive circuit changes and is set according to the type of the corresponding step. When steps are generated between pixel arrangements for each row, the first drive circuit DC1 corresponds to the corresponding step. When steps are generated for each column, the fourth drive circuit DC4 corresponds to the corresponding step. The first drive circuit DC1 supplies signals to different pixel rows, and the fourth drive circuit DC4 supplies signals to different pixel columns. (About...) Figure 10 A step is generated in the row and column directions by a pixel PX, so the first driving circuit DC1 and the fourth driving circuit DC4 are set alternately.

[0102] A driving circuit supplies signals to pixels PX in a row or column. A pixel PX includes multiple sub-pixels PX11, PX12, and PX13. Therefore, a driving circuit supplies signals to multiple sub-pixels PX11, PX12, and PX13 in a pixel row or a pixel column. Thus, multiple signal lines for a driving circuit are configured to supply signals to a pixel row or a pixel column. The signal lines of driving circuits DC1 and DC4 that supply signals to pixels PX are configured not to cross each other in the non-display area 40. Signal lines connected to different types of driving circuits are configured not to cross each other in the non-display area 40.

[0103] Figure 11 Shown in Figure 8 An embodiment of the pixel PX and driving circuit at the third position B3 on the edge of the display panel 20. Figure 11 In the middle, the drive circuit is in conjunction with Figure 9 A similar arrangement is found in the non-display area 40. Different types of driving circuits correspond to individual pixel rows or pixel columns. For example, the first driving circuit DC1 corresponds to a pixel row, and the fourth driving circuit DC4 corresponds to a pixel column. In the third position, eight first driving circuits DC1 correspond to eight pixel rows, and two fourth driving circuits DC4 correspond to two pixel columns.

[0104] The drive circuits DC1 and DC4 can tilt at an angle relative to the plane according to the shape of the display area 30. Figure 11When measuring the angle of inclination in the clockwise direction, the angle β6 formed when the first drive circuit DC1 set on the far right tilts from the reference line (Lref) is greater than the angle β5 formed when the first drive circuit DC1 set on the far left tilts from the reference line (Lref).

[0105] Drive circuits DC1 and DC4 are arranged in series in the non-display area 40. The types of drive circuits DC1 and DC4 are changed, and they are arranged in columns along the circumference of the display area 30. For example, in... Figure 11 In the display area 30, the first driving circuit DC1 and DC4, which are set from the leftmost to the rightmost, are arranged in a single column along the circumference of the display area 30, while the type of driving circuit changes.

[0106] When steps occur between pixel arrangements, the type of driving circuit changes and is set according to the type of the corresponding step. When steps are generated between pixel arrangements for each row, the first driving circuit DC1 corresponds to the corresponding step. When steps are generated for each column, the fourth driving circuit DC4 corresponds to the corresponding step. The first driving circuit DC1 supplies signals to different pixel rows, and the fourth driving circuit DC4 supplies signals to different pixel columns.

[0107] A driving circuit supplies signals to pixels PX in a row or column. A pixel PX includes multiple sub-pixels PX11, PX12, and PX13. Therefore, a driving circuit supplies signals to multiple sub-pixels PX11, PX12, and PX13 in a pixel row or a pixel column. Thus, multiple signal lines for a driving circuit are configured to supply signals to a pixel row or a pixel column. The signal lines of driving circuits DC1 and DC4 that supply signals to pixels PX are configured not to cross each other in the non-display area 40. Signal lines connected to different types of driving circuits are configured not to cross each other in the non-display area 40.

[0108] like Figures 9 to 11 As shown, different numbers of drive circuits DC1 and DC4 can be arranged according to their positions on the display panel 20. For example, multiple fourth drive circuits DC4 are arranged in a first position to create steps between pixel arrangements in each column. Multiple first drive circuits DC1 are arranged in a third position to create steps between pixel arrangements in each row. Therefore, the type and number of drive circuits DC1 and DC4 arranged on the circumference of the display area 30 vary.

[0109] Compared to the first exemplary embodiment, the display area 30 is formed as an ellipse, thus changing the curvature of the boundary between the display area 30 and the non-display area 40. In one embodiment, driving circuits DC1 and DC4 are arranged in series on the circumference of the display area 30 and positioned in the normal direction of the boundary between the display area 30 and the non-display area 40. As a result, the width of the non-display area 40 decreases when the curvature changes.

[0110] Figure 12 A third embodiment of a display panel 20 with curved portions is shown. For example, the display panel 20 is formed by combining a segmented first region CA3 and a quadrilateral second region CA4.

[0111] The shape of the display area 30 can be determined corresponding to the shape of the display panel 20. For example, when a portion of the display panel 20 is bent, the display area 30 corresponding to that portion is bent. Therefore, the display area 30 of the first region CA3 is formed as a segment, and the display area 30 of the second region CA4 is formed as a quadrilateral. A non-display area 40, including the driving circuit, is formed on the display panel 20 in an area excluding the display area 30.

[0112] Multiple pixels PX are located within the display area 30. The pixels PX are arranged in a matrix within the display area 30. The pixels PX are appropriately configured to correspond to curves within the display area 30. For example, when the display area 30 is segmented, steps are created between the arrangement of pixels at the edges of the segmented display area 30.

[0113] For example, quadrilateral pixels PX are disposed on the edges of the curved display area 30, thus creating a step between the pixel arrangements. For example, a step is formed between the pixel arrangements of the first row and the pixel arrangements of the second row by the difference of six pixels PX on the edges of the display area 30 corresponding to the first and second rows.

[0114] The steps between adjacent rows or columns of pixels can vary depending on the location of the corresponding edges. For example, a step corresponding to a six-pixel difference can be created between the pixel arrangements in the first and second rows. A step corresponding to a four-pixel difference can be created between the pixel arrangements in the second and third rows.

[0115] The driving circuitry is appropriately formed in the non-display area 40 according to the shape of the display area 30. For example, when the pixels PX are arranged in a segmented manner, the driving circuitry for supplying signals to the pixels PX is arranged along the circumference of the arc segment on which the pixels PX are arranged. When the display panel 20 is segmented, the shape formed by the display area 30 including the pixels PX and the non-display area 40 including the driving circuitry can be segmented.

[0116] exist Figure 12 In one embodiment, the shape and size of pixels PX are the same. In another embodiment, the size of pixels PX in two or more regions of display area 30 can be different. For example, pixels PX in the second region CA4 of display area 30 can be larger than pixels PX on the edge of the first region CA3.

[0117] The driving circuits DC1, DC2, and DC4 can be appropriately positioned in the non-display area 40, so that the non-display area 40 occupies a narrow area on the display panel 20. When pixels PX are arbitrarily arranged on the display panel 20, steps appear between the pixel arrangements. As a result, the driving circuits can be configured differently from those of a display panel 20 with a quadrilateral arrangement of pixels PX.

[0118] Figure 13 Shown in Figure 12 An embodiment of a pixel PX and its driving circuit at a first position C1 on the edge of the first region CA3 of the display panel 20. Figure 13 In this configuration, the driving circuit is located in the non-display area 40. Furthermore, different types of driving circuits DC1, DC2, and DC4 are disposed at various locations within the non-display area 40. For example, the non-display area 40 may include a region where the first driving circuit DC1, the second driving circuit DC2, and the fourth driving circuit DC4 are disposed; a region where the first driving circuit DC1 and the fourth driving circuit DC4 are disposed; and a region where the second driving circuit DC2 and the fourth driving circuit DC4 are disposed. Different types and numbers of driving circuits DC1, DC2, and DC4 may be arranged along the circumference of the display area 30 within the non-display area 40.

[0119] In this case, different types of driving circuits DC1, DC2, and DC4 can be set for each pixel row or pixel column. For example, the first driving circuit DC1 and the second driving circuit DC2 can correspond to a pixel row, and the fourth driving circuit DC4 can correspond to a pixel column. In the first position, one first driving circuit DC1 and one second driving circuit DC2 correspond to one pixel row, and fourteen fourth driving circuits DC4 correspond to fourteen pixel columns.

[0120] The areas occupied by different types of drive circuits DC1, DC2, and DC4 can be different. For example, the area of ​​a first drive circuit DC1, the area of ​​a second drive circuit DC2, and the area of ​​a fourth drive circuit DC4 can be different.

[0121] Each of the drive circuits DC1, DC2, and DC4 can be tilted at an angle relative to the flat surface, depending on the shape of the display area 30. For example, in the first area CA3, the drive circuit can be tilted at an angle substantially the same as the normal angle on the boundary between the display area 30 and the non-display area 40, and can be positioned in the non-display area 40. When the display area 30 is curved, the normal direction of the boundary between the display area 30 and the non-display area 40 changes along the circumference of the display area 30. As a result, the setting angle of the drive circuits along the circumference of the display area 30 relative to the reference line (Lref) changes by the normal direction. The fourth drive circuit DC4 at the center is parallel to... Figure 13 The baseline (Lref) in the system.

[0122] In one embodiment, the drive circuits DC1, DC2, and DC4, which are arranged to the right or left of the fourth drive circuit DC4 along the circumference of the display area 30, are tilted so that their angles with the reference line (Lref) can gradually increase or decrease. For example, the fourth drive circuit DC4 arranged on the right has a positive setting angle γ1 with the reference line (Lref).

[0123] In the case of the same type of drive circuit, the setting angle relative to the reference line (Lref) can vary depending on the position of the pixel row or pixel column. For example, the setting angle of the fourth drive circuit DC4 corresponding to different pixel columns can be different from each other.

[0124] The drive circuits DC1, DC2, and DC4 are arranged in series in the non-display area 40. The types of drive circuits DC1, DC2, and DC4 are changed, and they are arranged in a single column along the circumference of the display area 30. For example, in... Figure 13 In the display area 30, the drive circuits DC1, DC2 and DC4, from the second drive circuit DC2 on the far left to the first drive circuit DC1 on the far right, are arranged in a single column along the circumference of the display area 30, while the type of drive circuit changes.

[0125] When steps occur between pixel arrangements, the type of driving circuit changes and is set according to the type of the corresponding step. When steps are generated between pixel arrangements for each row, the first driving circuit DC1 and the second driving circuit DC2 correspond to the corresponding steps. When steps are generated for each column, the fourth driving circuit DC4 corresponds to the corresponding steps. The first driving circuit DC1 and the second driving circuit DC2 supply signals to different pixel rows, and the fourth driving circuit DC4 supplies signals to different pixel columns.

[0126] In this case, the first driving circuit DC1 and the second driving circuit DC2 can be positioned in adjacent regions corresponding to the steps between pixel arrangements in the same row. Furthermore, as... Figure 13As shown, steps for the first and second pixel rows are generated on the right and left sides of the central region. Consequently, the first driving circuit DC1 and the second driving circuit DC2 can be configured to correspond to either the right or left side. For example, the second driving circuit DC2 can correspond to the steps for the first and second pixel rows on the left side. The first driving circuit DC1 can correspond to the steps for the first and second pixel rows on the right side.

[0127] A driving circuit supplies signals to pixels PX in a row or column. A pixel PX includes multiple sub-pixels PX11, PX12, and PX13. Therefore, a driving circuit supplies signals to sub-pixels PX11, PX12, and PX13 in a pixel row or column. Thus, multiple signal lines are formed to supply signals to a pixel row or column via a single driving circuit. For example, a first driving circuit DC1 supplies scan signals to a pixel row. Multiple pixels PX, including R sub-pixels, G sub-pixels, and B sub-pixels, are formed in a pixel row. Consequently, scan lines for supplying scan signals to multiple R sub-pixels, scan lines for supplying scan signals to multiple G sub-pixels, and scan lines for supplying scan signals to multiple B sub-pixels are formed corresponding to a first driving circuit DC1. This applies to other cases where signal lines are connected to different types of driving circuits in the same manner.

[0128] The signal lines supplying signals to the drive circuits DC1, DC2, and DC4 of pixel PX are configured not to cross each other in the non-display area 40. Signal lines connected to different types of drive circuits DC1, DC2, and DC4 are also configured not to cross each other in the non-display area 40. For example, the signal line connecting the adjacent first drive circuit DC1 and the pixel row is configured not to cross with the signal line connecting the fourth drive circuit DC4 and the pixel column. Therefore, capacitive coupling caused by parasitic capacitance formed by the crossing of signal lines in the non-display area 40 is reduced.

[0129] Figure 14 Shown in Figure 12 An embodiment of a pixel PX and its driving circuit at a second position C2 on the edge of the first region CA3 of the display panel 20. Figure 14 In the middle, the drive circuits DC1 and DC4 are in accordance with... Figure 13 A similar arrangement is located in the non-display area 40. Different types of driving circuits DC1, DC2, and DC4 can be configured to correspond to individual pixel rows or pixel columns. For example, the first driving circuit DC1 can correspond to a pixel row, and the fourth driving circuit DC4 can correspond to a pixel column. At the second location C2, four first driving circuits DC1 correspond to four pixel rows, and six fourth driving circuits DC4 correspond to six pixel columns.

[0130] The drive circuits DC1, DC2, and DC4 can be tilted at an angle relative to the plane according to the shape of the display area 30. Figure 14 When measuring the angle of inclination in the clockwise direction, the angle γ3 formed when the first drive circuit DC1 set on the far right tilts from the reference line (Lref) is greater than the angle γ2 formed when the fourth drive circuit DC4 set on the far left tilts from the reference line (Lref).

[0131] The drive circuits DC1, DC2, and DC4 are arranged in series in the non-display area 40. The types of drive circuits DC1, DC2, and DC4 are varied, and they are arranged in columns along the circumference of the display area 30. For example, in... Figure 14 In the display area 30, the drive circuits DC1, DC2 and DC4, from the fourth drive circuit DC4 on the far left to the first drive circuit DC1 on the far right, are arranged in a single column along the circumference of the display area 30, and the type of drive circuit changes at the same time.

[0132] When steps occur between pixel arrangements, the type of drive circuit changes and is set according to the type of the corresponding step. When steps are generated between pixel arrangements for each row, the first drive circuit DC1 corresponds to the corresponding step. When steps are generated for each column, the fourth drive circuit DC4 corresponds to the corresponding step. The first drive circuit DC1 supplies signals to different pixel rows, and the fourth drive circuit DC4 supplies signals to different pixel columns. (About...) Figure 14 A step is generated in the row and column directions by a pixel PX, so the first driving circuit DC1 and the fourth driving circuit DC4 are set alternately.

[0133] A driving circuit supplies signals to pixels PX in a row or column. A pixel PX includes multiple sub-pixels PX11, PX12, and PX13. Consequently, a driving circuit supplies signals to multiple sub-pixels PX11, PX12, and PX13 in a pixel row or pixel column. Therefore, multiple signal lines for a driving circuit are configured to supply signals to a pixel row or pixel column. The signal lines of the driving circuits DC1, DC2, and DC4 that supply signals to pixels PX are configured not to cross each other in the non-display area 40. Signal lines connected to different types of driving circuits DC1, DC2, and DC4 are configured not to cross each other in the non-display area 40.

[0134] Figure 15 Shown in Figure 12 An embodiment of the pixel PX and driving circuit at the third position C3 on the edge of the first region CA3 of the display panel 20. Figure 15 In the middle, the drive circuit is in conjunction with Figure 13A similar arrangement is found in the non-display area 40. Different types of driving circuits DC1, DC2, and DC4 can correspond to individual pixel rows or pixel columns. For example, the second driving circuit DC2 can correspond to a pixel row, and the fourth driving circuit DC4 can correspond to a pixel column. At the third position C3, four second driving circuits DC2 correspond to four pixel rows, and six fourth driving circuits DC4 correspond to six pixel columns.

[0135] The third position C3 is symmetrical to the second position C2 about the center of the display area 30. The first driving circuit DC1 and the fourth driving circuit DC4 are located in the non-display area 40 of the second position C2, but the second driving circuit DC2 and the fourth driving circuit DC4 are located in the non-display area 40 of the third position C3.

[0136] The drive circuits DC1, DC2, and DC4 are tilted at an angle relative to the plane according to the shape of the display area 30. Figure 15 When measuring the angle of inclination from the reference line (Lref) in the clockwise direction, the angle formed when the fourth drive circuit DC4, which is set on the far right, tilts from the reference line (Lref) is smaller than the angle formed when the second drive circuit DC2, which is set on the far left, tilts from the reference line (Lref).

[0137] The drive circuits DC1, DC2, and DC4 are arranged in series in the non-display area 40. The types of drive circuits DC1, DC2, and DC4 are varied, and they are arranged in columns along the circumference of the display area 30. For example, in... Figure 15 In the display area 30, the drive circuits DC1, DC2 and DC4, from the second drive circuit DC2 on the far left to the fourth drive circuit DC4 on the far right, are arranged in a single column along the circumference of the display area 30, and the type of drive circuit changes at the same time.

[0138] When steps occur between pixel arrangements, the type of drive circuit changes and is set according to the type of step. When steps are generated between pixel arrangements for each row, the second drive circuit DC2 corresponds to the corresponding step. When steps are generated for each column, the fourth drive circuit DC4 corresponds to the corresponding step. The second drive circuit DC2 supplies signals to different pixel rows, and the fourth drive circuit DC4 supplies signals to different pixel columns.

[0139] A driving circuit supplies signals to pixels PX in a row or column. A pixel PX includes multiple sub-pixels PX11, PX12, and PX13. Therefore, a driving circuit supplies signals to multiple sub-pixels PX11, PX12, and PX13 in a pixel row or a pixel column. Thus, multiple signal lines for a driving circuit are configured to supply signals to a pixel row or a pixel column. The signal lines of the driving circuits DC1, DC2, and DC4 that supply signals to pixels PX are configured not to intersect each other in the non-display area 40. Signal lines connected to different types of driving circuits DC1, DC2, and DC4 are configured not to intersect each other in the non-display area 40.

[0140] like Figures 13 to 15 As shown, different numbers of drive circuits DC1, DC2, and DC4 can be arranged according to their positions on the display panel 20. For example, multiple fourth drive circuits DC4 are arranged in a first position to create steps between pixel arrangements in each column, multiple first drive circuits DC1 are arranged in a second position to create steps between pixel arrangements in each row, and multiple second drive circuits DC2 are arranged in a third position to create steps between pixel arrangements in each row. Therefore, the type and number of drive circuits DC1, DC2, and DC4 on the circumference of the display area 30 change.

[0141] Compared to the first and second exemplary embodiments, a portion of the display area 30 is formed as a segment, thus changing the curvature of the boundary between the display area 30 and the non-display area 40. In one example embodiment, drive circuits DC1, DC2, and DC4 are arranged in series on the circumference of the display area 30 and positioned in the normal direction of the boundary between the display area 30 and the non-display area 40. As a result, the width of the non-display area 40 decreases when the curvature changes.

[0142] Figure 16 A fourth embodiment of a display panel 20 having at least one curved portion is shown. Figure 16 In this process, the display panel 20 is formed by combining a concave, curved first region CA5 and a quadrilateral second region CA6.

[0143] The shape of the display area 30 can be determined corresponding to the shape of the display panel 20. For example, when a portion of the display panel 20 is bent, the display area 30 corresponding to that portion is bent. Therefore, the display area 30 of the first region CA5 is formed as concave and bent, and the display area 30 of the second region CA6 is formed as quadrilateral. A non-display area 40, including the driving circuit, is formed on the display panel 20 in the region excluding the display area 30.

[0144] Multiple pixels PX are located in the display area 30. Pixels PX can be arranged in a matrix in the display area 30. Pixels PX are appropriately arranged to correspond to curvatures in the display area 30. For example, when the display area 30 is concave and curved, steps are created between the arrangement of pixels on the edges of the concave and curved display area 30.

[0145] For example, quadrilateral pixels PX are disposed on the curved edge of the display area 30, creating a step between the pixel arrangements. For example, a step is created between the pixel arrangements of the first column and the pixel arrangements of the second column by the difference between two pixels PX on the edges of the display area 30 corresponding to the first and second columns from the left.

[0146] The steps between adjacent rows or columns of pixels can vary depending on the location of the corresponding edges. For example, a step caused by a difference of two pixels may be created between the pixel arrangements in the first and second columns. A step caused by a difference of one pixel may be created between the pixel arrangements in the third and fourth columns.

[0147] The driving circuit is appropriately formed in the non-display area 40 according to the shape of the display area 30. For example, when the pixel PX is in a concave and curved form, the driving circuit for supplying signals to the pixel PX is provided along the concave curve on which the pixel PX is provided.

[0148] exist Figure 16 In one embodiment, the shape and size of pixels PX are the same. In another embodiment, the size of pixels PX in two or more regions of display area 30 can be different. For example, the pixel PX in the second region CA6 of display area 30 can be larger than the pixel PX on the edge of the first region CA5.

[0149] The driving circuits DC1, DC2, and DC4 can be appropriately positioned in the non-display area 40, so that the non-display area 40 occupies a narrow area on the display panel 20. When pixels PX are arbitrarily arranged in the display panel 20, steps appear between the pixel arrangements, so the driving circuits are arranged in a different manner than pixels arranged in a quadrilateral pattern.

[0150] Figure 17 Shown in Figure 16An embodiment of a pixel PX at a first position D1 in a first region CA5 on a display panel 20 and a driving circuit. As shown, the driving circuit is located in a non-display region 40. Different types of driving circuits DC1, DC2, and DC4 can be disposed at various locations in the non-display region 40. For example, the non-display region 40 may include an area in which a first driving circuit DC1 and a fourth driving circuit DC4 are disposed, an area in which a second driving circuit DC2 is disposed, and an area in which a third driving circuit is disposed. Different types and numbers of driving circuits DC1, DC2, and DC4 can be disposed in the non-display region 40 along the circumference of the display region 30.

[0151] In this case, different types of drive circuits DC1, DC2, and DC4 can be configured for each pixel row or pixel column. For example, the first drive circuit DC1 and the second drive circuit DC2 can correspond to pixel rows, and the fourth drive circuit DC4 can correspond to pixel columns. In the first region CA5, seven first drive circuits DC1 and seven second drive circuits DC2 correspond to seven pixel rows, and five fourth drive circuits DC4 correspond to five pixel columns.

[0152] The area occupied by different types of drive circuits DC1, DC2, and DC4 can be different. For example, the area of ​​a first drive circuit DC1, the area of ​​a second drive circuit DC2, and the area of ​​a fourth drive circuit DC4 can be different.

[0153] The drive circuits DC1, DC2, and DC4 can be tilted at an angle relative to the flat surface, depending on the shape of the display area 30. For example, in the first region CA5, the drive circuits can be tilted at an angle substantially the same as the normal angle at the boundary between the display area 30 and the non-display area 40, and can be positioned in the non-display area 40. When the display area 30 is curved, the normal direction of the boundary between the display area 30 and the non-display area 40 changes along the circumference of the curved display area 30. As a result, the setting angle of the drive circuits along the circumference of the display area 30 relative to the reference line (Lref) changes through the normal direction.

[0154] Since the shape of the corresponding display area 30 of the second driving circuit DC2 is a straight line, therefore Figure 17 The second driving circuit DC2, located on the left side of the display area 30, is configured to be orthogonal to a straight line. Driving circuits DC1 and DC4, located along the circumference of the display area 30 from the fourth driving circuit DC4 connected to the leftmost pixel column towards the right, are configured to be inclined so that the angle with the reference line (Lref) gradually decreases. For example, the setting angle δ1 of the fourth driving circuit DC4 connected to the leftmost pixel column with the reference line (Lref) has a positive value.

[0155] In the case of the same type of drive circuit, the setting angle relative to the reference line (Lref) can vary depending on the position of the pixel row or pixel column. For example, the setting angle of the fourth drive circuit DC4 corresponding to different pixel columns can be different from each other.

[0156] The drive circuits DC1, DC2, and DC4 are arranged in series in the non-display area 40. The types of drive circuits DC1, DC2, and DC4 are changed, and they are arranged in a single column along the circumference of the display area 30. For example, in... Figure 17 In the middle, corresponding to the curved display area 30, the drive circuits DC1, DC2 and DC4, from the fourth drive circuit DC4 set on the far left to the first drive circuit DC1 set on the far right, are arranged in a single column along the circumference of the display area 30, while the type of drive circuit changes.

[0157] When steps occur between pixel arrangements, the type of driving circuit changes and is set according to the type of the corresponding step. When steps are generated between pixel arrangements for each row, the first driving circuit DC1 and the second driving circuit DC2 correspond to the corresponding steps. When steps are generated for each column, the fourth driving circuit DC4 corresponds to the corresponding steps. The first driving circuit DC1 and the second driving circuit DC2 supply signals to different pixel rows, and the fourth driving circuit DC4 supplies signals to different pixel columns.

[0158] A driving circuit supplies signals to pixels PX in a row or column. A pixel PX includes multiple sub-pixels PX11, PX12, and PX13. Therefore, a driving circuit supplies signals to sub-pixels PX11, PX12, and PX13 in a pixel row or column. Thus, multiple signal lines are formed to supply signals to a pixel row or column via a single driving circuit. For example, a first driving circuit DC1 supplies scan signals to a pixel row. Multiple pixels PX, including R sub-pixels, G sub-pixels, and B sub-pixels, are formed in a pixel row. Therefore, scan lines for supplying scan signals to the multiple R sub-pixels, scan lines for supplying scan signals to the multiple G sub-pixels, and scan lines for supplying scan signals to the multiple B sub-pixels are formed corresponding to a first driving circuit DC1. This applies to other cases where signal lines are connected to different types of driving circuits in a similar manner.

[0159] The signal lines supplying signals to the drive circuits DC1, DC2, and DC4 of pixel PX are configured not to cross each other in the non-display area 40. Signal lines connected to different types of drive circuits DC1, DC2, and DC4 are also configured not to cross each other in the non-display area 40. For example, the signal line connecting the adjacent first drive circuit DC1 and the pixel row is configured not to cross with the signal line connecting the fourth drive circuit DC4 and the pixel column. Therefore, capacitive coupling caused by parasitic capacitance formed by the crossing of signal lines in the non-display area 40 is reduced.

[0160] According to one or more of the above embodiments, the driving circuit supplies different types of driving signals (e.g., scan signals, data signals, transmit control signals and / or test voltages) to the display panel 20, wherein the display panel 20 has an arbitrary shape and the pixels are located in the display area 30 of the display panel 20.

[0161] The above embodiments can be applied to other types of non-quadrilateral displays. In embodiments including a first driving circuit DC1, a second driving circuit DC2, and a fourth driving circuit DC4, the fourth driving circuit DC4 is interchangeable with the third driving circuit, which is their relative position on the display panel 20.

[0162] The driving circuitry can have different densities in the non-display area 40, for example, depending on the pixel arrangement shape. Furthermore, the driving circuitry is connected in series in the non-display area. Therefore, the width of the non-display area 40 can be reduced. Additionally, the signal lines supplying signals to the driving circuitry in the display area do not overlap, thereby reducing parasitic capacitance that might occur when lines overlap.

[0163] Furthermore, in one embodiment, the display panel may include local convex curves and local concave curves. In this case, the driving circuitry can be appropriately configured in conjunction with the exemplary embodiments described above.

[0164] Example embodiments have been disclosed herein, and although specific terminology has been used, it is used and interpreted in a general and descriptive sense only, and not for limiting purposes. In some instances, as will be apparent to those skilled in the art as of the time of this application, features, characteristics, and / or elements described in connection with specific embodiments may be used alone, or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise stated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the invention as set forth in the claims.

Claims

1. A non-quadrilateral display, characterized in that, The display includes: A plurality of pixels are located in a non-quadrilateral display area, each of the plurality of pixels being connected to a first signal line and a second signal line, the first signal line extending in a first direction in the display area, and the second signal line extending in the display area in a second direction intersecting the first direction, the plurality of pixels being configured as a pixel arrangement extending in either the first or second direction and including a plurality of steps, each of the plurality of steps being formed by at least one pixel as a pixel difference between adjacent pixel arrangements; and Multiple driving circuits are arranged sequentially along the outline of the outer region of the display area in the non-display area. The multiple driving circuits include multiple first driving circuits and multiple second driving circuits. Each first driving circuit is connected to the first signal line and each second driving circuit is connected to the second signal line. Specifically, a first number of second drive circuits are located at a first position in the peripheral region between a first pair of adjacent first drive circuits; a second number of second drive circuits are located at a second position in the peripheral region between a second pair of adjacent first drive circuits; and a third number of second drive circuits are located at a third position in the peripheral region between a third pair of adjacent first drive circuits. The first number of second driving circuits, the first pair of adjacent first driving circuits, the second number of second driving circuits, the second pair of adjacent first driving circuits, the third number of second driving circuits, and the third pair of adjacent first driving circuits are arranged sequentially along the outline of the peripheral region. The width of the non-display region is equal to the length of the long side of the first driving circuit or the second driving circuit. Wherein, the first quantity, the second quantity, and the third quantity are different from each other. Wherein, the second number of second driving circuits is located between the first number of second driving circuits and the third number of second driving circuits, and In the plurality of steps, the number of pixels forming the step corresponding to the first position in the first direction is the first number, the number of pixels forming the step corresponding to the second position in the first direction is the second number, and the number of pixels forming the step corresponding to the third position in the first direction is the third number.

2. The display according to claim 1, characterized in that, The first signal line and the second signal line do not intersect each other between the outer pixels adjacent to the peripheral region and the plurality of driving circuits.

3. The display according to claim 1, characterized in that, A portion of the first signal line in the non-display area and a portion of the second signal line in the non-display area are configured to be substantially parallel to the normal direction of the boundary between the display area and the non-display area.

4. The display according to claim 1, characterized in that, The first and second drive circuits, which are adjacent to each other, are set to be substantially parallel.

5. The display according to claim 1, characterized in that, The angle used to arrange the plurality of drive circuits changes according to the position of the plurality of drive circuits.

6. The display according to claim 5, characterized in that, The angle changes in the same way as the normal direction of the circumference of the display area corresponding to the position of each of the plurality of driving circuits.

7. The display according to claim 1, characterized in that, The first driving circuit and the second driving circuit are adjacent to each other in the peripheral region.

8. The display according to claim 1, characterized in that, The plurality of pixels are configured to be controlled by a second signal transmitted via the second signal line in synchronization with a first signal transmitted via the first signal line.

9. The display according to claim 1, characterized in that, The plurality of pixels includes: A plurality of switching transistors, each of the plurality of switching transistors including a first electrode connected to a corresponding second signal line of the second signal lines and a gate electrode connected to a corresponding first signal line of the first signal lines; and A plurality of driving transistors, each of the plurality of driving transistors including a first electrode connected to and receiving a power supply voltage from a second electrode of a corresponding switching transistor among the plurality of switching transistors, and a second electrode connected to an organic light-emitting diode.

10. The display according to claim 9, characterized in that, Each of the plurality of pixels receives an initialization voltage synchronously with a first signal transmitted via a corresponding first signal line corresponding to the previous pixel row.

11. The display according to claim 10, characterized in that, Each of the plurality of pixels further includes a compensation transistor connected between the gate electrode of the driving transistor and the second electrode, wherein the gate electrode of the switching transistor is included as part of a corresponding first signal line.

12. The display according to claim 1, characterized in that, Each of the pixels is connected to a third signal line in the first direction, and the display includes a plurality of third driving circuits alternately arranged with at least one of the second driving circuits, each of the third driving circuits outputting a third signal to a third signal line of at least one of the pixels in the region facing the first driving circuit in the peripheral region.

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