Multi-sensor PTAT for multi-location temperature sensing

Abstract

An integrated circuit for controlling distributed temperature sensors in a semiconductor die is described. The integrated circuit may include: a memory; a controller (such as a PTAT controller) coupled to the memory; temperature sensors distributed at measurement locations (such as locations remote from the controller) in the semiconductor die, wherein a given temperature sensor includes a common building block (or component) for the temperature sensors; and traces between the controller and the building block via an addressable bus, wherein signal lines in the addressable bus for analog signals are multiplexed when communicating between the controller and different temperature sensors.

Description

Technical Field

[0001] This disclosure relates to integrated circuits including semiconductor temperature sensors. Background Technology

[0002] Integrated circuits often incorporate temperature sensors. These sensors can be used to measure the temperature at a specific location on a semiconductor die. Furthermore, temperature sensors can be used to monitor for overheating in high-power components, enabling remedial actions such as reducing power consumption when overheating is a risk. More generally, when the performance characteristics of a component are temperature-dependent, measuring the component's temperature allows for corrective actions. However, these management techniques depend on accurate temperature measurements within the semiconductor die. Moreover, because management techniques use the local temperature of the monitored component, multiple components within a semiconductor die may require independent temperature monitoring when these components are at different temperatures due to thermal inhomogeneities across the semiconductor region. Additionally, it is often advantageous to position the temperature sensing device close to the monitored component so that the temperature measurement accurately reflects the actual temperature of the monitored component. Therefore, it is generally useful to have small and flexible sensing devices that can be inserted near the location to be measured, and ideally, into a functional block containing the component to be measured.

[0003] Semiconductor temperature sensors are often based on the Temperature-to-Absolute-Temperature (PTAT) technique. PTAT utilizes the exponential correlation between the temperature and voltage of the current-voltage characteristics of a semiconductor junction, such as in a diode or in similar devices (e.g., a bipolar junction transistor or a subthreshold field-effect transistor). The temperature can be determined by measuring the voltage difference of this semiconductor junction at two different current densities. Note that if the ratio of the two current densities is M, the difference in the semiconductor junction voltage can be... Where n is the equipment-related factor, k is the Boltzmann constant, T is the absolute temperature (in Kelvin), and q is the electron charge. Since all these parameters except T are constants, the formula is the voltage corresponding to the equipment temperature multiplied by a fixed coefficient.

[0004] Figure 1 presents a diagram illustrating a conventional implementation of PTAT technology. Note that the two sensing devices (SDs) 110-1 and 110-2 (such as temperature sensors) in sensor 118-1 can be placed close to the location to be measured. There is often a scaling factor between these sensing devices such that for any given voltage applied to sensing devices 110-1 and 110-2, the current in sensing device 110-2 can be K times the current in sensing device 110-1. D This can be achieved by implementing sensing device 110-2 as K of sensing device 110-1. DThis can be accomplished using parallel connection instances. Alternatively, the areas of sensing devices 110-1 and 110-2 can be proportional, or another technique can be used. Sensing devices 110-1 and 110-2 can also be (at least approximately) identical, such that K D The nominal ground is equal to 1. Furthermore, currents 112-1 and 112-2 can be supplied to sensing devices 110-1 and 110-2 via corresponding current sources. Note that currents 112-1 and 112-2 can have a controlled ratio, such that current 112-1 is K of current 112-2. I The voltage difference between sensing devices 110-1 and 110-2 is then measured. For example, terminals of each of sensing devices 110-1 and 110-2 may be coupled to a common node (or path) 114 (such as ground or another suitable network). In these embodiments, the voltage difference can be measured as the differential voltage 116 between the terminals of the remaining individual sensing devices. This is because the current density ratio of sensing device 110-1 to sensing device 110-2 is K. D ·K I Therefore, voltage 116 can be equal to For example, by digitizing voltage 116 with an analog-to-digital converter (ADC), voltage 116 can be used as a temperature indicator, thereby providing voltage 116 to a comparator for comparison with a specific temperature or for other purposes.

[0005] One common approach for implementing temperature sensors is a proportional common centroid configuration. This is illustrated in Figure 2, which shows a diagram of an existing sensing device. In Figure 2, sensing devices 110-1 and 110-2 through 110-10 are implemented in a semiconductor die. Note that sensing devices 110-1 and 110-2 through 110-10 can be implemented by tiling nine substantially identical sensing devices into a 3x3 grid 210-1. The central portion of this tile can be used to implement sensing device 110-1, while the remaining eight external portions are electrically coupled in parallel to implement sensing device 110-2 as shown in Figure 1. Using this spatial configuration, the effect of temperature gradients across the sensing region can be reduced, as such gradients would cause some locations of sensing devices 110-2 through 110-10 to be at higher temperatures than the location of sensing device 110-1, while the remaining locations of the sensing devices 110-2 through 110-10 would be at lower temperatures than the location of sensing device 110-1. Therefore, the increased conductivity of some sensing devices at higher temperature locations in sensing devices 110-2 to 110-10 can be offset by the decreased conductivity of the remaining instances at lower temperature locations in sensing devices 110-2 to 110-10, thereby reducing the error. Note that other similar proportional common centroid configurations are used in temperature measurements. Furthermore, sometimes a larger tile or grid of sensing devices is used, such that the outer layer of the tile location can be used as a dummy sensing device to improve the electrical matching between sensing devices 110-1 and 110-2 to 110-10, thereby excluding the location of the dummy sensing device along the outer edge of the tile from the temperature measurement.

[0006] While PTAT temperature sensing technology can provide accurate temperature measurements, the control circuitry used to generate currents 112-1 and 112-2 and to process voltage 116 can have a relatively large area. Note that these components are typically implemented in the analog domain using matching and / or calibration techniques to produce an accurate current ratio and to accurately process the resulting voltage 116, which can be very small. For example, when K... I and K D When both are 8, the temperature-voltage gain can be as low as 0.36 mV / K. Therefore, even small inaccuracies in the circuit processing voltage 116 can have a significant impact on temperature measurement. Addressing these issues could lead to increased circuit area and complexity, making the implementation of the temperature sensor dominated by control and processing circuitry rather than the temperature sensor device itself.

[0007] Typically, control and processing circuitry are implemented together with the sensing device. However, it can be difficult to position the sensing device close to the desired location on the semiconductor surface to be measured because of the constraint that the control and processing circuitry must also be positioned at that location. Furthermore, this approach unnecessarily duplicates the control and processing circuitry when using multiple sensor devices.

[0008] Some solutions use a single measurement controller with a built-in multiplexer to allow sensing devices (such as semiconductor diodes) to be located at the position or point of measurement only. This is illustrated in Figure 3, which presents a diagram of an existing system. In this system, controller 318 implements control and processing circuitry that can be used with multiple sensors 118 located at various remote locations. Each of the sensors 118 may include two instances of sensing devices 110-1 and 110-2 to enable temperature measurement at a given location. Furthermore, the instances of sensing devices 110-1 and 110-2 are electrically coupled to a common controller 318 using separate on-die interconnects 312. Controller 318 can use internal multiplexing (addressing provided via control logic 314 and switch 316) to enable the measurement of the voltage 310 of each of the sensors 118 one at a time, such as in response to software polling or in some periodic pattern. This allows a single controller 318 to be used with multiple sensors 118, thereby avoiding duplication of the component, at the cost of adding additional analog multiplexing functionality to the controller 318 and additional analog interconnect routing between the controller 318 and the various sensors 118.

[0009] Figure 4 illustrates the existing floorplan associated with controller 318 (Figure 3). Note that controller 318 can be placed on the semiconductor chip along with various other blocks that implement the intended functions of the semiconductor chip, such as function blocks or FB 410, logic blocks or LB 412, input / output or I / O blocks 414, and power converters or PC blocks 416. Some of these blocks (such as function blocks 410-2, logic blocks 412, input / output blocks 414-1, and power converter blocks 416) may include instances of temperature sensors, such as the grid 210 of sensor devices, for example, a proportional common centroid configuration of sensing devices 110-1 and 110-2. The various blocks of the semiconductor chip are electrically interconnected, for example, by using metallized interconnects 418 in trace channels 420, to implement the semiconductor chip functions. These interconnects can be used to transmit logic signals, power signals, analog signals, or for other purposes. However, because sensitive analog signals can be affected by disturbances from other signals, these interconnects are often routed by using additional metal shielding around sensitive analog signals with low-noise signals (such as ground) to reduce coupling with other signals. Furthermore, signals with larger currents or requiring lower resistance (such as signals carrying current through sensor 118) may require wider metal widths for routing or traces than other signals. These requirements may necessitate manual routing of these interconnects by the designer (in contrast to using automated design tools), potentially making these interconnects more complex and expensive. Additionally, shielding requirements can consume significant metallization resources, especially when one shielded interconnect inevitably crosses another. This can lead to routing congestion and manual rework, further increasing design time and costs. Alternatively, adding additional metal layers during manufacturing to provide additional metallization resources could increase manufacturing costs. This congestion can be particularly problematic in the area near controller 318, as the individual shielded analog signal bundles are routed to that location. Note that other routing formats (such as through-cell routing) may have similar limitations and concerns.

[0010] Existing designs often lack flexibility, such as the ability to change the number of sensors 118. Controller 318 and associated multiplexers are frequently implemented with the maximum number of channels. If the number of channels is too small, the number of sensors 118 is limited unless a second controller is implemented. Alternatively, if the number of channels is made large enough that the semiconductor chip is unlikely to require more sensors 118 than controller 318 can accommodate, controller 318 may become oversized and may include numerous unused analog multiplexer channels. Summary of the Invention

[0011] An integrated circuit for controlling distributed temperature sensors in a semiconductor die is described. The integrated circuit may include: a memory; a controller (such as a PTAT controller) coupled to the memory; temperature sensors distributed at measurement locations (such as locations remote from the controller) in the semiconductor die, wherein a given temperature sensor includes a common building block (or component) for the temperature sensors; and traces between the controller and the building block via an addressable bus, wherein signal lines (or traces) in the addressable bus for analog signals are multiplexed when communicating between the controller and different temperature sensors.

[0012] Furthermore, the building blocks of a given temperature sensor may include a common centroid array of the sensor device and another building block including switches and control logic (such as decoding logic) for the switches. The switches may be controlled by the control logic based at least in part on addressing signals and a given address of the given temperature sensor. In some embodiments, when not enabled or used, the given temperature sensor may include another switch to provide a replicated voltage to a terminal of one of the switches in order to maintain approximately zero volts across the terminals of said one switch.

[0013] Furthermore, the switching and addressing control logic associated with the controller can be located at different physical locations on the semiconductor die. Note that the addressing control logic can control changes in the number of temperature sensors in the integrated circuit. In some embodiments, the controller can use memory and addressing control logic to calibrate the temperature sensors.

[0014] Additionally, the signal lines for analog signals in the addressable bus can be Kelvin-sensing. The signal lines for analog signals leading to a given temperature sensor can: transmit current to at least one sensing device within the given temperature sensor; and transmit voltage from at least one sensing device to a controller.

[0015] Note that an addressable bus can include bus traces (such as global bus traces).

[0016] In some embodiments, signal lines for analog signals in the bus trace are routed together in one or more common shield groups (or one or more analog bus groups). Note that a single common shield group can be used to eliminate congestion associated with the bus trace.

[0017] Furthermore, signal lines used for logical address signals may be routed together with signal lines used for analog signals, but may not be included in one or more common shielding groups. Alternatively, signal lines used for logical address signals may be routed independently of signal lines used for analog signals.

[0018] Furthermore, the number of temperature sensors in an integrated circuit can be limited by the number of bits used to address the temperature sensors.

[0019] In addition, when there are N temperature sensors, the number of logic traces included in the addressable bus can be equal to log2(N) rounded to the nearest integer.

[0020] In some embodiments, the addressable bus includes another signal line from the temperature sensor to the controller, wherein the controller uses a signal received on this other signal line to generate feedback on the trace to reduce leakage current.

[0021] Note that the integrated circuit can perform sensor calibration. Sensor calibration may include: a calibration mode in which a first sensing device in a given temperature sensor is provided with a first fixed current and a first controlled (regulated) current, and a second sensing device in the given temperature sensor is provided with a second fixed current; and a measurement mode in which the first sensing device is provided with a third fixed current, and the second sensing device is provided with a fourth fixed current and a second controlled current. Furthermore, the integrated circuit may include a calibration controller that regulates the first controlled current based at least in part on the voltage observed between the first and second sensing devices. The calibration controller may calculate the value of the second controlled current based at least in part on the value of the first controlled current.

[0022] In some embodiments, the first fixed current and the fourth fixed current may be the same, and the second fixed current and the third fixed current may be the same. Furthermore, the calculation of the second controlled current may include reversing the sign of the first controlled current. Additionally, a second switch may be used to generate the first and fourth fixed currents from (shared) circuit components. Furthermore, a third switch may be used to generate the first and second controlled currents from a (shared) current-to-analog converter (DAC).

[0023] Another embodiment provides an electronic device including an integrated circuit.

[0024] Another embodiment provides a system including an integrated circuit.

[0025] Another embodiment provides a method for controlling a temperature sensor. The method includes at least some of the operations performed by an integrated circuit.

[0026] This summary is provided for the purpose of illustrating some exemplary embodiments to provide a basic understanding of some aspects of the subject matter described herein. Therefore, it will be understood that the above features are illustrative and should not be construed as narrowing the scope or spirit of the subject matter described herein in any way. Other features, aspects, and advantages of the subject matter described herein will become clear from the following detailed description, drawings, and claims. Attached Figure Description

[0027] Figure 1 is a diagram illustrating an existing implementation of the proportional-to-absolute-temperature (PTAT) technique.

[0028] Figure 2 is a diagram of existing sensing devices.

[0029] Figure 3 is a diagram of the existing system.

[0030] Figure 4 is a diagram of the existing layout plan associated with the controller in the system of Figure 3.

[0031] Figure 5 This is a block diagram illustrating an example of a temperature measurement system according to some embodiments of the present disclosure.

[0032] Figure 6 This is a diagram illustrating an example of a grid of sensing devices tiled in proportion to a common centroid according to some embodiments of the present disclosure, as well as blocks having switches, control logic, and memory.

[0033] Figure 7 This is a block diagram illustrating an example of layout planning in an integrated circuit according to some embodiments of the present disclosure.

[0034] Figure 8 This is a block diagram illustrating an example of a temperature measurement system according to some embodiments of the present disclosure.

[0035] Figure 9 This is a block diagram illustrating an example of a temperature measurement system according to some embodiments of the present disclosure.

[0036] Note that in the diagram, similar reference numerals always refer to the corresponding parts. Furthermore, multiple instances of the same part are specified by a common prefix separated by a dash and the instance number. Detailed Implementation

[0037] An integrated circuit for controlling distributed temperature sensors in a semiconductor die is described. The integrated circuit may include: a memory; a controller (such as a PTAT controller) coupled to the memory; temperature sensors distributed at measurement locations (such as locations remote from the controller) in the semiconductor die, wherein a given temperature sensor includes a common building block (or component) for the temperature sensors; and wiring between the controller and the building block via an addressable bus, wherein signal lines for analog signals in the addressable bus are multiplexed when communicating between the controller and different temperature sensors.

[0038] By communicating with temperature sensors via addressable buses, these measurement techniques can reduce the complexity of designing and manufacturing integrated circuits. For example, routing in integrated circuits can be simpler and signal line crossings can be avoided. Furthermore, routing can occupy less valuable substrate surface area on the semiconductor die. Additionally, measurement techniques allow for flexible adjustment or variation of the number of temperature sensors. Therefore, measurement techniques can reduce the cost of integrated circuits and increase their yield, enabling their use in a wide variety of systems and applications.

[0039] Now, we describe an embodiment of the controller and integrated circuit. Figure 5 A block diagram illustrating an example temperature measurement system is presented. The system includes a centralized controller 510 and multiple sensors 512. The controller 510 provides currents 112-1 and 112-2 to an analog drive bus interconnect (ADBI) 514, which the sensors 512 access via bus 516. Each sensor has a local switch 518 that, when it is an active sensor, selectively connects its sensing device 110 to the ADBI 514. An additional analog sensing bus interconnect (ASBI) 520 is received by the controller 510 to measure voltage 310. Furthermore, the sensors 512 are provided with a logic address bus (LAB) 522, which the control logic 524 in the controller 510 can use to provide addresses to indicate which of the sensors 512 should be enabled. Each of the sensors 512 includes control logic (CL) 526 with an address decoder that compares the address presented on the logic address bus 522 with its configuration address (which may be stored in memory 528 using pull-up resistors, or another type of non-volatile indication of the configuration address). When it is determined that the address matches the stored address, the control logic 526 connects switch 518 to connect its devices 513 and 515 to analog bus interconnects 514 and 520. Note that the logic address bus 522 may be driven by controller 510 or by other suitable logic.

[0040] Temperature measurement can be initiated by providing the address of the desired sensor (such as sensor 512-1) to the logic address bus 522 via control logic 524. Addressing sensor 512-1 can respond by detecting an address match and connecting its switch 518-1. The other sensors do not detect such a match and therefore do not connect their switches 518, such that only the sensing device 110 in addressing sensor 512-1 is connected to analog bus interconnects 514 and 520. The analog drive bus interconnect 514 and a first subset of switches 518 conduct current 112 from controller 510 to sensing devices 110-1 and 110-2. The voltage difference generated on sensing devices 110-1 and 110-2 is propagated to analog sensing bus interconnect 520 via a second subset of switches 518. Furthermore, controller 510 can receive this voltage and interpret it as measurement voltage 310. By using the second subset of switch 518 and analog sensing bus interconnect 520 (i.e., Kelvin sensing), the effect of the resistance in the analog drive bus interconnect 514 and the first subset of switch 518 will not cause the measured voltage 310 to be impaired due to IR drop.

[0041] The remote sensor 512 can be implemented using a common centroid array of sensor device 110, which has an additional block containing switch 518 and control logic 526. This is in Figure 6 The diagram illustrates an example of a grid 610-1 of a sensing device 110, wherein the sensing device 110 and a block 612 having switches 518-1, control logic 526-1, and memory 528-1 are tiled at a proportional common centroid. Note that the proportional common centroid tile and block 612 can be provided to the designer as pre-built sub-components, allowing designers of functional blocks requiring temperature sensing to easily include pre-built sub-components. In some embodiments, a library providing pre-built sub-components may include multiple sub-components, each providing different pre-assigned or pre-configured addresses. In other embodiments, the library may provide sub-components with addresses not yet assigned, but provide mechanisms for designers to assign addresses upon inclusion (e.g., programming the addresses by adding additional metallization). Switch 518-1, control logic 526-1, and memory 528-1 may optionally be provided from the library as separate blocks, allowing the sensing device 110 to be placed closer to the location to be measured, while enabling the designer to position switch 518-1, control logic 526-1, and memory 528-1 in less crowded locations within the functional block.

[0042] Using measurement techniques can simplify layout planning in integrated circuits. This is in Figure 7 The diagram illustrates an example of layout planning in an integrated circuit. Note that the routing between controller 510 and sensor 512 can be accomplished via global bus routing 710. Figure 5As shown, the signal lines transmitting analog signals in bus 516 can be routed together in a common shield group (CSG) 530. Since there may only be one such shield group, congestion associated with multiple such traces can be eliminated. Furthermore, with only one common shield trace, there is no concern about needing to traverse two such traces, thus eliminating the cause of such congestion. In some embodiments, the common shield trace 530 can be set up as a pre-planned bus trace in one of multiple trace channels. Note that logic address signals do not need to be shielded, so they can be routed together with the analog bus group, or they can be routed independently, as determined using automated tools for other logic signals.

[0043] Measurement techniques also offer design flexibility, allowing for changes in the number of sensors (or functional blocks containing sensors) with minimal design effort. Therefore, adding and removing sensors in the integrated circuit can result in minimal or no changes to the controller 510 and bus 516. Furthermore, adding a temperature measurement at a location accessing existing bus traces in bus 516 may simply require adding another instance of sensor 512, assigning an address, and connecting it to bus 516. Alternatively, removing an instance of sensor 512 simply requires removing it. Compared to systems with dedicated traces and multiplexing within the controller, the controller 510 can be designed to accommodate any number of sensors. For example, if the logical address is set to an 8-bit binary number, up to 256 sensors can be accommodated without exhausting the address space. Typically, in contrast to N shielded analog traces in existing methods, the trace overhead associated with N sensors can be the number of logical traces, as low as log2(N) rounded to the nearest integer.

[0044] In some embodiments, a given sensor in sensor 512 may have a small number of block address bits and one or more block select signals. For example, a given sensor may have a 4-bit block address and one block select signal. Furthermore, up to 16 sensors can be assigned for each block select signal. In such a system, the block address (or a suitably buffered version) can be routed to all components, while the block select signals can be assigned so that sensors in similar areas of the integrated circuit can use the same block select. Because the address signals are logic signals, custom routing can be implemented using automated tools, thus minimizing concerns about the complexity of the physical implementation. Furthermore, the controller 510 providing the addresses can be implemented using a hardware description language (HDL), allowing for variations in addressing techniques and address mappings to be implemented using synthetic logic.

[0045] In some embodiments, measurement techniques can be used to reduce switch leakage associated with a disabled sensor, and thereby reduce potential impairment to measurements of an enabled sensor. For example, switch leakage might be caused by subthreshold current through a switch nominally disabled. In some embodiments, this leakage current can be mitigated by providing a buffered, low-leakage switch. This is in Figure 8 The diagram illustrates an example block diagram of a temperature measurement system including a controller 810 and multiple sensors (such as sensor 812). Note that the controller 810 can provide an additional buffered version of the signal on the analog sensing bus interconnect 520 as a buffered sensing signal on the buffered sensing interconnect (BSI) 814 back to the bus trace. Furthermore, a series switch 816 can be used to enhance switch 518. At the series connection points of these series switches, a switch 818 with opposite logic control (e.g., switch 818 can be closed when switches 518 and 816 are open) can selectively connect these connection points to the appropriate buffered sensing signal on the buffered sensing interconnect 814. In this way, each disabled sensor presents a logically disconnected switch to the analog drive bus interconnect 514 and the analog sensing bus interconnect, wherein each of the switches 518 has the same voltage across both terminals. Because there is no voltage across switch 518, leakage current associated with switch leakage can be removed or eliminated.

[0046] Furthermore, in some embodiments, measurement techniques can be used to resolve mismatches between sensing devices 110, ensuring that the ratio between sensing devices 110 is maintained as desired. Note that mismatches can occur due to various reasons such as manufacturing variations, random variations throughout the semiconductor die, aging, etc. Figure 9 A block diagram illustrating an example of a temperature measurement system that can reduce the effects of mismatch between sensing devices 110 is presented. Figure 9 In this configuration, the temperature sensor controller 910 can be connected to multiple sensors (such as sensor 812). Furthermore, a given sensor may have inaccuracies in the ratio of its sensing device 110, such that the expected ratio is a number M, but the actual ratio may be a slightly different number (M+ΔM), and ΔM may be potentially different for different sensors.

[0047] To address this issue, a calibration measurement can be performed before the temperature measurement. Note that controller 910 may include a current source 912, which can be configured to provide a current at the same ratio M as the nominal sensor-device ratio M. During the calibration measurement, a calibration engine (CE) 914 within controller 910 can provide one or more control signals for closing switch 916, which can route current 912-1 to analog drive bus interconnect 514-1 and current 912-2 to analog drive bus interconnect 514-2. Furthermore, control logic 524 can provide an addressing signal on logic address bus 522 to the sensor to be calibrated (e.g., sensor 812) that matches the assigned logical address of that sensor. Address matching can be detected by control logic 526-1 (e.g., by using an address comparator). In response, control logic 526-1 can provide one or more control signals that close the switches in switches 518 and 816 leading to analog drive bus interconnect 514 and open switch 818. This allows current 912-1 to be routed to sensing device 110-2, and current 912-2 to sensing device 110-1.

[0048] Furthermore, control logic 526-1 can provide one or more control signals to close the switches in switches 518 and 816 leading to the analog sensing bus interconnect 520. Therefore, the voltage difference between sensing devices 110 can be routed through the analog sensing bus interconnect 520, and controller 910 can receive this voltage difference as voltage difference 310. Comparator 918 can indicate to calibration engine 914 whether the differential voltage 310 is positive or negative. Alternatively, for example, by providing an ADC output to calibration engine 914 instead of the output of comparator 918, voltage difference 310 can be digitized into a multi-bit logic signal.

[0049] When sensing device 110 has no mismatch (e.g., ΔM equals 0), the differential voltage 310 is zero because the current 912 is at the same ratio M as the sensing device 110 receiving these currents. Alternatively, when sensing device 110 has a mismatch ratio of (M+ΔM), a non-zero differential voltage 310 may exist.

[0050] The calibration engine 914 can then provide one or more control signals to close one of the switches 916 to connect the controllable current source (CCS) 920-1, such that the current from the controllable current source 920-1 is also routed through another trace in the switch 916 to the analog drive bus interconnect 514-1. This controllable current source can be a DAC current source or another suitable controllable current. The calibration engine 914 can regulate the current from the controllable current source 920-1 to minimize the differential voltage 310, for example, by performing a binary search based at least in part on the output of the comparator 918. After calibration regulation, the ratio of the current driven on the analog drive bus interconnect 514 can also be (M + ΔM). Furthermore, the calibration engine 914 can store the control value for the controllable current source 920-1 in memory 922 for later use.

[0051] To perform temperature measurements, calibration engine 914 can provide one or more control signals to close switch 924 and open switch 916. This allows currents 912-1 and 912-2 to be routed to analog drive bus interconnect 514-2 and analog drive bus interconnect 514-1, respectively. Current from controllable current source 920-2 can also be routed to analog drive bus interconnect 514-2 through one of the switches 924. Controllable current source 920-2 can provide a current of the same magnitude as controllable current source 920-1, but with the opposite sign, in response to a given current control signal or value from calibration engine 914. In some embodiments, calibration engine 914 can access stored control values ​​in memory 922 (e.g., by indexing control values ​​with sensor logical addresses) and can provide that control signal or value to controllable current source 920-2.

[0052] Furthermore, control logic 524 can provide a matching logic address to sensor 812, causing switches 518 and 816 to close and switch 818 to open, and switches 518 and 816 to close, respectively, on analog drive bus interconnect 514. In this way, current 912-1 and current from controllable current source 920-2 can be routed to sensing device 110-1, and current 912-2 can be routed to sensing device 110-2. This can result in a current with a ratio (M-ΔM):1 being applied to sensing device 110 at a ratio of 1:(M+ΔM). Furthermore, this can lead to... The differential voltage. If ΔM is small enough, then this is actually related to... The same applies. Note that this voltage can be provided to the analog sensing bus interconnect 520 via switches in switches 518 and 816, resulting in a voltage difference 530 in controller 910. This voltage difference can be used for temperature indication, such as by digitizing it using an ADC, comparing it against a threshold, or for other purposes.

[0053] The disclosed controllers, integrated circuits, and measurement technologies can be (or may be included in) any electronic device. For example, electronic devices may include: cellular phones or smartphones, tablet computers, laptop computers, notebook computers, personal or desktop computers, netbook computers, media player devices, e-book devices, etc. Equipment, smartwatches, wearable computing devices, portable computing devices, consumer electronics, access points, routers, switches, communication equipment, testing equipment, vehicles, ships, aircraft, automobiles, trucks, buses, motorcycles, manufacturing equipment, agricultural equipment, construction equipment, or other types of electronic equipment.

[0054] Although specific components are used to describe embodiments of the controller and integrated circuit, in alternative embodiments, different components and / or subsystems may exist in the controller and / or integrated circuit. Therefore, embodiments of the controller and / or integrated circuit may include fewer components, additional components, different components, two or more components may be combined into a single component, a single component may be separated into two or more components, and / or the location of one or more components may be changed.

[0055] Furthermore, the circuits and components in the embodiments of the controller and / or integrated circuit can be implemented using any combination of analog and / or digital circuits (including bipolar, PMOS, and / or NMOS gates or transistors). Additionally, the signals in these embodiments can include digital signals with approximately discrete values ​​and / or analog signals with continuous values. Furthermore, components and circuits can be single-ended or differential, and the power supply can be unipolar or bipolar. Note that the electrical couplings or connections in the foregoing embodiments can be direct or indirect. In the foregoing embodiments, a single line corresponding to a trace can indicate one or more single lines or traces.

[0056] Integrated circuits can implement some or all of the functions of measurement techniques. The integrated circuit may include hardware and / or software mechanisms for implementing the functions associated with the measurement techniques.

[0057] In some embodiments, the output of a process for designing an integrated circuit or a portion thereof that includes one or more of the circuits described herein may be a computer-readable medium, such as magnetic tape, optical disc, or magnetic disk. The computer-readable medium may be encoded with data structures or other information describing a circuit that can be physically instantiated as an integrated circuit or a portion thereof. Although such encoding may be performed in various formats, these data structures are generally written in the following formats: Caltech Intermediate Format (CIF), Calma GDS II Stream Format (GDSII), Electronic Design Exchange Format (EDIF), OpenAccess (OA), or Open Art Exchange System Standard Document (OASIS). Those skilled in the art of integrated circuit design can develop such data structures based on schematic diagrams and corresponding descriptions of the types detailed above, and encode the data structures on a computer-readable medium. Those skilled in the art of integrated circuit manufacturing can use such encoded data to manufacture integrated circuits that include one or more of the circuits described herein.

[0058] While some of the operations in the foregoing embodiments are implemented in hardware or software, in general, the operations in the foregoing embodiments can be implemented in a wide variety of configurations and architectures. Therefore, some or all of the operations in the foregoing embodiments can be performed in hardware, software, or both. For example, at least some of the operations in measurement techniques can be implemented using program instructions executed by a processor or in firmware within an integrated circuit.

[0059] Furthermore, although numerical examples have been provided in the foregoing discussion, different numerical values ​​have been used in other embodiments. Therefore, the numerical values ​​provided are not intended to be limiting.

[0060] In the foregoing description, we referred to "some embodiments". Note that "some embodiments" describes a subset of all possible embodiments, but does not always specify the same subset of embodiments.

[0061] The foregoing description is intended to enable any person skilled in the art to implement and use this disclosure, and is provided in the context of a particular application and its requirements. Furthermore, the foregoing description of embodiments of this disclosure has been provided solely for illustrative and descriptive purposes. They are not intended to be exhaustive or to limit this disclosure to the forms disclosed. Therefore, many modifications and variations will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of this disclosure. Additionally, the discussion of the foregoing embodiments is not intended to limit this disclosure. Therefore, this disclosure is not intended to be limited to the embodiments shown, but is to be accorded the broadest scope consistent with the principles and features disclosed herein.

Claims

1. An integrated circuit, comprising: Memory; A controller, which is coupled to the memory; Temperature sensors, distributed at measurement locations within a semiconductor die, wherein a given temperature sensor includes a common building block for the temperature sensors; and The traces are routed between the controller and the building block via an addressable bus, wherein signal lines in the addressable bus used for analog signals are multiplexed when the controller communicates with different temperature sensors. The building blocks in the given temperature sensor include a common centroid array of the sensor device and another building block including a switch and control logic for the switch; and The control logic is configured to control the switch based at least in part on the addressing signal and the given address of the given temperature sensor.

2. The integrated circuit according to claim 1, wherein, When not enabled or used, the given temperature sensor includes another switch configured to provide a replicated voltage to a terminal of one of the switches in order to maintain approximately zero volts across the terminals of the one of the switches.

3. The integrated circuit according to claim 1, wherein, The integrated circuit includes addressing control logic associated with the controller; and The switch and the addressing control logic are located at different physical locations on the semiconductor die.

4. The integrated circuit according to claim 3, wherein, The addressing control logic is configured to control the change in the number of temperature sensors in the integrated circuit.

5. The integrated circuit according to claim 3, wherein, The controller is configured to use the memory and the addressing control logic to calibrate the temperature sensor.

6. The integrated circuit according to claim 1, wherein, The signal lines in the addressable bus used for the analog signals are sensed using Kelvin sensing.

7. The integrated circuit according to claim 1, wherein, The signal line leading to the given temperature sensor for the analog signal is configured to transmit current to at least a sensing device in the given temperature sensor. And to transmit the voltage from at least the sensing device to the controller.

8. The integrated circuit according to claim 1, wherein, The addressable bus includes bus traces.

9. The integrated circuit according to claim 8, wherein, The signal lines for the analog signals in the bus routing are routed together in one or more common shield groups.

10. The integrated circuit according to claim 9, wherein, The signal lines used for logical address signals are routed together with the signal lines used for the analog signals, but are not included in the one or more common shielding groups.

11. The integrated circuit according to claim 1, wherein, The number of temperature sensors in the integrated circuit is limited by the number of bits used to address the temperature sensors.

12. The integrated circuit according to claim 1, wherein, When there are N temperature sensors, the number of logic traces included in the addressable bus is equal to log2(N) rounded to the nearest integer.

13. The integrated circuit according to claim 1, wherein, The addressable bus includes another signal line from the temperature sensor to the controller; and The controller is configured to use a signal received on the other signal line to generate feedback to the trace in order to reduce leakage current.

14. The integrated circuit according to claim 1, wherein, The integrated circuit is configured to perform sensor calibration; The sensor calibration includes: A calibration mode in which a first sensing device in the given temperature sensor is provided with a first fixed current and a first controlled current, and a second sensing device in the given temperature sensor is provided with a second fixed current; and In a measurement mode, the first sensing device is provided with a third fixed current, and the second sensing device is provided with a fourth fixed current and a second controlled current; and The integrated circuit includes a calibration controller configured to: adjust the first controlled current based at least in part on a voltage observed between the first sensing device and the second sensing device; and calculate the value of the second controlled current based at least in part on the value of the first controlled current.

15. The integrated circuit according to claim 14, wherein, The first fixed current is equal to the fourth fixed current, and the second fixed current is equal to the third fixed current.

16. The integrated circuit according to claim 14, wherein, The calculation of the second controlled current includes reversing the sign of the first controlled current.

17. The integrated circuit according to claim 14, wherein, The integrated circuit includes: A switch configured to generate the first fixed current and the fourth fixed current using circuit components; and A second switch is configured to generate the first controlled current and the second controlled current from a current digital-to-analog converter (DAC).

18. An electronic device including an integrated circuit, wherein, The integrated circuit includes: Memory; A controller, which is coupled to the memory; Temperature sensors, distributed at measurement locations within a semiconductor die, wherein a given temperature sensor includes a common building block for the temperature sensors; and The traces are routed between the controller and the building block via an addressable bus, wherein signal lines in the addressable bus used for analog signals are multiplexed when the controller communicates with different temperature sensors. The building blocks in the given temperature sensor include a common centroid array of the sensor device and another building block including a switch and control logic for the switch; and The control logic is configured to control the switch based at least in part on the addressing signal and the given address of the given temperature sensor.

19. The electronic device according to claim 18, wherein, The integrated circuit is configured to perform sensor calibration; The sensor calibration includes: A calibration mode in which a first sensing device in the given temperature sensor is provided with a first fixed current and a first controlled current, and a second sensing device in the given temperature sensor is provided with a second fixed current; and In a measurement mode, the first sensing device is provided with a third fixed current, and the second sensing device is provided with a fourth fixed current and a second controlled current; and The integrated circuit includes a calibration controller configured to: adjust the first controlled current based at least in part on a voltage observed between the first sensing device and the second sensing device; and calculate the value of the second controlled current based at least in part on the value of the first controlled current.

20. A method for controlling a temperature sensor, comprising: Through the controller in the integrated circuit: A sensing device in a given temperature sensor is routed to a temperature sensor distributed at measurement locations on a semiconductor die, wherein the given temperature sensor includes a common building block of the temperature sensors, wherein the controller and the temperature sensor are routed via an addressable bus, and wherein signal lines for analog signals in the addressable bus are multiplexed when the controller communicates with different temperature sensors; and The voltage from the sensing device is transmitted to the controller via the addressable bus, wherein the building block of the given temperature sensor includes a common centroid array of the sensor device and another building block including a switch and control logic for the switch; and The control logic controls the switch at least in part based on the addressing signal and the given address of the given temperature sensor.

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