Memory control method and memory storage system

Abstract

The present application provides a memory control method and a memory storage system. The method comprises: in a memory closing procedure, a host system sends a first control instruction to a memory storage device, wherein the memory storage device has a volatile memory module and a rewritable non-volatile memory module; the memory storage device closes the volatile memory module in response to the first control instruction; and in a state that the volatile memory module is closed, the memory storage device maintains normal operation of the rewritable non-volatile memory module. Thus, the cooling efficiency of the memory storage device can be improved.

Description

Technical Field

[0001] This invention relates to a memory control technology, and more particularly to a memory control method and a memory storage system. Background Technology

[0002] Generally, memory devices and other types of electronic devices have built-in temperature control mechanisms. When the internal temperature of the device becomes too high, this temperature control mechanism can be activated to cool it down. However, most memory devices do not take into account the heat generated by the volatile memory within the device when performing cooling operations, resulting in poor cooling efficiency. Summary of the Invention

[0003] In view of this, the present invention provides a memory control method and a memory storage system, which can improve the cooling efficiency of the memory storage device by turning off the volatile memory in the memory storage device.

[0004] Embodiments of the present invention provide a memory control method for a memory storage system. The memory storage system includes a host system and a memory storage device. The memory control method includes: in a memory shutdown procedure, the host system sending a first control command to the memory storage device, wherein the memory storage device has a volatile memory module and a rewritable non-volatile memory module; the memory storage device shutting down the volatile memory module in response to the first control command; and the memory storage device maintaining normal operation of the rewritable non-volatile memory module while the volatile memory module is shut down.

[0005] An embodiment of the present invention further provides a memory storage system, which includes a host system and a memory storage device. The memory storage device is connected to the host system. The memory storage device has a volatile memory module and a rewritable non-volatile memory module. In a memory shutdown procedure, the host system sends a first control command to the memory storage device. The memory storage device shuts down the volatile memory module in response to the first control command. While the volatile memory module is shut down, the memory storage device also maintains the normal operation of the rewritable non-volatile memory module.

[0006] Based on the above, during the memory shutdown procedure, the host system can send a first control command to the memory storage device, which simultaneously contains a volatile memory module and a rewritable non-volatile memory module, to instruct the memory storage device to shut down its internal volatile memory module. Simultaneously, while the volatile memory module is shut down, the memory storage device can still maintain the normal operation of the rewritable non-volatile memory module. Therefore, the cooling efficiency of the memory storage device can be improved while the rewritable non-volatile memory module is operating normally. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of a memory storage system according to an embodiment of the present invention;

[0008] Figures 2 to 5 This is a flowchart illustrating a memory control method according to an embodiment of the present invention. Detailed Implementation

[0009] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.

[0010] Figure 1 This is a schematic diagram of a memory storage system according to an embodiment of the present invention. Please refer to... Figure 1 The memory storage system 10 includes a host system 11 and a memory storage device 12. The host system 11 can store data in the memory storage device 12 or read data from the memory storage device 12. The host system 11 can be any system that can cooperate with the memory storage device 12 to store data, such as a computer system. The host system 11 can be implemented in various electronic devices such as smartphones, tablet computers, laptop computers, desktop computers, industrial computers, game consoles, or cameras. The memory storage device 12 can be various non-volatile memory storage devices such as USB flash drives, memory cards, solid state drives (SSDs), secure digital cards (SDs), and compact flash (CF) cards.

[0011] The host system 11 may include a connection interface 111 and a processor 112. The connection interface 111 is used to connect the host system 11 to the memory storage device 12. The host system 11 can communicate with the memory storage device 12 through the connection interface 111. For example, the connection interface 111 can transfer data to or receive data from the memory storage device 12.

[0012] Processor 112 is connected to connection interface 111. Processor 112 may be responsible for the overall or partial operation of host system 11. For example, processor 112 may include a central processing unit (CPU) or other programmable general-purpose or special-purpose microprocessor, digital signal processor (DSP), programmable controller, application-specific integrated circuit (ASIC), programmable logic device (PLD), or other similar device or combination of these devices.

[0013] In one embodiment, the host system 11 may also include any hardware devices required in practice, such as memory, battery cell, network interface card, keyboard (or touchpad), screen and / or speakers, etc. Furthermore, in the following embodiments, the description of the processor 112 is equivalent to the description of the host system 11.

[0014] The memory storage device 12 includes a connection interface 121, a memory controller 122, a volatile memory module 123, and a rewritable non-volatile memory module 124. The connection interface 121 is used to connect the memory storage device 12 to the host system 11. For example, the memory storage device 12 can communicate with the host system 11 via the connection interface 122. For example, the connection interfaces 111 and 121 may conform to various connection interface standards such as Serial Advanced Technology Attachment (SATA), Parallel Advanced Technology Attachment (PATA), Peripheral Component Interconnect Express (PCI Express), or Universal Serial Bus (USB). In one embodiment, the connection interfaces 111 and 121 conform to the NVM Express (NVMe) specification.

[0015] The memory controller 122 is connected to the connection interface 121, the volatile memory module 123, and the rewritable non-volatile memory module 124. The memory controller 122 controls the overall or partial operation of the memory storage device 12. Furthermore, the memory controller 122 can perform operations such as writing, reading, and erasing data in the rewritable non-volatile memory module 124 according to instructions from the host system 11. In one embodiment, the memory controller 122 may include a flash memory controller.

[0016] The volatile memory module 123 is used to temporarily store data. For example, the volatile memory module 123 may include dynamic random access memory (DRAM). The volatile memory module 123 will lose the stored data when power is off.

[0017] The rewritable non-volatile memory module 124 is used to store data written by the host system 11. For example, the rewritable non-volatile memory module 124 may include various types of flash memory modules. The storage cells in the rewritable non-volatile memory module 124 store data by changing a threshold voltage. Furthermore, the rewritable non-volatile memory module 124 can still store data when power is off.

[0018] In one embodiment, the data access speed of the volatile memory module 123 is faster than that of the rewritable non-volatile memory module 124. Furthermore, in the following embodiments, the description of the memory controller 122 is equivalent to the description of the memory storage device 12.

[0019] In one embodiment, the processor 112 may initiate a memory shutdown procedure. In the memory shutdown procedure, the processor 112 may instruct the memory storage device 12 to shut down the volatile memory module 123. It should be noted that after the volatile memory module 123 is shut down, the memory storage device 12 and the rewritable non-volatile memory module 124 can still maintain normal operation. Thus, the processor 112 can assist in cooling the memory storage device 12 by executing the memory shutdown procedure.

[0020] Figure 2 This is a flowchart illustrating a memory control method according to an embodiment of the present invention. Please refer to... Figure 1 and Figure 2In step S201, during the memory shutdown procedure, the host system 11 may send a control instruction (also referred to as a first control instruction) to the memory storage device 12. For example, the processor 112 may send the first control instruction to the memory storage device 12 via the connection interface 111. For example, the first control instruction may include developer instructions. The first control instruction may instruct the memory storage device 12 to shut down the volatile memory module 123.

[0021] In step S202, the memory storage device 12 shuts down the volatile memory module 123 in response to a first control command. For example, the memory controller 122 may receive the first control command via the connection interface 121. In response to the first control command, the memory controller 122 may cut off the power supply from the memory storage device 12 to the volatile memory module 123 to shut down the volatile memory module 123.

[0022] In step S203, while the volatile memory module 123 is off, the memory storage device 12 can maintain the normal operation of the rewritable non-volatile memory module 124. For example, after power to the volatile memory module 123 is cut off, the memory controller 122 can still access the rewritable non-volatile memory module 124 to perform data reading, writing, and / or erasure on the rewritable non-volatile memory module 124.

[0023] It should be noted that when the volatile memory module 123 is turned off, the heat generated per unit time by the memory storage device 12 can be reduced. Therefore, turning off the volatile memory module 123 helps to assist the memory storage device 12 in cooling down and / or improves the cooling efficiency of the memory storage device 12.

[0024] In one embodiment, after receiving the first control command and before shutting down the volatile memory module 123, the memory controller 122 may copy a portion of the data (also referred to as the first data) from the volatile memory module 123 to the rewritable non-volatile memory module 124 for storage. Simultaneously, the memory controller 122 may copy another portion of the data (also referred to as the second data) from the volatile memory module 123 to the memory controller 122 for storage. Thus, even if the volatile memory module 123 is shut down (e.g., power is cut off), the data previously temporarily stored in the volatile memory module 123 can still be continuously preserved (i.e., backed up).

[0025] In one embodiment, the first data may include logic-to-entity mapping information describing the mapping relationship between logical units and physical units. Logical units can be mapped to physical units. Physical units may include various entity management units containing multiple storage units, such as physical sectors, physical pages, or physical blocks in the rewritable non-volatile memory module 124. For example, a logical unit may correspond to a logical block address (LBA), and a physical unit may correspond to a physical block address (PBA). The memory controller 122 can access the physical units in the rewritable non-volatile memory module 124 according to this logic-to-entity mapping information. Therefore, after backing up the first data to the rewritable non-volatile memory module 124, the memory controller 122 can still perform data access operations based on the first data in the rewritable non-volatile memory module 124.

[0026] In one embodiment, the second data may include firmware code for controlling the memory storage device 12. For example, the second data may be copied to static random access memory (SRAM) in the memory controller 122. Thus, after the second data is backed up to the memory controller 122, the memory controller 122 can continue to run the second data to control the memory storage device 12, such as accessing the rewritable non-volatile memory module 124.

[0027] In one embodiment, by backing up the data (e.g., first data and second data) in the volatile memory module 123 beforehand, the memory storage device 12 (including the memory controller 112 and the rewritable non-volatile memory module 124) can still operate normally after the volatile memory module 123 is powered off. Furthermore, after power is restored to the volatile memory module 123, the backed-up data (e.g., first data and second data) can be re-stored in the volatile memory module 123 to restore the operating efficiency of the memory storage device 12.

[0028] In one embodiment, the processor 112 may determine whether to initiate the memory shutdown procedure based on whether the temperature of the memory storage device 12 is higher than a critical value and / or whether the memory storage device 12 has initiated a cooling program. For example, the processor 112 may initiate the memory shutdown procedure when the temperature of the memory storage device 12 is higher than a critical value and / or the memory storage device 12 has initiated a cooling program. Alternatively, the processor 112 may not initiate the memory shutdown procedure when the temperature of the memory storage device 12 is not higher than a critical value and the memory storage device 12 has not initiated a cooling program. It should be noted that the processor 112 may also initiate the memory shutdown procedure based on other conditions, depending on practical needs.

[0029] Figure 3 This is a flowchart illustrating a memory control method according to an embodiment of the present invention. Please refer to... Figure 1 and Figure 3 In step S301, the host system 11 (i.e., processor 112) determines whether the temperature of the memory storage device 12 is higher than a preset value. If the temperature of the memory storage device 12 is higher than the preset value, in step S303, the processor 112 can initiate the memory shutdown procedure. If the temperature of the memory storage device 12 is not higher than the preset value, in step S302, the processor 112 determines whether the memory storage device 12 has initiated a cooling procedure. If the memory storage device 12 has initiated a cooling procedure, in step S303, the processor 112 can initiate the memory shutdown procedure. Furthermore, if the temperature of the memory storage device 12 is not higher than a critical value and the memory storage device 12 has not initiated a cooling procedure, the process can return to step S301.

[0030] In one embodiment, the processor 112 may send a query command to the memory storage device 12 to query whether it supports the memory shutdown procedure before executing the memory shutdown procedure. If the memory storage device 12 supports the memory shutdown procedure, the processor 112 may then start and execute the memory shutdown procedure. If the memory storage device 12 does not support the memory shutdown procedure, the processor 112 may not execute the memory shutdown procedure.

[0031] Figure 4 This is a flowchart illustrating a memory control method according to an embodiment of the present invention. Please refer to... Figure 1 and Figure 4In step S401, before executing the memory shutdown procedure, the host system 11 (i.e., processor 112) may send a query command to the memory storage device 12. In step S402, the memory storage device 12 may respond to the host system 11 in response to this query command, indicating whether it supports the memory shutdown procedure. For example, the memory controller 122 may query a configuration table based on this query command. The memory controller 122 may send a response to the host system 11 based on the information in this configuration table. The processor 112 may determine whether the memory storage device 12 supports the memory shutdown procedure based on this response.

[0032] In one embodiment, after shutting down the volatile memory module 123, the processor 112 may detect the temperature and / or busy status of the memory storage device 12 to determine whether to restart the volatile memory module 123. For example, the processor 112 may determine whether to restart the volatile memory module 123 based on whether the temperature of the memory storage device 12 is below a threshold and / or whether the memory storage device 12 has exited a busy state. Alternatively, in one embodiment, after shutting down the volatile memory module 123, the processor 112 may also determine whether to restart the volatile memory module 123 based on whether the cooling process of the memory storage device 12 has ended.

[0033] Figure 5 This is a flowchart illustrating a memory control method according to an embodiment of the present invention. Please refer to... Figure 1 and Figure 5 In step S501, after shutting down the volatile memory module 123, the host system 11 (i.e., processor 112) can detect the temperature and / or busy status of the memory storage device 12. In step S502, the processor 112 can send another control command (also referred to as a second control command) to the memory storage device 12 based on the detection result. In step S503, the memory storage device 12 can restart the volatile memory module 123 in response to the second control command, for example, by restoring power to the volatile memory module 123.

[0034] In one embodiment, in response to the temperature of the memory storage device 12 falling below a critical value and / or the memory storage device 12 exiting a busy state, the processor 121 may send the second control command to instruct the memory storage device 12 to restart the volatile memory module 123. Alternatively, in one embodiment, in response to the memory storage device 12 ending a previously executed cooling procedure, the processor 121 may send the second control command to instruct the memory storage device 12 to restart the volatile memory module 123.

[0035] In one embodiment, while the volatile memory module 123 is off, the memory controller 122 may simultaneously execute a cooling procedure to attempt to lower the temperature of the memory storage device 12. For example, this cooling procedure may include various cooling-aiding measures such as reducing the clock frequency, transmission bandwidth, and / or supply voltage of the memory storage device 12. In particular, the data access performance of the memory storage device 12 is often reduced while the cooling procedure is being executed. Therefore, even if the volatile memory module 123 is off, the user may not noticeably perceive the system performance degradation caused by the volatile memory module 123 being off.

[0036] In one embodiment, after the volatile memory module 123 is turned off, the processor 112 can provide memory storage space within the host system 11 for use by the memory storage device 12, thereby improving the operating efficiency of the memory storage device 12. For example, the processor 121 can set a portion of the memory storage space within the host system 11 as a host memory buffer (HMB) area to replace the turned-off volatile memory module 123 in the memory storage device 12. With the volatile memory module 123 turned off, the memory controller 122 can access this host memory buffer, for example, temporarily store data in this host memory buffer and read data from this host memory buffer area.

[0037] However, Figures 2 to 5 Each step has been explained in detail above and will not be repeated here. It is worth noting that... Figures 2 to 5 Each step can be implemented as multiple program codes or circuits, and this invention is not limited thereto. Furthermore, Figures 2 to 5 The method can be used in conjunction with the above examples and embodiments, or it can be used alone. This invention does not impose any limitations.

[0038] In summary, embodiments of the present invention propose that the host system can control the memory storage device to shut down the volatile memory module inside the memory storage device to assist in cooling the memory storage device. This effectively improves the cooling efficiency of the memory storage device.

[0039] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A memory control method, characterized in that, For a memory storage system, the memory storage system includes a host system and a memory storage device, and the memory control method includes: In the memory shutdown procedure, the host system sends a first control command to the memory storage device, wherein the memory storage device has a volatile memory module and a rewritable non-volatile memory module; The memory storage device shuts down the volatile memory module in response to the first control command; and When the volatile memory module is off, the memory storage device maintains the normal operation of the rewritable non-volatile memory module. The step of shutting down the volatile memory module includes: Disconnect the power supply from the memory storage device to the volatile memory module; Before disconnecting the power supply from the memory storage device to the volatile memory module, the first data in the volatile memory module is copied to the rewritable non-volatile memory module, and the second data in the volatile memory module is copied to the memory controller of the memory storage device.

2. The memory control method according to claim 1, wherein the first data includes logic-to-entity mapping information describing the mapping relationship between logic units and entity units, and the second data includes firmware code for controlling the memory storage device.

3. The memory control method according to claim 1 further includes: In response to the memory storage device's temperature exceeding a preset value or the memory storage device initiating a cooling procedure, the host system initiates the memory shutdown procedure to assist in cooling the memory storage device.

4. The memory control method according to claim 1 further includes: Before executing the memory shutdown procedure, the host system sends a query command to the memory storage device; as well as The memory storage device responds to the query command by indicating whether the host system supports the memory shutdown procedure.

5. The memory control method according to claim 1, further comprising: After shutting down the volatile memory module, the host system detects at least one of the temperature and busy status of the memory storage device; The host system sends a second control command to the memory storage device based on the detection result; as well as The memory storage device restarts the volatile memory module in response to the second control command.

6. The memory control method according to claim 1, further comprising: After the volatile memory module is shut down, the host system provides internal memory storage space for the memory storage device to use.

7. A memory storage system, characterized in that, include: Host system; as well as The memory storage device is connected to the host system. The memory storage device described herein includes a volatile memory module and a rewritable non-volatile memory module. During the memory shutdown procedure, the host system sends a first control command to the memory storage device. The memory storage device is configured to shut down the volatile memory module in response to the first control command, and While the volatile memory module is powered off, the memory storage device is also used to maintain the normal operation of the rewritable non-volatile memory module. The operation of shutting down the volatile memory module includes: Disconnect the power supply from the memory storage device to the volatile memory module. Before disconnecting the power supply from the memory storage device to the volatile memory module, the first data in the volatile memory module is copied to the rewritable non-volatile memory module, and the second data in the volatile memory module is copied to the memory controller of the memory storage device.

8. The memory storage system of claim 7, wherein the first data includes logic-to-entity mapping information describing the mapping relationship between logic units and entity units, and the second data includes firmware code for controlling the memory storage device.

9. The memory storage system of claim 7, wherein the host system is further configured to initiate the memory shutdown procedure in response to the temperature of the memory storage device being higher than a preset value or the memory storage device initiating a cooling procedure, so as to assist in cooling the memory storage device.

10. The memory storage system of claim 7, wherein before executing the memory shutdown procedure, the host system is further configured to send a query command to the memory storage device, and The memory storage device is also used to respond to the query command by indicating whether the host system's memory storage device supports the memory shutdown procedure.

11. The memory storage system of claim 7, wherein after shutting down the volatile memory module, the host system is further configured to detect at least one of the temperature and busy state of the memory storage device. The host system is also used to send a second control command to the memory storage device based on the detection result, and The memory storage device is also configured to restart the volatile memory module in response to the second control command.

12. The memory storage system of claim 7, wherein after the volatile memory module is shut down, the host system is further configured to provide internal memory storage space for use by the memory storage device.

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