A preparation method of a current blocking layer applied to an LED chip

Abstract

The application provides a preparation method of a current blocking layer applied to an LED chip, and the preparation method comprises the following steps: providing a substrate, and sequentially preparing an epitaxial layer, a buffer layer and a metal layer on the substrate, wherein the surface of the metal layer is rough; providing a substrate, and sequentially preparing an epitaxial layer, a buffer layer and a metal layer on the substrate, wherein the surface of the metal layer is rough; coating a photoresist layer on the upper surface of the metal layer by using a spin coating method, and sequentially processing the photoresist layer, the metal layer and the buffer layer to a first preset size by using a first processing process, so as to expose the epitaxial layer; and continuously processing the buffer layer to expose the buffer layer by using a second processing process, so that the current blocking layer is formed; by the arrangement, electrostatic can not be generated when the photoresist is coated on the metal, and the problem that the epitaxial layer is broken down, the yield of the LED chip is reduced and the reliability is reduced due to electrostatic generated during the preparation of the current blocking layer can be solved.

Description

Technical Field

[0001] This invention relates to the field of LED chip technology, and in particular to a method for preparing a current blocking layer for use in LED chips. Background Technology

[0002] An LED chip is a solid-state semiconductor device. The heart of an LED is a semiconductor wafer, with one end attached to a support, serving as the negative electrode, and the other end connected to the positive electrode of the power supply. The entire wafer is encapsulated in epoxy resin. Also known as an LED light-emitting chip, it is the core component of an LED lamp, specifically the PN junction. Its main function is to convert electrical energy into light energy. The primary material of the chip is monocrystalline silicon. The semiconductor wafer consists of two parts: a P-type semiconductor, where holes are the dominant energy source, and an N-type semiconductor, where electrons are the dominant energy source. When these two semiconductors are connected, they form a PN junction. When current flows through the wafer, electrons are pushed into the P-region, where they recombine with holes, releasing energy as photons. This is the principle behind LED light emission. The wavelength of the light, which determines its color, is determined by the materials forming the PN junction.

[0003] In LED chips, a current blocking layer is usually placed between the P-type GaN and the current spreading layer to improve the brightness of the LED chip and enhance the ESD resistance of large-size LED chips.

[0004] The existing method for preparing a current blocking layer involves first preparing a 2000-5000 Å SiO2 or SiN layer on the surface of a wafer with an epitaxial layer using PECVD or electron beam evaporation. Then, photoresist is applied to the surface of the SiO2 or SiN using a spin coating method. Specifically, a suitable amount of photoresist is dropped into the center of the wafer, and then the wafer is rotated at high speed. The friction between the SiO2 and the photoresist is used to spread the photoresist evenly over the entire wafer. Next, some unwanted photoresist is removed using exposure and development processes, exposing the SiO2 or SiN. Then, the exposed SiO2 or SiN is etched away using an etching solution, and the remaining photoresist is removed. In this way, a SiO2 or SiN pattern, i.e., a current blocking layer, is formed on the wafer.

[0005] In existing processes for fabricating current blocking layers, the photoresist coating process involves high-speed friction between the insulating photoresist and the insulating SiO2 or SiN, generating a large amount of static electricity. This static electricity leads to localized breakdown of the epitaxial layer, ultimately reducing the yield and reliability of LED chips. Summary of the Invention

[0006] Therefore, the purpose of this invention is to provide a method for preparing a current blocking layer for use in LED chips, so as to at least solve the shortcomings of the prior art.

[0007] This invention provides a method for fabricating a current blocking layer for use in LED chips, the method comprising:

[0008] An epitaxial layer, a buffer layer, and a metal layer are sequentially fabricated on the substrate, wherein the surface of the metal layer is a rough surface layer;

[0009] An adhesive layer is grown on the roughened layer using spin coating, and the adhesive layer, the metal layer, and the buffer layer are sequentially processed using a first processing method to ensure that the adhesive layer, the metal layer, and the buffer layer each retain a preset size, thereby exposing the epitaxial layer.

[0010] The remaining adhesive layer and the metal layer are processed sequentially using a second processing technique to expose the remaining buffer layer, thereby forming a current blocking layer.

[0011] Compared with the prior art, the beneficial effects of the present invention are: by forming a relatively rough metal surface using an electron beam evaporation process before coating the photoresist, static electricity will not be generated when coating the photoresist on the metal. The present invention can eliminate the problem of static electricity generated during the current blocking process leading to epitaxial layer breakdown, which reduces the yield and reliability of LED chips.

[0012] Furthermore, the spin coating method includes:

[0013] 0.8 mL to 1.5 mL of photoresist is dropped into the center of the metal layer. The photoresist on the metal layer is rotated twice to form the resist layer. The exposure energy is between 100 mJ / cm². 2 -800mj / cm 2 .

[0014] Furthermore, the rotation speed range of the first rotation in the two rotations is 1000 rpm to 1500 rpm, and the rotation duration ranges from 8 s to 12 s. The rotation speed range of the second rotation in the two rotations is 3000 rpm to 4000 rpm, and the rotation duration ranges from 20 s to 25 s.

[0015] Furthermore, the step of sequentially fabricating an epitaxial layer, a buffer layer, and a metal layer on the substrate includes:

[0016] The epitaxial layer is grown on the substrate using MOCVD technology;

[0017] The buffer layer is grown on the surface of the epitaxial layer using a PECVD process.

[0018] The metal layer is deposited on the surface of the buffer layer using an electron beam evaporation process.

[0019] Furthermore, the PECVD process has a temperature range of 260℃-300℃, a chamber pressure range of 90Pa-180Pa, and an ionization power range of 60W-90W.

[0020] Furthermore, the chamber pressure range of the electron beam evaporation process is 1E-7 Torr-1E-6 Torr, and the power range of the electron beam evaporation process is 100W-300W.

[0021] Furthermore, the step of sequentially processing the adhesive layer, the metal layer, and the buffer layer using the first processing technology includes:

[0022] The adhesive layer is treated with exposure and development, the metal layer is treated with a metal etching solution, and the buffer layer is treated with an etching solution.

[0023] Furthermore, the step of sequentially processing the remaining portion of the adhesive layer and the metal layer using the second processing technology includes:

[0024] The adhesive layer is further treated with a descaling solution, and the metal layer is further treated with a metal etching solution.

[0025] Furthermore, the metal corrosion solution is one of nitric acid, hydrochloric acid, ferric chloride, and sodium hydroxide, and the corrosion solution is a mixture of hydrofluoric acid and hydrogen peroxide.

[0026] Furthermore, the metal layer is one of Al, Ag, Au, and Cu. Attached Figure Description

[0027] Figure 1 This is a flowchart of the method for preparing a current blocking layer for LED chips according to the first embodiment of the present invention;

[0028] Figure 2 This is a schematic diagram of the operation flow of step S102 in the first embodiment of the present invention;

[0029] Figure 3 This is a schematic diagram of the operation flow of step S103 in the first embodiment of the present invention.

[0030] Explanation of key component symbols:

[0031] 10. Substrate; 11. Epitaxial layer; 12. Buffer layer; 13. Metal layer; 14. Adhesive layer; 15. Current blocking layer.

[0032] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0033] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of the invention are illustrated in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0034] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0036] Please see Figures 1 to 3 The image shows a method for preparing a current blocking layer for use in LED chips, as disclosed in this invention. The preparation method includes:

[0037] S101. A substrate 10 is provided, and an epitaxial layer 11, a buffer layer 12, and a metal layer 13 are sequentially grown on the substrate 10, wherein the surface of the metal layer is a rough surface.

[0038] Specifically, a substrate 10 is provided, on which an epitaxial layer 11 is grown; a buffer layer 12 is grown on the surface of the epitaxial layer 11 using a PECVD process; and a metal layer 13 is deposited on the surface of the buffer layer 12 using an electron beam evaporation process, and the surface of the metal layer is roughened.

[0039] In a specific implementation, a substrate 10 is provided, on which an epitaxial layer 11 is grown; a buffer layer 12 is grown on the surface of the epitaxial layer 11 using a PECVD process; a metal layer 13 is deposited on the surface of the buffer layer 12 using an electron beam evaporation process, and then the surface of the metal layer is roughened, with the roughness ranging from Ra5 to Ra55.

[0040] Specifically, the buffer layer 12 is a SiO2 layer or a SiN layer, the temperature range of the PECVD process is 260℃-300℃, the chamber pressure range is 90Pa-180Pa, and the ionization power range is 60W-90W. For example, the PECVD process temperature is 260℃, 280℃, or 300℃, the chamber pressure is 90Pa, 120Pa, 130Pa, or 180Pa, and the ionization power is 60W, 70W, 80W, or 90W. In this embodiment, the PECVD process temperature is 280℃, the chamber pressure is 120Pa, and the ionization power range is 70W. The chamber pressure range of the electron beam evaporation process is 1E-7 Torr-1E-6 Torr, and the power range of the electron beam evaporation process is 100W-300W. For example, the chamber pressure of the electron beam evaporation process is 1E-7 Torr or 1E-6 Torr, and the power of the electron beam evaporation process is 100W, 200W, or 300W.

[0041] S102, using spin coating, an adhesive layer 14 is grown on the upper surface of the metal layer 13, and the adhesive layer 14, the metal layer 13, and the buffer layer 12 are sequentially processed to a first preset size using a first processing process to expose the epitaxial layer 11.

[0042] Please see Figure 2 As shown, the preset size is determined based on the size of the current blocking layer 15 produced subsequently. The first processing step is used to process away a portion of the adhesive layer 14, the metal layer 13, and the buffer layer 12, leaving the preset size so that the adhesive layer 14, the metal layer 13, and the buffer layer 12 are exposed, thereby exposing a portion of the epitaxial layer 11, while the preset size is covered and not exposed.

[0043] In specific implementation, a photoresist layer 14 is coated on the surface of the metal layer 13 using spin coating. First, a portion of the photoresist layer 14 is removed by exposure and development, leaving another portion of the photoresist layer 14 on the metal layer 13. This exposes a portion of the metal layer 13, while the remaining portion of the photoresist layer 14 covers a portion of the metal layer 14, thus protecting the covered portion of the metal layer 14. This also protects the buffer layer 12 beneath the covered portion of the metal layer 14, preventing subsequent wet etching. Then, a metal etching solution is used to treat the portion of the metal layer 14 not covered by the remaining photoresist layer 14, exposing part of the buffer layer 12. The remaining portion is protected by the photoresist layer 14. Finally, the exposed buffer layer 12 is removed using an etching solution, exposing a portion of the epitaxial layer 11.

[0044] Specifically, the spin coating method includes: dropping 0.8 mL to 1.5 mL of photoresist into the center of the metal layer; rotating the photoresist on the metal layer twice to form the photoresist layer; and using an exposure energy between 100 mJ / cm². 2 -800mj / cm 2 The rotation speed of the first rotation in the two rotations ranges from 1000 rpm to 1500 rpm, and the rotation duration ranges from 8 s to 12 s. The rotation speed of the second rotation in the two rotations ranges from 3000 rpm to 4000 rpm, and the rotation duration ranges from 20 s to 25 s. The metal corrosion solution is one of nitric acid, hydrochloric acid, ferric chloride, and sodium hydroxide, and the corrosion solution is a mixture of hydrofluoric acid and hydrogen peroxide.

[0045] S103, the second processing process is used to continue processing to expose the buffer layer 12, thereby forming the current blocking layer 15;

[0046] Please see Figure 3 As shown, in a specific implementation, the remaining portion of the photoresist layer 14 is treated with a photoresist remover to expose the remaining metal layer 13. Then, the remaining portion (the exposed portion) of the metal layer 13 is treated with a metal etching solution to expose the remaining portion of the buffer layer 12, thus forming the current blocking layer 15 (exposing the buffer layer 12).

[0047] The present invention will be further described below with reference to specific embodiments:

[0048] Example 1

[0049] The method for preparing a current blocking layer for LED chips in this embodiment includes the following steps:

[0050] S101, a substrate 10 is provided, on which an epitaxial layer 11, a buffer layer 12, and a metal layer 13 are sequentially grown, wherein the surface of the metal layer is a rough surface;

[0051] Specifically, a substrate 10 is provided, on which an epitaxial layer 11 is grown; a buffer layer 12 is grown on the surface of the epitaxial layer 11 using a PECVD process; and a metal layer 13 is deposited on the surface of the buffer layer 12 using an electron beam evaporation process, and the surface of the metal layer is roughened to Ra25.

[0052] In a specific implementation, a substrate 10 is provided. An epitaxial layer 11 is first grown on the substrate 10. Then, a SiO2 layer or a SiN layer is grown on the surface of the epitaxial layer 11 using a PECVD process. At this time, the temperature of the PECVD process is 300℃, the chamber pressure range is 130Pa, and the ionization power range is 80W. Then, the metal layer 13 is deposited on the surface of the SiO2 layer using an electron beam evaporation process. At this time, the chamber pressure range of the electron beam evaporation process is 1E-6Torr, and the power of the electron beam evaporation process is 300W. At this time, the metal layer 13 is Cu. Then, the surface of the metal layer is roughened to Ra50.

[0053] S102, a photoresist layer is coated on the upper surface of the metal layer using spin coating, and the photoresist layer, the metal layer, and the buffer layer are sequentially processed to a first preset size using a first processing process to expose the epitaxial layer;

[0054] The preset size is determined based on the size of the current blocking layer produced later. The first processing step is to remove a portion of the adhesive layer, the metal layer, and the buffer layer, leaving the preset size so that the adhesive layer, the metal layer, and the buffer layer are exposed, thereby exposing a portion of the epitaxial layer. The preset size is covered and not exposed.

[0055] In specific implementation, 1.2 mL of photoresist is coated onto the surface of metal layer 13 using spin coating. Then, a mechanical device rotates the 1.2 mL photoresist at 1400 rpm for 12 seconds. Next, the same mechanical device rotates the 1.2 mL photoresist at 3800 rpm for 22 seconds. This process first removes a portion of the photoresist layer 14 through exposure and development, leaving the remaining portion on the metal layer 13, thus exposing part of the metal layer 13. The exposure energy at this point is 500 mJ / cm². 2 The remaining portion of the adhesive layer 14 covers the other part of the metal layer 14, thus protecting this covered portion and the buffer layer 12 beneath it, preventing wet corrosion in subsequent steps. Then, the portion of the metal layer 14 not covered by the remaining adhesive layer 14 is treated with nitric acid solution, exposing part of the buffer layer 12 while the remaining portion remains protected by the adhesive layer 14. Finally, the exposed buffer layer 12 is removed using a corrosion solution, exposing part of the epitaxial layer 11. The metal corrosion solution is one of nitric acid, hydrochloric acid, ferric chloride, or sodium hydroxide, and the corrosion solution is a mixture of hydrofluoric acid and hydrogen peroxide.

[0056] Example 2

[0057] The method for preparing a current blocking layer for LED chips in this embodiment includes the following steps:

[0058] S101. A substrate 10 is provided, and an epitaxial layer 11, a buffer layer 12, and a metal layer 13 are sequentially grown on the substrate 10, wherein the surface of the metal layer is a rough surface.

[0059] Specifically, a substrate 10 is provided, on which an epitaxial layer 11 is grown; a buffer layer 12 is grown on the surface of the epitaxial layer 11 using a PECVD process; and a metal layer 13 is deposited on the surface of the buffer layer 12 using an electron beam evaporation process, and the surface of the metal layer is roughened to Ra12.5.

[0060] In a specific implementation, a substrate 10 is provided. An epitaxial layer 11 is first grown on the substrate 10. Then, a SiO2 layer or a SiN layer is grown on the surface of the epitaxial layer 11 using a PECVD process. At this time, the temperature of the PECVD process is 260°C, the chamber pressure range is 90Pa, and the ionization power range is 60W. Then, the metal layer 13 is deposited on the surface of the SiO2 layer using an electron beam evaporation process. At this time, the chamber pressure range of the electron beam evaporation process is 1E-7Torr, and the power range of the electron beam evaporation process is 100W. At this time, the metal layer 13 is Al. Then, the surface of the metal layer is roughened to Ra12.5.

[0061] S102, a photoresist layer is coated on the upper surface of the metal layer using spin coating, and the photoresist layer, the metal layer, and the buffer layer are sequentially processed to a first preset size using a first processing process to expose the epitaxial layer;

[0062] Please see Figure 2 As shown, the preset size is determined based on the size of the current blocking layer produced later. The first processing step is used to remove a portion of the adhesive layer, the metal layer, and the buffer layer, leaving the preset size so that the adhesive layer, the metal layer, and the buffer layer are exposed, thereby exposing a portion of the epitaxial layer. The preset size is covered and not exposed.

[0063] In specific implementation, 0.8 mL of photoresist is coated onto the surface of metal layer 13 using spin coating. Then, a mechanical device rotates the 0.8 mL photoresist at 1000 rpm for 8 seconds. A second rotation is then performed at 3000 rpm for 20 seconds to form a photoresist layer. A portion of the photoresist layer 14 is removed by exposure and development, leaving the remaining portion on the metal layer 13, thus exposing part of the metal layer 13. The exposure energy at this point is 100 mJ / cm². 2 The remaining portion of the adhesive layer 14 covers the other part of the metal layer 14, thus protecting this covered portion and the buffer layer 12 beneath it, preventing wet corrosion in subsequent steps. Then, the portion of the metal layer 14 not covered by the remaining adhesive layer 14 is treated with nitric acid solution, exposing part of the buffer layer 12 while the remaining portion remains protected by the adhesive layer 14. Finally, the exposed buffer layer 12 is removed using a corrosion solution, exposing part of the epitaxial layer 11. The metal corrosion solution is one of nitric acid, hydrochloric acid, ferric chloride, or sodium hydroxide, and the corrosion solution is a mixture of hydrofluoric acid and hydrogen peroxide.

[0064] S103, the second processing technology is used to continue processing to expose the buffer layer, thereby forming a current blocking layer;

[0065] Please see Figure 3 As shown, in a specific implementation, the remaining portion of the photoresist layer 14 is treated with a photoresist remover to expose the remaining metal layer 13. Then, the remaining portion (the exposed portion) of the metal layer 13 is treated with a metal etching solution to expose the remaining portion of the buffer layer 12, thus forming the current blocking layer 15 (exposing the buffer layer 12).

[0066] Example 3

[0067] The method for preparing a current blocking layer for LED chips in this embodiment includes the following steps:

[0068] S101, a substrate 10 is provided, on which an epitaxial layer 11, a buffer layer 12, and a metal layer 13 are sequentially grown, wherein the surface of the metal layer is a rough surface;

[0069] Specifically, a substrate 10 is provided, on which an epitaxial layer 11 is grown; a buffer layer 12 is grown on the surface of the epitaxial layer 11 using a PECVD process; and a metal layer 13 is deposited on the surface of the buffer layer 12 using an electron beam evaporation process, and the surface of the metal layer is roughened to Ra25.

[0070] In a specific implementation, a substrate 10 is provided. An epitaxial layer 11 is first grown on the substrate 10. Then, a SiO2 layer or a SiN layer is grown on the surface of the epitaxial layer 11 using a PECVD process. At this time, the temperature of the PECVD process is 280°C, the chamber pressure range is 120Pa, and the ionization power range is 70W. Then, the metal layer 13 is deposited on the surface of the SiO2 layer using an electron beam evaporation process. At this time, the chamber pressure range of the electron beam evaporation process is 1E-6Torr, and the power range of the electron beam evaporation process is 200W. At this time, the metal layer 13 is Ag. Then, the surface of the metal layer is roughened to Ra25.

[0071] S102, a photoresist layer is coated on the upper surface of the metal layer using spin coating, and the photoresist layer, the metal layer, and the buffer layer are sequentially processed to a first preset size using a first processing process to expose the epitaxial layer;

[0072] The preset size is determined based on the size of the current blocking layer produced later. The first processing step is to remove a portion of the adhesive layer, the metal layer, and the buffer layer, leaving the preset size so that the adhesive layer, the metal layer, and the buffer layer are exposed, thereby exposing a portion of the epitaxial layer. The preset size is covered and not exposed.

[0073] In specific implementation, 1 mL of photoresist is coated onto the surface of metal layer 13 using spin coating. Then, a mechanical device rotates the 1 mL photoresist at 1200 rpm for 10 seconds. Next, the mechanical device rotates the 1 mL photoresist at 3500 rpm for 20 seconds. This process removes a portion of the photoresist layer 14 through exposure and development, leaving the remaining portion on the metal layer 13, thus exposing part of the metal layer 13. The exposure energy at this point is 300 mJ / cm². 2The remaining portion of the adhesive layer 14 covers the other part of the metal layer 14, thus protecting this covered portion and the buffer layer 12 beneath it, preventing wet corrosion in subsequent steps. Then, the portion of the metal layer 14 not covered by the remaining adhesive layer 14 is treated with nitric acid solution, exposing part of the buffer layer 12 while the remaining portion remains protected by the adhesive layer 14. Finally, the exposed buffer layer 12 is removed using a corrosion solution, exposing part of the epitaxial layer 11. The metal corrosion solution is one of nitric acid, hydrochloric acid, ferric chloride, or sodium hydroxide, and the corrosion solution is a mixture of hydrofluoric acid and hydrogen peroxide.

[0074] Example 4

[0075] The method for preparing a current blocking layer for LED chips in this embodiment includes the following steps:

[0076] S101, a substrate 10 is provided, on which an epitaxial layer 11, a buffer layer 12, and a metal layer 13 are sequentially grown, wherein the surface of the metal layer is a rough surface;

[0077] Specifically, a substrate 10 is provided, on which an epitaxial layer 11 is grown; a buffer layer 12 is grown on the surface of the epitaxial layer 11 using a PECVD process; and a metal layer 13 is deposited on the surface of the buffer layer 12 using an electron beam evaporation process, and the surface of the metal layer is roughened to Ra50.

[0078] In a specific implementation, a substrate 10 is provided. An epitaxial layer 11 is first grown on the substrate 10. Then, a SiO2 layer or a SiN layer is grown on the surface of the epitaxial layer 11 using a PECVD process. At this time, the temperature of the PECVD process is 300℃, the chamber pressure range is 130Pa, and the ionization power range is 80W. Then, the metal layer 13 is deposited on the surface of the SiO2 layer using an electron beam evaporation process. At this time, the chamber pressure range of the electron beam evaporation process is 1E-6Torr, and the power of the electron beam evaporation process is 300W. At this time, the metal layer 13 is Au. Then, the surface of the metal layer is roughened to Ra50.

[0079] S102, a photoresist layer is coated on the upper surface of the metal layer using spin coating, and the photoresist layer, the metal layer, and the buffer layer are sequentially processed to a first preset size using a first processing process to expose the epitaxial layer;

[0080] The preset size is determined based on the size of the current blocking layer produced later. The first processing step is to remove a portion of the adhesive layer, the metal layer, and the buffer layer, leaving the preset size so that the adhesive layer, the metal layer, and the buffer layer are exposed, thereby exposing a portion of the epitaxial layer. The preset size is covered and not exposed.

[0081] In specific implementation, 1.2 mL of photoresist is coated onto the surface of metal layer 13 using spin coating. Then, a mechanical device rotates the 1.2 mL photoresist at 1400 rpm for 12 seconds. Next, the same mechanical device rotates the 1.2 mL photoresist at 3800 rpm for 22 seconds. This process first removes a portion of the photoresist layer 14 through exposure and development, leaving the remaining portion on the metal layer 13, thus exposing part of the metal layer 13. The exposure energy at this point is 500 mJ / cm². 2 The remaining portion of the adhesive layer 14 covers the other part of the metal layer 14, thus protecting this covered portion and the buffer layer 12 beneath it, preventing wet corrosion in subsequent steps. Then, the portion of the metal layer 14 not covered by the remaining adhesive layer 14 is treated with nitric acid solution, exposing part of the buffer layer 12 while the remaining portion remains protected by the adhesive layer 14. Finally, the exposed buffer layer 12 is removed using a corrosion solution, exposing part of the epitaxial layer 11. The metal corrosion solution is one of nitric acid, hydrochloric acid, ferric chloride, or sodium hydroxide, and the corrosion solution is a mixture of hydrofluoric acid and hydrogen peroxide.

[0082] Comparative Example 1 provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that the top surface of the insulating SiO2 or SiN is smooth, while the rest is the same as Example 1.

[0083] The specific results are as follows: Table 1 shows the test results of the current blocking layer preparation method applied to LED chips in Examples 1-4 and Comparative Example 1.

[0084] Example 1 98.5％ Example 2 98.20％ Example 3 97.80％ Example 4 97.40％ Comparative Example 1 92.20％

[0085] The above results show that the current blocking layer fabrication method for LED chips of the present invention, using a surface roughened to Ra25, involves a first rotation of 1.2 mL of photoresist at 1400 rpm for 12 seconds, followed by a second rotation of 1.2 mL of photoresist at 3800 rpm for 22 seconds. This effectively improves the LED chip yield by 6.3%, further eliminating the problem of epitaxial layer breakdown caused by static electricity during current blocking layer fabrication, thus further improving LED chip yield and reliability. It is evident that by first forming a relatively rough metal surface using electron beam evaporation before coating the photoresist, static electricity is not generated when coating the photoresist on the metal. The present invention eliminates the problem of epitaxial layer breakdown caused by static electricity during current blocking layer fabrication, leading to reduced LED chip yield and reliability.

[0086] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0087] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for fabricating a current blocking layer for use in LED chips, characterized in that, The preparation method includes: A substrate is provided, on which an epitaxial layer, a buffer layer, and a metal layer are sequentially formed, wherein the surface of the metal layer is a rough surface; A photoresist layer is coated on the upper surface of the metal layer using spin coating, and the photoresist layer, the metal layer, and the buffer layer are sequentially processed to a first preset size using a first processing process to expose the epitaxial layer. The buffer layer is further processed using a second processing technique to expose it, thus forming a current blocking layer. The spin coating method includes: 0.8 mL to 1.5 mL of photoresist is dropped into the center of the metal layer, and the photoresist on the metal layer is rotated twice to form the adhesive layer; The steps of sequentially fabricating an epitaxial layer, a buffer layer, and a metal layer on the substrate include: The epitaxial layer is grown on the substrate using MOCVD technology; The buffer layer is grown on the surface of the epitaxial layer using a PECVD process. The metal layer is deposited on the surface of the buffer layer using an electron beam evaporation process. The PECVD process has a temperature range of 260℃-300℃, a chamber pressure range of 90 Pa-180 Pa, and an ionization power range of 60 W-90 W. The chamber pressure range of the electron beam evaporation process is 1E-7 Torr - 1E-6 Torr, and the power range of the electron beam evaporation process is 100W - 300W.

2. The method for preparing a current blocking layer for use in an LED chip according to claim 1, characterized in that, The rotation speed of the first rotation in the two rotations ranges from 1000 rpm to 1500 rpm, and the rotation duration ranges from 8 s to 12 s. The rotation speed of the second rotation in the two rotations ranges from 3000 rpm to 4000 rpm, and the rotation duration ranges from 20 s to 25 s.

3. The method for preparing a current blocking layer for use in an LED chip according to claim 1, characterized in that, The step of sequentially processing the adhesive layer, the metal layer, and the buffer layer using the first processing technology includes: The adhesive layer is treated with exposure and development, the metal layer is treated with a metal etching solution, and the buffer layer is treated with an etching solution.

4. The method for preparing a current blocking layer for use in an LED chip according to claim 1, characterized in that, The steps for further processing using the second processing technology include: The adhesive layer is further treated with a descaling solution, and the metal layer is further treated with a metal etching solution.

5. The method for preparing a current blocking layer for use in an LED chip according to claim 3, characterized in that, The metal corrosion solution is one of nitric acid, hydrochloric acid, ferric chloride, and sodium hydroxide, and the corrosion solution is a mixture of hydrofluoric acid and hydrogen peroxide.

6. The method for preparing a current blocking layer for use in an LED chip according to claim 1, characterized in that, The metal layer is one of Al, Ag, Au, and Cu.

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