A gate drive method for power device multi-tube parallel connection

Abstract

The application discloses a gate drive method for multiple power devices in parallel, which can adjust the gate drive voltage, drive resistance, switching delay time and other control parameters of each parallel discrete SiC MOSFET device through an active gate drive circuit, so as to better realize the parallel dynamic current sharing and static heat sharing of the discrete SiC MOSFET device, and through the redesign of the junction temperature observation model and the current and junction temperature balancing adjustment module, the dynamic current and junction temperature balancing control targets are realized through the cooperation of multiple independent control parameters, the problems of low current / junction temperature balancing control precision and poor control effect existing in the prior art are solved, the current utilization rate of the parallel devices is improved, and the parallel operation reliability of the multiple parallel power devices is enhanced.

Description

Technical Field

[0001] This invention belongs to the field of parallel drive control technology for electronic devices, and in particular relates to a gate drive method for multiple power devices connected in parallel. Background Technology

[0002] In existing technologies, due to insufficient production capacity, low material utilization, and immature packaging technology of high-power SiC modules, parallel connection of low-current discrete SiC MOSFETs is often used as an alternative. This approach offers advantages such as high power density and efficiency, flexible space arrangement, abundant device resources, and reduced system cost. The biggest challenge in parallel connection of multiple discrete SiC MOSFET power devices lies in stress balancing among them. This is because current mismatch and electrical stress imbalance inevitably occur when multiple power devices are connected in parallel. Although Si-based MOSFETs with positive temperature coefficient on-resistance have a certain static current balancing capability, the on-resistance of SiC MOSFETs is weakly positively correlated with the operating junction temperature, resulting in insignificant self-current balancing. Furthermore, the threshold voltage of SiC MOSFETs has a very sensitive temperature dependence and a negative temperature coefficient, leading to dynamic unbalanced current and temperature positive feedback. The electrothermal coupling effect will exacerbate current mismatch and thermal instability among parallel devices, making parallel connection of SiC MOSFETs extremely difficult. In the past, during the development of power electronic systems for industrial applications, designers mostly relied on device datasheets and experience to derating the current of parallel devices and leaving a large margin in the current rating. The more parallel devices there were, the lower the current utilization rate and the higher the cost.

[0003] In practical engineering, although complete current balancing ensures that the electrical stress and loss of each discrete component are consistent, due to structural and space constraints, the spatial distribution of heat sinks and fluids cannot be completely symmetrical, and the temperature rise of each tube will have certain differences. The temperature difference then causes different aging degrees between each component and the heat-conducting interface material, which deepens the thermal stress difference between parallel components. This means that components with low thermal stress cannot fully perform their functions, while components with high thermal stress fail first and will drastically accelerate the failure of other components.

[0004] For parallel control technology of single-transistor SiC MOSFETs, most studies only regulate current balance, with almost no research on simultaneous regulation of current and junction temperature. Gate drive technology that only aims at current balance sacrifices the current utilization and system economy of SiC devices, and reduces the safety and reliability of the converter. Therefore, for gate drive of parallel SiC devices, junction temperature balance of each SiC device needs to be considered simultaneously with current balance. Currently, junction temperature control by changing the gate resistance is mainly achieved through a switched resistor network. Junction temperature adjustment can only be adjusted in a limited number of discrete levels, which cannot achieve more precise balance. In addition, this method cannot adjust the drive voltage, and therefore cannot control the current during conduction to regulate the conduction loss of parallel devices. The switching loss and conduction loss required for junction temperature balance cannot be accurately and independently regulated, which weakens the effectiveness of the junction temperature control strategy. For example, the inventor disclosed a method for equalizing current and junction temperature in parallel single-transistor power devices in the prior Chinese invention patent CN202210996014. This method achieves parallel equalization control of current and junction temperature through closed-loop time-division control of current during switching and conduction, which improves the lifespan and reliability of the devices to a certain extent. However, the junction temperature equalization control during conduction is achieved through closed-loop current regulation. That is, the processor adjusts the duty cycle of each parallel device based on sampled current and junction temperature observations, thereby adjusting the current command size of each device during conduction. It only changes the loss at the system control level to achieve junction temperature equalization, without changing the driving parameters, that is, without changing the physical characteristics of the semiconductor device to adjust the current flowing through the device. During junction temperature equalization control, it may affect the next current equalization control, which can easily lead to electrothermal coupling effect. This results in insufficient current utilization of multiple parallel devices, leading to large computational load and poor control response. When there are many parallel devices, it is easy to lead to poor control effect of current and junction temperature equalization, which cannot further improve the reliability and lifespan of the devices.

[0005] Therefore, there is an urgent need to design a gate drive method suitable for multiple discrete power devices connected in parallel, so as to independently and collaboratively control multiple control parameters of the two control objectives of current and junction temperature equalization without mutual interference. This would enable the current and junction temperature to be dynamically planned and balanced in a more efficient manner, thereby improving the control effect and accuracy of current and junction temperature equalization of multiple parallel SiC MOSFETs. This would fundamentally and proactively improve the electrical stress distribution characteristics of the dynamic process of turn-on and the thermal stress distribution characteristics of the static process of conduction of parallel SiC MOSFETs. Summary of the Invention

[0006] (a) Technical problems to be solved

[0007] Based on this, the present invention discloses a gate driving method for multiple power devices connected in parallel, which can solve the problems of current and junction temperature balance control not being able to be simultaneously considered and potential conflicts in drive parameter regulation in existing multiple discrete SiC MOSFET parallel connections. By independently and collaboratively controlling multiple control parameters of the two control objectives of current and junction temperature balance, the electrothermal stress distribution characteristics of the parallel SiC MOSFET devices can be better actively improved during gate driving. This improves the control effect while reducing the problem of low current utilization of multiple parallel devices caused by electrical stress mismatch, and avoids the difference in the operating life of multiple discrete power devices in parallel connection caused by junction temperature imbalance. In other words, the present invention achieves high-quality gate driving of multiple SiC MOSFET parallel connections, improving the economy and operational reliability of discrete SiC MOSFET parallel converters.

[0008] (II) Technical Solution

[0009] This invention discloses a gate driving method for multiple power devices connected in parallel, the gate driving method comprising:

[0010] Obtain the current of each parallel SiC MOSFET device and calculate the loss P of each device. loss ;

[0011] Obtain the temperature T of each part of the radiator h And in combination with the loss P loss The junction temperature T of each device was calculated. j ;

[0012] For the switching process of the devices, the switching current I of each device... d_sw The equalization current command value I during the turn-on or turn-off process is calculated. d_sw_balance And determine the turn-on delay time instruction T for each device. don Shutdown delay time instruction T doff , drive turn-on resistor R gon and drive turn-off resistor R goff ;

[0013] For the conduction process of the device, the junction temperature T of each device is... j Determine the average junction temperature of each device; the average junction temperature T of the device. j_av The calculation formula is as follows:

[0014] T j_av =f av (T j1 ,T j2 ,...T jn (1)

[0015] Among them, f avTo calculate the average value function, the drive voltage command V of each discrete component is controlled. gs To achieve the junction temperature control target for each discrete SiC MOSFET device, specifically the drive voltage V of the i-th device in the parallel connection. gs The instructions are as follows:

[0016] V gs =f(T) j_av ,T ji ,I di (2)

[0017]

[0018] Where f is the junction temperature error (T) of the i-th device. j_av -T ji ) and drain current I di Calculate the driving voltage V gs The relational function, for devices with high junction temperatures, reduces the corresponding drive voltage command V. gs Reducing the on-current of the device can decrease losses and lower its junction temperature; conversely, for devices with lower junction temperatures, increasing the drive voltage command V... gs By increasing the on-current of the device, losses can be reduced, and its junction temperature can be lowered; at the same time, the total current of the parallel branches remains unchanged.

[0019] The active gate drive circuit is used to drive the turn-on resistor R of each discrete SiC MOSFET. gon Drive turn-off resistor R goff Drive voltage V gs Activation delay time T don and shutdown delay time T doff Parameters are adjusted to drive parallel SiC MOSFET devices to achieve balanced control of current and junction temperature.

[0020] Preferably, based on the sampled currents of each discrete SiC MOSFET device, the switching transient current I of each device is controlled in the current equalization controller. d_sw By comparing the magnitudes and using the current average as the target, the equalization current command value I is calculated. d_sw_balance The turn-on delay time T of each device is calculated based on the current deviation between the transient switching current of each device and the equalization current command value. don Shutdown delay time T doff , drive turn-on resistor R gon and drive turn-off resistor R goff .

[0021] Preferably, the junction temperature T j The specific calculation formula is as follows:

[0022]

[0023] Among them, f sw It is the switching frequency of the device, V ds It is the drain-source voltage of the device, I d R is the drain switching current. gon To drive the turn-on resistor, R goff To drive the turn-off resistor, C iss C is the input capacitance of the device. rss For the device feedback capacitor, V miller V is the Miller voltage of the device. cc V ee These are the positive and negative driving voltages of the device, V. th V represents the driving threshold voltage of the device, where a0, a1, b0, b1, c0, and c1 are fitting coefficients. ref V is the reference voltage. gs Z is the device drive voltage. th_n and Z couple These are the self-thermal impedance of the device and the coupling thermal impedance matrix between the devices, respectively. Preferably, the fitting coefficients a0, a1, b0, b1, c0, and c1 are obtained by fitting the driving voltage and conduction current data from the output characteristic curve.

[0024] Preferably, using the principle of electrothermal analogy and thermal circuit theory, and taking the temperature of a single surface-mounted thermocouple installed on the heat sink of a SiC MOSFET multi-tube parallel module as a reference point, a cross-coupled thermal network model suitable for junction temperature extraction of SiC multi-tube parallel devices is established, considering the cross-coupling of multiple heat sources and thermal coupling of heat dissipation paths in the case of SiC MOSFET multi-tube parallel connection, in order to obtain the self-thermal impedance matrix Z. th_n The coupling thermal impedance matrix Z between devices couple This enables high-precision online acquisition of the junction temperature of each power device in the case of multiple SiC MOSFETs connected in parallel.

[0025] Preferably, the turn-on delay time instruction T for the i-th device in the parallel connection is... don The calculation method is as follows:

[0026]

[0027] τ GS =(R G,ex +R G,in )×C iss (6)

[0028] Where, τ GSi With τ GSav R represents the driving charge / discharge time constant for each device and the average time constant for each device, respectively. G,exWith R G,in These are the external drive resistor and the internal gate resistance, V. cci V eei V GS,thi These represent the positive driving voltage, negative driving voltage, and driving threshold voltage for each device, respectively, V ccav V eeav With V GS,thav R represents the average of the positive driving voltage, negative driving voltage, and driving threshold voltage of the parallel devices, respectively, when the device is turned on. G,ex This is the device's drive-on resistance R. gon When R is turned off G,ex That is, the device's drive-off resistor R. goff .

[0029] The turn-off delay time T of the i-th device in the parallel circuit doff The calculation method is as follows:

[0030]

[0031] Among them, V milleri V represents the Miller plateau voltage of each device. millerav This represents the average value of the Miller plateau voltage for each device;

[0032] The drive turn-on resistance R of the i-th device in the parallel circuit gon The calculation formula is as follows:

[0033]

[0034] Among them, g fs For the transconductance of a SiC MOSFET, when the drain-source voltage V ds When the value is constant, the transconductance is defined as g. fs =ΔI D / ΔV gs That is, g fs The gate current change rate ΔI D Divide by the gate-source voltage change rate ΔV gs , The rate of change of drain current during device turn-on / turn-off;

[0035] The drive-off resistor R of the i-th device in the parallel circuit goff The calculation formula is as follows:

[0036]

[0037] Among them, I load This is the load current.

[0038] Preferably, the active gate drive circuit includes a delay time controller, a drive voltage control circuit, and a drive resistor control circuit connected in series.

[0039] Preferably, the driving voltage circuit includes a linear voltage regulator and a push-pull circuit, by applying a reference voltage V to the linear voltage regulator. ref Control V gs+ and V gs- The voltage difference between them is then controlled by a push-pull circuit, thereby controlling the drive voltage V. gs .

[0040] Preferably, the drive resistor control circuit controls the adjustable resistor R by adjusting the turn-on and turn-off of two MOS transistors in the turn-on and turn-off branches of the control circuit, respectively. mon and R moff Whether or not the bypass is used, thereby controlling the values ​​of the gate drive on-resistance and drive off-resistance.

[0041] In another aspect, the present invention also discloses a non-transitory computer-readable storage medium storing computer instructions that cause the computer to execute the gate driving method for multiple power devices in parallel as described in any of the preceding claims.

[0042] (III) Beneficial Effects

[0043] Compared with the prior art, the present invention has the following beneficial effects:

[0044] 1. The driving method of this invention can adjust the adjustable parameters such as gate drive voltage, drive resistance, and switching delay time of each parallel discrete SiC MOSFET device through an active gate drive circuit, thereby accurately realizing the coordinated control of dynamic current sharing and static heat dissipation of the parallel discrete SiC MOSFET devices. Due to the redesign of the junction temperature observation model, multiple control parameters of the two control objectives of current and junction temperature equalization are independently and coordinatedly controlled, enabling dynamic planning and equalization adjustment of current and junction temperature in a more efficient manner, further improving the control effect of current and junction temperature equalization for multiple parallel devices. Furthermore, the active gate drive circuit of this invention has a simple structure; it only requires a delay time controller and a drive voltage and drive resistance control circuit connected in series to complete the coordinated parameter control of current sharing and heat dissipation, as well as the gate drive function.

[0045] 2. The gate drive method of the present invention can actively and safely improve the electrical stress distribution characteristics of the dynamic process of turn-on and the thermal stress distribution characteristics of the static process of conduction of parallel SiC MOSFETs, reduce the problem of low current utilization of multiple parallel devices and electrothermal coupling effect caused by electrical stress mismatch, and avoid the difference in the parallel operation life of multiple discrete power devices caused by junction temperature imbalance, thereby improving the current utilization of multiple parallel devices. The present invention realizes high-quality gate drive of multiple parallel SiC MOSFETs, improving the economy and operational reliability of discrete SiC MOSFET parallel converters. Attached Figure Description

[0046] The features and advantages of the invention will be more clearly understood by referring to the accompanying drawings, which are schematic and should not be construed as limiting the invention in any way. In the drawings:

[0047] Figure 1 This describes the current and junction temperature equalization control process for a single switching cycle of SiC MOSFET power devices in the prior art.

[0048] Figure 2 This is a system structure block diagram of the gate drive system for multiple SiC MOSFET power devices connected in parallel in this invention;

[0049] Figure 3 This is a schematic diagram of the junction temperature monitoring module for multiple discrete SiC devices connected in parallel in this invention;

[0050] Figure 4 for Figure 2 Schematic diagram of the junction temperature equalization adjustment module;

[0051] Figure 5 for Figure 2 A schematic diagram of the medium current equalization adjustment module;

[0052] Figure 6 for Figure 2 A schematic diagram of the structure of the drive parameter adjustment module;

[0053] Figure 7 This is a flowchart of the gate driving method for multiple power devices connected in parallel in this invention. Detailed Implementation

[0054] The present invention will now be clearly and completely described in conjunction with the accompanying drawings and embodiments. The technical problems solved by the present invention and its beneficial effects will also be described. It should be noted that the described embodiments are only intended to facilitate the understanding of the present invention and do not limit it in any way.

[0055] Based on existing technology and the improvements to be made by this invention, this invention first analyzes and explains the specific reasons why multiple parallel SiC MOSFETs are prone to electrothermal imbalance. The inventors found that when there are a large number of parallel SiC MOSFET devices, traditional methods can achieve a single control target by adjusting control parameters. However, if it is simply achieved simultaneously, the control of non-independent drive parameters may conflict, making it impossible to achieve coordinated control of current and junction temperature. This can easily lead to electrothermal coupling effects. When the single control current or junction temperature is balanced, using a unified parameter or related non-independent parameters will cause the balance control of another item to affect the reliability of the parallel devices (such as causing electrothermal imbalance). Therefore, it is necessary to design a new method to coordinate the control of multiple drive parameters to achieve dynamic current and junction temperature balance control, so as to minimize the impact of the imbalance of the two parameters on the reliability of the parallel SiC transistors, thereby further improving its control effect and accuracy.

[0056] See Figure 1 As can be seen from the content disclosed in Chinese Patent CN202210996014, the operation process of a typical SiC MOSFET can be divided into a switching process and a conduction process. The switching current I during the switching process... d_sw The conduction current I during the conduction process d_con The switching losses P of the devices are generated respectively. sw With the conduction loss P of the device c on Generally, the conduction loss and switching loss of a device can be calculated using the following formula:

[0057]

[0058]

[0059] Among them, R dson It is the on-resistance of the MOSFET, V rated V is the rated voltage of the device. dc E on E off These represent the DC bus voltage, module turn-on, and turn-off energy losses, respectively, with τ(t) being the MOSFET's duty cycle function. The switching and conduction losses together constitute the total device loss P. loss :

[0060] P loss =P sw +P con (3)

[0061] Device losses increase the junction temperature of the device through thermal resistance. Generally, the junction temperature of a device can be calculated using the following formula:

[0062] Tj =P loss ×(Z th_n +Z couple )+T h (4)

[0063] Among them, P loss Z represents the total loss of the device. th_n and Z couple These are the self-thermal resistance of the device and the coupling thermal resistance between the devices, T. h This represents the heat sink temperature corresponding to each parallel device.

[0064] The aforementioned equalization control is a relatively ideal approach. However, with the increase in the number of parallel devices, the heat dissipation environment of each parallel single-transistor power device in the system will be different, causing the junction temperature T of each parallel single-transistor device to vary. j Uneven junction temperature T j The threshold voltage V that affects the positive temperature coefficient of each parallel device th With negative temperature coefficient device on-resistance R dson Upon restarting, this current imbalance further affects the device current, causing it to become unbalanced again. This current imbalance then leads to uneven junction temperatures, creating a vicious cycle of mutual influence and cross-coupling, ultimately reducing the overall controllability of the device. This invention addresses these previously difficult-to-detect technical problems and, based on these findings, designs a new gate driving method and system for parallel multi-transistor power devices. This allows for better and more precise control of dynamic current sharing and static heat dissipation in parallel operation of discrete SiC devices.

[0065] See Figure 2 and Figure 7 As shown, the gate drive system for the SiC MOSFET power device with multiple transistors connected in parallel according to the present invention consists of modules such as current sampling, heat sink temperature sampling, junction temperature observation, current equalization adjustment, junction temperature equalization adjustment, and drive parameter adjustment.

[0066] The descriptions of each functional module are as follows:

[0067] 1) Current Sampling Module and Heatsink Temperature Sampling Module: The current sampling module and heatsink temperature sampling module respectively obtain the current of each discrete SiC MOSFET device and the temperature of each part of the heatsink. It is worth noting that the current sampling module can be implemented by building a current sampling circuit and adding a current sensor, etc., to obtain the current of each discrete SiC MOSFET device (including the switching transient current I0). d_sw With the fully conducting current I d_conThis invention takes the method of adding a PCB Rogowski coil as a current sensor as an example; the heat sink temperature sampling module detects the heat sink temperature of parallel discrete SiC devices, while this invention uses a thermocouple mounted on the heat sink of a SiC MOSFET multi-transistor parallel module to obtain the heat sink temperature T. h For example, the method is as follows.

[0068] 2) Junction Temperature Observation Module: The junction temperature observation module models and obtains the junction temperature T of each parallel discrete SiC device based on the results of the current sampling module and the heat sink temperature sampling module. j This invention uses a thermal network model method that considers thermal coupling in the case of multiple SiC MOSFETs connected in parallel to obtain the junction temperature T of each parallel SiC device. j Taking this as an example, we will model the junction temperature observation model. For details, please refer to [link / reference]. Figure 3 .

[0069] 3) Current balancing adjustment module: The current balancing adjustment module is based on the switching current I of each discrete SiC MOSFET device sampled by the current sampling module. d_sw The equalization current command value I during the turn-on or turn-off process is calculated. d_sw_balance The gate drive turn-on resistance R of each discrete SiC MOSFET device is calculated using a current equalization controller. gon Drive turn-off resistor R goff Gate drive turn-on T don and the shutdown delay time instruction T doff For details on the implementation, please refer to [link / reference]. Figure 5 .

[0070] 4) Junction Temperature Equalization Adjustment Module: The junction temperature equalization adjustment module is based on the junction temperature T output by the junction temperature observation module. j The junction temperatures of each discrete SiC MOSFET device are obtained, and the driving voltage V of each discrete SiC MOSFET device is calculated using a junction temperature equalization controller. gs For instructions and specific implementation details, please refer to [link / reference]. Figure 4 .

[0071] 5) Drive parameter adjustment module: The drive parameter adjustment module adjusts the gate drive voltage V of each discrete SiC device through an active gate drive circuit. gs Drive resistor R gon and R goff Switching delay time T don and T doff The parameters are used to achieve balanced control of current and junction temperature in parallel discrete SiC MOSFETs. For details, please refer to [link / reference]. Figure 6 .

[0072] See Figure 7As shown, with Figure 2 Corresponding to the system function, the gate driving method for multiple power devices connected in parallel in this invention specifically includes the following steps:

[0073] Step 1: Obtain the current of each parallel SiC MOSFET device and calculate the loss P of each device. loss .

[0074] Specifically, the current of each discrete SiC MOSFET device in step one includes the switching transient current I. d_sw With the fully conducting current I d_con This invention takes the method of adding a PCB Rogowski coil as a current sensor as an example.

[0075] Step 2: Obtain the temperature T of each part of the radiator. h And combined with loss P loss The junction temperature T of each device was calculated. j .

[0076] For details, see Figure 3 As can be seen, in order to better balance and control the junction temperature and current, this invention redefines the junction temperature T. j The junction temperature observation model is described below, and the modeling steps are as follows:

[0077] First, it is necessary to calculate the loss P of each device. loss Regarding the switching loss P of the device sw The calculation formula is as follows:

[0078]

[0079] Among them, f sw It is the switching frequency of the device, V ds It is the drain-source voltage of the device, I d It is the drain current, i.e., the switching transient current, R gon To drive the turn-on resistor, R goff To drive the turn-off resistor, C iss C is the input capacitance of the device. iss =C gs +C gd C gs C is the gate-source capacitance of the device. gd C is the drain-gate capacitance of the device. rss For the device feedback capacitor, V miller V is the Miller voltage of the device. cc V ee These are the positive and negative driving voltages of the device, V. th This is the driving threshold voltage of the device.

[0080] Regarding the conduction loss P of the devicecond Based on the output characteristic curves in the datasheet, a second-order fitting is performed on the data points of device loss, driving voltage, and conduction current to obtain the formula for calculating device conduction loss:

[0081] P cond (I d V gs )=[a0(V gs -V ref ) 2 +a1]I d 2 +[b0(V gs -V ref ) 2 +b1]I d +c0(V gs -V ref ) 2 +c1 (6)

[0082] In the above formula, a0, a1, b0, b1, c0, and c1 are all fitting coefficients, and V ref V is the reference voltage. gs I is the device drive voltage, i.e., the gate drive voltage. d This represents the drain current. In specific examples, the fitting coefficients a0, a1, b0, b1, c0, and c1 are obtained by fitting data such as the driving voltage and on-current from the output characteristic curve. Secondly, starting from the internal structure and material parameters of discrete SiC devices, and based on the study of the electro-thermal distribution characteristics of SiC MOSFETs in parallel, the principle of electro-thermal analogy and thermal circuit theory are adopted. Taking the temperature of a single surface-mounted thermocouple installed on the heat sink of the SiC MOSFET parallel module as a reference point, considering the cross-coupling of multiple heat sources and the thermal coupling of heat dissipation paths in the case of SiC MOSFETs in parallel, a cross-coupled thermal network model suitable for extracting the junction temperature of SiC multi-tube devices in parallel is established to obtain the self-thermal impedance matrix Z. th_n The coupling thermal impedance matrix Z between devices couple This enables high-precision online acquisition of the junction temperature of each power device in the case of multiple SiC MOSFETs connected in parallel.

[0083] Finally, the loss P of each discrete component is calculated using the above loss calculation formula. loss And combined with the radiator temperature T h Furthermore, a thermal network model of multiple discrete parallel devices with thermal coupling can be used to calculate the junction temperature T of each SiC device. j .

[0084] Step 3: For the switching process of the devices, through the switching current I of each device. d_sw The equalization current value I of its switch is calculated.d_sw_balance And determine the turn-on delay time instruction T for each device. don Shutdown delay time instruction T doff Gate drive turn-on resistor R gon With drive turn-off resistor R goff .

[0085] For details, see Figure 5 It can be seen that step three also includes:

[0086] First, based on the sampled currents of each discrete SiC MOSFET device (including the switching transient current I), d_sw With the fully conducting current I d_con In the current balancing controller, the switching transient current I of each device is monitored. d_sw Compare sizes.

[0087] Secondly, the equalization current command I is calculated. d_sw_balance This invention takes current averaging calculation as an example.

[0088] Finally, after determining the average current, the turn-on delay time T of each device is calculated in the current equalization controller based on the current deviation between the transient switching current of each device and the equalization current command value. don Shutdown delay time T doff Gate drive turn-on resistor R gon With drive turn-off resistor R goff This achieves current balancing during the switching process of parallel devices. For example, for parallel SiC MOSFET devices with a slightly lower drive voltage, larger turn-on current, and smaller turn-off current, the turn-on delay time should be increased, and the turn-off delay time should be decreased or not added. For devices with a slightly higher drive voltage, smaller turn-on current, and larger turn-off current, the turn-on delay time should be decreased or not added, and the turn-off delay time should be increased. Furthermore, the drain current change rate during turn-on can be adjusted by using the gate drive turn-on resistor and drive turn-off resistor to precisely control the waveform of the current during turn-on. The above-mentioned turn-on delay time T is set to achieve current balancing. don Shutdown delay time T doff Gate drive turn-on resistor R gon With drive turn-off resistor R goff The control logic is a standard experimental technique for those skilled in the art, so it will not be elaborated here.

[0089] For the turn-on delay time T of the i-th device in the parallel circuit... don The calculation method is as follows:

[0090]

[0091] τ GS =(RG,ex +R G,in )×C iss (8)

[0092] Where, τ GSi With τ GSav R represents the driving charge / discharge time constant for each device and the average time constant for each device, respectively. G,ex With R G,in These are the external drive resistor and the internal gate resistance, V. cci V eei V GS,thi These represent the positive driving voltage, negative driving voltage, and driving threshold voltage for each device, respectively, V ccav V eeav With V GS,thav R represents the average of the positive driving voltage, negative driving voltage, and driving threshold voltage of the parallel devices, respectively, when the device is turned on. G,ex This is the device's drive-on resistance R. gon When R is turned off G,ex That is, the device's drive-off resistor R. goff .

[0093] The turn-off delay time T of the i-th device in the parallel circuit doff The calculation method is as follows:

[0094]

[0095] Among them, V milleri V represents the Miller plateau voltage of each device. millerav This represents the average value of the Miller plateau voltage for each device;

[0096] The drive turn-on resistance R of the i-th device in the parallel circuit gon The calculation formula is as follows:

[0097]

[0098] Among them, g fs For the transconductance of a SiC MOSFET, when the drain-source voltage V ds When the value is constant, the transconductance is defined as g. fs =ΔI D / ΔV gs . This represents the rate of change of drain current during device turn-on / turn-off.

[0099] The drive-off resistor R of the i-th device in the parallel circuit goff The calculation formula is as follows:

[0100]

[0101] Among them, Iload This is the load current.

[0102] The aforementioned controllable basic variables can be used as independent variables to control the activation delay time T. don Shutdown delay time T doff The value of the gate drive turn-on resistor R gon With drive turn-off resistor R goff During the switching process, the resistance value R is determined by equations 10-11. gon With R goff By adjusting the rate of change of current during the switching process, the switching process can be controlled. The adjustment work involves adjusting the drive resistor, which also affects the turn-on / turn-off delay of the device. To avoid uncontrollable effects of drive resistor adjustment on delay time adjustment, those skilled in the art can use software or existing compensation calculation methods to adjust the turn-on / turn-off delay time T. don and T doff Compensation is performed to achieve the desired current balance control effect.

[0103] Step 4: For the conduction process of the device, the junction temperature T of each device is... j Determine the average junction temperature of each device; the average junction temperature T of the device. j_av The calculation formula is as follows:

[0104] T j_av =f av (T j1 ,T j2 ,...T jn (12)

[0105] Among them, f av To calculate the average value function, the drive voltage command V of each discrete component is controlled. gs To achieve the junction temperature control target for each discrete SiC MOSFET device, specifically the drive voltage V of the i-th device in the parallel connection. gs The instructions are as follows:

[0106] V gs =f(T) j_av ,T ji ,I di (13)

[0107]

[0108] Where f is the junction temperature error (T) of the i-th device. j_av -T ji ) and drain current I di Calculate the driving voltage V gsThe relational function, for devices with high junction temperatures, reduces the corresponding drive voltage command V. gs Reducing the on-current of the device can decrease losses and lower its junction temperature; conversely, for devices with lower junction temperatures, increasing the drive voltage command V... gs Increasing the on-state current of the device can reduce losses and lower its junction temperature, while ensuring that the total current of the parallel branches remains constant.

[0109] For details, see Figure 4 It can be seen that in step four, by combining the junction temperature T of each device... jn (The subscript n represents the junction temperature T of the nth parallel device) j (Based on the device's serial number), determine the driving voltage V for each device. gs This indirectly controls the on-current of the devices, thereby regulating device losses and ultimately adjusting the junction temperature to achieve static heat dissipation control of the parallel SiC MOSFET devices. It's also worth noting that during adjustment, the sum of the currents flowing through each device must remain constant to meet the system's current requirements. Therefore, during adjustment, devices with higher junction temperatures should have their on-current reduced to suppress temperature rise, while devices with lower junction temperatures should have their on-current increased to maximize their performance.

[0110] As can be seen from Equations 4-6, the junction temperature T in this invention j The specific calculation formula is as follows:

[0111]

[0112] It is worth mentioning that because the device operates in a sequential manner—first turning on, then turning off, and finally turning off—this invention first determines the driving resistance R through current balancing during the switching process in step three. gon and R goff In the driving resistor R gon and R goff Once the value is determined, in step four, the driving voltage V in equation 15 above can be dynamically adjusted. gs This ensures that the junction temperature of each device reaches a balanced state without affecting the current balance control parameters during the next turn-on. It achieves independence between the two sets of control parameters, namely current and junction temperature, thereby improving the current utilization rate of multi-parallel SiC MOSFET devices and simultaneously completing their driving operation.

[0113] Step 5: Use an active gate drive circuit to drive the turn-on resistor R of each discrete SiC MOSFET device. gon Drive turn-off resistor R goff Drive voltage V gs Activation delay time T don and shutdown delay time T doffParameters are adjusted to drive parallel SiC MOSFET devices to achieve balanced control of current and junction temperature.

[0114] Specifically, step five can be done through... Figure 6 The drive parameter adjustment module shown is used for control. The active gate drive circuit adjusts the gate drive voltage, drive resistance, switching delay time and other parameters of each discrete SiC device in parallel to achieve dynamic current sharing and static heat equalization of the discrete SiC devices in parallel. The control parameters of junction temperature and current balance are set independently and used simultaneously for gate drive, which can facilitate the rapid realization of balanced control of current and junction temperature. It can better improve the electrothermal stress distribution characteristics of parallel SiC MOSFET devices, reduce the electrothermal coupling deterioration effect caused by junction temperature imbalance, and improve the control effect and control accuracy of multi-transistor parallel devices.

[0115] The active gate drive circuit of the present invention has a simple structure. It only requires a controller with switching delay time control function to be connected in series with a variable drive voltage circuit and a drive resistor control circuit to complete the coordinated control of current sharing and heat sharing and gate drive operation.

[0116] The driving voltage circuit consists of a linear voltage regulator and a push-pull circuit. A reference voltage V is applied to the linear voltage regulator. ref Control V gs+ and V gs- The voltage drop between them, and then through the push-pull circuit, changes the output drive voltage to V. gs+ and V gs- .

[0117] The drive resistor circuit adjusts the switching on and off of two MOSFETs in the control circuit, thereby enabling the adjustable resistor R to... mon and R moff Whether or not the circuit is bypassed, thereby controlling the drive on-resistance R. gon With R goff The size of the delay time controller is adjusted by the controllable basic variable in Equation 7-9 to regulate the activation delay time command T. don With the shutdown delay time instruction T doff .

[0118] It is worth noting that this invention Figure 6 The provided parameter control circuit is merely an example for the purpose of illustrative purposes to facilitate understanding of the present invention. In actual use, the drive parameter control circuit can be modified according to requirements. Its delay time controller, variable drive voltage circuit, and drive resistance control circuit can all use conventional drive circuits in the prior art, as long as they can realize the function of adjusting and changing the corresponding drive parameters.

[0119] Furthermore, it should be noted that the functional units corresponding to each step in the driving method of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in a combination of hardware and software functional units. The integrated unit implemented as a software functional unit can be stored in a computer-readable storage medium. This software functional unit, stored in a storage medium, includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute some steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0120] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A gate driving method for multiple power devices connected in parallel, characterized in that, The gate driving method includes: Obtain the current of each parallel SiC MOSFET device and calculate the loss P of each device. loss ; Obtain the temperature T of each part of the radiator h And in combination with the loss P loss The junction temperature T of each device was calculated. j ; For the switching process of the devices, the switching current I of each device... d_sw The equalization current command value I during the turn-on or turn-off process is calculated. d_sw_balance And determine the turn-on delay time instruction T for each device. don Shutdown delay time instruction T doff , drive turn-on resistor R gon and drive turn-off resistor R goff ; For the conduction process of the device, the junction temperature T of each device is... j Determine the average junction temperature of each device; the average junction temperature T of the device. j_av The calculation formula is as follows: (1) Among them, f av To calculate the average value function, the drive voltage command V of each discrete component is controlled. gs To achieve the junction temperature control target for each discrete SiC MOSFET device, specifically the drive voltage V of the i-th device in the parallel connection. gs The instructions are as follows: (2) (3) Where f is the junction temperature error based on the i-th device. and drain current Calculate the driving voltage V gs The relational function, for devices with high junction temperatures, reduces the corresponding drive voltage command V. gs Reducing the on-current of the device can decrease losses and lower its junction temperature; conversely, for devices with lower junction temperatures, increasing the drive voltage command V... gs By increasing the on-current of the device, losses can be reduced, and its junction temperature can be lowered; at the same time, the total current of the parallel branches remains unchanged. Junction temperature T of each discrete device j The specific calculation formula is as follows: (4) Among them, f sw It is the switching frequency of the device, V ds It is the drain-source voltage of the device, I d R is the drain switching current. gon To drive the turn-on resistor, R goff To drive the turn-off resistor, C iss C is the input capacitance of the device. iss =C gs +C gd C gs C is the gate-source capacitance of the device. gd C is the drain-gate capacitance of the device. rss For the device feedback capacitor, V miller V is the Miller voltage of the device. cc V ee These are the positive and negative driving voltages of the device, V. th V represents the driving threshold voltage of the device, where a0, a1, b0, b1, c0, and c1 are fitting coefficients. ref V is the reference voltage. gs Z is the device drive voltage. th_n and Z couple These are the self-thermal impedance of the device and the coupling thermal impedance matrix between the devices, respectively; the fitting coefficients a0, a1, b0, b1, c0, and c1 are obtained by fitting the driving voltage and conduction current data from the output characteristic curve; Using the principle of electrothermal analogy and thermal circuit theory, and taking the temperature of a single surface-mounted thermocouple mounted on the heatsink of a SiC MOSFET multi-tube parallel module as a reference point, this paper considers the cross-coupling of multiple heat sources and the thermal coupling of heat dissipation paths in the case of SiC MOSFET multi-tube parallel connection. A cross-coupled thermal network model suitable for junction temperature extraction of SiC multi-tube parallel devices is established to obtain the self-thermal impedance matrix Z. th_n The coupling thermal impedance matrix Z between devices couple This enables high-precision online acquisition of the junction temperature of each power device in the case of multiple SiC MOSFETs connected in parallel; The active gate drive circuit is used to drive the turn-on resistor R of each discrete SiC MOSFET. gon Drive turn-off resistor R goff Drive voltage V gs Activation delay time T don and shutdown delay time T doff Parameters are adjusted to drive parallel SiCMOSFET devices to achieve balanced control of current and junction temperature.

2. The gate driving method for multiple power devices connected in parallel according to claim 1, characterized in that, Based on the sampled currents of each discrete SiC MOSFET device, the switching transient current I of each device is controlled in the current equalization controller. d_sw By comparing the magnitudes and using the current average as the target, the equalization current command value I is calculated. d_sw_balance The turn-on delay time T of each device is calculated based on the current deviation between the transient switching current of each device and the equalization current command value. don Shutdown delay time T doff , drive turn-on resistor R gon and drive turn-off resistor R goff .

3. The gate driving method for multiple power devices connected in parallel according to claim 1, characterized in that, The turn-on delay time instruction T for the i-th device in a parallel circuit. don The calculation method is as follows: (5) (6) in, and These represent the driving charge / discharge time constants for each device and the average time constant for each device, respectively. and These are the external drive resistor and the internal gate resistance, V. cci V eei V GS,thi These represent the positive driving voltage, negative driving voltage, and driving threshold voltage for each device, respectively, V ccav V eeav With V GS,thav R represents the average of the positive driving voltage, negative driving voltage, and driving threshold voltage of the parallel devices, respectively, when the device is turned on. G,ex This is the device's drive-on resistance R. gon When R is turned off G,ex That is, the device's drive-off resistor R. goff ; Shutdown delay time T doff The calculation method is as follows: (7) Among them, V milleri V represents the Miller plateau voltage of each device. millerav This represents the average value of the Miller plateau voltage for each device; The drive turn-on resistance R of the i-th device in the parallel circuit gon The calculation formula is as follows: (8) Among them, g fs For the transconductance of a SiC MOSFET, when the drain-source voltage V ds When the value is constant, the transconductance is defined as g. fs =ΔI D / ΔV gs That is, g fs The gate current change rate ΔI D Divide by the gate-source voltage change rate ΔV gs , The rate of change of drain current during device turn-on / turn-off; The drive-off resistor R of the i-th device in the parallel circuit goff The calculation formula is as follows: (9) Among them, I load This is the load current.

4. The gate driving method for multiple power devices connected in parallel according to claim 1, characterized in that, The active gate drive circuit includes a delay time controller, a drive voltage control circuit, and a drive resistor control circuit connected in series.

5. The gate driving method for multiple power devices connected in parallel according to claim 4, characterized in that, The drive voltage control circuit includes a linear voltage regulator and a push-pull circuit. A reference voltage V is applied to the linear voltage regulator. ref Control V gs+ and V gs- The voltage difference between them is then controlled by a push-pull circuit, thereby controlling the drive voltage V. gs .

6. The gate driving method for multiple power devices connected in parallel according to claim 4, characterized in that, The drive resistor control circuit controls the adjustable resistor R by adjusting the on and off states of the two MOS transistors in the on and off branches of the control circuit, respectively. mon and R moff Whether or not the circuit is bypassed, thereby controlling the drive turn-on resistor R. gon and drive turn-off resistor R goff The value of .

7. A non-transitory computer-readable storage medium, characterized in that, The non-transitory computer-readable storage medium stores computer instructions that cause the computer to perform the gate drive method for multiple power devices connected in parallel as described in any one of claims 1 to 6.

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