Spread spectrum circuit and method for reducing electromagnetic interference

Abstract

The application discloses a spread spectrum circuit and method for reducing electromagnetic interference, which comprises a random number generator and a delay unit; the output sequence of the random number generator controls the delay unit, the output of the delay unit acts on the falling edge and the rising edge of an unspread clock, the instantaneous frequency of a spread spectrum clock varying with time is obtained, and frequency spreading is realized.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology, and relates to a spread spectrum circuit and method for reducing electromagnetic interference. Background Technology

[0002] EMI refers to Electromagnetic Interference, and RFI refers to Radio Frequency Interference. Electromagnetic interference refers to the phenomenon in electronic equipment or systems where the presence of electromagnetic fields can interfere with the normal operation of the equipment or system. Radio frequency interference is a special form of electromagnetic interference, referring to the interference signals in wireless communication systems caused by a large number of radio frequency signals in the surrounding environment. This interference signals affect the signals received by wireless communication equipment, leading to degraded communication quality, reduced transmission rate, or even communication failure. These interference signals may come from other wireless equipment, power supplies, wires, electrical appliances, etc. To avoid the effects of these interferences, a series of EMI / RFI suppression measures are needed, including shielding, filtering, using low-noise power supplies, and selecting appropriate wiring layouts. Spread spectrum clocking is a very effective method.

[0003] Spread spectrum clocks play a crucial role in reducing electromagnetic interference / radio frequency interference (EMI / RFI). Here are some of the benefits of spread spectrum clocks in reducing EMI:

[0004] (1) Reduce broadband noise of interference signals: Spread spectrum clocks distribute the energy of signals to a wider frequency band in the frequency domain, making the signals of a single frequency more broadband. This can reduce the impact of narrowband signals on the entire system, thereby reducing broadband noise.

[0005] (2) Reduce the spectral density of interference sources: Spread spectrum clocks can disperse the signals of interference sources over a wider frequency band, thereby reducing the spectral density of interference sources and reducing EMI, thus meeting the certification requirements of EMI and the interference requirements of radio frequency systems.

[0006] Figure 1 This paper presents a classic PLL (Phase-Locked Loop)-based spread spectrum clock architecture. In this architecture, the core circuit for spread spectrum is a time-varying frequency divider. Furthermore, the frequency division ratio is controlled by a time-varying frequency control word (FCWSSC) to adjust the output clock frequency and achieve frequency spread.

[0007] like Figure 2 As shown, the spread spectrum of the clock signal has been expanded into a broadband signal, which has a power suppression effect of more than 20dB on the main tone, achieving a good spread spectrum effect.

[0008] However, spread spectrum clocks based on PLLs (phase-locked loops) have two drawbacks:

[0009] (1) The circuit structure is relatively complex. All functional modules in the phase-locked loop include: voltage-controlled oscillator (VCO), loop filter (LF), phase detector (PD), charge pump (CP), and multi-mode feedback divider (MMFD). Therefore, the spread spectrum clock has many circuit modules, the design is relatively complex, and the power consumption and cost are high.

[0010] (2) Spread spectrum is based on the adjustment of the division ratio. When pursuing a higher spread spectrum effect, a larger division ratio adjustment is often required. In the time domain, this manifests as a relatively serious deterioration of absolute time jitter. Electronic devices and communication systems often have certain requirements for time jitter and cannot accept the deterioration of absolute time jitter, thus limiting the application scenarios of this type of spread spectrum clock. Summary of the Invention

[0011] Purpose of the invention: To address the shortcomings of existing PLL (phase-locked loop) based spread spectrum clocks, this invention proposes a spread spectrum circuit and method for reducing electromagnetic interference.

[0012] Technical solution: A spread spectrum circuit for reducing electromagnetic interference, comprising a spread spectrum circuit; including a random number generator and a delay unit; the output sequence of the random number generator controls the delay unit, and the output of the delay unit acts on the falling edge and rising edge of the unspread clock to obtain the instantaneous frequency of the spread spectrum clock that varies with time, thereby realizing frequency spread.

[0013] Furthermore, the output sequence of the random number generator is a 1-bit random sequence of 0s and 1s. When the output is 0, the delay state of the delay unit is no delay; when the output is 1, the delay state of the delay unit is the maximum delay Td.

[0014] Furthermore, the output sequence of the random number generator is a multi-bit random number sequence, and the delay state of the delay unit corresponds to the random number, including multiple delay states.

[0015] Furthermore, the delay unit includes a first MOSFET, a second MOSFET, an adjustable resistor, and an adjustable capacitor. The source of the first MOSFET is grounded, and its drain is connected to one end of the controllable resistor. The drain of the second MOSFET is connected to one end of the controllable resistor, and its source is connected to a power supply. The other end of the controllable resistor is connected to one end of the controllable capacitor, and the other end of the controllable capacitor is grounded. The delay amount of the delay unit depends on the product of the resistance value of the adjustable resistor and the capacitance value of the adjustable capacitor.

[0016] Furthermore, the delay unit includes a multi-channel switch network and multiple inverters. For any two adjacent inverters, the output of the front inverter is connected to the input of the rear inverter, and the output of each inverter is connected to a switch in the multi-channel switch network. The delay amount of the delay unit depends on which stage of inverter the output of the multi-channel switch network comes from.

[0017] Furthermore, the delay unit includes a first MOSFET, a second MOSFET, a first controllable current source, a second controllable current source, and a capacitor; the source of the first MOSFET is grounded through the first controllable current source, and the drain of the first MOSFET is connected to one end of the capacitor; the source of the second MOSFET is connected to the second controllable current source, and the drain of the second MOSFET is connected to one end of the capacitor, while the other end of the capacitor is grounded; the delay amount of the delay unit depends on the magnitude of the current source.

[0018] Furthermore, the random number generator includes a linear feedback shift register.

[0019] Furthermore, the random number generator is a multi-bit random number generator composed of multiple 1-bit random number generators connected in parallel.

[0020] Furthermore, it also includes an oscillator for generating an initial clock signal, a first driver stage for receiving the initial clock signal and driving the delay unit, and a second driver stage for receiving the output signal of the delay unit and driving an external load; the output terminal of the oscillator is connected to the input terminal of the first driver stage, the output terminal of the first driver stage is connected to the input terminal of the delay unit, the output terminal of the first driver stage is also connected to the input terminal of a random number generator, the output sequence of the random number generator controls the delay unit, and the output terminal of the delay unit is connected to the input terminal of the second driver stage.

[0021] This invention discloses a method for reducing electromagnetic interference, comprising the following steps:

[0022] Step 1: Build the spread spectrum circuit;

[0023] Step 2: According to the spread spectrum requirements, control the random number generator to output the corresponding output sequence;

[0024] Step 3: The output sequence of the random number generator controls the delay unit. The output of the delay unit acts on the falling and rising edges of the unspread clock to obtain the instantaneous frequency of the spread clock that varies with time, thus realizing frequency spread.

[0025] Step 4: Control the absolute time jitter by controlling the absolute values ​​of the delays of the falling and rising edges;

[0026] The spread spectrum circuit is a spread spectrum circuit for reducing electromagnetic interference disclosed above.

[0027] Beneficial effects: Compared with the prior art, the present invention has the following advantages:

[0028] (1) The device of the present invention is based on a random number generator and a delay unit to achieve spread spectrum, which has the advantages of simple structure, low power consumption, low cost, and can achieve a better main tone suppression rate.

[0029] (2) The device of the present invention achieves spread spectrum based on the rising and falling edge delay control of the delay unit, which makes it easy to control the absolute time jitter and avoids affecting the basic functions of electronic equipment and communication systems. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of a PLL-based spread spectrum clock architecture.

[0031] Figure 2 The spectrum diagram of the spread spectrum clock output based on PLL;

[0032] Figure 3 This invention relates to a device for reducing EMI.

[0033] Figure 4 Example diagram for generating spread spectrum clock principles;

[0034] Figure 5 A comparison chart of the spectrum of unspread and spread-spectrum clocks;

[0035] Figure 6 This is a schematic diagram of a typical structure of a controllable delay unit;

[0036] Figure 7 This is a schematic diagram of a typical structure of a controllable delay unit;

[0037] Figure 8 This is a schematic diagram of a typical structure of a controllable delay unit;

[0038] Figure 9 This is a schematic diagram of a typical structure of a random number generator.

[0039] Figure 10 This is a schematic diagram illustrating the application of a multi-bit random number generator. Detailed Implementation

[0040] The technical solution of the present invention will now be further described in conjunction with the accompanying drawings and embodiments.

[0041] Example:

[0042] like Figure 3 As shown, this embodiment discloses a spread spectrum circuit for reducing electromagnetic interference, which mainly includes: an oscillator, a first driver stage, a delay unit, a random number generator, and a second driver stage. The output terminal of the oscillator is connected to the input terminal of the first driver stage, the output terminal of the first driver stage is connected to the input terminal of the delay unit, and the input terminal of the random number generator is also connected. The output terminal of the random number generator acts on the delay unit, and the output terminal of the delay unit is connected to the input terminal of the second driver stage. The oscillator is used to generate an initial clock signal source, the first driver stage is used to receive the initial clock signal and drive the subsequent delay unit, and the second driver stage is used to receive the output signal of the delay unit and drive an external load. The core circuit for generating the spread spectrum effect in this embodiment is the random number generator and the delay unit, and its principle is as follows: Figure 4 As shown, the unspread clock has a fixed clock period T0; Figure 4 In the code, the random generator is 1 bit and the output is a random sequence of 0s and 1s: when the output is 0, the delay unit does not delay; when the output is 1, the delay unit has a maximum delay of Td and is applied to a falling edge and a rising edge.

[0043] When the random number generator outputs the sequence "1, 0, 1, 1...", the instantaneous periods of the generated spread spectrum clock are T0+Td, T0-Td, T0+Td, T0..., which means that an instantaneous period that varies with time is generated, and an instantaneous frequency that varies with time is generated.

[0044] When this embodiment of the architecture is applied in a specific way, the output of the random number generator is not limited to 1 bit, but can be a complex random number sequence of multiple bits; the delay state of the delay unit is not limited to no delay / maximum delay, but can be a complex set of multiple delay states. Figure 9 A typical circuit for generating random number sequences is shown. The basic principle of this circuit is a linear feedback shift register, which can generate random number sequences that change over time. Figure 10 A schematic diagram of a multi-bit random number generator application is shown. A multi-bit random number generator can be realized by connecting multiple random number generators in parallel. The generated multi-bit random numbers control an RC-based controllable delay unit to generate various delay states.

[0045] Implementation methods of delay units: including but not limited to the following structures, delay units based on RC delay and delay units based on digital drive cascade. Figures 6 to 8Several typical controllable delay units are shown. Figure 6 In the structure shown, the delay level of the device depends on which stage of the digital delay chain the output stage takes from. By controlling the multi-channel switching network, the output of a certain stage of the digital delay chain can be selected. In other words, the multi-channel switching network is controlled according to the output sequence of the random number generator, thereby achieving the output selection of a certain stage of the digital delay chain. Figure 8 In the structure shown, the delay of the device depends on the time constant, which is the product of the resistance and capacitance. The delay unit with adjustable delay can be realized by adjusting the resistor and the capacitor. The relationship between the output of the random number generator and the resistance value of the adjustable resistor and the capacitance value of the adjustable capacitor is set in advance. Figure 7 A delay unit based on a controllable current source is shown. In this structure, the delay amount depends on the configuration of the current source; increasing the current source decreases the delay, and decreasing the current source increases the delay. The relationship between the output of the random number generator and the current source magnitude is pre-defined, and then the current source magnitude is adjusted based on the output of the random number generator.

[0046] Figure 5 The diagram shows a comparison of the spreading effect of the unspread clock and the spread clock. The main tone voltage of the unspread clock is 2.28V and 0.806V. After spreading, the main tone drop is on the order of 20*log10(2.28 / 0.806) = 9.03dB, which shows a good gain in main tone drop after spreading. Moreover, the principle of the architecture of this embodiment is based on the falling and rising edge delay of the delay unit. As long as the absolute value of the falling and rising edge delay is controlled, the absolute time jitter can be controlled, thus avoiding the impact on the basic functions of electronic devices and communication systems (such as the extreme deterioration of the eye diagram in wired communication systems).

Claims

1. A spread spectrum circuit for reducing electromagnetic interference, characterized in that: It includes a random number generator and a delay unit; the output sequence of the random number generator controls the delay unit, and the output of the delay unit acts on the falling and rising edges of the unspread clock to obtain the instantaneous frequency of the spread clock that varies with time, thereby realizing frequency spread; The delay unit includes a first MOSFET, a second MOSFET, an adjustable resistor, and an adjustable capacitor. The source of the first MOSFET is grounded, and its drain is connected to one end of the adjustable resistor. The drain of the second MOSFET is connected to one end of the adjustable resistor, and its source is connected to a power supply. The other end of the adjustable resistor is connected to one end of the adjustable capacitor, and the other end of the adjustable capacitor is grounded. The delay amount of this delay unit depends on the product of the resistance value of the adjustable resistor and the capacitance value of the adjustable capacitor. Alternatively, the delay unit may include a multi-channel switching network and multiple inverters. For any two adjacent inverters, the output of the first inverter is connected to the input of the second inverter, and the output of each inverter is connected to a switch in the multi-channel switching network. The delay amount of the delay unit depends on which stage of inverter the output of the multi-channel switching network comes from. Alternatively, the delay unit may include a first MOSFET, a second MOSFET, a first controllable current source, a second controllable current source, and a capacitor; the source of the first MOSFET is grounded through the first controllable current source, and the drain of the first MOSFET is connected to one end of the capacitor; the source of the second MOSFET is connected to the second controllable current source, and the drain of the second MOSFET is connected to one end of the capacitor, with the other end of the capacitor grounded; the delay amount of the delay unit depends on the magnitude of the current source.

2. The spread spectrum circuit for reducing electromagnetic interference according to claim 1, characterized in that: The output sequence of the random number generator is a 1-bit random sequence of 0s and 1s. When the output is 0, the delay unit is in a no-delay state; when the output is 1, the delay unit is in a maximum delay state Td.

3. The spread spectrum circuit for reducing electromagnetic interference according to claim 1, characterized in that: The output sequence of the random number generator is a multi-bit random number sequence, and the delay state of the delay unit corresponds to the random number, including multiple delay states.

4. The spread spectrum circuit for reducing electromagnetic interference according to claim 1, characterized in that: The random number generator includes a linear feedback shift register.

5. A spread spectrum circuit for reducing electromagnetic interference according to claim 1, characterized in that: The random number generator is a multi-bit random number generator composed of multiple 1-bit random number generators connected in parallel.

6. A spread spectrum circuit for reducing electromagnetic interference according to claim 1, characterized in that: Also includes: An oscillator for generating an initial clock signal, a first driver stage for receiving the initial clock signal and driving a delay unit, and a second driver stage for receiving the output signal of the delay unit and driving an external load; the output of the oscillator is connected to the input of the first driver stage, the output of the first driver stage is connected to the input of the delay unit, the output of the first driver stage is also connected to the input of a random number generator, the output sequence of the random number generator controls the delay unit, and the output of the delay unit is connected to the input of the second driver stage.

7. A method for reducing electromagnetic interference, characterized in that: Includes the following steps: Step 1: Build the spread spectrum circuit; Step 2: According to the spread spectrum requirements, control the random number generator to output the corresponding output sequence; Step 3: The output sequence of the random number generator controls the delay unit. The output of the delay unit acts on the falling and rising edges of the unspread clock to obtain the instantaneous frequency of the spread clock that varies with time, thus realizing frequency spread. Step 4: Control the absolute time jitter by controlling the absolute values ​​of the delays of the falling and rising edges; The spread spectrum circuit is a spread spectrum circuit for reducing electromagnetic interference as described in any one of claims 1 to 6.

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