Method and system for cyclic read-write control of on-board code stream data

Abstract

The application provides a kind of cyclic read-write control method and system of spaceborne code stream data, the method includes:1) the safe interval of cyclic read-write address pointer keeps fixed;2) when cyclic write mode is in write stop state, cyclic read address pointer can be consistent with cyclic write address pointer;3) after cyclic read-write task ends, respectively save read-write breakpoint and storage block state information.The application can effectively solve the read-write address pointer conflict problem of recording and playing back satellite remote sensing code stream data using cyclic read-write mode with storage block as storage unit, improve the timeliness of spaceborne data playback, and realize the integrity of the current task data transmission.

Description

Technical Field

[0001] This invention relates to the technical field of information storage and transmission, and more specifically, to a method and system for controlling the cyclic reading and writing of spaceborne code stream data. Background Technology

[0002] Currently, domestic satellite payload data storage primarily uses file format and bitstream data. Some mapping and remote sensing satellites, based on their payload missions and application characteristics, store their remote sensing data as bitstream data. Solid-state storage devices use storage blocks as address units, and reading and writing to individual storage blocks incurs time overhead. To avoid read / write pointer conflicts during remote sensing data recording and playback, traditional designs use staggered address intervals for protection; otherwise, simultaneous read / write conflicts on the same storage block can occur, leading to data loss and errors. Furthermore, during ground testing and in-orbit use, it was found that data from a particular mission could not be completely transmitted in real-time due to address protection intervals, requiring data to be read during subsequent playback missions and stitched together on the ground. Alternatively, after the payload data recording is complete, a time-segmented playback mode is used to read the complete data. These methods significantly reduce the timeliness of in-orbit data transmission and application, and also add extra operational procedures for ground data reception and testing.

[0003] In contrast to publicly available methods, the patent document "A Method for Storing Satellite Remote Sensing Image Data" (CN107066562A) proposes a method for storing satellite remote sensing image data. This method divides satellite remote sensing data into layered files according to spectral bands, and then divides the data into image blocks according to the geographic coordinate characteristics of the data, storing them in multiple storage blocks. It adopts a distributed storage scheme, mainly to solve the problem of single-machine storage speed for large amounts of data in file format. While this method also uses storage blocks as storage units, it is not a distributed design. It mainly aims to solve the timing conflicts of cyclic read / write operations for stream-type remote sensing data, as well as the issues of integrity and timeliness in stream data playback.

[0004] The patent titled "A Fast Storage / Reading Method and System for Bitstream Data" (CN104536700A) proposes a method for parsing bitstream data packets, tagging the generated identifiable bitstream packets to create labeled bitstream packets, and directly storing them while adding offset tags to establish address indexes. This method aims to reduce the consumption of independent hardware memory by tagging the bitstream data format. However, the introduction of tag positions also reduces the available data bit space. This method uses a separate hardware storage unit (PROM) to cyclically read and write address pointers and record time for the bitstream data storage blocks.

[0005] The patent titled "Streaming Data Storage Control System and Method Thereof" (CN102968422A) discloses a system composed of multiple functional modules, including a RAID control module, a logical volume management module, a streaming data access interface module, a time indexing and space management module, and a host interface driver module. It outlines the connection relationships between these modules and the specific functions and workflows of each module. This method maps storage space into multiple RAID spaces, divides these RAID spaces into multiple logical volumes, and provides storage interfaces for streaming data and time index access to improve data read / write efficiency. This method employs a circular read / write storage block approach, primarily to address timing conflicts during circular read / write operations of stream-type remote sensing data, as well as issues related to the integrity and timeliness of stream data playback.

[0006] According to publicly available documents, no mention was found of a cyclic read / write timing design method for stream-type remote sensing data, nor were the issues of data playback integrity and timeliness addressed.

[0007] Currently, there is no known method for controlling the cyclic reading and writing of remote sensing data streams. Therefore, a new technical solution is needed to improve the above-mentioned technical problems. Summary of the Invention

[0008] To address the shortcomings of existing technologies, the purpose of this invention is to provide a method and system for controlling the cyclic reading and writing of spaceborne code stream data.

[0009] According to the present invention, a method for cyclic reading and writing control of spaceborne code stream data includes the following steps:

[0010] Step S1: When the satellite receives the read enable command and the write enable command, it sets the cyclic read mode and the cyclic write mode to the enabled state respectively;

[0011] Step S2: When in the write-enabled state, if the interval between the read pointer and the write pointer is equal to 1 address bit, the cyclic read mode enters the read-wait state. When the interval between the read and write address pointers is not less than 2 address bits, the cyclic read mode automatically enters the read-enabled state from the read-wait state.

[0012] Step S3: When the write enable mode receives a write stop instruction, after the current address operation is completed, the write mode enters the write stop state, saves the write breakpoint as the next writable address, and when the write enable instruction is received again, the write operation starts from the write breakpoint. Only when the write mode is in the write stop state can the read address pointer be the same as the write address pointer.

[0013] Step S4: When a read stop instruction is received or the read address pointer is consistent with the write address pointer, after the current address operation is completed, the loop read mode enters the read stop state, and the read breakpoint is saved as the next unread address. The read stop state needs to receive a read instruction again to enter the read enable state. When the read enable instruction is received again, the loop read operation starts from the read breakpoint.

[0014] Step S5: After the circular read / write mode ends, save the address pointer of the circular read / write breakpoint and the storage block status information.

[0015] Preferably, in the circular read / write mode, the read address pointer and write address pointer of the storage module are connected end to end, and the read address pointer and write address pointer start from the initial value of 0 after overflow.

[0016] Preferably, the storage module in the circular read / write mode uses a storage block as an address unit, and the capacity of the storage block is expanded by adjusting the storage depth and bit width.

[0017] Preferably, during a cyclic write operation, the next non-free address is sequentially queried from the current write address pointer to perform an autonomous cyclic erase operation, erasing one memory block at a time and marking it as free.

[0018] Preferably, the storage block status information includes the read, unread, and idle status of the storage block, as well as the recording time of the storage block data.

[0019] The present invention also provides a cyclic read / write control system for spaceborne code stream data, the system comprising the following modules:

[0020] Module M1: When the satellite receives the read enable command and the write enable command, it sets the cyclic read mode and the cyclic write mode to the enabled state respectively;

[0021] Module M2: When in write-enabled state, if the interval between the read pointer and the write pointer is equal to 1 address bit, the cyclic read mode enters the read wait state; if the interval between the read and write address pointers is not less than 2 address bits, the cyclic read mode automatically enters the read-enabled state from the read wait state.

[0022] Module M3: When a write stop instruction is received in the write enable state of the circular write mode, after the current address operation is completed, the circular write mode enters the write stop state, saves the write breakpoint as the next writable address, and when a write enable instruction is received again, the circular write operation starts from the write breakpoint. Only when the write mode is in the write stop state can the read address pointer be the same as the write address pointer.

[0023] Module M4: When a read stop instruction is received or the read address pointer matches the write address pointer, after reading the current address, the loop read mode enters the read stop state, and the read breakpoint is saved as the next unread address. The read stop state can only enter the read enable state after receiving another read instruction. When the read enable instruction is received again, the loop read operation starts from that read breakpoint.

[0024] Module M5: After the loop read / write mode ends, save the address pointer of the loop read / write breakpoint and the storage block status information.

[0025] Preferably, in the circular read / write mode, the read address pointer and write address pointer of the storage module are connected end to end, and the read address pointer and write address pointer start from the initial value of 0 after overflow.

[0026] Preferably, the storage module in the circular read / write mode uses a storage block as an address unit, and the capacity of the storage block is expanded by adjusting the storage depth and bit width.

[0027] Preferably, during a cyclic write operation, the next non-free address is sequentially queried from the current write address pointer to perform an autonomous cyclic erase operation, erasing one memory block at a time and marking it as free.

[0028] Preferably, the storage block status information includes the read, unread, and idle status of the storage block, as well as the recording time of the storage block data.

[0029] Compared with the prior art, the present invention has the following beneficial effects:

[0030] 1. This invention can effectively solve the problem of read and write address pointer conflicts when recording and replaying satellite remote sensing code stream data in a cyclic read and write mode using storage blocks as storage units, thereby improving the timeliness of onboard data playback and achieving the integrity of data transmission for the current mission.

[0031] 2. This invention sets a cyclic read / write state that is triggered under different conditions. Through the autonomous transfer of the cyclic read / write state, it can avoid timing conflicts of cyclic read / write data and ensure the timeliness and integrity of the current remote sensing data playback. The erasure of storage blocks and the saving of state information are completed autonomously. This design makes the satellite mission planning control interface for data storage simpler. Attached Figure Description

[0032] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0033] Figure 1 This is the cyclic read state transition diagram of the present invention;

[0034] Figure 2This is the cyclic write state transition diagram of the present invention;

[0035] Figure 3 This is a schematic diagram of the FAT table structure of the storage module of the present invention;

[0036] Figure 4 This is a block diagram illustrating the principle of the storage module of the present invention. Detailed Implementation

[0037] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0038] Example 1:

[0039] According to the present invention, a method for cyclic reading and writing control of spaceborne code stream data includes the following steps:

[0040] Step S1: When the satellite receives the read enable command and the write enable command, it sets the cyclic read mode and the cyclic write mode to the enabled state respectively;

[0041] Step S2: When in the write-enabled state, if the interval between the read pointer and the write pointer is equal to 1 address bit, the cyclic read mode enters the read-wait state. When the interval between the read and write address pointers is not less than 2 address bits, the cyclic read mode automatically enters the read-enabled state from the read-wait state.

[0042] Step S3: When the write enable mode receives a write stop instruction, after the current address operation is completed, the write mode enters the write stop state, saves the write breakpoint as the next writable address, and when the write enable instruction is received again, the write operation starts from the write breakpoint. Only when the write mode is in the write stop state can the read address pointer be the same as the write address pointer.

[0043] Step S4: When a read stop instruction is received or the read address pointer is consistent with the write address pointer, after the current address operation is completed, the loop read mode enters the read stop state, and the read breakpoint is saved as the next unread address. The read stop state needs to receive a read instruction again to enter the read enable state. When the read enable instruction is received again, the loop read operation starts from the read breakpoint.

[0044] Step S5: After the circular read / write mode ends, save the address pointer of the circular read / write breakpoint and the storage block status information.

[0045] In the circular read / write mode, the read address pointer and write address pointer of the storage module are connected end to end. After the read address pointer and write address pointer overflow, they start from the initial value of 0.

[0046] In the circular read / write mode, the storage module uses a storage block as an address unit, and the capacity of the storage block is expanded by adjusting the storage depth and bit width.

[0047] During a cyclic write operation, the system sequentially queries the next non-free address from the current write address pointer and performs a self-automatic cyclic erase operation, erasing one memory block at a time and marking it as free.

[0048] Storage block status information includes the read status, unread status, and free status of the storage block, as well as the recording time of the storage block data.

[0049] Example 2:

[0050] Example 2 is a preferred embodiment of Example 1, and is used to illustrate the present invention in more detail.

[0051] This invention also provides a cyclic read / write control system for spaceborne code stream data, the system comprising the following modules:

[0052] Module M1: When the satellite receives the read enable command and the write enable command, it sets the cyclic read mode and the cyclic write mode to the enabled state respectively;

[0053] Module M2: When in write-enabled state, if the interval between the read pointer and the write pointer is equal to 1 address bit, the cyclic read mode enters the read wait state; if the interval between the read and write address pointers is not less than 2 address bits, the cyclic read mode automatically enters the read-enabled state from the read wait state.

[0054] Module M3: When a write stop instruction is received in the write enable state of the circular write mode, after the current address operation is completed, the circular write mode enters the write stop state, saves the write breakpoint as the next writable address, and when a write enable instruction is received again, the circular write operation starts from the write breakpoint. Only when the write mode is in the write stop state can the read address pointer be the same as the write address pointer.

[0055] Module M4: When a read stop instruction is received or the read address pointer matches the write address pointer, after reading the current address, the loop read mode enters the read stop state, and the read breakpoint is saved as the next unread address. The read stop state can only enter the read enable state after receiving another read instruction. When the read enable instruction is received again, the loop read operation starts from that read breakpoint.

[0056] Module M5: After the loop read / write mode ends, save the address pointer of the loop read / write breakpoint and the storage block status information.

[0057] In the circular read / write mode, the read address pointer and write address pointer of the storage module are connected end to end. After the read address pointer and write address pointer overflow, they start from the initial value of 0.

[0058] In the circular read / write mode, the storage module uses a storage block as an address unit, and the capacity of the storage block is expanded by adjusting the storage depth and bit width.

[0059] During a cyclic write operation, the system sequentially queries the next non-free address from the current write address pointer and performs a self-automatic cyclic erase operation, erasing one memory block at a time and marking it as free.

[0060] Storage block status information includes the read status, unread status, and free status of the storage block, as well as the recording time of the storage block data.

[0061] Example 3:

[0062] Example 3 is a preferred example of Example 1, and is used to illustrate the present invention in more detail.

[0063] To address the shortcomings of existing technologies, the purpose of this invention is to provide a method for controlling the cyclic reading and writing of satellite-borne code stream data, effectively solving the timing control and timeliness issues of cyclic reading and writing of satellite remote sensing data using code streams.

[0064] This invention proposes a method for cyclic read / write control of spaceborne code stream data, comprising:

[0065] Step 1: When a read enable command and a write enable command are received, enable the cyclic read mode and the cyclic write mode respectively.

[0066] Step 2: In the write-enabled state, the read pointer and write pointer must be spaced at least one address bit apart. When the read pointer and write pointer are equal to one address bit apart, the loop read mode transitions from the read-enabled state to the read-wait state. In the read-wait state, data playback is paused, and the loop write continues to increment the write address in the enabled state. When the read and write address pointer interval is again not less than two address bits, the loop read mode automatically transitions from the read-wait state to the read-enabled state. See the state transition diagram for loop read. Figure 1 As shown.

[0067] Step 3: When a write stop instruction is received in the write enable state of the circular write mode, after completing the write operation at the current address, the circular write mode enters the write stop state, saving the write breakpoint as the next writable address. Only when a write enable instruction is received again will the circular write operation resume from the write breakpoint. The read address pointer can only catch up with and match the write address pointer when the write mode is in the write stop state. See the state transition diagram for the circular write operation. Figure 2 As shown.

[0068] Step 4: When a read stop instruction is received or the read address pointer matches the write address pointer, after the current address is read, the loop read mode enters the read stop state, and the read breakpoint is saved as the next unread address. The read stop state can only enter the read enable state after receiving another read instruction. When the read enable instruction is received again, the loop read operation starts from that read breakpoint.

[0069] Step 5: After the loop read / write mode ends, save the address pointer of the loop read / write breakpoint and the memory block status information on a separate external memory chip.

[0070] Preferably, in the cyclic read / write control method for spaceborne code stream data, the read and write address pointers of the storage module for cyclic read / write are connected end-to-end, and if the read / write address pointer overflows, it starts from the initial value of 0.

[0071] Preferably, in the cyclic read / write control method for spaceborne code stream data, the storage module for cyclic read / write uses a storage block as an address unit, and the capacity of the storage block can be expanded by adjusting the storage depth and bit width.

[0072] Preferably, the cyclic read / write control method for satellite code stream data, when performing a write operation, sequentially queries the FAT table information of the next non-free address from the current write address pointer to perform an autonomous cyclic erase operation, erasing one storage block at a time and marking it as free.

[0073] The storage block status information includes the read, unread, and free status of the storage block, as well as the recording time of the storage block data. The storage module uses a FAT table to establish a correspondence with the logical storage address. Each address stores 32 bits of data block information, with the high 24 bits being an identifier and the low 8 bits being EDAC check bits. When bits 24-1 are all 1s, it indicates that the storage space represented by that address is a bad block area and the storage space is unusable. When bits 24-1 are all 0s, it indicates that the storage space represented by that address is a free area and the storage space is used for new data recording. After completing the recording operation for the current address, bits 24-23 of the FAT table are marked as 00 to indicate that it is unread, and bits 22-21 are allocated as the recording timestamp. Figure 3 This is a schematic diagram of the FAT table of the storage module. In this embodiment, the total number of addresses in the address space is 4096.

[0074] The storage module design is guided by the principles of generalization, modularity, and reliability. The storage module consists of multiple storage sub-modules, each composed of a control unit, storage units, and cascading devices, all completely independent of each other. The control unit primarily handles various low-level timing controls and error correction encoding / decoding for the storage units. Each storage unit is composed of nine 128Gb 3Dplus 3D-packaged FLASH chips cascaded in parallel, with eight used for data storage and one for verification. A cascading switch sets the cascading relationship between the storage sub-modules, allowing expansion of the storage block depth or bit width, thereby increasing storage capacity and speed. The storage module design block diagram is shown below. Figure 4 As shown.

[0075] Those skilled in the art can understand this embodiment as a more specific description of Embodiment 1 and Embodiment 2.

[0076] Those skilled in the art will understand that, besides implementing the system and its various devices, modules, and units provided by this invention in the form of purely computer-readable program code, the same functions can be achieved entirely through logical programming of the method steps, making the system and its various devices, modules, and units of this invention function in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers. Therefore, the system and its various devices, modules, and units provided by this invention can be considered as a hardware component, and the devices, modules, and units included therein for implementing various functions can also be considered as structures within the hardware component; alternatively, the devices, modules, and units for implementing various functions can be considered as both software modules implementing the method and structures within the hardware component.

[0077] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. A method for controlling the cyclic reading and writing of spaceborne code stream data, characterized in that, The method includes the following steps: Step S1: When the satellite receives the read enable command and the write enable command, it sets the cyclic read mode and the cyclic write mode to the enabled state respectively; Step S2: When in the write-enabled state, if the interval between the read pointer and the write pointer is equal to 1 address bit, the cyclic read mode enters the read-wait state. When the interval between the read and write address pointers is not less than 2 address bits, the cyclic read mode automatically enters the read-enabled state from the read-wait state. Step S3: When the write enable mode receives a write stop instruction, after the current address operation is completed, the write mode enters the write stop state, saves the write breakpoint as the next writable address, and when the write enable instruction is received again, the write operation starts from the write breakpoint. Only when the write mode is in the write stop state can the read address pointer be the same as the write address pointer. Step S4: When a read stop instruction is received or the read address pointer is consistent with the write address pointer, after the current address operation is completed, the loop read mode enters the read stop state, and the read breakpoint is saved as the next unread address. The read stop state needs to receive a read instruction again to enter the read enable state. When the read enable instruction is received again, the loop read operation starts from the read breakpoint. Step S5: After the circular read / write mode ends, save the address pointer of the circular read / write breakpoint and the storage block status information.

2. The method for cyclic reading and writing control of spaceborne code stream data according to claim 1, characterized in that, In the circular read / write mode, the read address pointer and write address pointer of the storage module are connected end to end, and after the read address pointer and write address pointer overflow, they start from the initial value of 0.

3. The method for cyclic reading and writing control of spaceborne code stream data according to claim 1, characterized in that, The storage module in the circular read / write mode uses a storage block as an address unit, and the capacity of the storage block is expanded by adjusting the storage depth and bit width.

4. The method for cyclic reading and writing control of spaceborne code stream data according to claim 1, characterized in that, During a cyclic write operation, the system sequentially queries the next non-free address from the current write address pointer and performs a self-automatic cyclic erase operation, erasing one memory block at a time and marking it as free.

5. The method for cyclic reading and writing control of spaceborne code stream data according to claim 1, characterized in that, The storage block status information includes the read, unread, and idle status of the storage block, as well as the recording time of the storage block data.

6. A cyclic read / write control system for spaceborne code stream data, characterized in that, The system includes the following modules: Module M1: When the satellite receives the read enable command and the write enable command, it sets the cyclic read mode and the cyclic write mode to the enabled state respectively; Module M2: When in write-enabled state, if the interval between the read pointer and the write pointer is equal to 1 address bit, the cyclic read mode enters the read wait state; if the interval between the read and write address pointers is not less than 2 address bits, the cyclic read mode automatically enters the read-enabled state from the read wait state. Module M3: When a write stop instruction is received in the write enable state of the circular write mode, after the current address operation is completed, the circular write mode enters the write stop state, saves the write breakpoint as the next writable address, and when a write enable instruction is received again, the circular write operation starts from the write breakpoint. Only when the write mode is in the write stop state can the read address pointer be the same as the write address pointer. Module M4: When a read stop instruction is received or the read address pointer matches the write address pointer, after reading the current address, the loop read mode enters the read stop state, and the read breakpoint is saved as the next unread address. The read stop state can only enter the read enable state after receiving another read instruction. When the read enable instruction is received again, the loop read operation starts from that read breakpoint. Module M5: After the loop read / write mode ends, save the address pointer of the loop read / write breakpoint and the storage block status information.

7. The cyclic read / write control system for spaceborne code stream data according to claim 6, characterized in that, In the circular read / write mode, the read address pointer and write address pointer of the storage module are connected end to end, and after the read address pointer and write address pointer overflow, they start from the initial value of 0.

8. The cyclic read / write control system for spaceborne code stream data according to claim 6, characterized in that, The storage module in the circular read / write mode uses a storage block as an address unit, and the capacity of the storage block is expanded by adjusting the storage depth and bit width.

9. The cyclic read / write control system for spaceborne code stream data according to claim 6, characterized in that, During a cyclic write operation, the system sequentially queries the next non-free address from the current write address pointer and performs a self-automatic cyclic erase operation, erasing one memory block at a time and marking it as free.

10. The cyclic read / write control system for spaceborne code stream data according to claim 6, characterized in that, The storage block status information includes the read, unread, and idle status of the storage block, as well as the recording time of the storage block data.

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