Light emitting diode epitaxial wafer and preparation method thereof, LED

Abstract

The application discloses a light emitting diode epitaxial wafer and a preparation method thereof and an LED, and the light emitting diode epitaxial wafer comprises a substrate and a buffer layer, a non-doped GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer which are sequentially stacked on the substrate; the P-type semiconductor layer comprises a two-dimensional InN layer, a three-dimensional P-type InAlGaN layer and a P-GaN / GaN superlattice layer which are sequentially stacked on the electron blocking layer, and the P-GaN / GaN superlattice layer comprises alternately stacked P-GaN layers and GaN layers. The light emitting diode epitaxial wafer provided by the application can improve the problems of low hole concentration and low hole injection efficiency of a P-type GaN of a GaN-based light emitting diode.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic technology, and in particular to a light-emitting diode epitaxial wafer and its preparation method, and LEDs. Background Technology

[0002] GaN, as a third-generation semiconductor material, possesses advantages such as a large bandgap, high electron saturation velocity, low dielectric constant, and good thermal conductivity, leading to its widespread application in semiconductor technology. However, the primary condition for fully utilizing its electrical and optical properties in semiconductor device applications is to achieve effective N-type and P-type doping. Intrinsic GaN has a very high background carrier concentration, exhibiting N-type conductivity, which increases the difficulty of P-type doping. Furthermore, the acceptor activation efficiency is very low, resulting in a relatively low hole concentration. Moreover, acceptor atoms readily react with high concentrations of H atoms during doping to form neutral complexes, strengthening the deep-level properties of the acceptor element and increasing its ionization energy, thus reducing doping efficiency. Besides the low P-type doping efficiency, another factor affecting the photoelectric performance of semiconductor devices is the low efficiency of hole injection into the quantum well region. This is mainly because holes have a large effective mass and a slow migration rate, while electrons have a relatively higher migration rate. To reduce electron overflow into the P-type GaN region, an AlGaN electron blocking layer is usually inserted after the quantum well. However, the strong polarization electric field between the quantum well and the AlGaN electron blocking layer causes band bending, forming a barrier that hinders hole injection into the quantum well region, ultimately affecting the hole-electron recombination efficiency. In summary, the P-type doping efficiency and the hole injection efficiency into the light-emitting region have always been prominent challenges restricting the application and development of GaN-based light-emitting diodes.

[0003] Previous technical solutions have increased the hole concentration by increasing the Mg doping concentration in the P-GaN layer or by performing high-temperature annealing on the P-type semiconductor layer to break the Mg-H bonds; another commonly used approach is to reduce the hole barrier height by gradually doping the electron blocking layer with Mg or Al.

[0004] However, there is a limit to the solubility of Mg in GaN materials. Excessive Mg doping not only fails to increase the number of effective holes, but also produces Mg2+. x N y Impurities affect crystal quality; high-temperature annealing process easily generates Mg impurities, which diffuse into the quantum well region and cause nonradiative recombination, ultimately affecting the effective recombination efficiency; although the electron blocking layer with Al graded doping can reduce the hole barrier height, the tunneling of holes into the quantum well region still requires a lot of energy, ultimately affecting the operating voltage. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a light-emitting diode epitaxial wafer that can improve the problems of low hole concentration and low hole injection efficiency of GaN-based light-emitting diodes P-type GaN.

[0006] The technical problem to be solved by the present invention is to provide a method for preparing an epitaxial wafer of a light-emitting diode, which has a simple process and can stably produce an epitaxial wafer of a light-emitting diode with good luminous efficiency.

[0007] To solve the above-mentioned technical problems, the present invention provides a light-emitting diode epitaxial wafer, comprising a substrate and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type semiconductor layer sequentially stacked on the substrate.

[0008] The P-type semiconductor layer includes a two-dimensional InN layer, a three-dimensional P-type InAlGaN layer, and a P-GaN / GaN superlattice layer sequentially stacked on the electron blocking layer. The P-GaN / GaN superlattice layer includes alternately stacked P-GaN layers and GaN layers.

[0009] In one embodiment, the sidewall growth thickness of the two-dimensional InN layer is greater than the growth thickness of the C-plane;

[0010] The thickness of the two-dimensional InN layer is 2nm to 20nm;

[0011] The In component content of the two-dimensional InN layer is 0.01 to 0.05.

[0012] In one embodiment, the sidewall growth thickness of the three-dimensional P-type InAlGaN layer is less than the growth thickness of the C-plane.

[0013] The thickness of the three-dimensional P-type InAlGaN layer is 2nm to 50nm;

[0014] The doping concentration of the three-dimensional P-type InAlGaN layer is 1×10⁻⁶. 17 atoms / cm 3 ~1×10 19 atoms / cm 3 .

[0015] In one embodiment, the In content of the three-dimensional P-type InAlGaN layer gradually increases from 0.01 to 0.1 to 0.1 to 0.2 along the growth direction;

[0016] The Al content of the three-dimensional P-type InAlGaN layer gradually decreases from 0.1 to 0.2 to 0.01 to 0.1 along the growth direction.

[0017] In one embodiment, the P-GaN / GaN superlattice layer comprises alternating layers of P-GaN and GaN layers, with a period number of 5 to 20.

[0018] The thickness of the P-GaN / GaN superlattice layer is 5 nm to 100 nm.

[0019] The P-type doping concentration of the P-GaN layer is 1×10⁻⁶. 19 atoms / cm 3 ~1×10 20 atoms / cm 3 .

[0020] In one embodiment, the growth temperature of the two-dimensional InN layer is 880℃~1000℃;

[0021] The growth temperature of the three-dimensional P-type InAlGaN layer is 800℃~900℃;

[0022] In the P-GaN / GaN superlattice layer, the growth temperature of the P-GaN layer is 800℃~900℃;

[0023] In the P-GaN / GaN superlattice layer, the growth temperature of the GaN layer is 900℃~1000℃.

[0024] In one embodiment, the growth atmosphere of the two-dimensional InN layer is a mixture of N2, H2 and NH3 gas;

[0025] The growth atmosphere of the three-dimensional P-type InAlGaN layer is a mixture of N2 and NH3 gas;

[0026] In the P-GaN / GaN superlattice layer, the growth atmosphere of the P-GaN layer is a mixture of N2, H2 and NH3 gas;

[0027] In the P-GaN / GaN superlattice layer, the growth atmosphere of the GaN layer is a mixture of N2 and NH3 gas.

[0028] In one embodiment, the growth pressure of the two-dimensional InN layer is 100 torr to 150 torr;

[0029] The growth pressure of the three-dimensional P-type InAlGaN layer is 200 to 500 tortr;

[0030] The growth pressure of the P-GaN / GaN superlattice layer is 100 torr to 200 torr.

[0031] Accordingly, the present invention provides a method for fabricating a light-emitting diode epitaxial wafer, comprising the following steps:

[0032] S1. Prepare the substrate;

[0033] S2. A buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type semiconductor layer are sequentially deposited on the substrate.

[0034] The P-type semiconductor layer includes a two-dimensional InN layer, a three-dimensional P-type InAlGaN layer, and a P-GaN / GaN superlattice layer sequentially stacked on the electron blocking layer. The P-GaN / GaN superlattice layer includes alternately stacked P-GaN layers and GaN layers.

[0035] Accordingly, the present invention also provides an LED, which includes the above-described light-emitting diode epitaxial wafer.

[0036] Implementing this invention has the following beneficial effects:

[0037] The light-emitting diode epitaxial wafer provided by the present invention has a P-type semiconductor layer with a specific structure. The P-type semiconductor layer includes a two-dimensional InN layer, a three-dimensional P-type InAlGaN layer and a P-GaN / GaN superlattice layer sequentially stacked on the electron blocking layer. The P-GaN / GaN superlattice layer includes alternately stacked P-GaN layers and GaN layers.

[0038] This invention utilizes the V-shaped pits on the epitaxial surface to create hole transport paths with different barrier and voltage differences on the V-shaped sidewalls and C-plane platform by growing two-dimensional InN layers and three-dimensional P-type InAlGaN layers, respectively. This promotes hole injection from the V-shaped sidewalls into the quantum well region, improves hole distribution, and ultimately enhances hole injection efficiency. The P-GaN / GaN superlattice layer provides sufficient hole sources, thereby further improving Mg doping efficiency. Attached Figure Description

[0039] Figure 1 This is a schematic diagram of the structure of the light-emitting diode epitaxial wafer provided by the present invention;

[0040] Figure 2 A flowchart illustrating the method for fabricating a light-emitting diode epitaxial wafer provided by the present invention;

[0041] Figure 3 The flowchart shows step S2 of the method for preparing a light-emitting diode epitaxial wafer provided by the present invention.

[0042] Among them: substrate 1, buffer layer 2, undoped GaN layer 3, N-type GaN layer 4, multiple quantum well layer 5, electron blocking layer 6, P-type semiconductor layer 7, two-dimensional InN layer 71, three-dimensional P-type InAlGaN layer 72, and P-GaN / GaN superlattice layer 73. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described in further detail below.

[0044] Unless otherwise stated or in case of contradiction, the terms or phrases used herein shall have the following meanings:

[0045] In this invention, "preferred" is merely a description of a more effective implementation method or embodiment, and should be understood as not constituting a limitation on the scope of protection of this invention.

[0046] In this invention, the technical features described in an open-ended manner include both closed-ended technical solutions composed of the listed features and open-ended technical solutions that include the listed features.

[0047] In this invention, numerical ranges are involved, and unless otherwise specified, they include the two endpoints of the numerical range.

[0048] To address the above problems, the present invention provides a light-emitting diode epitaxial wafer, such as... Figure 1 As shown, it includes a substrate 1 and a buffer layer 2, an undoped GaN layer 3, an N-type GaN layer 4, a multiple quantum well layer 5, an electron blocking layer 6, and a P-type semiconductor layer 7 sequentially stacked on the substrate 1.

[0049] The P-type semiconductor layer 7 includes a two-dimensional InN layer 71, a three-dimensional P-type InAlGaN layer 72, and a P-GaN / GaN superlattice layer 73 sequentially stacked on the electron blocking layer 6. The P-GaN / GaN superlattice layer 73 includes alternately stacked P-GaN layers and GaN layers.

[0050] In one embodiment, the sidewall growth thickness of the two-dimensional InN layer 71 is greater than the C-plane growth thickness; the thickness of the two-dimensional InN layer 71 is 2 nm to 20 nm; the In content is 0.01 to 0.05. The growth temperature of the two-dimensional InN layer is 880°C to 1000°C; the growth atmosphere is a mixture of N2, H2, and NH3 gas; and the growth pressure is 100 torr to 150 torr.

[0051] This invention controls the growth temperature, growth pressure, and growth atmosphere of the two-dimensional InN layer to make its growth thickness on the V-shaped sidewall greater than that on the C-face. By increasing the sidewall thickness of the two-dimensional InN, the compressive stress of the InGaN quantum well layer on the sidewall is relieved, the sidewall polarization electric field intensity is reduced, the band bending of the sidewall is reduced, and the hole injection barrier on the sidewall is lowered.

[0052] In one embodiment, the sidewall growth thickness of the three-dimensional P-type InAlGaN layer 72 is less than the C-plane growth thickness; the thickness of the three-dimensional P-type InAlGaN layer 72 is 2 nm to 50 nm; and the doping concentration is 1 × 10⁻⁶.17 atoms / cm 3 ~1×10 19 atoms / cm 3 The In content of the three-dimensional P-type InAlGaN layer 72 gradually increases from 0.01–0.1 to 0.1–0.2 along the growth direction, while the Al content gradually decreases from 0.1–0.2 to 0.01–0.1 along the growth direction. This invention, by controlling the gradual decrease of the Al content along the growth direction in the three-dimensional P-type InAlGaN layer, can further reduce the hole barrier height, and the gradual increase of the In content along the growth direction can reduce the activation energy of Mg, thereby improving the P-type doping efficiency and increasing the hole concentration.

[0053] In one embodiment, the growth temperature of the three-dimensional P-type InAlGaN layer 72 is 800℃~900℃; the growth atmosphere is a mixture of N2 and NH3 gas; and the growth pressure is 200 torr~500 torr.

[0054] This invention controls the growth temperature, growth pressure, and growth atmosphere of the three-dimensional P-type InAlGaN layer to ensure that its growth thickness on the V-shaped sidewall is less than that on the C-face. The thinner V-shaped sidewall has a lower voltage than the thicker C-face, creating a voltage difference that compensates for the high potential barrier of the thin-sidewall InGaN quantum well and the low potential barrier of the thick C-face InGaN quantum well, thereby inducing hole injection from the sidewall into the quantum well region. Furthermore, the growth temperature of the three-dimensional P-type InAlGaN layer is lower than that of the two-dimensional InN layer and the P-GaN / GaN superlattice layer, effectively reducing the problem of low luminous efficiency caused by Mg impurity diffusion into the quantum well layer during P-type doping of the P-GaN / GaN superlattice layer.

[0055] In one embodiment, the P-GaN / GaN superlattice layer 73 comprises alternating layers of P-GaN and GaN layers with a period number of 5 to 20; the thickness of the P-GaN / GaN superlattice layer 73 is 5 nm to 100 nm; and the P-type doping concentration of the P-GaN layer is 1 × 10⁻⁶. 19 atoms / cm 3 ~1×10 20 atoms / cm 3 The growth pressure of the P-GaN / GaN superlattice layer 73 is 100 torr to 200 torr; the growth temperature of the P-GaN layer is 800℃ to 900℃; the growth temperature of the GaN layer is 900℃ to 1000℃; the growth atmosphere of the P-GaN layer is a mixture of N2, H2 and NH3 gas; the growth atmosphere of the GaN layer is a mixture of N2 and NH3 gas.

[0056] The P-GaN / GaN superlattice layer is grown through spaced doping and alternating heating and cooling. This maintains a high concentration of Mg doping to provide sufficient hole sources while reducing impurity problems caused by excessive Mg doping, thus improving the crystal quality of the hole-providing layer. The introduction of H2 into the P-GaN layer growth and the control of the growth pressure at 100 torr–200 torr promote the lateral migration rate of atoms, resulting in more intense growth of the P-GaN layer along the V-shaped sidewalls, thereby improving the Mg doping efficiency of the V-shaped sidewalls. The GaN layer is not exposed to H2 and is grown at a relatively higher temperature, which effectively breaks the Mg-H bonds, further improving the Mg doping efficiency.

[0057] In summary, the LED epitaxial wafer with a specific undoped GaN layer structure provided by this invention utilizes the V-shaped pits on the epitaxial surface. By growing a two-dimensional InN layer and a three-dimensional P-type InAlGaN layer, hole transport paths with different barrier and voltage differences are formed on the V-shaped sidewalls and C-plane platform, respectively. This promotes hole injection from the V-shaped sidewalls into the quantum well region, improves hole distribution, and ultimately enhances hole injection efficiency. This addresses the problems of low hole concentration and low hole injection efficiency in GaN-based LEDs with P-type GaN. The P-GaN / GaN superlattice layer can provide sufficient hole sources, thereby further improving Mg doping efficiency.

[0058] Accordingly, the present invention provides a method for fabricating a light-emitting diode epitaxial wafer, such as... Figure 2 As shown, it includes the following steps:

[0059] S1. Prepare substrate 1;

[0060] In one embodiment, the substrate is a sapphire substrate; sapphire is currently the most commonly used substrate material, and sapphire substrates have mature manufacturing processes, low prices, are easy to clean and process, and have good stability at high temperatures.

[0061] S2. A buffer layer 2, an undoped GaN layer 3, an N-type GaN layer 4, a multiple quantum well layer 5, an electron blocking layer 6, and a P-type semiconductor layer 7 are sequentially deposited on the substrate 1.

[0062] In one implementation, such as Figure 3 As shown, step S2 includes the following steps:

[0063] S21. Deposit a buffer layer 2 on substrate 1.

[0064] Preferably, an AlN buffer layer with a thickness of 10 nm to 20 nm is deposited in the PVD material. The AlN buffer layer provides nucleation centers with the same orientation as the substrate, releasing the stress caused by the lattice mismatch between GaN and the substrate, as well as the thermal stress caused by the mismatch of thermal expansion coefficients. Further growth provides a flat nucleation surface, reducing the contact angle of nucleation growth, allowing the island-shaped GaN grains to connect into a surface within a smaller thickness, thus transforming into two-dimensional epitaxial growth.

[0065] S22. Deposit an undoped GaN layer 3 on the buffer layer 2.

[0066] Preferably, the growth temperature of the undoped GaN layer is 1000℃~1200℃, the pressure is 100torr~400torr, and the thickness is 1μm~5μm.

[0067] S23. Deposit an N-type GaN layer 4 on the undoped GaN layer 3.

[0068] Preferably, the N-type GaN layer is grown at a temperature of 1050℃ to 1200℃, a pressure of 100 torr to 600 torr, a thickness of 2 μm to 3 μm, and a Si doping concentration of 1×10⁻⁶. 18 atoms / cm 3 ~5×10 19 atoms / cm 3 The N-type GaN layer provides sufficient electrons for LED light emission. The resistivity of the N-type GaN layer is higher than that of the transparent electrode on the GaN layer. Therefore, sufficient Si doping can effectively reduce the resistivity of the N-type GaN layer. In addition, the sufficient thickness of the N-type GaN layer can effectively release stress and improve the luminous efficiency of the LED.

[0069] S24. Grow a multi-quantum-well layer 5 on the N-type GaN layer 4.

[0070] Preferably, the multiple quantum well layer comprises alternating stacked InGaN quantum well layers and AlGaN quantum barrier layers, with 5 to 20 stacking periods. The InGaN quantum well layer is grown at a temperature of 790°C to 810°C, has a thickness of 2 nm to 5 nm, and a growth pressure of 50 torr to 300 torr. The AlGaN quantum barrier layer is grown at a temperature of 800°C to 900°C, has a thickness of 5 nm to 15 nm, a growth pressure of 100 torr to 300 torr, and an Al content of 0.01 to 0.1%. The multiple quantum well layer is a region where electrons and holes recombine. A well-designed structure can significantly increase the overlap of electron and hole wave functions, thereby improving the luminous efficiency of the LED device.

[0071] S25. An electron blocking layer 6 is grown on the multi-quantum well layer 5.

[0072] Preferably, the electron blocking layer is an AlGaN layer with a thickness of 10 nm to 50 nm, wherein the Al component concentration gradually changes from 0.1 to 0.005 along the growth direction of the epitaxial layer, the In component concentration is 0.01 to 0.02, the growth temperature is 900℃ to 1000℃, and the growth pressure is 100 torr to 300 torr. This can effectively limit electron overflow, reduce the blocking of holes, improve the injection efficiency of holes into the electron well, reduce carrier Auger recombination, and improve the luminous efficiency of the light-emitting diode.

[0073] S26. Grow a P-type semiconductor layer 7 on the electron blocking layer 6.

[0074] Preferably, the growth temperature of the two-dimensional InN layer is 880℃~1000℃; the growth temperature of the three-dimensional P-type InAlGaN layer is 800℃~900℃; in the P-GaN / GaN superlattice layer, the growth temperature of the P-GaN layer is 800℃~900℃; and in the P-GaN / GaN superlattice layer, the growth temperature of the GaN layer is 900℃~1000℃.

[0075] Preferably, the growth atmosphere of the two-dimensional InN layer is a mixture of N2, H2 and NH3 gas; the growth atmosphere of the three-dimensional P-type InAlGaN layer is a mixture of N2 and NH3 gas; in the P-GaN / GaN superlattice layer, the growth atmosphere of the P-GaN layer is a mixture of N2, H2 and NH3 gas; and in the P-GaN / GaN superlattice layer, the growth atmosphere of the GaN layer is a mixture of N2 and NH3 gas.

[0076] Preferably, the growth pressure of the two-dimensional InN layer is 100 torr to 150 torr; the growth pressure of the three-dimensional P-type InAlGaN layer is 200 torr to 500 torr; and the growth pressure of the P-GaN / GaN superlattice layer is 100 torr to 200 torr. The specific structure of the P-type semiconductor layer is as described above and will not be repeated here.

[0077] Accordingly, the present invention also provides an LED comprising the aforementioned light-emitting diode epitaxial wafer. The photoelectric efficiency of the LED is effectively improved, and other electrical properties are also excellent.

[0078] The present invention is further illustrated below with specific embodiments:

[0079] Example 1

[0080] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type semiconductor layer sequentially stacked on the substrate;

[0081] The P-type semiconductor layer includes a two-dimensional InN layer, a three-dimensional P-type InAlGaN layer, and a P-GaN / GaN superlattice layer sequentially stacked on the electron blocking layer. The P-GaN / GaN superlattice layer includes 10 periods of alternating stacked P-GaN and GaN layers.

[0082] The thickness of the two-dimensional InN layer is 12 nm, the growth temperature is 900 °C, and the growth pressure is 100 torr.

[0083] The thickness of the three-dimensional P-type InAlGaN layer is 25 nm, the growth temperature is 840 °C, and the growth pressure is 200 torr.

[0084] The total thickness of the P-GaN layer is 40 nm, the growth temperature is 880 °C, and the growth pressure is 150 torr.

[0085] The total thickness of the GaN layer is 30 nm, the growth temperature is 950 °C, and the growth pressure is 150 torr.

[0086] Example 2

[0087] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type semiconductor layer sequentially stacked on the substrate;

[0088] The P-type semiconductor layer includes a two-dimensional InN layer, a three-dimensional P-type InAlGaN layer, and a P-GaN / GaN superlattice layer sequentially stacked on the electron blocking layer. The P-GaN / GaN superlattice layer includes 10 periods of alternating stacked P-GaN and GaN layers.

[0089] The thickness of the two-dimensional InN layer is 20 nm, the growth temperature is 920 °C, and the growth pressure is 150 torr.

[0090] The thickness of the three-dimensional P-type InAlGaN layer is 25 nm, the growth temperature is 840 °C, and the growth pressure is 200 torr.

[0091] The total thickness of the P-GaN layer is 40 nm, the growth temperature is 880 °C, and the growth pressure is 150 torr.

[0092] The total thickness of the GaN layer is 30 nm, the growth temperature is 950 °C, and the growth pressure is 150 torr.

[0093] Example 3

[0094] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type semiconductor layer sequentially stacked on the substrate;

[0095] The P-type semiconductor layer includes a two-dimensional InN layer, a three-dimensional P-type InAlGaN layer, and a P-GaN / GaN superlattice layer sequentially stacked on the electron blocking layer. The P-GaN / GaN superlattice layer includes 10 periods of alternating stacked P-GaN and GaN layers.

[0096] The thickness of the two-dimensional InN layer is 12 nm, the growth temperature is 900 °C, and the growth pressure is 100 torr.

[0097] The thickness of the three-dimensional P-type InAlGaN layer is 25 nm, the growth temperature is 860 °C, and the growth pressure is 250 torr.

[0098] The total thickness of the P-GaN layer is 50 nm, the growth temperature is 880 °C, and the growth pressure is 150 torr.

[0099] The GaN layer has a total thickness of 20 nm, a growth temperature of 950 °C, and a growth pressure of 150 torr.

[0100] Example 4

[0101] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type semiconductor layer sequentially stacked on the substrate;

[0102] The P-type semiconductor layer includes a two-dimensional InN layer, a three-dimensional P-type InAlGaN layer, and a P-GaN / GaN superlattice layer sequentially stacked on the electron blocking layer. The P-GaN / GaN superlattice layer includes 10 periods of alternating stacked P-GaN and GaN layers.

[0103] The thickness of the two-dimensional InN layer is 12 nm, the growth temperature is 900 °C, and the growth pressure is 100 torr.

[0104] The thickness of the three-dimensional P-type InAlGaN layer is 50 nm, the growth temperature is 840 °C, and the growth pressure is 100 torr.

[0105] The total thickness of the P-GaN layer is 40 nm, the growth temperature is 880 °C, and the growth pressure is 100 torr.

[0106] The GaN layer has a total thickness of 30 nm, a growth temperature of 980 °C, and a growth pressure of 150 torr.

[0107] Comparative Example 1

[0108] The difference between this comparative example and Example 1 is that the P-type semiconductor layer is a conventional P-type GaN layer, while the rest is the same as in Example 1.

[0109] Comparative Example 2

[0110] The difference between this comparative example and Example 1 is that the P-type semiconductor layer does not contain a two-dimensional InN layer, but all other aspects are the same as in Example 1.

[0111] Comparative Example 3

[0112] The difference between this comparative example and Example 1 is that the P-type semiconductor layer does not contain a three-dimensional P-type InAlGaN layer; otherwise, they are the same as in Example 1.

[0113] Comparative Example 4

[0114] The difference between this comparative example and Example 1 is that the P-type semiconductor layer does not contain a P-GaN / GaN superlattice layer; otherwise, it is the same as Example 1.

[0115] The light-emitting diode epitaxial wafers prepared in Examples 1 to 4 and Comparative Examples 1 to 4 were fabricated into 10×24mil chips using the same chip process conditions. 300 LED chips were randomly selected from each example, and the photoelectric performance of the chips was tested at 120mA / 60mA current. The luminous efficacy improvement rate of Examples 1 to 4 and Comparative Examples 2 to 4 compared with Comparative Example 1 was calculated. The specific test results are shown in Table 1.

[0116] Table 1. Performance test results of LEDs prepared in Examples 1-4 and Comparative Examples 2-4

[0117]

[0118] The results above show that the LED epitaxial wafer provided by this invention utilizes the V-shaped pits on the epitaxial surface. By growing a two-dimensional InN layer and a three-dimensional P-type InAlGaN layer, hole transport paths with different barrier differences and voltage differences are formed on the V-shaped sidewalls and C-plane platform, respectively. This promotes hole injection from the V-shaped sidewalls into the quantum well region, improves hole distribution, and ultimately enhances hole injection efficiency. The P-GaN / GaN superlattice layer can provide sufficient hole sources, thereby further improving Mg doping efficiency.

[0119] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A light-emitting diode epitaxial wafer, characterized in that, It includes a substrate and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type semiconductor layer sequentially stacked on the substrate; The P-type semiconductor layer includes a two-dimensional InN layer, a three-dimensional P-type InAlGaN layer and a P-GaN / GaN superlattice layer sequentially stacked on the electron blocking layer, wherein the P-GaN / GaN superlattice layer includes alternately stacked P-GaN layers and GaN layers. The P-GaN / GaN superlattice layer comprises alternating layers of P-GaN and GaN layers, with a period number of 5 to 20; The thickness of the P-GaN / GaN superlattice layer is 5nm~100nm; The P-type doping concentration of the P-GaN layer is 1×10⁻⁶. 19 atoms / cm 3 ~1×10 20 atoms / cm 3 .

2. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The sidewall growth thickness of the two-dimensional InN layer is greater than the growth thickness of the C-plane. The thickness of the two-dimensional InN layer is 2nm~20nm; The In component content of the two-dimensional InN layer is 0.01~0.

05.

3. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The sidewall growth thickness of the three-dimensional P-type InAlGaN layer is less than the growth thickness of the C-plane. The thickness of the three-dimensional P-type InAlGaN layer is 2nm~50nm; The doping concentration of the three-dimensional P-type InAlGaN layer is 1×10⁻⁶. 17 atoms / cm 3 ~1×10 19 atoms / cm 3 .

4. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The In content of the three-dimensional P-type InAlGaN layer gradually increases from 0.01~0.1 to 0.1~0.2 along the growth direction; The Al content of the three-dimensional P-type InAlGaN layer gradually decreases from 0.1~0.2 to 0.01~0.1 along the growth direction.

5. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The growth temperature of the two-dimensional InN layer is 880℃~1000℃; The growth temperature of the three-dimensional P-type InAlGaN layer is 800℃~900℃; In the P-GaN / GaN superlattice layer, the growth temperature of the P-GaN layer is 800℃~900℃; In the P-GaN / GaN superlattice layer, the growth temperature of the GaN layer is 900℃~1000℃.

6. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The growth atmosphere of the two-dimensional InN layer is a mixture of N2, H2 and NH3 gas; The growth atmosphere of the three-dimensional P-type InAlGaN layer is a mixture of N2 and NH3 gas; In the P-GaN / GaN superlattice layer, the growth atmosphere of the P-GaN layer is a mixture of N2, H2 and NH3 gas; In the P-GaN / GaN superlattice layer, the growth atmosphere of the GaN layer is a mixture of N2 and NH3 gas.

7. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The growth pressure of the two-dimensional InN layer is 100 torr to 150 torr; The growth pressure of the three-dimensional P-type InAlGaN layer is 200 torr to 500 torr; The growth pressure of the P-GaN / GaN superlattice layer is 100 torr to 200 torr.

8. A method for fabricating a light-emitting diode epitaxial wafer as described in any one of claims 1 to 7, characterized in that, Includes the following steps: S1. Prepare the substrate; S2. A buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type semiconductor layer are sequentially deposited on the substrate. The P-type semiconductor layer includes a two-dimensional InN layer, a three-dimensional P-type InAlGaN layer, and a P-GaN / GaN superlattice layer sequentially stacked on the electron blocking layer. The P-GaN / GaN superlattice layer includes alternately stacked P-GaN layers and GaN layers.

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