A PFC control circuit and method with automatic on / off function
Patent Information
- Application Number
- CN202310445528.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-04-23
- Publication Date
- 2026-09-22
- Estimated Expiration
- 2043-04-23
AI Technical Summary
[0007]本发明提供的一种具有自动开启/关闭功能的PFC控制电路及其方法,主要用于解决现有PFC电路的开启和关闭需要外围电路来控制,导致开关电源的体积和重量较大,阻碍了其小型化和轻量化的发展等问题,从而实现自动开启/关闭的PFC控制电路,使充电控制部分无需考虑前端的PFC电路,从而简化了控制逻辑,减小了电路尺寸和成本,提高了电源产品的功率密度,同时提高了开关电源的可靠性
[0024]可见,该PFC控制方法通过对开关电源电路一次侧电气信号实时采样,不断与预设的再定义信号进行运算,实现控制所述PFC电路开启/关闭,达到实时监测开关电源电路的电气信号、简化控制逻辑且精确控制的效果。
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Figure CN116599338B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of switching power supply technology, and specifically to a PFC control circuit and method with automatic on / off function. Background Technology
[0002] With the rapid development of power electronics technology and its widespread application in various industries, power electronic switching power supply equipment connected to the power grid has become a major source of current harmonics injected into the grid (from high-frequency switching current and filter capacitors). When electrical equipment draws power from the grid, both its active and reactive power consumption come from the grid. Reactive power does not perform work for the electrical equipment, but it incurs losses during transmission on the grid. The greater the reactive power, the greater the losses in power plants and transmission systems, and it may even affect the stability of the power system. Therefore, in order to reduce the reactive power burden on the grid and reduce multiple harmonics, there are generally limiting requirements for the power factor (PF) and total harmonic distortion (THD) of various electrical devices.
[0003] The total harmonic distortion (THD) of the current is: Formula 1 in, Indicates the magnitude of the first harmonic current. This represents the magnitude of the nth harmonic current.
[0004] The power factor PF is obtained from Formula 1: Formula 2 Where Φ is the power factor angle, cosΦ = active power / apparent power.
[0005] Harmonic distortion can affect the power grid, including radio frequency interference (RFI) and electromagnetic interference (EMI). Power Factor Correction (PFC) primarily controls the waveform of the input current to synchronize it with the input voltage waveform. As shown in Equation 2, improving the power factor can reduce harmonic distortion. PFC can resolve EMI and EMC issues caused by severe current waveform distortion due to capacitive loads. In current switching power supply circuits, the switching on and off of the PFC circuit requires external circuitry for control. For example... Figure 1As shown, this is commonly seen in charging control systems that control the PFC circuit's on / off state based on its power output. This control scheme requires an optocoupler U3-A, which increases both the product's cost, size, and weight, hindering the increasingly miniaturized and lightweight design of power supply products. For power supply designs with high power density requirements, eliminating one optocoupler (and its connecting circuit) would broaden the application prospects of the power supply product.
[0006] Therefore, there is a need for a PFC control circuit that can automatically turn on / off without the need for external circuit control, making it possible to eliminate optocouplers and related connection circuits, and further improve the power density of power supply products. Summary of the Invention
[0007] This invention provides a PFC control circuit and method with automatic on / off function, mainly to solve the problems that existing PFC circuits require external circuits to control their on / off states, resulting in large size and weight of switching power supplies, which hinders their miniaturization and lightweight development. The invention achieves an automatic on / off PFC control circuit, eliminating the need for the front-end PFC circuit in the charging control section, thereby simplifying the control logic, reducing circuit size and cost, increasing the power density of power supply products, and improving the reliability of the switching power supply.
[0008] The present invention achieves the above objectives through the following technical solutions: A PFC control circuit with automatic on / off function includes: an arithmetic circuit, a redefining signal generation circuit, and an averaging circuit. The output terminal of the arithmetic circuit is connected to a PFC circuit, and the PFC circuit is connected to a switching power supply circuit. The redefining signal generation circuit generates a redefining signal and outputs the redefining signal to the first input terminal of the arithmetic circuit. The averaging circuit samples the electrical signal on the primary side of the switching power supply circuit, performs an averaging operation on the sampled signal, and outputs a sampled average signal to the second input terminal of the arithmetic circuit. The arithmetic circuit performs calculations on the redefining signal and the sampled average signal, and outputs a control signal to the PFC circuit to control the PFC circuit to turn on or off.
[0009] As can be seen, this PFC control circuit can automatically turn the PFC circuit on or off by processing the primary side electrical signals of the acquired switching power supply circuit and the preset redefinition signals. This saves the circuits and devices connected to the charging control section in existing control methods, achieving the effects of cost reduction and power density improvement for power supply products. At the same time, it also saves the control logic and connection pins of the PFC switch in the charging control section, which simplifies the circuit of the charging control section and makes the charging control section work more stably.
[0010] A further embodiment is that the redefining signal generation circuit includes a power supply circuit, a redefining resistor circuit, a delay sampling circuit, and a detection circuit. The power supply circuit supplies power to the redefining resistor circuit. The delay sampling circuit performs delayed sampling on the electrical signal of the redefining resistor circuit and outputs the delayed sampling signal to the detection circuit. The detection circuit is connected to a reference voltage signal and verifies the delayed sampling signal based on the reference voltage signal. When the delayed sampling signal is verified to be valid, the detection circuit outputs the redefining signal to the arithmetic circuit.
[0011] A further embodiment is that the power supply circuit is a constant current source circuit, the power supply circuit is connected to a second reference voltage signal, and outputs a constant current to the redefining resistor circuit.
[0012] A further embodiment is that the detection circuit includes a first comparator and a second comparator. The delayed sampling signal is input to the non-inverting input of the first comparator and the inverting input of the second comparator, respectively. The inverting input of the first comparator is connected to a first reference voltage signal, and the non-inverting input of the second comparator is connected to a second reference voltage signal. The value of the first reference voltage signal is less than the value of the second reference voltage signal. When the value of the delayed sampling signal is greater than the value of the first reference voltage signal and less than the value of the second reference voltage signal, the detection circuit determines that the delayed sampling signal is valid.
[0013] As can be seen, this detection circuit is used to detect the validity of the delayed sampling signal, ensuring the safety and stability of the circuit operation.
[0014] A further solution includes a time base circuit and a frequency divider circuit. The time base circuit generates a timing time base pulse, and the frequency divider circuit divides the timing time base pulse and outputs a time base signal. By setting the frequency division of the frequency divider circuit, the required timing control time can be obtained.
[0015] As can be seen, this frequency divider circuit can perform diversified frequency division of the time base pulse, and can output different time base signals as needed, which meets the needs of different devices or circuits to work normally under specific frequency signals, and achieves the effect of meeting the needs of different frequency signals at the lowest cost.
[0016] A further embodiment is that the operational circuit includes a first comparator and a first logic circuit. The non-inverting input of the first comparator is connected to the sampled average signal, the inverting input is connected to the redefinition signal, and the output is connected to the second input of the first logic circuit. The first input of the first logic circuit is connected to a third time base signal, and the first logic circuit outputs the control signal.
[0017] A further embodiment is that the average value calculation circuit includes a sampling circuit and an integration circuit. The sampling circuit is used to sample the electrical signal on the primary side of the switching power supply circuit and output the sampled signal to the integration circuit. The integration circuit performs integration on the sampled signal and outputs the sampled average value signal to the calculation circuit.
[0018] As can be seen, the average value calculation circuit achieves real-time monitoring of the electrical signals on the primary side of the switching power supply circuit by sampling them in real time. Furthermore, the accurate measurement and control of the electrical signals by the average value calculation circuit provides important support for the stable operation of the circuit.
[0019] A further embodiment is that the sampling circuit is used to sample the current on the primary side of the switching power supply circuit and output the sampled current signal to the integrator circuit. After the integrator circuit performs integration on the sampled current signal, it outputs the average current signal to the arithmetic circuit. When the average current is greater than the redefinition signal, the arithmetic circuit controls the PFC circuit to turn on.
[0020] A further embodiment includes a multiplier in the sampling circuit. The sampling circuit is used to sample the current and voltage on the primary side of the switching power supply circuit. After the multiplier performs calculations on the sampled current and voltage, it outputs a sampled power signal to the integrator circuit. After the integrator circuit performs integration on the sampled power signal, it outputs an average power signal to the arithmetic circuit. When the average power signal is greater than the redefinition signal, the arithmetic circuit controls the PFC circuit to turn on.
[0021] A PFC control method with automatic on / off function, applied to a PFC control circuit with automatic on / off function, includes: S1: The average value calculation circuit samples the electrical signal on the primary side of the switching power supply circuit and performs an average value calculation.
[0022] S2: The arithmetic circuit performs calculations on the redefining signal and the sampled average signal. When the sampled average is less than or equal to the value of the redefining signal, step S1 is repeated. When the sampled average is greater than the value of the redefining signal, the control signal controls the PFC circuit to turn on and step S1 is repeated.
[0023] S3: When the average value of the sampling is greater than or equal to 1 / 10 of the value of the redefining signal, step S1 is repeated; when the average value of the sampling is less than 1 / 10 of the value of the redefining signal and remains so for more than 250ms, the control signal controls the PFC circuit to turn off, and step S1 is repeated.
[0024] As can be seen, this PFC control method achieves the effect of controlling the PFC circuit to turn on / off by sampling the primary side electrical signal of the switching power supply circuit in real time and continuously performing calculations with the preset redefinition signal. This results in real-time monitoring of the electrical signal of the switching power supply circuit, simplification of control logic, and precise control.
[0025] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments. Attached Figure Description
[0026] Figure 1 This is a schematic diagram of an existing PFC control circuit.
[0027] Figure 2 This is a schematic diagram of the PFC control circuit according to Embodiment 1 of the present invention.
[0028] Figure 3 This is a schematic diagram of the PFC control circuit of the present invention.
[0029] Figure 4 This is a sampling current waveform diagram of Embodiment 1 of the present invention.
[0030] Figure 5 This is a schematic diagram of the PFC control circuit according to Embodiment 2 of the present invention.
[0031] Figure 6 This is a sampling current and voltage waveform diagram of Embodiment 2 of the present invention.
[0032] Figure 7 This is a flowchart of the PFC control method of the present invention. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0034] Example 1 of a PFC control circuit with automatic on / off function See Figures 2-3The present invention relates to a PFC control circuit with automatic on / off function, comprising an arithmetic circuit 10, a redefinition signal generation circuit 20, and an average value calculation circuit 70. The output terminal of the arithmetic circuit 10 is connected to a PFC circuit 100, which is connected to a switching power supply circuit 101. The redefinition signal generation circuit 20 generates a redefinition signal and outputs the redefinition signal to the first input terminal of the arithmetic circuit 10. The average value calculation circuit 70 samples the electrical signal on the primary side of the switching power supply circuit 101, performs an average value calculation on the sampled signal, and outputs a sampled average value signal to the second input terminal of the arithmetic circuit 10. The arithmetic circuit 10 performs calculations on the redefinition signal and the sampled average value signal, and outputs a control signal to the PFC circuit 100 to control the PFC circuit 100 to turn on or off.
[0035] Specifically, the PFC control circuit in this embodiment also includes a power supply circuit 400 and a reference circuit 500. The power supply circuit 400 outputs a power supply voltage VCC to power the logic control circuit. The reference circuit 500 provides a first reference voltage and a second reference voltage. The first reference voltage is 0.120V and the second reference voltage is 1.206V.
[0036] As can be seen, by processing the primary side electrical signals of the acquired switching power supply circuit 101 and the preset redefinition signals, the PFC control circuit can automatically turn the PFC circuit 100 on or off. This saves the circuits and devices connected to the charging control section in existing control methods, achieving the effects of cost reduction and power density improvement for power supply products. At the same time, it also saves the control logic and connection pins of the PFC switch in the charging control section, which simplifies the circuit of the charging control section and makes the charging control section work more stably.
[0037] In this embodiment, the redefining signal generation circuit 20 includes a power supply circuit 30, a redefining resistor circuit 40, a delay sampling circuit 50, and a detection circuit 60. The power supply circuit 30 supplies power to the redefining resistor circuit 40. The delay sampling circuit 50 performs delay sampling on the electrical signal of the redefining resistor circuit 40 and outputs the delay sampling signal to the detection circuit 60. The detection circuit 60 receives a reference voltage signal and verifies the delay sampling signal based on the reference voltage signal. When the delay sampling signal is valid, the detection circuit 60 outputs the redefining signal to the arithmetic circuit 10.
[0038] In this embodiment, the power supply circuit 30 is a constant current source circuit. The power supply circuit 30 is connected to the second reference voltage signal and outputs a constant current to the redefining resistor circuit 40.
[0039] Specifically, in this embodiment, the power supply circuit 30 includes comparator U14 and comparator U15. The output terminal of comparator U14 is connected to the inverting input terminal of comparator U15. The non-inverting input terminal of comparator U15 is connected to the second reference voltage signal, and its output terminal is connected to the non-inverting input terminal of comparator U14. The non-inverting input terminal of comparator U14 is connected to its inverting input terminal through resistor R19 to form a negative feedback circuit to improve the stability of the power supply circuit 30.
[0040] Specifically, in this embodiment, the resistor circuit 40 is further defined as including resistor R17. One end of resistor R17 is grounded, and the other end is connected to the inverting input terminal of comparator U14 and the inverting input terminal of comparator U18, respectively.
[0041] By changing the resistance value of resistor R17, the output voltage of the redefining resistor circuit 40 can be adjusted as needed to meet the requirements of different power supply circuits for turning the PFC circuit on / off. This demonstrates that the PFC control circuit is highly flexible and adaptable, and the control conditions for the automatic turning on / off of the PFC circuit can be redefined as needed.
[0042] In this embodiment, the detection circuit 60 includes a first comparator U22 and a second comparator U23. The delayed sampling signal is input to the non-inverting input of the first comparator U22 and the inverting input of the second comparator U23, respectively. The inverting input of the first comparator U22 is connected to a first reference voltage signal, and the non-inverting input of the second comparator U23 is connected to the second reference voltage signal. The value of the first reference voltage signal is less than the value of the second reference voltage signal. When the value of the delayed sampling signal is greater than the value of the first reference voltage signal and less than the value of the second reference voltage signal, the detection circuit 60 determines that the delayed sampling signal is valid.
[0043] Specifically, the detection circuit 60 in this embodiment also includes a logic control circuit U24, a logic control circuit U36, a logic control circuit U4, a first switching circuit, and a second switching circuit. The control logic of the logic control circuits U24, U36, and U4 is the same as the control logic of the first logic circuit U17. The input terminals A and B of the logic control circuit U24 are connected to the output terminals of the first comparator U22 and the second comparator U23, respectively. Its output terminal Y is connected to the input terminal A of the logic control circuit U36. The B terminal of the logic control circuit U36 is connected to the second time base signal, and its output terminal is connected to the A terminal of the logic control circuit U4. The B terminal of the logic control circuit U4 is connected to the drain of the transistor U3.
[0044] The first switching circuit includes transistors U25 and U2 connected in series. The gates of transistors U25 and U2 are both connected to the output terminal Y of logic control circuit U36. The source of transistor U25 is connected to the delayed sampling signal, and its drain is connected to the drain of transistor U2. The source of transistor U2 is connected to the inverting input terminal of first comparator U26 through resistor R1.
[0045] The second switching circuit includes transistors U5 and U6 connected in series. The gates of transistors U5 and U6 are both connected to the output terminal Y of logic control circuit U4. The source of transistor U6 is connected to ground through resistor R2, and its drain is connected to the drain of transistor U5. The source of transistor U5 is connected to the inverting input terminal of first comparator U26.
[0046] Specifically, in this embodiment, logic control circuits U24, U36, and U4 are all connected to the power supply voltage VCC.
[0047] As can be seen, the detection circuit 60 is used to detect the validity of the delayed sampling signal, ensuring the safety and stability of the circuit operation.
[0048] Specifically, the delay sampling circuit 50 in this embodiment includes a first transistor U19 and a second transistor U1. The source of the first transistor U19 is connected to the source of the second transistor U1. A freewheeling diode is connected in parallel with the drain and source of both the first transistor U19 and the second transistor U1 in anti-phase mode. The gates of both the first transistor U19 and the second transistor U1 are connected to a first time base signal, and the electrical signal of the redefining resistor circuit 40 is delayed and sampled according to the first time base signal.
[0049] Specifically, the delay sampling circuit 50 in this embodiment also includes comparator U18 and comparator U21. The non-inverting input of comparator U18 is connected to the output of comparator U21, and its non-inverting input is connected to the output of the redefining resistor circuit 40. The non-inverting input of comparator U21 is connected to its output through resistor R9, and its inverting input is connected to the drain of the second transistor U1 through resistors R8 and R7, forming a negative feedback loop to improve the stability of the delay sampling circuit 50.
[0050] In this embodiment, the PFC control circuit further includes a time base circuit 200 and a frequency divider circuit 300. The time base circuit 200 generates a timing time base pulse, and the frequency divider circuit 300 divides the timing time base pulse and outputs a time base signal. By setting the frequency division of the frequency divider circuit, the required timing control time can be obtained.
[0051] Specifically, the frequency divider circuit 300 described in this embodiment also includes a counter. After the frequency divider circuit 300 receives 256 timing base pulses, the counter increments by one.
[0052] Specifically, in this embodiment, the frequency divider circuit outputs a first time base signal of 10ms, a second time base signal of 20ms, and a third time base signal of 30ms after a 300-fold frequency division.
[0053] As can be seen, this frequency divider circuit can perform diversified frequency division of 300 pairs of time base pulses, and can output different time base signals as needed, which meets the needs of different devices or circuits to work normally under specific frequency signals, and achieves the effect of meeting the needs of different frequency signals at the lowest cost.
[0054] In this embodiment, the arithmetic circuit 10 includes a first comparator U26 and a first logic circuit U17. The non-inverting input of the first comparator U26 is connected to the sampled average signal, the inverting input is connected to the redefinition signal, and the output is connected to the second input A of the first logic circuit U17. The first input B of the first logic circuit U17 is connected to the third time base signal, and the first logic circuit U17 outputs the control signal.
[0055] Specifically, the truth values of the first logic circuit U17 in this embodiment are shown in Table (1) below: B A Y 0 0 0 0 1 0 1 0 0 1 1 1 Table (1) Where Y is the output terminal of the first logic circuit U17.
[0056] Specifically, in this embodiment, the first logic circuit U17 is connected to the power supply voltage VCC.
[0057] Specifically, the operational circuit 10 in this embodiment also includes a switching circuit composed of transistor U3 and transistor U16. Transistor U3 and transistor U16 are connected in series. Since the two transistors are connected in series, they have a certain delay characteristic, so that the switching circuit will not be affected by sharp pulses, thus ensuring the stability of the switching circuit.
[0058] In this circuit, the gates of transistors U3 and U16 are both connected to the output terminal Y of the first logic circuit U17. The source of transistor U16 is connected to the output terminal of the first comparator U26 through resistor R10, and its drain is connected to the source of transistor U3. The control signal is output from the drain of transistor U3.
[0059] In this embodiment, the average value calculation circuit 70 includes a sampling circuit and an integration circuit. The sampling circuit is used to sample the electrical signal on the primary side of the switching power supply circuit 101 and output the sampled signal to the integration circuit. After performing integration calculation on the sampled signal, the integration circuit outputs the sampled average value signal to the calculation circuit 10.
[0060] Specifically, the average value calculation circuit 70 in this embodiment includes comparator U27 and comparator U30. The inverting input terminal of comparator U27 is connected to the sampling resistor R9 on the primary side of the switching power supply circuit 101 through resistor R11. Its output terminal is connected to its non-inverting input terminal through resistor R12. Its non-inverting input terminal is grounded through resistor R13. The output terminal of comparator U27 is connected to the inverting input terminal of comparator U30. The non-inverting input terminal of comparator U30 is grounded. Its output terminal is connected to the non-inverting input terminal of the first comparator U26.
[0061] The inverting input of comparator U27 is connected to two capacitors in parallel.
[0062] As can be seen, the average value calculation circuit 70 achieves real-time monitoring of the electrical signals on the primary side of the switching power supply circuit 101 by sampling the electrical signals in real time. Furthermore, the accurate measurement and control of the electrical signals by the average value calculation circuit 70 provides important support for the stable operation of the circuit.
[0063] See Figure 3 In this embodiment, the sampling circuit is used to sample the current on the primary side of the switching power supply circuit 101 and output the sampled current signal to the integrator circuit. After the integrator circuit performs integration on the sampled current signal, it outputs the average current signal to the arithmetic circuit 10. When the average current is greater than the redefinition signal, the arithmetic circuit 10 controls the PFC circuit 100 to turn on.
[0064] See Figure 4 Specifically, in this embodiment, the sampling circuit continuously samples the amplitude and duty cycle of the current signal on the primary side of the switching power supply circuit 101. The peak value of the sampling current is given, and the duty cycle is calculated using Formula 3.
[0065] Formula 3:
[0066] in, The pulse width of the sampling current. The sampling current is one pulse cycle.
[0067] From the peak value of the sampling current Substituting Formula 3 into Formula 4, we can obtain the average current I. Formula 4:
[0068] Example 2 of a PFC control circuit with automatic on / off function See Figure 5 In this embodiment, the sampling circuit further includes a multiplier. The sampling circuit is used to sample the current and voltage on the primary side of the switching power supply circuit 101. After the multiplier performs calculations on the sampled current and voltage, it outputs a sampled power signal to the integrator circuit. After the integrator performs integration calculations on the sampled power signal, it outputs an average power signal to the arithmetic circuit 10. When the average power is greater than the redefinition signal, the arithmetic circuit 10 controls the PFC circuit 100 to turn on.
[0069] Specifically, in this embodiment, the multiplier is connected to the sampling resistor R16 on the primary side of the switching power supply circuit 101. The sampled voltage signal is input to the inverting input terminal of the comparator U30 through resistors R14 and R18. The inverting input terminal of the comparator U30 is connected to its output terminal through resistor R15.
[0070] The common terminal of resistors R14 and R18 is grounded through capacitor C5.
[0071] See Figure 6 Specifically, in this embodiment, the sampling circuit continuously samples the amplitude and duty cycle of the current and voltage on the primary side of the switching power supply circuit 101, and uses a multiplier to calculate the transient power according to Formula 5. .
[0072] Formula 5:
[0073] in, The peak value of the sampled current. This represents the peak value of the sampled voltage.
[0074] From transient power Substituting Formula 5 into Formula 6 yields the average power P.
[0075] Formula Six:
[0076] An embodiment of a PFC control method with automatic on / off function See Figure 7 The present invention relates to a PFC control method with automatic on / off function, applied to a PFC control circuit with automatic on / off function, comprising: S00: The system is powered on. The power supply circuit 30 continuously supplies power to the redefining resistor circuit 40, and the operation circuit 10 controls the PFC circuit 100 to turn off.
[0077] S01: After receiving the system power-on signal, the delay sampling circuit 50 starts to delay sampling the electrical signal of the redefining resistor circuit 40 and outputs the delayed sampling signal to the detection circuit. S02: The detection circuit detects the delayed sampling signal. When the value of the delayed sampling signal is less than or equal to the value of the first reference voltage signal or greater than or equal to the value of the second reference voltage signal, the detection circuit determines that the reference signal is invalid and executes step S00; when the value of the delayed sampling signal is greater than the value of the first reference voltage signal and less than the value of the second reference voltage signal, the detection circuit determines that the reference signal is valid and executes the next step. S1: The average value calculation circuit samples the electrical signal on the primary side of the switching power supply circuit and performs an average value calculation.
[0078] S2: The arithmetic circuit performs calculations on the redefining signal and the sampled average signal. When the sampled average is less than or equal to the value of the redefining signal, step S1 is repeated. When the sampled average is greater than the value of the redefining signal, the control signal controls the PFC circuit to turn on and step S1 is repeated.
[0079] S3: When the average value of the sampling is greater than or equal to 1 / 10 of the value of the redefining signal, step S1 is repeated; when the average value of the sampling is less than 1 / 10 of the value of the redefining signal and remains so for more than 250ms, the control signal controls the PFC circuit to turn off, and step S1 is repeated.
[0080] Specifically, the average value of the sampling described in this embodiment is the average current value or the average power value.
[0081] As can be seen, this PFC control method samples the primary side electrical signal of the switching power supply circuit 101 in real time and continuously performs calculations with the preset redefinition signal to control the PFC circuit 100 to turn on / off, thereby achieving the effects of real-time monitoring of the electrical signal of the switching power supply circuit 101, simplifying the control logic, and achieving precise control.
[0082] The above embodiments are merely preferred embodiments of the present invention and should not be construed as limiting the scope of protection of the present invention. Any non-substantial changes and substitutions made by those skilled in the art based on the present invention shall fall within the scope of protection claimed by the present invention.
Claims
1. A PFC control circuit with automatic on / off function, characterized in that, include: The system includes an arithmetic circuit, a redefining signal generation circuit, and an averaging circuit. The output of the arithmetic circuit is connected to a PFC circuit, which is connected to a switching power supply circuit. The redefining signal generation circuit generates a redefining signal and outputs it to the first input of the arithmetic circuit. The averaging circuit samples the electrical signal on the primary side of the switching power supply circuit, performs an averaging operation on the sampled signal, and outputs a sampled average signal to the second input of the arithmetic circuit. The arithmetic circuit performs calculations on the redefining signal and the sampled average signal, and outputs a control signal to the PFC circuit to control the PFC circuit to turn on or off. The redefining signal generation circuit includes a power supply circuit, a redefining resistor circuit, a delay sampling circuit, and a detection circuit. The power supply circuit supplies power to the redefining resistor circuit. The delay sampling circuit performs delayed sampling on the electrical signal of the redefining resistor circuit and outputs the delayed sampling signal to the detection circuit. The detection circuit is connected to a reference voltage signal and verifies the delayed sampling signal based on the reference voltage signal. When the delayed sampling signal is valid, the detection circuit outputs the redefining signal to the arithmetic circuit.
2. The PFC control circuit with automatic on / off function according to claim 1, characterized in that: The power supply circuit is a constant current source circuit. The power supply circuit is connected to a second reference voltage signal and outputs a constant current to the redefining resistor circuit.
3. The PFC control circuit with automatic on / off function according to claim 2, characterized in that: The detection circuit includes a first comparator and a second comparator. The delayed sampling signal is input to the non-inverting input of the first comparator and the inverting input of the second comparator, respectively. The inverting input of the first comparator is connected to a first reference voltage signal, and the non-inverting input of the second comparator is connected to a second reference voltage signal. The value of the first reference voltage signal is less than the value of the second reference voltage signal. When the value of the delayed sampling signal is greater than the value of the first reference voltage signal and less than the value of the second reference voltage signal, the detection circuit determines that the delayed sampling signal is valid.
4. The PFC control circuit with automatic on / off function according to claim 1, characterized in that: It also includes a time base circuit and a frequency divider circuit. The time base circuit generates a timing time base pulse, and the frequency divider circuit divides the timing time base pulse and outputs a time base signal. By setting the frequency division of the frequency divider circuit, the required timing control time can be obtained.
5. The PFC control circuit with automatic on / off function according to claim 4, characterized in that: The operational circuit includes a first comparator and a first logic circuit. The non-inverting input of the first comparator is connected to the sampled average signal, the inverting input is connected to the redefinition signal, and the output is connected to the second input of the first logic circuit. The first input of the first logic circuit is connected to a third time base signal, and the first logic circuit outputs the control signal.
6. The PFC control circuit with automatic on / off function according to claim 1, characterized in that: The average value calculation circuit includes a sampling circuit and an integration circuit. The sampling circuit is used to sample the electrical signal on the primary side of the switching power supply circuit and output the sampled signal to the integration circuit. The integration circuit performs integration on the sampled signal and outputs the sampled average value signal to the calculation circuit.
7. The PFC control circuit with automatic on / off function according to claim 6, characterized in that: The sampling circuit is used to sample the current on the primary side of the switching power supply circuit and output the sampled current signal to the integrator circuit. After the integrator circuit performs integration on the sampled current signal, it outputs the average current signal to the arithmetic circuit. When the average current is greater than the value of the redefinition signal, the arithmetic circuit controls the PFC circuit to turn on.
8. The PFC control circuit with automatic on / off function according to claim 6, characterized in that: The sampling circuit further includes a multiplier. The sampling circuit is used to sample the current and voltage on the primary side of the switching power supply circuit. After the multiplier performs calculations on the sampled current and voltage, it outputs a sampled power signal to the integrator circuit. After the integrator circuit performs integration on the sampled power signal, it outputs an average power signal to the arithmetic circuit. When the average power is greater than the value of the redefinition signal, the arithmetic circuit controls the PFC circuit to turn on.
9. A PFC control method with automatic on / off function, characterized in that, An application to a PFC control circuit with automatic on / off function as described in any one of claims 1 to 8, comprising: S1: The average value calculation circuit samples the electrical signal on the primary side of the switching power supply circuit and performs an average value calculation. S2: The arithmetic circuit performs calculations on the redefining signal and the sampled average signal. When the sampled average is less than or equal to the value of the redefining signal, step S1 is repeated. When the sampled average is greater than the value of the redefining signal, the control signal controls the PFC circuit to turn on, and step S1 is repeated. S3: When the average value of the sampling is greater than or equal to 1 / 10 of the value of the redefining signal, step S1 is repeated; when the average value of the sampling is less than 1 / 10 of the value of the redefining signal and remains so for more than 250ms, the control signal controls the PFC circuit to turn off, and step S1 is repeated.
Citation Information
Patent Citations
Switch power supply with high power factor and controller of switch power supply
CN102684517A
Unipolar power factor correction circuit
CN114204794A