An LDPC decoder and decoding method based on ANMS algorithm

Abstract

The application provides an ANMS algorithm-based LDPC decoder and decoding method, wherein the decoder comprises a configuration information module 201, a check node updating module 202, a variable node updating module 203, a decoding decision module 204 and a control module 205; the decoding decision module 204 adopts different adaptive normalization factor calculation formulas for data path M1 and data path M2; and the control module 205 controls data to be iterated according to two branches. The LDPC decoder based on the ANMS algorithm of two suppression factor formulas can be realized in a set of hardware systems, idle resources in the decoder are effectively utilized, and the decoding performance of the decoder is improved.

Description

Technical Field

[0001] This invention relates to the field of decoding technology, and in particular to an LDPC decoder and decoding method based on the ANMS algorithm. Background Technology

[0002] Among the many channel coding and decoding methods, Low-Density Parity-Check (LDPC) codes are linear error-correcting codes with performance close to the Shannon limit. Due to their excellent error-correcting performance and high data transmission efficiency, LDPC codes are widely used in optical fiber communication and various services, and continue to play an important role in 5G communication systems.

[0003] Currently, LDPC code decoding mainly employs iterative decoding methods. Based on the form of the data to be decoded, decoding algorithms are primarily divided into hard-decision and soft-decision algorithms. Among these, the BP (Belief Propagation) decoding algorithm in soft-decision algorithms performs close to the Shannon limit. However, the BP algorithm suffers from high computational complexity, leading to low hardware efficiency and significant hardware overhead. Therefore, its check node update calculation is often approximated, resulting in the Min-Sum algorithm. While the Min-Sum algorithm reduces computational complexity, it overestimates the magnitude of information transmitted from the check node to the variable node compared to the BP algorithm, inevitably reducing decoding performance. Furthermore, the Min-Sum check node update formula generally results in a larger magnitude of external information than in the BP algorithm. The NMS (Normalized Min-Sum) algorithm introduces a normalization factor α (0 < α < 1) to improve the check node update formula in the Min-Sum algorithm, reducing the magnitude of external information in the check node and thus improving algorithm performance. According to the BP decoding algorithm, in the decision step of iterative decoding, for check constraints that fail to pass a decision, the extrinsic information of the corresponding check nodes needs to be suppressed. However, the NMS algorithm does not suppress these nodes. The ANMS (Adaptive Normalized Min-Sum) algorithm introduces a check node suppression factor on the basis of the NMS algorithm to reduce the impact of unreliable check node extrinsic information on the subsequent decoding process.

[0004] However, there is still no good theoretical method for selecting the normalization factor in the ANMS algorithm. Although many papers propose different adaptive formulas for the normalization factor, each system only uses a single formula for calculation.

[0005] Therefore, it is necessary to design a decoder with high decoding performance that can decode using different normalization factors. Summary of the Invention

[0006] This invention provides an LDPC decoder based on the ANMS algorithm, aiming to design an LDPC decoder that can implement the ANMS algorithm based on two suppression factor formulas in a single hardware system, and effectively utilize the idle resources in the decoder to improve the decoding performance.

[0007] In a first aspect, the present invention provides an LDPC decoder based on the ANMS algorithm, comprising: a configuration information module 201, used to receive codewords to be decoded and transmit the codewords to be decoded to a control module 205 and a variable node update module 203; wherein, the codewords to be decoded represent configuration information with different code lengths and code rates;

[0008] The verification node update module 202 is used to obtain codeword data output by the configuration information module 201 or the variable node update module 203 from the control module 205, perform verification node update calculation on the codeword data to obtain the codeword information after verification node update, and input the information after verification node update into the control module 205.

[0009] The variable node update module 203 is used to obtain codeword data output by the configuration information module 201 or the verification node update module 202 from the control module 205, perform variable node update calculation on the codeword data to obtain the codeword information after variable node update, and input the variable node updated information into the control module 205.

[0010] The decoding decision module 204 is used to obtain the updated codeword information of the verification node and the updated codeword information of the variable node from the control module 205, and to determine whether the codeword to be decoded is correct based on the updated codeword information, and to send a signal to the control module indicating whether the decoding is correct.

[0011] The control module 205 is used to receive and determine whether the decoding is correct, as indicated by the decoding decision module 204. If the signal indicates that the decoding is incorrect, iterative control is executed: it continues to receive the updated codeword information of the verification node and / or the updated codeword information of the variable node, and sends the updated codeword information of the variable node and / or the updated codeword information of the verification node to the verification node update module 202 and / or the variable node update module 203; if the signal indicates that the decoding is correct, it outputs the codeword that was successfully decoded.

[0012] Furthermore, the control module 205 is also used to determine whether the number of iterations has reached the preset maximum number of iterations when the signal indicates that the decoding is incorrect. If the preset maximum number of iterations is reached, the decoding is determined to have failed and the iteration ends. If the preset maximum number of iterations is not reached, iteration control is executed to enter the next iteration.

[0013] Furthermore, the control module 205 is also used to perform iterative control based on data path M1 and data path M2, wherein the starting node of data path M1 is the verification node update module 202, and the starting node of data path M2 is the variable node update module 203.

[0014] Furthermore, the data transmission path of data path M1 iterates sequentially through the verification node update module 202, control module 205, and variable node update module 203, while the data transmission path of data path M2 iterates sequentially through the variable node update module 203, control module 205, and verification node update module 202.

[0015] Furthermore, the verification node update module 202 is also used to perform verification node update calculations for data path M1 and data path M2 using different adaptive normalization factors.

[0016] Secondly, the present invention also provides an LDPC decoding method based on the ANMS algorithm, comprising: S701: receiving a codeword to be decoded, wherein the codeword to be decoded represents configuration information of different code lengths and code rates; S702: performing variable node update calculation and / or check node update calculation on the codeword to be decoded to obtain codeword information updated by variable nodes and / or codeword information updated by check nodes; S703: determining whether the codeword to be decoded is correct based on the codeword information updated by variable nodes and the codeword information updated by check nodes; if the codeword to be decoded is incorrect, performing the iteration in S702; if the codeword to be decoded is correct, outputting the successfully decoded codeword.

[0017] Thirdly, the present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the LDPC decoding method based on the ANMS algorithm described above.

[0018] Fourthly, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the LDPC decoding method based on the ANMS algorithm as described above.

[0019] Fifthly, the present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the LDPC decoding method based on the ANMS algorithm described above.

[0020] This invention provides an LDPC decoder based on the ANMS algorithm. The decoding decision module 204 in the decoder employs different adaptive normalization factor calculation formulas for data paths M1 and M2, and the control module 205 controls the data to iterate simultaneously along both branches. This achieves improved decoding success rate while effectively utilizing idle resources in the decoder, thereby enhancing the decoder's decoding performance and efficiency. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0022] Figure 1 This is a flowchart describing the existing LDPC decoding based on the ANMS algorithm;

[0023] Figure 2 This is a block diagram describing the functional configuration of a decoder according to an embodiment of the present invention;

[0024] Figure 3 This is a state transition diagram describing the state machine of the control module according to the present invention;

[0025] Figure 4 This is a schematic diagram illustrating the control module according to the present invention;

[0026] Figure 5 This describes the decoding scheduling method of the decoding method according to embodiments of the present invention;

[0027] Figure 6 This is a schematic diagram illustrating the decoding and decision module according to an embodiment of the present invention;

[0028] Figure 7 This is a flowchart describing a decoding method according to an embodiment of the present invention. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0030] It should also be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings. Unless otherwise specified, the embodiments and features described herein can be combined with each other.

[0031] It should be noted that the concepts of "first" and "second" mentioned in this invention are only used to distinguish different devices, modules or units, and are not used to limit the order of functions performed by these devices, modules or units or their interdependencies.

[0032] It should be noted that the terms "a" and "a plurality of" used in this invention are illustrative rather than restrictive. Those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0033] The names of the messages or information exchanged between the multiple devices in the embodiments of the present invention are for illustrative purposes only and are not intended to limit the scope of these messages or information.

[0034] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0035] Please see Figure 2 , Figure 2 This is a functional schematic diagram of the LDPC decoder based on the ANMS algorithm provided by this invention. The decoder includes:

[0036] The configuration information module 201 is used to receive the codeword to be decoded and transmit the codeword to be decoded to the control module 205 and the variable node update module 203; wherein, the codeword to be decoded represents configuration information with different code lengths and code rates;

[0037] The verification node update module 202 is used to obtain codeword data output by the configuration information module 201 or the variable node update module 203 from the control module 205, perform verification node update calculation on the codeword data (the verification node update calculation can refer to S102), thereby obtaining the codeword information after the verification node update, and input the information after the verification node update into the control module 205.

[0038] The variable node update module 203 is used to obtain codeword data output by the configuration information module 201 or the verification node update module 202 from the control module 205, perform variable node update calculation on the codeword data (the variable node update calculation can refer to S103), thereby obtaining the codeword information after variable node update, and input the variable node updated information into the control module 205.

[0039] The decoding decision module 204 is used to obtain the updated codeword information of the verification node and the updated codeword information of the variable node from the control module 205, and to determine whether the codeword to be decoded is correct based on the updated codeword information, and to send a signal to the control module indicating whether the decoding is correct.

[0040] The control module 205 receives a signal from the decoding decision module 204 indicating whether the decoding is correct. If the signal indicates that the decoding is incorrect, it performs iterative control: it continues to receive the updated codeword information of the verification node and / or the updated codeword information of the variable node, and sends the updated codeword information of the variable node and / or the updated codeword information of the verification node to the verification node update module 202 and / or the variable node update module 203; if the signal indicates that the decoding is correct, it outputs the codeword that was successfully decoded.

[0041] Among them, the data to be decoded consists of configuration information such as different code lengths and code rates, and the configuration information module 201 will cache and transmit this configuration information;

[0042] The verification node update module 202 is used to perform verification node update calculations on the input data or the data in the iteration.

[0043] The variable node update module 203 is used to perform variable node update calculations on the input data or the data in the iteration.

[0044] The decoding decision module 204 (or verification module) is used to receive updated node information from the verification node update module 202 and the variable node update module 203, and determine whether the decoded codeword is correct based on the received updated variable node information, and send a decoding correctness signal to the control module. When the decoded codeword is correct, a decoding success signal is output, and the decoded codeword is output. When the decoded codeword is incorrect, it is determined whether the number of iterations has reached the preset maximum number of iterations. When the preset value is reached, the decoding is determined to have failed. When the preset value is not reached, the next iteration is initiated.

[0045] Optionally, the control module performs control such that when one decoded codeword is correct, a decoding success signal is output, along with the decoded codeword, terminating the two-channel decoding iteration. When the decoded codeword is incorrect, it checks if the preset maximum number of iterations has been reached. If the preset maximum number of iterations has been reached, a decoding failure signal is output; otherwise, the next iteration begins. If data path M1 is successfully decoded, the decoding result of data path M1 is output, and the iteration process of data paths M1 and M2 is terminated.

[0046] The control module 205 simultaneously receives data from the verification node update module 202 (or verification node) and the variable node update module 203 (or variable node), and can simultaneously transmit input data from both the variable node and the verification node. Specifically, after input information enters the input buffer module, while the buffered information enters the variable node update module 203 to obtain updated variable node data, the input information also enters the verification node update module 202 to obtain updated verification node data. Subsequently, while the updated variable node data enters the verification update node, the updated verification node data enters the variable update node.

[0047] In some embodiments, the control module has a state machine inside, which controls the branch controller to simultaneously receive data from the verification node and data from the variable node, and can simultaneously transmit the input data of the variable node and the input data of the verification node. When one decoding is successful, it will control the termination of the two iterations and determine that the decoding is successful.

[0048] The control module divides the data iteration process into two paths, data paths M1 and M2, through a branch controller. Data paths M1 and M2 iterate simultaneously, differing only in their starting nodes: data path M1 starts at the verification node, while data path M2 starts at the variable node. Data path M1 iterates in the sequence of verification node-control module-variable node-control module-verification node-…, while data path M2 iterates in the sequence of variable node-control module-verification node-control module-variable node-…

[0049] The verification node update module 202 is also used to perform verification node update calculations for data paths M1 and M2 using different adaptive normalization factors. The adaptive normalization factor can be obtained through two different formulas, and different adaptive normalization factors are applied to data paths M1 and M2 through the transmitted adaptive normalization factor switching signal.

[0050] In one application scenario, during the verification node update process, the adaptive normalization factor is calculated using two different formulas, and different adaptive normalization factors are applied to data paths M1 and M2 via a transmitted adaptive normalization factor switching signal. When the adaptive normalization factor switching signal is high, it indicates that the verification node update for data path M1 is currently underway, and adaptive normalization factor α1 is selected for adaptive normalization processing; when the adaptive normalization factor switching signal is low, it indicates that the verification node update for data path M2 is currently underway, and adaptive normalization factor α2 is selected for adaptive normalization processing.

[0051] Unlike existing LDPC decoders, the decoding decision module 204 in this invention uses different adaptive normalization factor calculation formulas for data path M1 and data path M2, and the control module 205 controls the data to iterate according to the two branches.

[0052] The following will refer to Figure 3 and Figure 4 The structure of the LDPC decoder control module in this embodiment of the invention will be described in detail below.

[0053] The state transition diagram of the state machine is as follows: Figure 3 When in the idle state, the state machine enters the initialization state after detecting that the initial information frame header signal is high. After the initial information is stored, the initial information frame tail signal will be high, and the state machine will jump to the state of data path M1 using variable node update module 203 (or M1 variable) and data path M2 using check node update module 202 (or M2 check). Then, the state machine starts counting from 0 to T, where T is the greater of the check node update time and the variable node update time. The state machine then jumps to the state of data path M1 using check node update module 202 (or M1 check) and data path M2 using variable node update module 203 (or M2 variable). Afterwards, the state machine starts counting from 0 to T, and then begins to determine whether to end decoding or jump to the state of data path M1 using variable node update module 203 and data path M2 using check node update module 202.

[0054] The control module structure diagram is as follows: Figure 4 State machine 401 controls branch controller 402 to generate selection signals for selectors 404, 405, 406 and 407.

[0055] Specifically, when the current state is the initialization state, selector 404 and selector 405 select the initial information, selector 406 outputs the data output by storage unit 408, and selector 407 outputs the data output by storage unit 409; when the current state is the M1 variable M2 verification state, selector 404 selects the variable node output, selector 405 selects the verification node output, selector 406 outputs the data output by storage unit 409, and selector 407 outputs the data output by storage unit 408; when the current state is the M1 verification M2 variable state, selector 404 selects the verification node output, selector 405 selects the variable node output, selector 406 outputs the data output by storage unit 408, and selector 407 outputs the data output by storage unit 409.

[0056] Here, the state machine 401 controls the address generator to generate read and write addresses for the multiplexed storage unit 408 and the multiplexed storage unit 409, and perform row-column conversion to meet the requirements of variable node updating by column and check node updating by row.

[0057] In the following, with reference to Figure 5 the decoding scheduling mode, the decoding procedure of the LDPC decoder proposed by the present invention will be described in detail. Different from the decoder in the prior art, the LDPC decoder 200 according to the embodiment of the present invention performs two paths of decoding simultaneously. The decoding procedure of the LDPC decoder proposed by the present invention mainly describes that the control module 205 in the LDPC decoder 200 controls the data flow of the two data paths M1 and M2, wherein the calculation formula of the check node suppression factor of the data path M1 is α1, and the calculation formula of the check node suppression factor of the data path M2 is α2.

[0058] As shown in Figure 5 the figure, a codeword to be decoded is first received, and then the codeword is calculated according to the data path M1 and the data path M2 respectively, wherein the suppression factors of the check nodes of the data path M1 and the data path M2 are calculated according to different adaptive suppression factor formulas, so that the calculation formula of the suppression factor with faster successful decoding can be automatically selected under different scenarios of data to be decoded.

[0059] Specifically, when the input is X1 and the maximum number of decoding iterations is l, m iterations are required for successful decoding via the check node suppression factor α1, and n iterations are required for successful decoding via the check node suppression factor α2, where m<l and n<l. If m<n, the decoding result of the data path M1 is output, otherwise the decoding result of the data path M2 is output. When the input is X2 and the maximum number of decoding iterations is l, m2 iterations are required for successful decoding via the check node suppression factor α1, and successful decoding cannot be completed within l iterations via the check node suppression factor α2, then the decoding result of the data path M1 is output. When the input is X3 and the maximum number of decoding iterations is l, successful decoding cannot be completed within l iterations via the check node suppression factor α1, and n3 iterations are required for successful decoding via the check node suppression factor α2, then the decoding result of the data path M2 is output. When the input is X4 and the maximum number of decoding iterations is l, successful decoding cannot be completed within l iterations via the check node suppression factor α1, and successful decoding cannot be completed within l iterations via the check node suppression factor α2, then a decoding failure is output.

[0060] After receiving the codeword to be decoded, the LDPC decoder performs initialization. The control module performs control, so that the codeword to be decoded respectively follows Figure 5 the data path M1 as shown in the figure to be input to the variable node updating module to perform variable node update calculation, Figure 5 and follows the data path M2 as shown in the figure to be input to the check node updating module to perform check node update calculation.

[0061] After the variable node update module of data path M1 completes its update calculation, it transmits the updated information to the verification node update module. Simultaneously, after the verification node update module of data path M2 completes its update calculation, it transmits the updated information to the variable node update module.

[0062] This allows codewords to be decoded in two paths within the LDPC decoder, using different adaptive suppression factor formulas (which can be existing ones). The decoding result depends on the path with fewer iterations due to the different suppression factors. This improves the decoding success rate while effectively utilizing idle resources in the decoder, thus enhancing its decoding performance.

[0063] The following will refer to Figure 6 The structural diagram of the decoding decision module 204 is described by a single verification node processing unit.

[0064] After receiving the data to be processed, a single check node processing unit first performs an absolute value operation to find the minimum value other than itself. Then, it performs adaptive normalization processing and outputs either the original code or the two's complement based on the result of the sign XOR operation. Here, a single check node processing unit refers to... Figure 2 The component 202 in the code is the output of a single verification node processing unit.

[0065] The verification node update module 202 of the present invention is characterized in that the adaptive normalization factor is obtained through two different formulas, and different adaptive normalization factors are used to process data path M1 and data path M2 through the transmitted adaptive normalization factor switching signal. When the adaptive normalization factor switching signal is high, it indicates that the verification node of data path M1 is currently being updated, and adaptive normalization factor α1 is selected for adaptive normalization processing; when the adaptive normalization factor switching signal is low, it indicates that the verification node of data path M2 is currently being updated, and adaptive normalization factor α2 is selected for adaptive normalization processing.

[0066] The following will refer to Figure 7 A decoding method according to an embodiment of the present invention is described. Figure 7 This is a flowchart describing a decoding method according to an embodiment of the present invention.

[0067] Before explaining the present invention, the LDPC decoding method is briefly described as follows: the LDPC decoding method uses the commonly used adaptive normalized minimum sum algorithm.

[0068] Commonly used adaptive normalized minimum sum algorithms, Figure 1 This is a flowchart of LDPC decoding based on the ANMS algorithm, which consists of the following steps:

[0069] S101. Receive information from the channel and initialize: current iteration number l = 0, maximum iteration number H, based on the received information from the channel y = (y1, y2, y3, ..., y n Initialize all variable node information;

[0070] L (l) (v ij ) = L (yi) i = 1, 2, 3, ..., n;

[0071] S102. Perform check node update. Check node update formula:

[0072]

[0073] in This is an adaptive normalization factor;

[0074] S103. Update the variable nodes. The variable node update formula is as follows:

[0075] L (l) (v ij )=L(y i )+∑L (l) (c j′i );

[0076] S104. Calculate the posterior probability of the variable nodes:

[0077] L (l) (q i )=L(y i )+∑L (l) (c ji )

[0078] And perform decoding and decision-making: if L (l) (q i If ) > 0, then otherwise, judge

[0079]

[0080] If the condition is true, the decoding is correct; otherwise, the decoding is incorrect.

[0081] S105. If the decoding is correct, then the decoding is successful and the codeword is output.

[0082] S106. If the decoding is incorrect, determine whether the maximum number of iterations has been reached;

[0083] S107. If the maximum number of iterations has not been reached and the verification equation is not satisfied, repeat steps 102-105.

[0084] S108. The maximum number of iterations has been reached, decoding failure is determined, and the iteration ends.

[0085] The meanings of the symbols in the above formulas are shown in Table 1.

[0086] Table 1

[0087]

[0088] The order of S102 and S103 can be interchanged. As can be seen from the above decoding steps, completing the check node update requires determining... The ANMS algorithm uses a variable normalization factor, offering greater flexibility in implementation compared to the NMS algorithm. However, there is currently no optimal theoretical method for selecting the normalization factor in the ANMS algorithm. Nevertheless, existing applications have high requirements for the selection of the normalization factor; therefore, data can be split into two paths, and normalization factors calculated using different formulas can be used for updating the verification nodes.

[0089] Furthermore, in existing LDPC decoding methods, because decoding is performed using a single information transmission method, only one of the variable node update module or the check node update module is active at any given time, while the other is idle. This leads to low system resource utilization. Therefore, the check node update module and the variable node update module can be time-division multiplexed. At the same time, data branch M1 uses the check node update module, and data branch M2 uses the variable node update module, or data branch M1 uses the variable node update module, and data branch M2 uses the check node update module. This allows for the addition of an iterative branch without increasing the number of check nodes and variable nodes.

[0090] In view of these problems in the prior art, the present invention is proposed, with reference to Figure 7 :

[0091] The decoding method according to an embodiment of the present invention is applied to the LDPC decoder 200 described above, the method comprising:

[0092] S701: Receive the codeword to be decoded, where the codeword represents configuration information for different code lengths and code rates. The codeword to be decoded can be 8064 16-bit values.

[0093] S702: Perform variable node update calculation and / or check node update calculation on the codeword to be decoded to obtain codeword information after variable node update and / or check node update; wherein, the variable node update calculation and / or check node update calculation can be performed after the codeword to be decoded is initialized.

[0094] S703: Determine whether the codeword to be decoded is correct based on the updated codeword information of the variable node and the updated codeword information of the check node. If the codeword to be decoded is incorrect, execute the iteration in S702; if the codeword to be decoded is correct, output the successfully decoded codeword. As an example, first, decode the updated codeword information of the root variable node and the updated codeword information of the check node (the decoding method can be found in S104), and then determine whether the codeword to be decoded is correct based on the determination result. The condition for determining whether the codeword to be decoded is correct is... Where Xn represents the result of decoding and determining the codeword information after the variable node is updated or the codeword information after the check node is updated, and H T This represents the transpose of the parity check matrix (the transpose is a constant and can be set as needed).

[0095] S701 also includes receiving the codeword to be decoded and initializing the codeword to be decoded.

[0096] S702 further includes: performing two-way calculations on the initialized codeword to be decoded: Data path M1, performing variable node update calculations on the initialized codeword to obtain the updated codeword information, then performing check node update calculations on the updated codeword information to obtain the updated codeword information, and then performing variable node update calculations on the updated codeword information again, and so on; Data path M2, performing check node update calculations on the initialized codeword to be decoded to obtain the updated codeword information, then performing variable node update calculations on the updated codeword information, and then performing check node update calculations on the updated codeword information again, and so on.

[0097] S703 further includes: determining whether the codeword to be decoded is correct based on the updated codeword information of the variable node and the updated codeword information of the check node; if the codeword to be decoded is incorrect, determining whether the number of iterations has reached the preset maximum number of iterations; if the preset maximum number of iterations has not been reached, executing the iteration in S702; if the preset maximum number of iterations has been reached, decoding fails and the iteration ends. The preset maximum number of iterations is generally determined based on MATLAB modeling and simulation, selecting a suitable value between speed and decoding performance. A larger preset number of iterations results in better performance but slower speed; a smaller preset number of iterations results in worse performance but faster speed. The preset maximum number of iterations is generally between 10 and 20.

[0098] S702 also includes: performing check node update calculations using different adaptive normalization factors for data path M1 and data path M2.

[0099] It is understandable that the content recorded in this method is consistent with the references. Figure 2 The modules described correspond to those in the ANMS-based LDPC decoder. Therefore, the operations, features, and beneficial effects described above for the decoder also apply to the ANMS-based LDPC decoding method, and will not be repeated here.

[0100] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An LDPC decoder based on the ANMS algorithm, characterized in that, include: The configuration information module 201 is used to receive the codeword to be decoded and transmit the codeword to be decoded to the control module 205 and the variable node update module 203; wherein, the codeword to be decoded represents configuration information with different code lengths and code rates; The verification node update module 202 is used to obtain codeword data output by the configuration information module 201 or the variable node update module 203 from the control module 205, perform verification node update calculation on the codeword data to obtain the codeword information after verification node update, and input the information after verification node update into the control module 205. The variable node update module 203 is used to obtain codeword data output by the configuration information module 201 or the verification node update module 202 from the control module 205, perform variable node update calculation on the codeword data to obtain the codeword information after variable node update, and input the variable node updated information into the control module 205. The decoding decision module 204 is used to obtain the updated codeword information of the verification node and the updated codeword information of the variable node from the control module 205, and to determine whether the codeword to be decoded is correct based on the updated codeword information, and to send a signal to the control module indicating whether the decoding is correct. Control module 205 is used to receive and determine whether the decoding is correct from the decoding decision module 204. If the signal indicates that the decoding is incorrect, it executes iterative control: it continues to receive the updated codeword information of the verification node and / or the updated codeword information of the variable node, and sends the updated codeword information of the variable node and / or the updated codeword information of the verification node to the verification node update module 202 and / or the variable node update module 203; if the signal indicates that the decoding is correct, it outputs the codeword that was successfully decoded. The control module 205 is also used to perform iterative control based on data path M1 and data path M2, wherein the starting node of data path M1 is the verification node update module 202, and the starting node of data path M2 is the variable node update module 203. The data transmission path of data path M1 iterates sequentially through the verification node update module 202, control module 205, and variable node update module 203. Similarly, the data transmission path of data path M2 iterates sequentially through the variable node update module 203, control module 205, and verification node update module 202. The verification node update module 202 is also used to perform verification node update calculations for data path M1 and data path M2 using different adaptive normalization factors.

2. The LDPC decoder based on the ANMS algorithm according to claim 1, characterized in that, The control module 205 is further configured to, when the signal indicates that the decoding is incorrect, determine whether the number of iterations has reached the preset maximum number of iterations. If the preset maximum number of iterations is reached, the decoding is determined to have failed and the iteration ends. If the preset maximum number of iterations is not reached, iteration control is executed and the next iteration begins.

3. An LDPC decoding method based on the ANMS algorithm, characterized in that, The method is run on the LDPC decoder based on the ANMS algorithm as described in any one of claims 1-2, and the decoding method includes: S701: Receive codewords to be decoded, where the codewords to be decoded represent configuration information for different code lengths and code rates; S702: Perform variable node update calculation and / or check node update calculation on the codeword to be decoded to obtain codeword information after variable node update and / or codeword information after check node update; S703: Determine whether the codeword to be decoded is correct based on the updated codeword information of the variable node and the updated codeword information of the verification node. If the codeword to be decoded is incorrect, execute the iteration in S702; if the codeword to be decoded is correct, output the codeword that was successfully decoded.

4. The LDPC decoding method based on the ANMS algorithm according to claim 3, characterized in that, S702 also includes: For the initialized codeword to be decoded, two calculations are performed: Data path M1, which performs variable node update calculation on the initialized codeword to obtain the updated codeword information, then performs check node update calculation on the updated codeword information to obtain the updated codeword information, and then performs variable node update calculation again on the updated codeword information, and so on; Data path M2, which performs check node update calculation on the initialized codeword to be decoded to obtain the updated codeword information, then performs variable node update calculation on the updated codeword information, and then performs check node update calculation again on the updated codeword information, and so on.

5. The LDPC decoding method based on the ANMS algorithm according to claim 4, characterized in that, S703 further includes: determining whether the codeword to be decoded is correct based on the updated codeword information of the variable node and the updated codeword information of the verification node; if the codeword to be decoded is incorrect, determining whether the number of iterations has reached the preset maximum number of iterations; if the preset maximum number of iterations has not been reached, executing the iteration in S702; if the preset maximum number of iterations has been reached, decoding fails and the iteration ends.

6. The LDPC decoding method based on the ANMS algorithm according to claim 5, characterized in that, S702 also includes: performing check node update calculations using different adaptive normalization factors for data path M1 and data path M2.

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