Stimulation chip detection system and method

Abstract

The application relates to a stimulating chip detection system and method. In a chip test process, a switch gating module controls the load switches corresponding to output channels in multiple load groups according to load switch gating information, so that each output channel of a chip to be detected is connected with a load. When each load group is connected with an output channel, other output channels of the chip to be detected are switched to be connected with a collection module one by one, so that the collection module collects test information of each output channel after being connected with different loads one by one. In the case of multiple channels and multiple loads, the detection of the output of the stimulating chip and the output detection of different output channels in different human body parts are realized by only switching different output channels to be connected with an output collection module, and energy loss is reduced compared with the prior art.

Description

Technical Field

[0001] This invention relates to the field of medical devices, and in particular to a stimulation chip detection system and method. Background Technology

[0002] In the semiconductor chip development process, functional verification and testing is the final step, used to screen out defective products resulting from manufacturing defects due to process issues. Stimulation chips, specialized chips used in medical devices for neuromodulation, stimulate corresponding target points in the body by outputting electrical pulse signals, and can be used to treat diseases including Parkinson's disease, dystonia, and epilepsy. The number of output channels and the types of pulse output signals vary depending on the specific condition being treated.

[0003] Conventional chip testing directly collects the chip's output information for testing, but many parameters that stimulate the chip require testing with the help of a load. Currently, a load is controlled by a switch to connect to multiple output channels, and then different channels are switched to the load for testing. As the number of chip output channels and the number of loads increase, the number of switches and the number of switching times also increase, making the testing method cumbersome, increasing energy consumption, and affecting the lifespan of the testing system. Summary of the Invention

[0004] Therefore, it is necessary to provide a stimulation chip detection system and method to address the aforementioned technical problems.

[0005] In a first aspect, the present invention provides a stimulation chip detection system, including a control module and at least one test circuit. The test circuit includes a chip carrier board, a chip configuration module, a switch selection module and an output acquisition module. The control module is connected to the chip configuration module, the switch selection module and the output acquisition module respectively, and is capable of sending chip configuration information to the chip configuration module and sending load switch selection information and channel switch selection information to the switch selection module.

[0006] The switch selection module is located between the chip carrier and the output acquisition module. The switch selection module includes a channel selection circuit and a load selection circuit. The channel selection circuit includes multiple first lines for connecting to the output channels of the chip under test. The first lines are connected to second lines. The load selection circuit includes multiple load groups for simulating different parts of the human body. The load group includes multiple loads.

[0007] In each load group, the output sides of multiple loads are connected in parallel, and the input sides of multiple loads are connected to multiple first lines one by one through load switches. The first lines are connected to the first connection terminal of the output acquisition module, and the second lines are respectively connected to the second connection terminal of the output acquisition module. The first lines and the second lines are respectively provided with channel selection switches.

[0008] Furthermore, loads in multiple load groups that are connected to the same output interface as the chip carrier are connected in parallel to the corresponding first line. The load group includes parallel lines, which are used to connect the output sides of multiple loads in the group in parallel.

[0009] The load selection circuit also includes a third line, which is sequentially connected to the parallel lines in the multiple load groups, and the third line between two adjacent parallel lines is provided with an on / off switch.

[0010] Furthermore, the chip configuration module controls the chip under test to output test information based on the chip configuration information, wherein the test information is current;

[0011] The switch selection module sends target test information to the chip under test. The target test information is the test information after passing through the target load. The chip under test generates an impedance measurement result based on the target test information. The chip configuration module reads the impedance measurement result and sends impedance measurement information to the control module based on the impedance measurement result.

[0012] Furthermore, the test circuit also includes a power supply module, which is electrically connected to the control module and the chip carrier board respectively;

[0013] The power supply module is also equipped with a monitoring module for monitoring the power consumption information of the chip under test. The power supply module sends the power consumption information to the control module to detect the power consumption of the stimulation chip.

[0014] Furthermore, the system also includes a test chamber, which is electrically connected to the control module, and the chip carrier is disposed inside the test chamber;

[0015] The test chamber is equipped with a temperature control module and a humidity control module. The test chamber adjusts the internal temperature to the target temperature and / or adjusts the internal humidity to the target humidity according to the instructions issued by the control module.

[0016] Furthermore, the test chamber also includes a motion module for simulating human motion states. The motion module is electrically connected to the control module, and the motion state of the motion module changes based on the output channel switching to connect to loads in different load groups.

[0017] Secondly, the present invention provides a method for detecting a stimulation chip, applied to a stimulation chip detection system, the method comprising:

[0018] The control module sends chip configuration information to the chip configuration module, and sends channel switch selection information and load switch selection information to the switch selection module. The chip configuration module controls the chip under test to output test information according to the chip configuration information, and configures one of the multiple output channels of the chip under test for test return current.

[0019] The switch selection module controls the load switch in the load group to close according to the load switch selection information, so that the output channel of the chip under test is connected to the load. The switch selection module controls the output channel used as test return to be connected to the output acquisition module according to the channel switch selection information.

[0020] The other output channels of the chip under test are connected to the output acquisition module respectively, so that the output acquisition module collects the test information of the output channel of the stimulation chip after it is connected to the load one by one. Then the load group is switched, and the other output channels of the chip under test are connected to the output acquisition module again, so that the output acquisition module collects the test information of the output channel of the stimulation chip after it is connected to different loads one by one.

[0021] The control module receives the output information sent by the output acquisition module and determines the detection result for the chip to be tested based on the output information and the target standard output information.

[0022] Furthermore, the chip configuration information includes operating mode information. When the operating mode information is impedance measurement mode, the test information is current, and the output information is impedance measurement information.

[0023] The target test information is sent to the chip under test through the switch selection module. The target test information is the test information after passing through the target load.

[0024] The chip configuration module reads the impedance measurement results generated by the chip under test based on the target test information, and sends the impedance measurement information to the control module based on the impedance measurement results.

[0025] The impedance measurement information is received through the control module.

[0026] Furthermore, the chip configuration information includes operating mode information. When the operating mode information is pulse output mode, the test information is a current pulse, and the output information is pulse output information.

[0027] The target test information is sent to the output acquisition module through the switch selection module. The target test information is the test information after passing through the target load.

[0028] The output acquisition module acquires the target pulse, converts the target pulse into digital signal pulse output information, and sends the pulse output information to the control module.

[0029] The control module receives the pulse output information.

[0030] Furthermore, the method also includes:

[0031] The chip to be tested is placed in the test chamber, and the control module sends temperature and humidity control information, motion control information to the test chamber and load group switching information to the switch selection module.

[0032] The test chamber adjusts the temperature inside the test chamber to the temperature corresponding to the load group connected to the output channel of the chip under test, and adjusts the movement state of the chip inside the test chamber to the movement state corresponding to the load group, so as to detect the output information of the stimulation chip located at different parts of the human body in motion.

[0033] In the aforementioned detection system and method for stimulation chips, a switch selection module is positioned between the chip carrier and the output acquisition module. The channel selection circuit includes a first line and a second line corresponding to multiple output channels of the chip under test. The load selection circuit includes multiple load groups for simulating different parts of the human body. Each load group includes multiple loads and multiple load switches. According to the load switch selection information, the switch selection module sequentially controls the load switches corresponding to the output channels in the multiple load groups to close, so that each first line is connected to a load. When switching different load groups to connect to the output channels, the other output channels of the chip under test are connected to the output acquisition module respectively, so that the output acquisition module collects the test information of each output channel after connecting to different loads one by one. This invention can detect the output of the stimulation chip by simply switching different output channels to connect to the output acquisition module in the case of multiple output channels and multiple loads. Switching load groups realizes the output detection of different output channels in different parts of the human body. Compared with existing tests, it reduces the number of switch closing times and reduces test losses. Attached Figure Description

[0034] Figure 1This is a schematic diagram of the structure of a stimulation chip detection system in one embodiment;

[0035] Figure 2 This is a schematic diagram of the structure of a stimulation chip detection system in one embodiment;

[0036] Figure 3 This is a schematic diagram of the structure of a stimulation chip detection system in one embodiment;

[0037] Figure 4 This is a schematic diagram of the structure of a stimulation chip detection system in one embodiment;

[0038] Figure 5 This is a schematic diagram of the structure of a stimulation chip detection system in one embodiment;

[0039] Figure 6 This is a flowchart illustrating a stimulation chip detection method in one embodiment;

[0040] Figure 7 This is a flowchart illustrating step 608 in one embodiment;

[0041] Figure 8 This is a flowchart illustrating step 608 in one embodiment;

[0042] Figure 9 This is a schematic diagram of a current pulse in one embodiment;

[0043] Figure 10 This is a flowchart illustrating a stimulation chip detection method in one embodiment;

[0044] Figure 11 This is a flowchart illustrating a stimulation chip detection method in one embodiment;

[0045] Figure 12 This is a schematic diagram of the power consumption test process in one embodiment;

[0046] Figure 13 This is a flowchart illustrating a stimulation chip detection method in one embodiment;

[0047] Figure 14 This is a schematic diagram of the working voltage test process in one embodiment;

[0048] Figure 15 This is a flowchart illustrating a stimulation chip detection method in one embodiment;

[0049] Figure 16 This is a flowchart illustrating a stimulation chip detection method in one embodiment. Detailed Implementation

[0050] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of the present invention. However, the present invention can be practiced in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0051] The serial numbers assigned to components in this document, such as "first" and "second," are merely used to distinguish the described objects and do not have any sequential or technical meaning. The terms "connection" and "linkage" used in this invention, unless otherwise specified, include both direct and indirect connections (linkages). In the description of this invention, it should be understood that the terms "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention.

[0052] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0053] Reference Figure 1-5As shown, this embodiment of the invention provides a stimulation chip detection system 10. The stimulation chip detection system 10 includes a control module 110 and at least one test circuit 120. The test circuit 120 includes a chip carrier board 121, a chip configuration module 122, and a switch selection module 123. The chip to be tested is connected to the test circuit 120 through the chip carrier board 123. The chip configuration module 122 and the switch selection module 123 are electrically connected to the control module 110 and the chip carrier board 121, respectively. The control module 110 is used to send chip configuration information to the chip configuration module 122 and to send load switch selection information to the switch selection module 123. The chip configuration module 122 is used to control the chip to be tested to output test information according to the chip configuration information. The switch selection module 123 includes a load selection circuit 1231, which includes multiple load groups. Each load group is used to correspond to different parts of the human body. Each load group includes multiple corresponding loads and load switches 12311. Loads within the same load group have the same impedance, while loads between different load groups have different impedances. For example, a 1kΩ load is used for analog output testing of a stimulation chip for deep brain nerves or vagus nerves, while a 500Ω resistor is used for a stimulation chip for spinal cord stimulators.

[0054] A switch selection module 123 is disposed between the chip carrier board 121 and the control module 110. It controls the target load switch to operate according to the load switch selection information, thereby connecting the target load to the output channel of the chip under test. The target load in the target load selection circuit 1231 receives information from the output channel. The control module 110 also receives output information from the test circuit 120 and determines the first test result for the chip under test based on the output information and the target standard output information. The target standard output information is the standard output information corresponding to the chip configuration information and the load switch selection information.

[0055] In this embodiment of the invention, the control module 110 can be a computer device, etc. The control module 110 stores all test items for the chip under test and the corresponding standard output information for all test items. The control module 110 can send chip configuration information corresponding to the test items to the test circuit 120, causing the test circuit 120 to execute the test items for the chip under test and send the output information of the chip under test to the control module 110. The control module 110 determines whether the test result of the chip under test is pass or fail by comparing the output information of the chip under test with the standard output information of the test items.

[0056] The control module 110 can control multiple test circuits 120 simultaneously, meaning the stimulus chip detection system 10 can simultaneously test multiple chips to be tested. When testing multiple chips to be tested simultaneously, the test items for each chip to be tested can be the same or different; this embodiment of the invention does not specifically limit this.

[0057] The chip carrier board 121 is provided with a chip interface, which is divided into a chip input interface and a chip output interface. When testing the chip under test, the input channel of the chip under test is connected to the chip input interface and the output channel is connected to the chip output interface, so as to connect the chip under test and the test circuit 120.

[0058] The chip configuration module 122 is used for communication between the control module 110 and the chip under test. Since the communication protocol used by the control module 110 is different from that used by the chip under test, the chip configuration module 122 needs to convert the chip configuration information sent by the control module 110 into chip configuration instructions that the chip under test can recognize, and then send the chip configuration instructions to the chip under test through the chip input interface. The chip configuration information and chip configuration instructions may include information related to setting the operating mode of the chip under test, as well as information related to setting the output parameters of the chip under test. This information can be written into the registers of the chip under test. After sending the chip configuration instructions, the chip configuration module 122 can also reread the relevant information included in the chip configuration instructions from the registers of the chip under test and send the relevant information to the control module 110. The control module 110 determines whether the chip under test has been successfully configured by comparing the relevant information sent back by the chip configuration module 122 with the initially sent chip configuration information. If the chip under test has not been successfully configured, the control module 110 can resend the chip configuration information.

[0059] The switch selection module 123 includes a load selection circuit 1231, which includes multiple load groups ( Figure 4There are three load groups, each consisting of multiple loads and multiple load switches 12311, with one load corresponding to one load switch 12311. Since it is necessary to test whether the pulse stimulation output by the chip under test to different parts of the human body is qualified, and different parts of the human body have different impedances, load groups are needed to simulate the impedance of different parts of the human body. The pulses output by the chip under test when connected to the loads are used as test information. When performing different tests on the chip under test, the load switches 12311 of the corresponding load selection circuit 1231 can be closed according to the different test items, so that the output channel of the chip under test can be connected to different load groups through the chip output interface. For example, when testing the output pulse of the chip under test for epilepsy treatment, the control module 110 can send load switch selection information to the switch selection module 123, instructing the switch selection module 123 to close the load switch in the load group corresponding to the epilepsy treatment test, while simultaneously opening the load switches of other load groups (that is, disconnecting other load groups from the chip under test), so that the output information received by the control module 110 can simulate the pulse stimulation output by the chip under test during epilepsy treatment.

[0060] The test circuit 120 can generate output information based on the test information output by the chip under test. This output information is the information ultimately sent by the test circuit 120 to the control module 110. The test information and output information can be the same or different. For example, when the test item is the power consumption of the chip under test, the test information is current. The relevant modules in the test circuit 120 can determine the power consumption of the chip under test by detecting the magnitude of the current flowing through it and the magnitude of the voltage applied to it, and then send the power consumption as output information to the control module 110. When the test item is the operating frequency of the chip under test, the chip under test is not connected to a load and directly outputs high-frequency current pulses. The control module 110 determines the frequency of the current pulses by receiving them, and thus determines the operating frequency of the chip under test.

[0061] After receiving the output information, the control module 110 compares the output information with the standard output information of the test item to determine whether the first test result of the chip under test for that test item is qualified. For example, if the difference between the output information and the standard output information is within the allowable error range, the chip under test can be determined to be qualified; if the difference between the output information and the standard output information is outside the allowable error range, the chip under test can be determined to be unqualified. The control module 110 can then record the first test result of the chip under test, and after all tests for the chip under test are completed, perform subsequent sorting processing on the chip under test based on the first test result. The control module 110 also records the test conditions corresponding to the unqualified first test result, and performs three to five more tests on the recorded qualified stimulating chips according to the test conditions to determine whether the chip is prone to problems under those conditions. The above-mentioned stimulating chip detection system can automatically test stimulating chips and determine whether they are qualified or unqualified, without the need for manual intervention in the stimulating chip detection process, thus improving the detection efficiency of stimulating chips.

[0062] In one embodiment, the chip configuration information includes operating mode information. When the operating mode is impedance measurement mode, the test information is current, and the output information is impedance measurement information. The switch selection module 123 is also used to send target test information to the chip under test. The target test information is the test information after passing through the target load. The chip configuration module 122 is also used to read the impedance measurement result generated by the chip under test based on the target test information, and send the impedance measurement information to the control module 110 based on the impedance measurement result.

[0063] In this embodiment of the invention, the chip configuration information sent by the control module 110 includes operating mode information for adjusting the operating mode of the chip under test. When testing the impedance measurement function of the chip under test, the operating mode information can be information instructing the chip under test to switch its operating mode to impedance measurement mode. In impedance measurement mode, the chip under test will not output current pulses, but will instead apply voltage across the body part to be measured, i.e., output current to the body part. By calculating the voltage difference across the body part, the impedance of the body part can be determined. Therefore, when performing impedance measurement function testing, the switch selection module 123 can connect the output terminal of the load selection circuit 1231 to the impedance measurement input terminal of the chip under test, so that the chip under test and the target load form a loop, and the chip under test can detect the magnitude of the target load and obtain the impedance measurement result. In some other embodiments, the switch selection module 123 can be configured with a separate load for impedance measurement, and can form a loop with the chip under test through a switch.

[0064] The chip configuration module 122 can read the impedance measurement results detected by the chip under test, convert the impedance measurement results into impedance measurement information that the control module 110 can read, and send the impedance measurement information to the control module 110. After receiving the impedance measurement information, the control module 110 determines the detection result of the chip under test for the impedance measurement function item based on the magnitude of the target load impedance detected by the chip under test as represented by the impedance measurement information, and the actual magnitude of the target load impedance.

[0065] The stimulation chip detection system provided in this embodiment of the invention can connect the chip under test and the target load into a loop through the switch selection module 123, so that the chip under test can measure the impedance of the target load. The chip configuration module reads the impedance measurement result of the chip under test, converts the impedance measurement result into impedance measurement information and sends it to the control module, so that the control module can determine whether the impedance measurement result obtained by the chip under test is correct. Therefore, the stimulation chip detection system can automatically perform impedance measurement function test on the chip under test.

[0066] In one embodiment, the chip configuration information includes operating mode information. The test circuit 120 further includes an output acquisition module 124, which is disposed between the switch selection module 123 and the control module 110, and electrically connected to both the switch selection module 123 and the control module 110. When the operating mode information is pulse output mode, the test information is a current pulse, and the output information is pulse output information. The switch selection module 123 is also used to send target test information to the output acquisition module 124. The target test information is the test information after passing through the target load. The output acquisition module 124 is used to acquire the target test information, convert the target test information into digital signal pulse output information, and send the pulse output information to the control module.

[0067] In this embodiment of the invention, when testing the pulse output function of the chip under test, the working mode information can be information that instructs the chip under test to switch the chip working mode to the pulse output mode. In the pulse output mode, the chip under test will output corresponding current pulses according to the pulse output period, amplitude, frequency and other parameters indicated by the chip configuration instruction.

[0068] Since the current pulses output by the chip under test are analog signals, an output acquisition module 124 is required to acquire the current pulses with high precision and convert them into digital pulse output information. For example, a high-speed acquisition card can be used for the output acquisition module 124. The first and second connection terminals of the output acquisition module 124 are respectively connected to a switch selection module. Each load group is located between the first and second connection terminals in the circuit. The target load is connected to the output channel to be tested by the chip under test via a load switch 12311. The input and output sides of the target load are connected to the output acquisition module 124 via a channel selection switch 12323. The output acquisition module 124 can continuously acquire the current pulses output by the chip under test when connected to the target load, i.e., the target test information, and convert the target test information into pulse output information that the control module 110 can read. The pulse output information is then sent to the control module 110. After receiving the pulse output information, the control module 110 determines the test result of the chip under test for the pulse output function item based on the pulse output information and the standard output pulse.

[0069] In one embodiment, reference Figure 4 The channel selection circuit 1232 includes a first line 12322 for connecting to the output channel of the chip under test and a second line 12321 connected to the first line 12322. The chip carrier board 121 has multiple chip output interfaces, each interface is connected to a first line 12322, and the first line 12322 is connected to the output channel of the chip under test through the chip output interface. Each first line 12322 is connected to a second line 12321. The first line 12322 is connected to the first connection terminal of the output acquisition module 124, and the second line 12321 is connected to the second connection terminal of the output acquisition module 124. The channel selection circuit 1232 also includes a channel selection switch 12323, and the first line 12322 and the second line 12321 are respectively equipped with a channel selection switch 12323. The load group includes multiple loads and multiple load switches 12311, and the number of loads is the same as the number of load switches 12311 and the number of first lines 12322. The output sides of multiple loads in each load group are connected in parallel. The input sides of multiple loads in each load group are connected one-to-one with multiple first lines 12322 through load switches 12311. The loads in multiple load groups that are connected to the same chip output interface of the chip carrier board are connected in parallel to their corresponding first lines 12322. It can be understood that each first line 12322 is connected to one load in each load group.

[0070] In this invention, the load group is provided with parallel lines, which are used to connect the output sides of multiple loads in the group in parallel. The load selection circuit also includes a third line 12312, which is connected to the parallel lines in multiple load groups in sequence. A switch is provided on the third line 12312 between two adjacent parallel lines.

[0071] When the control module 110 needs to detect the channel output information of the chip under test, it sends channel switch selection information to the switch selection module 123. Specifically, based on the number of output channels of the chip under test, the control module 110 sends chip configuration information to the chip configuration module 122, and channel switch selection information and load switch selection information to the switch selection module 123. The chip configuration module 122 controls the chip under test to output test information according to the chip configuration information, and configures one of the multiple output channels of the chip under test for test return current. If the chip under test has 20 output channels, 19 output channels can be used as stimulus outputs, and 1 output channel can be used as test return current. The switch selection module 123 controls the load switches 12311 in the load group to close according to the load switch selection information, so that each output channel of the chip under test is connected to a load. If the number of output channels of the chip under test is the same as the number of chip output interfaces on the chip carrier board and the number of loads in the load group, then all load switches 12311 in a certain load group are closed. In this invention, the number of loads in each load group is the same.

[0072] According to the channel switch selection information, the switch selection module 123 closes the second line 12321 connected to the output channel used as the test return current, connecting it to the second connection terminal of the output acquisition module 124. The channel selection switch 12323 on the first line 12322 is closed sequentially (the channel selection switch on the first line connected to the output channel used as the test return current remains open), causing the output acquisition module 124 to collect test information from each output channel connected to the same load. Except for the output channel used as the test return current, which is not tested, the test information collection for the remaining output channels is completed. Then, the load group is switched, causing each first line 12322 to switch to the load of another load group. The channel selection switch 12323 on the first line 12322 is closed again, causing the output acquisition module 124 to collect test information from each output channel connected to different loads. When testing the output channel used as a test return current, the chip configuration module 122 controls the chip under test to change the output channel used as a test return current to a stimulation output. The corresponding channel selection switch 12323 on the first line 12322 closes, and then any other channel is changed to a test return current. Similarly, the corresponding channel selection switch 12323 on the second line 12321 closes, sequentially switching the load connection in multiple load groups. The output acquisition module 124 collects the test information. The output acquisition module 124 converts the test information into output information and sends it to the control module. The control module determines the test result for the chip under test based on the output information and the target standard output information.

[0073] Understandably, the channel selection switch 12323 on the first line 12322 can be located between the load access point and the output acquisition module 124, or it can be located between the chip output interface of the chip carrier board and the load access point. The load access point refers to the connection point of the load on the first line 12322.

[0074] When the control switch on the third line is off, since each of the first lines 12322 is connected to a load, the test information is the data after the output channel is connected to two loads in the same load group. The two loads are the load connected to the first line 12322 connected to the first connection terminal of the output acquisition module 124 and the load connected to the first line 12322 connected to the second connection terminal as a test return. The combination of the two loads simulates a part of the human body.

[0075] The third line 12312 connects to the parallel lines in multiple load groups in sequence. There is an on / off switch on the third line between two adjacent parallel lines. When all the on / off switches are closed, according to the principle of connecting one load to the first line, each first line can choose to connect to the load of different load groups, and then combine with the load connected to the first line as the test return current, thereby providing more load combination situations, detecting the chip's performance in multiple scenarios, improving the accuracy of chip testing, and ensuring that the chip can provide accurate stimulation signals during disease treatment.

[0076] The stimulation chip detection system provided in this embodiment of the invention, through the load gating circuit 1231 and the channel gating circuit 1232, allows all output channels of the chip under test to be simultaneously connected to the same or different loads, and one of the output channels to be used as test return current. Only switching the connection between different output channels and the output acquisition module 124 is required. The testing process is simple and convenient, significantly reducing the number of switching operations and testing costs compared to existing tests, and effectively improving switching efficiency compared to manual switching.

[0077] In one embodiment, the test circuit 120 further includes a power supply module 125, which is electrically connected to the control module 110 and the chip carrier board 121. The power supply module 125 is used to supply power to the chip under test and to detect the power consumption information of the chip under test, and send the power consumption information to the control module 110. The control module 110 is further used to determine a second test result for the chip under test based on the power consumption information and the target standard power consumption information, wherein the target standard power consumption information is the standard power consumption information corresponding to the chip configuration information and the load switch selection information. If the difference between the power consumption information and the standard power consumption information is less than or equal to a power consumption threshold, the second test result of the chip under test can be determined to be qualified; if the difference between the power consumption information and the standard power consumption information is greater than the power consumption threshold, the second test result of the chip under test can be determined to be unqualified.

[0078] In one embodiment, refer to Figure 5 As shown, the stimulation chip detection system 10 also includes a test chamber 130, which is electrically connected to the control module 110. The test chamber 130 is equipped with a temperature control module, a humidity control module, and a motion module. The temperature control module can control the temperature inside the test chamber 130, and the humidity control module can control the humidity inside the test chamber 130. The motion module includes a motion platform installed in the test chamber 130, and the chip carrier 121 is fixed on the motion platform. The motion platform is used to transmit vibration to the chip carrier and drive the chip carrier to shake, so as to simulate the performance of stimulating the chip under human movement.

[0079] The stimulation chip in this invention can be used in deep brain stimulators, implantable spinal cord stimulators, implantable sacral nerve stimulators, and implantable vagus nerve stimulators. Implantation sites include the head, chest, and lower back. Different sites experience different vibration intensities, and the temperature changes differently in different parts of the body after exercise; for example, muscle temperature may exceed 40°C. Each load group corresponds to a different test temperature and exercise state. The exercise state of the motion module and the temperature inside the test chamber 130 change according to the load group connected by the first line 12322, thereby detecting the output information of the stimulation chip located at different parts of the body during exercise.

[0080] When the stimulation chip detection system 10 includes multiple test circuits 120, each test circuit 120 can share a test box 130 (e.g., Figure 5 As shown in the figure, a test box 130 can also be set for each test circuit 120. The embodiments of the present invention do not make specific limitations on this. Each test circuit 120 corresponds to a motion module.

[0081] In one embodiment, such as Figure 6 As shown, a method for detecting a stimulation chip is provided, which is applied to a stimulation chip detection system. In this embodiment, the method includes the following steps:

[0082] Step 602: The control module sends chip configuration information to the chip configuration module and load switch selection information to the switch selection module.

[0083] In this embodiment of the invention, the control module can pre-store all test items for the chip under test and the standard output information corresponding to all test items. When the chip under test is tested, the control module can automatically perform the test items on the chip under test in sequence according to the test items stored in the control module. Those skilled in the art can also select specific test items on the control module to test the chip under test according to actual needs. This embodiment of the invention does not make specific limitations in this regard.

[0084] After the test items are determined, the control module sends the chip configuration information corresponding to the test items to the chip configuration module, and sends the switch selection information corresponding to the test items to the switch selection module, so that the chip configuration module and the switch selection module can set the test environment in the test circuit accordingly.

[0085] Step 604: Read the chip configuration information through the chip configuration module, and control the chip under test to output test information according to the chip configuration information.

[0086] Step 606: Read the load switch selection information through the switch selection module, and control the target load switch to close according to the load switch selection information.

[0087] In this embodiment of the invention, the switch selection module can read load switch selection information and channel switch selection information, and control the corresponding target load switch to close according to the load switch selection information, so that the target load and the output channel of the chip under test are connected. According to the channel switch selection information, it controls the channel selection switch to close, so that the output acquisition module can acquire information after the output channel is connected to the load. The specific operations performed by the switch selection module can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0088] Step 608: Receive the output information sent by the test circuit through the control module, and determine the first test result for the chip under test based on the output information and the target standard output information.

[0089] In this embodiment of the invention, the control module receives the output information transmitted by the test circuit (switch selection module) and determines whether the first test result of the chip under test is qualified or unqualified based on the output information and the standard output information. The specific operations performed by the control module can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0090] In one embodiment, such as Figure 7 As shown, the chip configuration information includes operating mode information. When the operating mode is impedance measurement mode, the test information is current, and the output information is impedance measurement information. In step 608, the control module receives the output information sent by the test circuit, including:

[0091] Step 702: The target test information is sent to the chip under test through the switch selection module. The target test information is the test information after passing through the target load.

[0092] Step 704: Read the impedance measurement results generated by the chip under test based on the target test information through the chip configuration module, and send the impedance measurement information to the control module based on the impedance measurement results.

[0093] Step 706: Receive impedance measurement information through the control module.

[0094] In this embodiment of the invention, the impedance measurement function of the chip under test can be tested using a stimulation chip detection system. The control module can select the target load to be measured and send switch selection information to the switch selection module, instructing the switch selection module to connect the target load and the chip under test into a loop. After the chip under test measures the magnitude of the target load, the chip configuration module reads the impedance measurement result of the chip under test and converts the impedance measurement result into impedance measurement information, which is then sent to the control module. The control module then determines whether the impedance measurement information measured by the chip under test is accurate based on the impedance measurement information and the magnitude of the target load. The specific operations performed by each module can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0095] In one embodiment, such as Figure 8 As shown, the chip configuration information includes operating mode information. When the operating mode is pulse output mode, the test information is a current pulse, and the output information is pulse output information. In step 608, the control module receives the output information sent by the test circuit, including:

[0096] Step 802: The target test information is sent to the output acquisition module through the switch selection module. The target test information is the test information after passing through the target load.

[0097] Step 804: Acquire the target pulse through the output acquisition module, convert the target pulse into digital signal pulse output information, and send the pulse output information to the control module.

[0098] Step 806: Receive pulse output information through the control module.

[0099] In this embodiment of the invention, the pulse output function of a chip under test can be tested using a stimulation chip detection system. The control module can select the pulses to be output by the chip under test and the target load to be connected, and send chip configuration information to the chip configuration module and switch selection information to the switch selection module, instructing the switch selection module to connect the target load and the output channel of the chip under test. After the chip under test outputs the corresponding pulses according to the chip configuration instructions, the output acquisition module acquires the current pulses output by the chip under test and converts the current pulses into pulse output information, which is then sent to the control module. The control module then determines whether the pulses output by the chip under test are qualified based on the pulse output information and the magnitude of the target load. The specific operations performed by each module can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0100] During pulse output function testing, multiple current pulses output by the chip under test can be continuously transmitted. This means the control module can continuously send various chip configuration and switch selection information to the chip configuration module and the switch selection module. (Refer to...) Figure 9 The image shows an example of a current pulse output by a chip under test that can be tested in an embodiment of the present invention.

[0101] Reference Figure 10 The diagram illustrates a process example for testing a chip under test according to an embodiment of the present invention. The chip under test has multiple output channels. Depending on the location of the chip application on different parts of the human body, switching an output channel allows connection to different loads. The chip configuration module configures one of the multiple output channels of the chip under test for test return current. The switch selection module controls the load switches in the load group to close, so that each output channel of the chip under test is connected to a load. The switch selection module closes the channel selection switch according to the channel switch selection information to connect the output channel used for test return current to the output acquisition module. The channel selection switches on the first line are closed sequentially (the channel selection switches on the first line connected to the output channel for test return current are not closed), allowing the output acquisition module to collect test information for each output channel connected to the same load one by one. Except for the output channel used for test return current, which is not tested, the test information for the remaining output channels is collected. Then, the load group is switched, so that each first line is switched to connect to the load of another load group. The channel selection switches on the first line are closed again, allowing the output acquisition module to collect test information for each output channel connected to different loads one by one. When testing the output channel used as a test return current, the chip configuration module controls the chip under test to change the output channel used as a test return current to a stimulus output. The corresponding channel selection switch on the first line is closed. Then, any other channel is changed to a test return current. Similarly, the corresponding channel selection switch on the second line is closed, sequentially switching the load connection from multiple load groups. The output acquisition module collects the test information. The output acquisition module converts the test information into output information and sends it to the control module. The control module determines the test result for the chip under test based on the output information and the target standard output information.

[0102] In one embodiment, such as Figure 11 As shown, the above method also includes:

[0103] Step 1102: Detect the power consumption information of the chip under test through the power supply module and send the power consumption information to the control module.

[0104] Step 1104: Receive power consumption information through the control module, and determine the second detection result of the chip to be tested based on the power consumption information and the standard power consumption information.

[0105] In this embodiment of the invention, a stimulation chip detection system can be used to perform power consumption testing on the chip under test. Power consumption testing can be divided into standby power consumption testing and operating power consumption testing. During standby power consumption testing, the control module can set the operating mode of the chip under test to standby mode through the chip configuration module. Simultaneously, the power supply module supplies power to the chip under test and collects the standby power consumption information, which is then sent to the control module. Operating power consumption testing can be performed together with pulse output function testing or impedance measurement function testing. During the above tests, the power supply module supplies power to the chip under test, collects the operating power consumption information, and then sends the operating power consumption information to the control module. (Refer to...) Figure 12 The diagram shown illustrates the overall process for standby power consumption and operating power consumption testing. The specific operations performed by each module can be found in the descriptions of the preceding embodiments; these will not be repeated here.

[0106] The output information includes the pulse amplitude. The standard output information includes the set value. There is a certain difference between the pulse amplitude and the set value. When the difference is within a reasonable range, it indicates that the chip is qualified; otherwise, it is unqualified.

[0107] In one embodiment, such as Figure 13 As shown, in step 608, based on the output information and the target standard output information, the first detection result for the chip to be tested is determined, including:

[0108] Step 1302: Determine the voltage difference between the pulse amplitude and the set value.

[0109] Step 1304: When the voltage difference is less than or equal to the voltage threshold, the first detection result is determined to be a qualified result; or,

[0110] Step 1306: When the voltage difference is greater than the voltage threshold, the first detection result is determined to be an unqualified result.

[0111] In this embodiment of the invention, a stimulation chip detection system can be used to test the operating voltage of the chip under test, that is, to detect whether the difference between the output voltage of the chip under test and a set value is qualified. The control module can instruct the chip configuration module, via chip configuration information, to set the pulse output amplitude of the chip under test to the same value as the set value, and instruct the switch selection module, via switch selection information, to close the channel selection switches on the two first lines and open all load switches. The output acquisition module acquires the current pulse output by the chip under test and sends the pulse output information to the control module. The control module detects the actual pulse amplitude of the chip under test and calculates the difference between the actual pulse amplitude and the set value as the voltage difference. In some embodiments, the set value can be set to be the same as the input voltage.

[0112] Alternatively, multiple rounds of operating voltage testing can be performed. When conducting multiple rounds of operating voltage testing, the initial pulse output amplitude is set to a preset value lower than the input voltage. When the actual pulse amplitude matches the preset value, the preset value is increased, and the next round of operating voltage testing is performed until the actual pulse amplitude differs from the preset value. At this point, the difference between the actual pulse amplitude and the input voltage is calculated as the voltage difference. See also... Figure 14 The diagram shown is a schematic of conducting multiple rounds of operating voltage tests.

[0113] Because the chip under test has a certain voltage margin, the pulse amplitude often differs from the input voltage, i.e., the voltage difference. An acceptable voltage difference range, i.e., a voltage threshold, can be preset. When the voltage difference is less than or equal to the voltage threshold, the first detection result is determined to be a qualified result; when the voltage difference is greater than the voltage threshold, the first detection result is determined to be a failed result.

[0114] The stimulation chip detection method provided in this invention can detect the voltage difference between the pulse output amplitude and the voltage threshold of the chip under test, and determine whether the detection result of the chip under test is qualified based on the voltage difference. Therefore, the working voltage test of the chip under test can be performed.

[0115] In one embodiment, such as Figure 15 As shown, the output information includes the pulse frequency, and the standard output information includes the standard operating frequency. In step 608, based on the output information and the target standard output information, the first detection result for the chip under test is determined, including:

[0116] Step 1502: Determine the frequency difference between the pulse frequency and the standard operating frequency.

[0117] Step 1504: When the frequency difference is less than or equal to the frequency threshold, the first detection result is determined to be a qualified result; or,

[0118] Step 1506: When the frequency difference is greater than the frequency threshold, the first detection result is determined to be an unqualified result.

[0119] In this embodiment of the invention, the operating frequency of the chip under test can be tested using a stimulation chip detection system. The control module can instruct the chip configuration module to set the operating mode of the chip under test to a high-frequency output mode via chip configuration information. This ensures that the frequency of the current pulses output by the chip under test is the same as the clock signal provided by the chip configuration module to the chip under test. The control module also instructs the switch selection module to close the channel selection switches of the two first lines via switch selection information, one as input and one as output, while all load switches are disconnected. The output acquisition module acquires the current pulses output by the chip under test and sends the pulse output information to the control module. The control module detects the actual pulse output frequency of the chip under test and determines the frequency difference between the actual pulse output frequency and the target pulse output frequency. An acceptable frequency difference range, i.e., a frequency threshold, can be preset. When the frequency difference is less than or equal to the frequency threshold, the first detection result is determined to be a qualified result; when the frequency difference is greater than the frequency threshold, the first detection result is determined to be a unqualified result.

[0120] The stimulation chip detection method provided in this embodiment of the invention can detect the frequency difference between the pulse output frequency of the chip under test and the standard operating frequency, and determine whether the detection result of the chip under test is qualified based on the frequency difference. Therefore, the operating frequency of the chip under test can be tested.

[0121] In one embodiment, such as Figure 16 As shown, the above method also includes:

[0122] Step 1602: Send temperature and humidity control information to the test chamber through the control module.

[0123] Step 1604: Receive temperature and humidity control information through the test chamber, and adjust the temperature inside the test chamber to the target temperature and humidity to the target humidity according to the temperature and humidity control information.

[0124] In this embodiment of the invention, the chip to be tested is placed in a test chamber. The control module sends temperature and humidity control information, motion control information, and load group switching information to the switch selection module. The test chamber adjusts the internal temperature of the test chamber to the temperature corresponding to the load group according to the change of the load group connected to the output channel of the chip under test, and adjusts the motion state of the chip in the test chamber to the motion state corresponding to the load group. As understood by those skilled in the art, the motion state may include vibration intensity, swing direction, and swing amplitude, thereby detecting the performance of the stimulation chip located at different parts of the human body in motion.

[0125] The system records the power consumption and output information of the chip under test under the current temperature, humidity, and motion conditions. This power consumption and output information are then compared with the normal output information of the chip under test to filter out chips whose power consumption and output information are unqualified under the current temperature, humidity, and motion conditions. The specific operations performed by each module can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0126] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0127] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this invention are all information and data authorized by the user or fully authorized by all parties.

[0128] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments described above. Any references to memory, databases, or other media used in the embodiments provided by this invention can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided by this invention may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided by this invention may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0129] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0130] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the appended claims.

Claims

1. A stimulation chip detection system, characterized in that, The device includes a control module and at least one test circuit. The test circuit includes a chip carrier board, a chip configuration module, a switch selection module, and an output acquisition module. The control module is connected to the chip configuration module, the switch selection module, and the output acquisition module, and is capable of sending chip configuration information to the chip configuration module and load switch selection information and channel switch selection information to the switch selection module. The switch selection module is located between the chip carrier and the output acquisition module. The switch selection module includes a channel selection circuit and a load selection circuit. The channel selection circuit includes multiple first lines for connecting to the output channels of the chip under test. The first lines are connected to second lines. The load selection circuit includes multiple load groups for simulating different parts of the human body. The load group includes multiple loads. In each load group, the output sides of multiple loads are connected in parallel, and the input sides of multiple loads are connected to multiple first lines one by one through load switches. The first lines are connected to the first connection terminal of the output acquisition module, and the second lines are respectively connected to the second connection terminal of the output acquisition module. The first lines and the second lines are respectively provided with channel selection switches. The chip configuration module controls the chip under test to output test information according to the chip configuration information, and configures one of the multiple output channels of the chip under test for test return flow; The switch selection module controls the load switches in the load group to close according to the load switch selection information, so that each output channel of the chip under test is connected to the load. According to the channel switch selection information, it closes the second line connected to the output channel that serves as the test return current, and sequentially closes the channel selection switches of the first lines corresponding to the remaining output channels, so that the output acquisition module can collect the test information of each output channel after it is connected to the same load. When testing the output channel used as a test return current, the chip configuration module controls the chip under test to change the output channel used as a test return current to a stimulus output and close the corresponding channel selection switch on the first line, change any other output channel to a test return current and close the corresponding channel selection switch on the second line, and sequentially switch the loads in multiple load groups to access the chip, so that the output acquisition module can acquire test information. Among them, the loads in the multiple load groups that are connected to the same output interface of the chip carrier board are connected in parallel to the corresponding first line. The load group includes parallel lines, which are used to connect the output sides of multiple loads in the group in parallel. The load selection circuit also includes a third line, which is connected in sequence to the parallel lines of multiple load groups. The third line between two adjacent parallel lines is provided with an on / off switch.

2. The system according to claim 1, characterized in that, The test information is current; The switch selection module sends target test information to the chip under test. The target test information is the test information after passing through the target load. The chip under test generates an impedance measurement result based on the target test information. The chip configuration module reads the impedance measurement result and sends impedance measurement information to the control module based on the impedance measurement result.

3. The system according to claim 1, characterized in that, The test circuit also includes a power supply module, which is electrically connected to the control module and the chip carrier board respectively. The power supply module is also equipped with a monitoring module for monitoring the power consumption information of the chip under test. The power supply module sends the power consumption information to the control module to detect the power consumption of the stimulation chip.

4. The system according to claim 1, characterized in that, The system also includes a test chamber, which is electrically connected to the control module, and the chip carrier is disposed inside the test chamber; The test chamber is equipped with a temperature control module and a humidity control module. The test chamber adjusts the internal temperature to the target temperature and / or adjusts the internal humidity to the target humidity according to the instructions issued by the control module.

5. The system according to claim 4, characterized in that, The test chamber also includes a motion module for simulating human motion states. The motion module is electrically connected to the control module, and the motion state of the motion module changes based on the output channel switching to connect to loads in different load groups.

6. A method for detecting a stimulation chip, characterized in that, The method, applied to the stimulation chip detection system according to any one of claims 1-5, comprises: The control module sends chip configuration information to the chip configuration module, and sends channel switch selection information and load switch selection information to the switch selection module. The chip configuration module controls the chip under test to output test information according to the chip configuration information, and configures one of the multiple output channels of the chip under test for test return current. The switch selection module controls the load switch in the load group to close according to the load switch selection information, so that the output channel of the chip under test is connected to the load. The switch selection module controls the output channel used as test return to be connected to the output acquisition module according to the channel switch selection information. The other output channels of the chip under test are connected to the output acquisition module respectively, so that the output acquisition module collects the test information of the output channel of the stimulation chip after it is connected to the load one by one. Then the load group is switched, and the other output channels of the chip under test are connected to the output acquisition module again, so that the output acquisition module collects the test information of the output channel of the stimulation chip after it is connected to different loads one by one. The control module receives the output information sent by the output acquisition module, and determines the detection result for the chip to be tested based on the output information and the target standard output information. The method further includes: When testing the output channel used as a test return current, the chip configuration module controls the chip under test to change the output channel used as a test return current to a stimulus output and close the corresponding channel selection switch on the first line; change any other output channel to a test return current and close the corresponding channel selection switch on the second line, and sequentially switch the load access in multiple load groups so that the output acquisition module can acquire test information. Among them, the loads in the multiple load groups that are connected to the same output interface of the chip carrier board are connected in parallel to the corresponding first line. The load group includes parallel lines, which are used to connect the output sides of multiple loads in the group in parallel. The load selection circuit also includes a third line, which is connected in sequence to the parallel lines of multiple load groups. The third line between two adjacent parallel lines is provided with an on / off switch.

7. The method according to claim 6, characterized in that, The chip configuration information includes operating mode information. When the operating mode information is impedance measurement mode, the test information is current, and the output information is impedance measurement information. The target test information is sent to the chip under test through the switch selection module. The target test information is the test information after passing through the target load. The chip configuration module reads the impedance measurement results generated by the chip under test based on the target test information, and sends the impedance measurement information to the control module based on the impedance measurement results. The impedance measurement information is received through the control module.

8. The method according to claim 6, characterized in that, The chip configuration information includes operating mode information. When the operating mode information is pulse output mode, the test information is a current pulse, and the output information is pulse output information. The target test information is sent to the output acquisition module through the switch selection module. The target test information is the test information after passing through the target load. The output acquisition module acquires the target pulse, converts the target pulse into digital signal pulse output information, and sends the pulse output information to the control module. The control module receives the pulse output information.

9. The method according to claim 6, characterized in that, The method further includes: The chip to be tested is placed in the test chamber, and the control module sends temperature and humidity control information, motion control information to the test chamber and load group switching information to the switch selection module. The test chamber adjusts the internal temperature of the test chamber to the temperature corresponding to the load group connected to the output channel of the chip under test, and adjusts the movement state of the chip in the test chamber to the movement state corresponding to the load group, so as to detect the output information of the stimulation chip located at different parts of the human body in motion.

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