A novel bonding-wire-free packaging structure and packaging method for silicon carbide devices

Abstract

This application relates to the field of semiconductor packaging technology, and solves the problems of parasitic inductance and poor heat dissipation in existing packaging technologies that use bonding wires as leads. It discloses a novel bonding wire-free packaging structure and method for silicon carbide devices, including a chip, a bottom copper foil, an adhesive sealing layer, high-temperature glass fiber, electrode copper pillars, peripheral copper pillars, a top copper foil, and epoxy resin. The top copper foil is patterned to form metal portions of different electrodes, each metal portion corresponding to the electrode at the location of the chip below. The high-temperature glass fiber above the metal portions of the different electrodes forms a first dot matrix at the electrode positions of the chip. This novel packaging structure eliminates bonding wires, replacing them with copper pillars, and is a fully embedded package, thereby achieving extremely low inductance and optimal thermal resistance, increasing the power density of the device, reducing power consumption, and significantly improving the overall heat dissipation effect.

Description

Technical Field

[0001] This application relates to the field of semiconductor packaging technology, and in particular to a novel bonding wire-free packaging structure and packaging method for silicon carbide devices. Background Technology

[0002] With the development of intelligence and efficiency, the demand for power devices is increasing. Traditional power device packaging methods suffer from problems such as large size, low power density, and high cost. Power device packaging is generally divided into two types: chip-level packaging and module-level packaging. Chip-level packaging directly encapsulates the power device chip on a conductive substrate and connects it to the package pins via gold wires. Module-level packaging encapsulates multiple power device chips, drive circuits, protection circuits, and other components together in a single housing and connects them to external circuits via pins. Specifically, this patent application focuses on the field of chip-level packaging.

[0003] Currently, chip-level packaging has become a mainstream development trend in power device packaging technology. At the same time, chip-level packaging is one of the important trends in the development of the semiconductor industry, driving the industry towards greater depth and breadth.

[0004] Despite the continuous development and widespread application of chip-level packaging technology for power devices over the past few decades, the advancement of semiconductor technology and the expansion of application scenarios have inevitably led to the miniaturization, multi-functionality, integration, and high power density of electronic products. This has resulted in continuously increasing device power density and operating temperatures, forcing devices to operate in harsh environments such as high temperatures for extended periods, severely impacting their lifespan and performance. Since power devices generate significant heat during operation, timely heat dissipation is crucial. Chip-level packaging needs to address the increasing demand for efficient thermal management while maintaining high chip performance, aiming to prevent thermal damage and reduced reliability of the system. Furthermore, traditional packaging technologies using bonding wires introduce parasitic inductance, which, with the increasing frequency of devices, leads to larger electric field spikes and energy losses.

[0005] Therefore, it is urgent to seek a new packaging technology that is easy to dissipate heat and has low parasitic inductance, suitable for miniaturization, high power density and other requirements. Summary of the Invention

[0006] The purpose of this application is to overcome the problems of parasitic inductance and poor heat dissipation in existing packaging technologies that use bonding wires as leads, and to provide a novel bonding wire-free packaging structure and packaging method for silicon carbide devices that are easy to dissipate heat and have low parasitic inductance, suitable for miniaturization, high power density and other requirements.

[0007] In a first aspect, a novel bonding wire-free packaging structure for silicon carbide devices is provided, comprising a bottom copper foil, several layers of high-temperature glass fibers above the bottom copper foil, a chip encapsulated in the middle of the lower high-temperature glass fibers, the chip being in contact with the bottom copper foil through an adhesive sealing layer, a top copper foil fixed to the top of the uppermost high-temperature glass fibers, the top copper foil being patterned to form metal portions of different electrodes, each metal portion corresponding to the electrode at the location of the chip below, the high-temperature glass fibers above the metal portions of the different electrodes forming a first dot matrix at the electrode position of the chip, electrode copper pillars being cast within the first dot matrix to make the metal portions of the top copper foil conductive with the electrodes of the chip, the high-temperature glass fibers forming a second dot matrix around the metal portions of the different electrodes, peripheral copper pillars being cast within the second dot matrix, and the overall structure consisting of the top copper foil, high-temperature glass fibers, and bottom copper foil being externally encapsulated with epoxy resin.

[0008] Furthermore, the adhesive sealing layer has a neatly arranged third dot matrix between the bottom copper foil and the chip, which allows the chip to dissipate heat through the bottom copper foil. The third dot matrix unit includes, but is not limited to, circles, and the dot matrix density is not unique.

[0009] Furthermore, the first, second, and third dot lattices are all formed by laser drilling. Due to the advantages of laser in focusing, the focal point can be as small as the submicron level, thus enabling high-precision drilling.

[0010] Furthermore, the aperture of the first dot matrix is ​​smaller than that of the second dot matrix. By setting a second dot matrix with a larger space, the cross-sectional area of ​​the outer copper pillars can be increased, which is beneficial to further increase the heat dissipation efficiency of the packaging structure.

[0011] Furthermore, the internal fiber strips of the high-temperature glass fiber are arranged in a crisscross pattern. The high-temperature glass fiber can play an excellent insulating role, and the crisscross arrangement can effectively increase the mechanical stress resistance of the encapsulation structure.

[0012] Furthermore, the upper end of the electrode copper pillar contacts the top copper foil, and the lower end of the electrode copper pillar contacts the motor of the chip, thus replacing the function of the bonding wire and electrically connecting the top copper foil to the chip.

[0013] Furthermore, the upper end of the peripheral copper pillar is in contact with the top copper foil, and the lower end of the peripheral copper pillar is in contact with the bottom copper foil, so that the heat inside the packaging structure can be effectively guided to the top and bottom copper foils through the peripheral copper pillar, thereby further increasing the heat dissipation efficiency of the packaging structure.

[0014] Secondly, a packaging method for a novel bonding wire-free packaging structure of silicon carbide devices is provided, including:

[0015] The chip is connected to the bottom copper foil using an adhesive sealing layer;

[0016] Multiple layers of the high-temperature glass fiber are stacked on top of the bottom copper foil and surround the chip;

[0017] A top copper foil is placed over the top of the high-temperature glass fiber;

[0018] The top copper foil is graphically divided into different metal portions for the required electrodes, with each metal portion corresponding to the electrode at the location of the chip below.

[0019] First and second lattices are formed in high-temperature glass fiber;

[0020] Electrode copper pillars and peripheral copper pillars are formed in the first and second lattices by casting.

[0021] The overall structure consisting of the top copper foil, high-temperature glass fiber, and bottom copper foil is encapsulated with epoxy resin.

[0022] Furthermore, the adhesive sealing layer has a neatly arranged third dot matrix.

[0023] Furthermore, the first dot matrix, the second dot matrix, and the third dot matrix are all formed by laser drilling.

[0024] This application has the following beneficial effects: the new packaging structure does not have bonding wires, but uses copper pillars instead, which is a fully embedded package, thereby achieving extremely low inductance and optimal thermal resistance, which increases the power density of the device and reduces power consumption, greatly improving the overall heat dissipation effect. Attached Figure Description

[0025] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments of this application and their descriptions are used to explain this application and do not constitute an undue limitation of this application.

[0026] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is an exploded view of the novel bonding wire-free packaging structure of the silicon carbide device according to Embodiment 1 of this application;

[0028] Figure 2 This is an exploded view of the chip, bottom copper foil, and adhesive sealing layer in the novel bonding wire-free packaging structure of the silicon carbide device according to Embodiment 1 of this application.

[0029] Figure 3 This is a schematic diagram of the outermost layer of epoxy resin in the novel bonding wire-free packaging structure of silicon carbide device according to Embodiment 1 of this application.

[0030] Figure 4 This is an exploded view of the bottom copper foil, chip, high-temperature glass fiber and top copper foil in the novel bonding wire-free packaging structure of the silicon carbide device of Embodiment 1 of this application;

[0031] Figure 5 This is a flowchart of the packaging method for the novel bonding wire-free packaging structure of silicon carbide devices according to Embodiment 2 of this application.

[0032] Figure label:

[0033] 1. Chip; 2. Bottom copper foil; 3. Adhesive sealing layer; 4. High-temperature glass fiber; 5. Electrode copper pillar; 6. Peripheral copper pillar; 7. Top copper foil; 8. Epoxy resin; 9. First matrix; 10. Second matrix; 11. Third matrix. Detailed Implementation

[0034] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0035] In the description of this application, it should be noted that the terms "upper," "lower," "inner," "outer," "top / bottom," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0036] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installed," "equipped with," "sleeved / connected," "connected," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0037] Example 1

[0038] The present application, in its embodiment 1, discloses a novel bonding wire-free packaging structure for silicon carbide devices, comprising:

[0039] Specifically, Figure 1 The present invention illustrates a novel bonding wire-free packaging structure for a silicon carbide device according to Embodiment 1 of the application, comprising: a chip 1, a bottom copper foil 2, an adhesive sealing layer 3, a high-temperature glass fiber 4, an electrode copper pillar 5, a peripheral copper pillar 6, a top copper foil 7, and an epoxy resin 8.

[0040] Please see Figure 2 First, the adhesive sealing layer 3 is used to connect the chip 1 to the bottom copper foil 2. The adhesive sealing layer 3 is perforated to present a neatly arranged third dot matrix 11. The unit pattern of the third dot matrix 11 includes, but is not limited to, circles, and can also be rectangles, ellipses, pentagons, etc. This design is beneficial for the chip 1 to dissipate heat through the bottom copper foil 2.

[0041] Please see Figure 3 Next, multiple layers of the high-temperature glass fiber 4 are stacked on top of the bottom copper foil 2 and surround the chip 1. The internal fiber strips of the high-temperature glass fiber 4 are arranged in a crisscross pattern, which can play an excellent insulating role on the one hand and increase the mechanical stress resistance of the device packaging on the other hand. The top of the chip 1 is covered by the high-temperature glass fiber 4, and the top copper foil 7 is then covered on top of the high-temperature glass fiber 4.

[0042] Please see Figure 4 After the top copper foil 7 is covered on the chip 1, the metal parts of the different electrodes required are separated by patterning. Each metal part corresponds to the electrode at the position of the chip 1 below, such as the gate, source, drain, etc. A first dot matrix 9 is formed at the position of the electrode of the chip 1 by means of laser drilling or the like above each metal part. A second dot matrix 10 is formed by drilling through the outermost periphery of each metal piece above the chip 1, passing through the periphery of the entire high-temperature glass fiber 4.

[0043] In this embodiment, the electrode copper pillars 5 and the peripheral copper pillars 6 are formed in the first dot matrix 9 and the second dot matrix 10 by means of casting or other methods. Specifically, the electrode copper pillars 5 are cast in the first dot matrix 9, and the peripheral copper pillars 6 are cast in the second dot matrix 10. The electrode copper pillars 5 contact the electrode of the chip 1 with the top copper foil 7, replacing the function of bonding wires for electrical connection. The thickness of the high-temperature glass fiber 4 that isolates the chip 1 and the top copper foil 7 is set to be relatively thin, which can make the height of the electrode copper pillars 5 smaller. The dotted arrangement of the electrode copper pillars 5 is equivalent to adding multiple bonding wires, increasing the relative surface area of ​​the current flow path, which is beneficial to reducing the resistance and parasitic inductance caused by packaging. In addition, the electrode copper pillars 5 are in contact with the large area of ​​the top copper foil 7, which is beneficial to heat dissipation. The presence of the peripheral copper pillars 6 makes the top copper foil 7 contact the bottom copper foil 2, which is beneficial to further heat dissipation and also to the integration of electrodes on the same plane.

[0044] As can be seen from the above embodiments, the novel packaging structure involved in this application does not have bonding wires and uses electrode copper pillars 5 as a substitute, and performs fully embedded packaging, which achieves extremely low inductance and optimal thermal resistance, thereby increasing the power density and reducing the power consumption of the device.

[0045] Example 2

[0046] Please see Figure 5 The packaging method for a novel bonding-wire-free packaging structure of silicon carbide devices, as described in Embodiment 2 of this application, includes:

[0047] S101. The chip 1 is connected to the bottom copper foil 2 using the adhesive sealing layer 3, wherein the adhesive sealing layer 3 has a neatly arranged third dot matrix 11.

[0048] S102. Stack multiple layers of the high-temperature glass fiber 4 on top of the bottom copper foil 2 and surround the chip 1;

[0049] S103, Cover the top copper foil 7 on the topmost part of the high-temperature glass fiber 4;

[0050] S104. The top copper foil 7 is graphically divided into metal parts of different electrodes as required, and the metal part of each part corresponds to the electrode at the position of the chip 1 below.

[0051] S105. A first dot matrix 9 and a second dot matrix 10 are formed in the high-temperature glass fiber 4. Specifically, a first dot matrix 9 is formed above the metal part of each part by means of laser drilling or the like at the electrode position of the chip 1. A second dot matrix 10 is formed by drilling through the outermost periphery of each piece of metal above the chip 1, passing through the entire periphery of the high-temperature glass fiber 4.

[0052] S106. Electrode copper pillars 5 and peripheral copper pillars 6 are formed in the first matrix 9 and the second matrix 10 by casting.

[0053] S107. An epoxy resin 8 is used to encapsulate the overall structure consisting of the top copper foil 7, the high-temperature glass fiber 4, and the bottom copper foil 2.

[0054] In a further embodiment, the first dot matrix 9, the second dot matrix 10, and the third dot matrix 11 are all formed by laser drilling. Due to the advantages of laser in focusing, the focal point can be as small as the submicron level, thereby enabling high-precision drilling.

[0055] As can be seen from the above embodiments, the novel packaging structure formed by the packaging method involved in this application does not have bonding wires, and uses electrode copper pillars 5 as a substitute to achieve fully embedded packaging, thereby obtaining extremely low inductance and optimal thermal resistance, which improves the power density and reduces the power consumption of the device.

[0056] The above are merely preferred embodiments of this application; however, the scope of protection of this application is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in this application, based on the technical solution and its improved concept, should be covered within the scope of protection of this application.

Claims

1. A novel bonding-wire-free packaging structure for silicon carbide devices, characterized in that, The structure includes a bottom copper foil, several layers of high-temperature glass fiber on top of the bottom copper foil, a chip encapsulated in the middle of the bottom high-temperature glass fiber, the chip being in contact with the bottom copper foil through an adhesive sealing layer, a top copper foil fixed to the top of the top high-temperature glass fiber, the top copper foil being patterned to form metal portions of different electrodes, each metal portion corresponding to the electrode at the position of the chip below, the high-temperature glass fiber above the metal portions of the different electrodes forming a first dot matrix at the electrode position of the chip, the first dot matrix containing cast electrode copper pillars to make the metal portion of the top copper foil conductive to the electrode of the chip, the high-temperature glass fiber forming a second dot matrix around the metal portions of the different electrodes, the second dot matrix containing cast peripheral copper pillars, the overall structure consisting of the top copper foil, high-temperature glass fiber and bottom copper foil being externally encapsulated with epoxy resin.

2. The novel bonding-wire-free packaging structure for silicon carbide devices according to claim 1, characterized in that, The adhesive sealing layer has a neatly arranged third dot matrix between the bottom copper foil and the chip.

3. The novel bonding-wire-free packaging structure for silicon carbide devices according to claim 2, characterized in that, The first, second, and third dot lattices are all formed by laser drilling.

4. The novel bonding-wire-free packaging structure for silicon carbide devices according to claim 1, characterized in that, The aperture of the first dot matrix is ​​smaller than the aperture of the second dot matrix.

5. The novel bonding-wire-free packaging structure for silicon carbide devices according to claim 1, characterized in that, The internal fiber strips of the high-temperature glass fiber are arranged in a crisscross pattern.

6. The novel bonding-wire-free packaging structure for silicon carbide devices according to claim 1, characterized in that, The upper end of the electrode copper pillar is in contact with the top copper foil, and the lower end of the electrode copper pillar is in contact with the motor of the chip.

7. The novel bonding-wire-free packaging structure for silicon carbide devices according to claim 1, characterized in that, The upper end of the outer copper pillar is in contact with the top copper foil, and the lower end of the outer copper pillar is in contact with the bottom copper foil.

8. A packaging method, characterized in that, A packaging method for a novel bonding-wire-free packaging structure for a silicon carbide device as described in any one of claims 1-7 includes: The chip is connected to the bottom copper foil using an adhesive sealing layer; Multiple layers of the high-temperature glass fiber are stacked on top of the bottom copper foil and surround the chip; A top copper foil is placed over the top of the high-temperature glass fiber; The top copper foil is graphically divided into different metal portions for the required electrodes, with each metal portion corresponding to the electrode at the location of the chip below. First and second lattices are formed in high-temperature glass fiber; Electrode copper pillars and peripheral copper pillars are formed in the first and second lattices by casting. The overall structure consisting of the top copper foil, high-temperature glass fiber, and bottom copper foil is encapsulated with epoxy resin.

9. The packaging method according to claim 8, characterized in that, The adhesive sealing layer has a neatly arranged third dot matrix.

10. The packaging method according to claim 9, characterized in that, The first dot matrix, the second dot matrix, and the third dot matrix are all formed by laser drilling.

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