A method for measuring defect density of gate recess etching
By measuring the gate groove etching defect density using the capacitance-voltage method and the equivalent conductivity method, the problem of the inability to quantitatively assess defect density in existing technologies is solved, thus optimizing the gate etching process, improving device performance, and reducing costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ZHEJIANG UNIV
- Filing Date
- 2023-05-22
- Publication Date
- 2026-06-19
AI Technical Summary
In existing technologies, the defect density after gate etching cannot be quantitatively assessed, leading to unstable device performance, long overall cycle time, and wasted resources.
The gate groove etching defect density was measured using the capacitance-voltage method and the equivalent conductivity method. By testing the capacitance-voltage curves and parallel conductance of the toroidal capacitor in different frequency ranges, the defect density was calculated, the gate etching process was optimized, and the damage repair effect was evaluated.
This enables quantitative assessment of gate etching defects, optimizes the process flow, improves device reliability, shortens the evaluation cycle, and reduces costs.
Smart Images
Figure CN116613145B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor technology and relates to a method for measuring the density of gate trench etching defects. Background Technology
[0002] GaN is the third generation of semiconductor material developed after germanium, silicon, and gallium arsenide. Due to its wide bandgap, low dielectric constant, and high electron saturation drift velocity, it has unique advantages in device manufacturing, which have played a significant role in the fields of radio frequency and microwave.
[0003] High electron mobility transistors (HEMTs) based on AlGaN / GaN heterojunctions possess advantages such as low on-resistance, high breakdown voltage, and high switching frequency, making them suitable as core devices in various power conversion systems and promising for energy conservation and emission reduction. During manufacturing, the contact characteristics of the Schottky gate are a decisive factor in the performance of AlGaN / GaN, gate leakage current is a major source of low-frequency noise, gate reverse breakdown determines the device's operating voltage and power capacity, and the stability of the gate process determines the device's thermal reliability.
[0004] The characteristics of a Schottky gate contact depend on the gate etching process and the metal system forming the metal-semiconductor contact. Gate etching typically employs inductively coupled plasma (ICP) dry etching, which involves ion bombardment and chemical reactions. Physical bombardment involves accelerated high-energy ions in the plasma bombarding the material; the bombardment intensity is related to the bias voltage. While physical bombardment is beneficial for anisotropic etching, continuous high-energy bombardment can introduce etching damage to the device surface. Gate etching damage affects critical device performance such as threshold voltage, leakage current, and breakdown voltage. Current technologies typically bombard the gate surface with N or O ions after ICP etching to remove surface defects, but this still suffers from drawbacks such as rough surface, high defect density, and poor device performance. Furthermore, there is a lack of quantitative description of defects generated in a single etching step; generally, the quality of gate etching needs to be evaluated by measuring the device's electrical performance after the process is completed, resulting in a long overall cycle and some resource waste.
[0005] Therefore, how to provide a method for measuring the gate groove etching defect density in order to quantitatively assess the defect density generated in the gate etching process, optimize the gate etching process, assess damage repair, and improve device reliability has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention
[0006] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for measuring the density of gate groove etching defects, which solves the problems of the inability to quantitatively evaluate the defects generated by gate etching and the effect of defect repair in the prior art.
[0007] To achieve the above and other related objectives, the present invention provides a method for measuring the density of etching defects in gate grooves, comprising the following steps:
[0008] Sample preparation steps: Provide a substrate, deposit a GaN layer and an AlGaN layer sequentially on the substrate, etch the AlGaN layer using a plasma method to form a gate trench, deposit metal in the gate trench to form a first electrode, deposit metal on the outside of the AlGaN layer to form a second electrode, and the first electrode, the second electrode and the AlGaN layer constitute a ring capacitor;
[0009] Measurement and calculation steps: In the frequency range of 10KHz to 1MHz, test the capacitance-voltage curve of the ring capacitor and obtain the defect density of the gate groove using the capacitance-voltage method; in the frequency range above 1MHz and below 10KHz, measure the parallel conductance of the ring capacitor and obtain the defect density of the gate groove using the equivalent conductance method.
[0010] Optionally, the first electrode has a circular structure, the second electrode has a ring structure, and the first electrode, the second electrode, and the AlGaN layer constitute a ring capacitor.
[0011] Optionally, the sample preparation step includes: etching the AlGaN layer using inductively coupled plasma method to form the gate groove, wherein the power range is 10-14W and the etching gas includes CF4.
[0012] Optionally, the sample preparation step includes: etching the AlGaN layer using inductively coupled plasma method to form the gate groove, wherein the power range is 15-24W, the etching gas includes CF4, and after forming the gate groove, immersing the sample in a tetramethylamino hydroxide solution with a temperature range of 70-80°C and a concentration range of 15-25% for a predetermined time.
[0013] Optionally, the sample preparation step includes: etching the AlGaN layer using inductively coupled plasma method to form the gate groove, wherein the power range is 25-30W, the etching gas includes CF4, and after forming the gate groove, heating the sample in a temperature range of 600-650°C for a predetermined time.
[0014] Optionally, the sample preparation step includes: etching the AlGaN layer using inductively coupled plasma method to form the gate groove, wherein the power range is 25-30W, the etching gas includes CF4, and after forming the gate groove, immersing the sample in a tetramethylamino hydroxide solution with a temperature range of 70-80°C and a concentration range of 15-25% for a predetermined time.
[0015] Optionally, the step of obtaining the gate groove defect density using the capacitance-voltage method includes:
[0016] Obtain the capacitance-voltage curve of the ring capacitor, where the horizontal axis represents the voltage value and the vertical axis represents the capacitance value;
[0017] Calculate the flat band voltage offset ΔV FB Wherein, the flat band voltage offset ΔV FB It is equal to the difference between the intersection of the tangent line drawn from the capacitance-voltage curve at the point of maximum slope obtained at 10 kHz and the intersection of the tangent line drawn from the capacitance-voltage curve at the point of maximum slope and the horizontal axis obtained at 1 MHz.
[0018] Calculate the defect density D it The defect density D it The calculation formula is:
[0019]
[0020] Among them, C ac The capacitance when the gate voltage is 0V, ΔV FB q represents the flat-band voltage offset, and q represents the electron charge.
[0021] Optionally, the step of obtaining the gate groove defect density using the equivalent conductivity method includes:
[0022] Obtain the parallel conductance G of the ring capacitor P ;
[0023] Calculate the defect density D it The defect density D it The calculation formula is:
[0024]
[0025] Among them, G p For parallel conductance, ω is the angular frequency, and q is the electron charge.
[0026] Optionally, the first electrode includes an Au / Ni layer, and the second electrode includes an Au / Ni layer.
[0027] Optionally, the first electrode and the AlGaN layer are in a Schottky contact, and the second electrode and the AlGaN layer are in an ohmic contact.
[0028] As described above, in the gate groove etching defect density measurement method of the present invention, the capacitance-voltage method and the equivalent conductivity method can be used to quantitatively evaluate defects with different time constants, which is beneficial to optimize the gate etching process and can also be used to evaluate damage repair to improve device reliability; moreover, the etching repair effect can be evaluated after a single etching step, shortening the cycle and reducing costs. Attached Figure Description
[0029] Figure 1 The diagram shows a flowchart of the method for measuring the density of etching defects in the gate grooves according to the present invention.
[0030] Figure 2 The image shown is a cross-sectional view of the sample used in this invention.
[0031] Figure 3 The image shown is a top view of the sample used in this invention.
[0032] Figure 4 The diagram shown is a schematic of the capacitance-voltage curve in this invention.
[0033] Figure 5 The diagram shown is an equivalent representation of the device in this invention.
[0034] Figure 6 The diagram shown is the equivalent circuit diagram of the device in this invention.
[0035] Figure 7 The diagram shows the capacitance-voltage curve of the first sample.
[0036] Figure 8 The diagram shows the capacitance-voltage curve of the second sample.
[0037] Figure 9 G, shown as the first sample p A graph showing the relationship between / ω and ω.
[0038] Figure 10 G shown as the second sample p A graph showing the relationship between / ω and ω.
[0039] Figure 11 The diagram shows the capacitance-voltage curve of the third sample.
[0040] Figure 12 The diagram shows the capacitance-voltage curve of the fourth sample.
[0041] Figure 13 G is shown for the third and fourth samples. p A graph showing the relationship between / ω and ω.
[0042] Figure 14 The diagram shows the capacitance-voltage curve of the fifth sample.
[0043] Figure 15 The diagram shows the capacitance-voltage curve of the sixth sample.
[0044] Figure 16 G is shown for samples five and six. p A graph showing the relationship between / ω and ω.
[0045] Component designation explanation
[0046] Steps S1 to S2
[0047] 1. Base
[0048] 2 GaN layer
[0049] 3 AlGaN layers
[0050] 4 First electrode
[0051] 5 Second electrode
[0052] Radius of R1, R2, R3 Detailed Implementation
[0053] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, unless otherwise specified, the following embodiments and features described therein can be combined with each other.
[0054] Please see Figures 1 to 16 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0055] The basic process flow of GaN HEMT is as follows: (1) forming a marking layer to mark the alignment for subsequent photolithography; (2) forming an ion implantation layer to form a low-temperature ohmic contact for subsequent processing; (3) forming an isolation layer to separate the device area from the non-device area; (4) forming an ohmic contact layer by etching the ohmic contact area and then depositing metal; (5) forming a gate trench by etching the gate trench and then depositing metal; (6) forming a field layer to improve the breakdown voltage and saturation current; (7) forming a metal layer and an air bridge to eliminate the vertical electric field at the gate and drain extremes; (8) back-channel processing, including bonding, thinning, back-side metal deposition, debonding, and cutting. This invention focuses on quantitatively describing the defects generated after the gate trench etching to optimize the gate etching process and evaluate the repair of defects after gate etching.
[0056] This embodiment provides a method for measuring the density of etching defects in gate grooves. Please refer to [link to relevant documentation]. Figure 1 The flowchart shown here illustrates the measurement method, which includes the following steps:
[0057] S1: Sample preparation step, providing a substrate, sequentially depositing a GaN layer and an AlGaN layer on the substrate, etching the AlGaN layer using plasma etching to form a gate trench, depositing metal in the gate trench to form a first electrode, depositing metal on the outside of the AlGaN layer to form a second electrode, the first electrode, the second electrode and the AlGaN layer constitute a ring capacitor;
[0058] S2: Measurement and calculation steps: In the frequency range of 10KHz to 1MHz, test the capacitance-voltage curve of the ring capacitor and obtain the defect density of the gate groove using the capacitance-voltage method; In the frequency range above 1MHz and below 1010KHz, measure the parallel conductance of the ring capacitor and obtain the defect density of the gate groove using the equivalent conductance method.
[0059] First, please refer to Figure 2 and Figure 3 Step S1: Provide a substrate 1, deposit a GaN layer 2 and an AlGaN layer 3 sequentially on the substrate 1, etch the AlGaN layer 3 using a plasma method to form a gate groove, deposit metal in the gate groove to form a first electrode 4, deposit metal on the outside of the AlGaN layer 3 to form a second electrode 5, and the first electrode 4, the second electrode 5 and the AlGaN layer 3 constitute a ring capacitor.
[0060] As an example, the first electrode 4 has a circular structure, the second electrode 5 has a ring structure, and the first electrode 4, the second electrode 5 and the AlGaN layer 3 constitute a ring capacitor.
[0061] As an example, the radius R1 of the first electrode 4 is 50 μm, the inner radius R2 of the second electrode 5 is 100 μm, and the outer radius R3 of the second electrode 5 is 200 μm.
[0062] As an example, the first electrode 4 and the second electrode 5 include an Au / Ni layer.
[0063] As an example, the first electrode 4 has a Schottky contact with the AlGaN layer 3, and the second electrode 5 has an ohmic contact with the AlGaN layer 3.
[0064] As an example, three sets of samples are prepared in this embodiment, each set including at least two samples to be tested. The first set of samples is prepared using low ICP power and includes a first sample and a second sample. The preparation method of the first sample includes: etching the AlGaN layer 3 with ICP to form the gate groove, the ICP power range is 10-14W, the etching gas is CF4, the gas flow rate is 50sccm, and the gas pressure in the etching chamber is 50mTorr. After forming the gate groove, the surface is bombarded with N ions to repair the defects caused by etching. The preparation method of the second sample includes: etching the AlGaN layer 3 with ICP to form the gate groove, the ICP power range is 10-14W, the etching gas is CF4, the gas flow rate is 50sccm, and the gas pressure in the etching chamber is 50mTorr. The second group of samples was prepared using medium ICP power, including the third and fourth samples. The preparation method of the third sample included: etching the AlGaN layer 3 with ICP to form the gate groove, with an ICP power range of 15-24W, using CF4 as the etching gas, a gas flow rate of 50 sccm, and an internal gas pressure of 50 mTorr. The preparation method of the fourth sample included: etching the AlGaN layer 3 with ICP to form the gate groove, with an ICP power range of 15-24W, using CF4 as the etching gas, a gas flow rate of 50 sccm, and an internal gas pressure of 50 mTorr. After forming the gate groove, the sample was immersed in a tetramethylaminohydroxide (TMAH) solution with a temperature range of 70-80℃ and a concentration range of 15-25% for a predetermined time of 5-10 minutes. After immersion, the sample was washed with pure water and dried with N-methylpyrrolidone (NMP). The third group of samples was prepared using high ICP power, including the fifth and sixth samples. The preparation method of the fifth sample included: etching the AlGaN layer 3 using ICP to form the gate groove, with an ICP power range of 25-30W, using CF4 as the etching gas, a gas flow rate of 50 sccm, and an internal gas pressure of 50 mTorr. After forming the gate groove, the sample was immersed in a tetramethylaminohydroxide (TMAH) solution with a temperature range of 70-80℃ and a concentration range of 15-25% for a predetermined time of 5-10 minutes. After immersion, the sample was rinsed with pure water and dried with N-methylpyrrolidone (NMP). The preparation method of the sixth sample included: etching the AlGaN layer 3 using ICP to form the gate groove, with an ICP power range of 25-30W, using CF4 as the etching gas, a gas flow rate of 50 sccm, and an internal gas pressure of 50 mTorr. After forming the gate groove, the sample was heated at a temperature range of 600-650℃ for 2-3 minutes.
[0065] Next, step S2 is performed: in the frequency range of 10KHz to 1MHz, the capacitance-voltage curve of the ring capacitor is tested, and the defect density of the gate groove is obtained by using the capacitance-voltage method; in the frequency range above 1MHz and below 1010KHz, the parallel conductance of the ring capacitor is measured, and the defect density of the gate groove is obtained by using the equivalent conductance method.
[0066] As an example, for defects in the frequency range of 10kHz to 1MHz, corresponding to time constants of 16µs to 0.15µs, the capacitance-voltage method can accurately measure the capacitance value. However, for defects with frequencies higher than 1MHz or lower than 10kHz, corresponding to time constants greater than 16µs and less than 0.15µs, the capacitance-voltage method cannot accurately measure the capacitance value, which will cause the capacitance-voltage method to fail. Therefore, for defects with frequencies higher than 1MHz or lower than 10kHz, the equivalent conductivity method is used to measure the defect density.
[0067] As an example, a method for obtaining the defect density of the gate groove using the capacitance-voltage method includes:
[0068] (1) Obtain the capacitance-voltage curve of the circular capacitor, where the horizontal axis represents the voltage value and the vertical axis represents the capacitance value, as shown below. Figure 4 The above is shown as a schematic diagram of the capacitance-voltage curve;
[0069] (2) Calculate the flat-band voltage offset ΔV FB ;
[0070] Specifically, the flat band voltage offset ΔV FB The flat-band voltage offset ΔV is the difference between the intersection of the tangent line drawn from the capacitance-voltage curve at its maximum slope (obtained at 10 kHz) and the intersection of the tangent line drawn from the capacitance-voltage curve at its maximum slope (obtained at 1 MHz) and the intersection of the tangent line drawn from the tangent line drawn from the capacitance-voltage curve at its maximum slope and the intersection of the tangent line with ... FB The larger the value, the greater the defect density.
[0071] (3) Calculate the defect density Dit, where the defect density D it The calculation formula is:
[0072]
[0073] Among them, C ac The capacitance is ΔV when the gate voltage (Vg) is 0V. FB Here, q represents the flat-band voltage offset, and q is the electron charge, q = 1.6 × 10⁻⁶. -19 .
[0074] As an example, a method for obtaining the defect density of the gate groove using the equivalent capacitance method includes:
[0075] (1) Obtain the parallel conductance GP of the ring capacitor;
[0076] Specifically, after etching the AlGaN layer 3 to form the gate trench, the resulting defect is equivalent to a resistance R. it and capacitor C it To represent the charge-discharge effect of gate leakage and electron trapping, the AlGaN layer 3 is equivalent to a capacitor C. AlGaN Please see Figure 5 The diagram is shown as an equivalent representation of the device; where the capacitance C... it and capacitor C AlGaN It can be equivalent to a parallel capacitor C P resistance R it It can be equivalent to parallel conductance G p Please see Figure 6 The diagram shows the equivalent circuit of the device, with parallel capacitor C. P and parallel conductance G p It can be measured directly.
[0077] (2) Calculate the defect density D it .
[0078] Specifically, in the single-trap energy level, based on the topological structure, we can deduce:
[0079]
[0080] Among them, G p For parallel conductance, ω is the angular frequency, and τ is the angular frequency. it Let ωτ be a time constant. it When G = 1, p When / ω reaches its maximum value, the formula for calculating the defect density Dit is:
[0081]
[0082] Among them, G p For parallel conductance, ω is the angular frequency, and q is the electron charge, q = 1.6 × 10⁻⁶. -19 .
[0083] For example, please refer to Figure 7 and Figure 8 The capacitance-voltage curves of the first and second samples are shown respectively. The defect density D of the first sample can be obtained by calculating its defect density from 10 kHz to 1 MHz. it =2.57E11 cm -2 ·eV -1 The defect density Dit of the second sample is 2.98E10 cm⁻¹. -2 ·eV -1 The second sample showed a 95.4% decrease in defect density compared to the first sample. Please refer to [link / reference]. Figure 9 and Figure 10 The G values for the first and second samples are shown respectively. p The graph showing the relationship between / ω and ω, where the vertical axis represents the normalized G. p The defect density D of the first sample can be obtained by calculating the defect density above 1MHz or below 10kHz using the / ω value. it =2.05E15cm -2 ·eV -1 The defect density Dit of the second sample is 9.38E12 cm⁻¹. -2 ·eV -1 The second sample showed a 99.5% decrease in defect density compared to the first sample. This indicates that in actual fabrication processes, low-bias ICP etching followed by N-ion treatment introduces more defects.
[0084] For example, please refer to Figure 11 and Figure 12 The capacitance-voltage curves of the third and fourth samples are shown respectively. The defect density D of the third sample can be obtained by calculating its defect density from 10 kHz to 1 MHz. it =1.64E11 cm -2 ·eV -1 The defect density Dit of the fourth sample is 7.70E10 cm⁻¹. -2 ·eV -1 The fourth sample showed a 95.4% decrease in defect density compared to the third sample. Please refer to [link / reference]. Figure 13 The G values for the third and fourth samples are shown. p The relationship between / ω and ω can be used to calculate the defect density D of the third sample, which is above 1MHz or below 10kHz. it =1.38E15 cm -2 ·eV -1 The defect density D of the fourth sample it =6.00E13cm -2 ·eV -1 The fourth sample showed a 95.7% decrease in defect density compared to the third sample. The results indicate that defect density increases with increasing etching power, and TMAH treatment can significantly reduce defects introduced by increased etching power.
[0085] For example, please refer to Figure 14 and Figure 15 The capacitance-voltage curves for the fifth and sixth samples are shown below. The defect density D of the fifth sample can be calculated from the 10kHz to 1MHz range. it =1.60E11 cm -2 ·eV -1 The defect density D of the sixth sampleit =1.05E11 cm -2 ·eV -1 The sixth sample showed a 34.4% decrease in defect density compared to the fifth sample. Please refer to [link / reference]. Figure 16 The G values for samples five and six are shown. p The relationship between / ω and ω can be used to calculate the defect density D of the fifth sample, which is above 1MHz or below 10kHz. it =9E13 cm -2 ·eV -1 The defect density D of the sixth sample it =4.25E13cm -2 ·eV -1 The sixth sample showed a 52.8% decrease in defect density compared to the fifth sample. The results indicate that both TMAH treatment and high-temperature treatment can repair defects introduced by increased etching power, with high-temperature treatment showing better repair performance than TMAH treatment.
[0086] In summary, the gate groove etching defect density measurement method of the present invention, employing the capacitance-voltage method and the equivalent conductivity method, can quantitatively evaluate defects with different time constants. This facilitates the optimization of the gate etching process, enables damage repair assessment to improve device reliability, and allows for evaluation of the etching repair effect after a single etching step, shortening the cycle and reducing costs. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.
[0087] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.
Claims
1. A method for measuring the density of etching defects in gate grooves, characterized in that, Includes the following steps: Sample preparation steps: Provide a substrate, deposit a GaN layer and an AlGaN layer sequentially on the substrate, etch the AlGaN layer using a plasma method to form a gate trench, deposit metal in the gate trench to form a first electrode, deposit metal on the outside of the AlGaN layer to form a second electrode, and the first electrode, the second electrode and the AlGaN layer constitute a ring capacitor; Measurement and calculation steps: In the frequency range of 10KHz to 1MHz, test the capacitance-voltage curve of the ring capacitor and obtain the defect density of the gate groove using the capacitance-voltage method; in the frequency range above 1MHz and below 10KHz, measure the parallel conductance of the ring capacitor and obtain the defect density of the gate groove using the equivalent conductance method.
2. The method for measuring the density of etching defects in the gate groove according to claim 1, characterized in that: The first electrode has a circular structure, and the second electrode has a ring structure. The first electrode, the second electrode, and the AlGaN layer together form a ring capacitor.
3. The method for measuring the density of etching defects in the gate groove according to claim 1, characterized in that, The sample preparation steps include: etching the AlGaN layer using inductively coupled plasma method to form the gate groove, wherein the power range is 10-14W and the etching gas includes CF4.
4. The method for measuring the density of etching defects in the gate groove according to claim 1, characterized in that, The sample preparation steps include: etching the AlGaN layer using inductively coupled plasma method to form the gate groove, wherein the power range is 15-24W, the etching gas includes CF4, and after forming the gate groove, immersing the sample in a tetramethylamino hydroxide solution with a temperature range of 70-80℃ and a concentration range of 15-25% for a predetermined time.
5. The method for measuring the density of etching defects in the gate groove according to claim 1, characterized in that, The sample preparation steps include: etching the AlGaN layer using inductively coupled plasma method to form the gate groove, wherein the power range is 25-30W, the etching gas includes CF4, and after forming the gate groove, heating the sample in the temperature range of 600-650℃ for a predetermined time.
6. The method for measuring the density of etching defects in the gate groove according to claim 1, characterized in that, The sample preparation steps include: etching the AlGaN layer using inductively coupled plasma method to form the gate groove, wherein the power range is 25-30W, the etching gas includes CF4, and after forming the gate groove, immersing the sample in a tetramethylamino hydroxide solution with a temperature range of 70-80℃ and a concentration range of 15-25% for a predetermined time.
7. The method for measuring the density of etching defects in the gate groove according to claim 1, characterized in that, The step of obtaining the gate groove defect density using the capacitance-voltage method includes: Obtain the capacitance-voltage curve of the ring capacitor, where the horizontal axis represents the voltage value and the vertical axis represents the capacitance value; Calculate the flat band voltage offset ΔV FB Wherein, the flat band voltage offset ΔV FB It is equal to the difference between the intersection of the tangent line drawn from the capacitance-voltage curve at the point of maximum slope obtained at 10 kHz and the intersection of the tangent line drawn from the capacitance-voltage curve at the point of maximum slope and the horizontal axis obtained at 1 MHz. Calculate the defect density D it The defect density D it The calculation formula is: Among them, C ac The capacitance when the gate voltage is 0V, ΔV FB q represents the flat-band voltage offset, and q represents the electron charge.
8. The method for measuring the density of etching defects in the gate groove according to claim 1, characterized in that, The step of obtaining the gate groove defect density using the equivalent conductivity method includes: Obtain the parallel conductance G of the ring capacitor P ; Calculate the defect density D it The defect density D it The calculation formula is: Among them, G p For parallel conductance, ω is the angular frequency, and q is the electron charge.
9. The method for measuring the density of etching defects in the gate groove according to claim 1, characterized in that: The first electrode includes an Au / Ni layer, and the second electrode includes an Au / Ni layer.
10. The method for measuring the density of etching defects in the gate groove according to claim 1, characterized in that: The first electrode has a Schottky contact with the AlGaN layer, and the second electrode has an ohmic contact with the AlGaN layer.