Mini LED light-emitting device fan-out packaging structure and preparation method

Abstract

The application discloses a micro LED light-emitting device fan-out packaging structure and a preparation method, and relates to the technical field of semiconductor packaging. The micro LED light-emitting device fan-out packaging structure can be compatible with fan-out packaging of vertical structure chips, normal structure chips and flip structure chips, and comprises at least one device unit, the device unit comprises at least one LED chip, and at least one of the LED chips is a vertical structure chip; a first packaging layer, the first packaging layer is wrapped on the side surface of the LED chip and exposes the light-emitting surface and the electrode of the LED chip, so that the LED chip is embedded in the first packaging layer; a via, the via is a complete via after metallization or a partial via after cutting of the complete via; a double-sided circuit layer, the double-sided circuit layer comprises a light-emitting surface circuit and a bottom surface circuit, the light-emitting surface side of the first packaging layer is provided with a metallized circuit to form the light-emitting surface circuit, and the bottom surface side opposite to the light-emitting surface of the first packaging layer is provided with a metallized circuit to form the bottom surface circuit; an optical packaging layer; and a solder mask protection layer.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and particularly to a fan-out packaging structure for a micro LED light-emitting device, as well as a method for preparing the fan-out packaging structure for a micro LED light-emitting device. Background Technology

[0002] With the continuous development of display technology, in order to meet the display requirements of high resolution, high contrast, high dynamic range, and wide color gamut, the size of LED chips is approaching the Mini / Micro level. Traditional LED chip packaging technologies, such as leaded packaging and COB packaging, are clearly unable to meet the packaging requirements of Mini / Micro LEDs. Therefore, fan-out wafer-level packaging has attracted attention due to its advantages such as not requiring a packaging substrate (only a temporary substrate), not requiring wire bonding, wafer bumping and underfill processes, low cost, better electrical interconnect and heat dissipation performance, and smaller package size. Introducing fan-out packaging into LED devices can significantly reduce production costs while improving device performance; however, current fan-out packaging of LED chips still has some drawbacks.

[0003] With the miniaturization of display devices, vertical-structure chips have shown enormous development potential, while upright and flip-chip chips will continue to enjoy significant market demand for some time to come due to their advantages in cost and manufacturing difficulty. In LED chip fan-out packaging, packaging methods are mainly proposed for flip-chip or upright chip structures; no universally applicable fan-out packaging method has been developed for vertical, upright, and flip-chip chips. Currently, these three chip structures are widely used in the display field due to their respective advantages, and current packaging methods cannot simultaneously package multiple chip structures, failing to meet market demands. Summary of the Invention

[0004] The present invention aims to at least partially solve one of the aforementioned technical problems in the prior art. To this end, embodiments of the present invention provide a fan-out packaging structure for a micro LED light-emitting device, compatible with fan-out packaging of vertical, upright, and flip-chip chips.

[0005] This invention also provides a method for preparing a fan-out packaging structure for a micro LED light-emitting device.

[0006] According to an embodiment of a first aspect of the present invention, a fan-out packaging structure for a micro LED light-emitting device is provided, comprising at least one device unit, the device unit including at least one LED chip, the LED chip having a light-emitting surface, a light-emitting bottom surface, and multiple side surfaces, at least one of the LED chips being a vertical structure chip; a first encapsulation layer, the first encapsulation layer covering the side surfaces of the LED chip and exposing the light-emitting surface and electrodes of the LED chip, thereby embedding the LED chip in the first encapsulation layer, the upper and lower surfaces of the first encapsulation layer being flush with the light-emitting surface and the light-emitting bottom surface of the LED chip, respectively; a via, the via being a metallized complete via or a partial via cut from a complete via; the via being disposed on the first encapsulation layer, disposed in an internal position or an edge position; and a double-sided circuit layer, the double-sided... The circuit layer includes a light-emitting surface circuit and a bottom surface circuit. The light-emitting surface side of the first encapsulation layer has metallized circuits to form the light-emitting surface circuit, and the light-emitting opposite bottom surface side of the first encapsulation layer has metallized circuits to form the bottom surface circuit. The light-emitting surface electrode of the vertical structure chip is connected to the light-emitting surface circuit and led to the light-emitting opposite bottom surface through the metallized via. The bottom surface electrode of the other LED chips with the same polarity as the light-emitting surface electrode is connected to the first pad. The bottom surface electrode of the vertical structure chip and the bottom surface electrode of the other LED chips with the opposite polarity to the light-emitting surface electrode are respectively connected to the second pad through the bottom surface circuit. An optical encapsulation layer is formed on the surface of the light-emitting surface circuit. A solder resist layer is formed on the surface of the non-pad area of ​​the bottom surface circuit.

[0007] The aforementioned fan-out packaging structure for micro LED light-emitting devices offers at least the following advantages: Based on a double-sided circuit layer, the light-emitting electrode of the vertical structure chip is connected to the light-emitting circuitry and led to the opposite bottom surface through metallized vias. This bottom surface electrode, sharing the same polarity as the light-emitting electrode of the horizontal structure chip, is connected to a first pad. The bottom surface electrode of the vertical structure chip and the bottom surface electrode of the horizontal structure chip, with opposite polarities, are respectively connected to a second pad through bottom surface circuitry. The horizontal structure chip can be a conventional or flip-chip chip. This fan-out packaging structure is compatible with vertical, conventional, and flip-chip packaging. With the miniaturization of chip dimensions, vertical structure chips represent the future development direction of the display field and are beginning to be applied in red LED chips. Conventional and flip-chip chips will still have a significant market share in the future due to their cost advantages. The fan-out packaging structure of this invention can package these types of chips.

[0008] According to an embodiment of the first aspect of the present invention, the architecture of the remaining LED chips is a horizontal structure chip, wherein the positive and negative electrodes of the horizontal structure chip are both located on the bottom surface of the device unit.

[0009] According to an embodiment of the first aspect of the present invention, there are at least two device units, all of which are arranged together. Adjacent device units share a single via. A complete via is disposed at the intersection of adjacent device units. A partial via formed by cutting the complete via is the via of the device unit. This technical solution allows each device unit to be electrically connected using only a portion of the via cut from a complete via. This reduces pixel pitch and significantly decreases the number of vias, lowering the device packaging cost. It also helps to reduce the size of the packaged device, increase the pixel density of the display device, and thus improve the display effect.

[0010] According to an embodiment of a second aspect of the present invention, a method for fabricating a fan-out packaging structure for a micro LED light-emitting device is provided, for fabricating the fan-out packaging structure for a micro LED light-emitting device as described in the first aspect of the present invention, comprising the following steps:

[0011] S1, at least one LED chip is placed on a support substrate, and the LED chip is covered with encapsulation material to form a first encapsulation layer. The light-emitting surface of the LED chip is exposed by mechanical processing, composite processing or special processing, so that the light-emitting surface of the LED chip and the surface of the first encapsulation layer are on the same plane.

[0012] S2, a photoresist layer is coated on the upper surface of the first encapsulation layer, and a light-emitting surface line is etched on the photoresist layer; vias are prepared in the chip-free area or edge position of the first encapsulation layer; the light-emitting surface line has an overlapping or connected area with the light-emitting surface electrode of the LED chip and the via;

[0013] S3, the structure of the light-emitting surface line and the via is metallized, and the light-emitting surface line is electrically connected through the metallized via;

[0014] S4, an optical encapsulation layer is prepared on the surface of the light-emitting surface line;

[0015] S5, separate the support substrate from the first encapsulation layer, and flip the LED device so that the bottom surface of the LED chip is facing up and transferred to another support substrate;

[0016] S6, Prepare a bottom surface circuit including pads on the light-emitting bottom surface and metallize it, wherein the bottom surface circuit has an overlapping or connected area with the bottom surface electrode and pads of the LED chip.

[0017] S7, the solder resist protective layer is prepared on the surface of the non-pad area of ​​the bottom circuit.

[0018] The above-mentioned method for fabricating a fan-out packaging structure for micro LED light-emitting devices has at least the following beneficial effects: By using a fan-out packaging method based on double-sided circuitry, light-emitting surface circuitry and bottom surface circuitry located on the two end faces of the first packaging layer can be fabricated. The light-emitting surface electrode of the vertical structure chip is connected to the light-emitting surface circuitry and led to the bottom surface opposite to the light-emitting surface through metallized vias. The bottom surface electrode of the horizontal structure chip, which has the same polarity as the light-emitting surface electrode, is connected to the first pad. The bottom surface electrode of the vertical structure chip and the bottom surface electrode of the horizontal structure chip, which has the opposite polarity to the light-emitting surface electrode, are respectively connected to the second pads one-to-one through the bottom surface circuitry. This method for fabricating a fan-out packaging structure can fabricate a fan-out packaging structure compatible with vertical structure chips, upright structure chips, and flip-chip chips.

[0019] According to an embodiment of the second aspect of the present invention, the device unit is at least two, and the method further includes step S8, which involves cutting the device unit according to the cutting marks using a dicing machine to prepare an independent device unit.

[0020] According to an embodiment of the second aspect of the present invention, in step S2, the position of the via is selected according to the structural arrangement of the device unit, the position detection system identifies the position of the electrode on the bottom surface of the LED chip, the computer determines the edge according to the positional relationship between each LED chip and between each device unit and automatically plans the drilling path, the drilling preparation method includes one of mechanical drilling or laser drilling, and the mechanical drilling equipment or laser drilling equipment prepares the via according to the drilling path.

[0021] According to an embodiment of the second aspect of the present invention, in step S7, the solder resist protective layer is located in the non-pad area of ​​the bottom surface circuit, and the bottom surface circuit outside the exposed non-pad area serves as a pad; the material of the solder resist protective layer is a liquid photosensitive solder resist coating or a dry photosensitive solder resist protective film, and the preparation method is one of the following: adhesive method, screen printing method, spraying method, tape coating method, and stencil coating method.

[0022] According to an embodiment of the second aspect of the present invention, in step S1, the material of the first encapsulation layer includes one or more of epoxy molding compound, silicone, polyimide, ceramic, and metal materials; the encapsulation method includes one or more of transfer molding, vacuum film pressing, spin coating, injection molding, and blade coating.

[0023] According to an embodiment of the second aspect of the present invention, in step S2, the via is a through hole penetrating the first encapsulation layer; in step S4, the optical encapsulation layer is a single-layer or multi-layer structure.

[0024] According to an embodiment of a third aspect of the present invention, a method for fabricating a fan-out packaging structure for a micro LED light-emitting device is provided, for fabricating the fan-out packaging structure for a micro LED light-emitting device as described in the first aspect of the present invention, characterized by comprising the following steps:

[0025] S1, at least one LED chip is placed on a support substrate, and the LED chip is covered with encapsulation material to form a first encapsulation layer. The light-emitting surface of the LED chip is exposed by mechanical processing, composite processing or special processing, so that the light-emitting surface of the LED chip and the surface of the first encapsulation layer are on the same plane.

[0026] S2, prepare vias in the chip-free area or edge position of the first encapsulation layer;

[0027] S3, peel off the temporary release layer of the first encapsulation layer of the embedded LED chip, and fix it to the glass substrate with a layer of laser-cured conductive medium on the surface using double-sided adhesive tape. The double-sided adhesive tape is attached around the glass substrate, and the thickness of the double-sided adhesive tape itself creates a gap between the glass substrate and the first encapsulation layer. The gap is filled with laser-cured conductive medium.

[0028] S4, a photoresist layer is uniformly coated on the surface of the first encapsulation layer and on the exposed chip electrodes. Machine vision is used to identify and locate the position of the electrodes on the upper surface of the chip. According to the identification result, two opposing laser generators are turned on simultaneously. One laser emitter is incident from the upper surface of the first encapsulation layer, and the other laser emitter is incident from the lower surface of the glass substrate. The laser is scanned according to the line adjusted after the chip electrode position is identified. The laser incident from the upper surface of the first encapsulation layer is used to expose the photoresist layer, forming the light surface line and the bottom surface line on the photoresist layer.

[0029] S5, the laser exposure area on the upper surface of the first encapsulation layer and the interior of the via are metallized to achieve electrical connection between the light-emitting electrode of the LED chip and the via and the pad, and then the excess photoresist is removed;

[0030] S6, an optical encapsulation layer is prepared on the surface of the light-emitting surface line;

[0031] S7. Peel the molding layer off the glass substrate, remove excess laser-cured conductive medium, and flip the LED device so that the optical encapsulation layer surface is facing down on a flat work platform.

[0032] S8, the solder resist layer is prepared on the surface of the non-pad area of ​​the bottom circuit.

[0033] The above-mentioned method for fabricating the fan-out packaging structure of micro LED light-emitting devices has at least the following beneficial effects: the simultaneous fabrication of the light-emitting surface circuit and the bottom surface circuit is achieved by using the double-sided laser direct writing method, which can further improve production efficiency. Attached Figure Description

[0034] The present invention will be further described below with reference to the accompanying drawings and embodiments;

[0035] Figure 1 This is a cross-sectional view of the supporting substrate in an embodiment of the present invention;

[0036] Figure 2 This is a cross-sectional view of the releasable adhesive layer fixed on the support substrate in an embodiment of the present invention;

[0037] Figure 3 This is a cross-sectional view of the LED chips arranged in an array with their light-emitting surfaces facing downwards on a releasable adhesive layer in an embodiment of the present invention.

[0038] Figure 4 This is a cross-sectional view of the LED chip after the first encapsulation layer has covered it in an embodiment of the present invention;

[0039] Figure 5 This is a cross-sectional view of the light-emitting surface of the LED chip in an embodiment of the present invention;

[0040] Figure 6 This is a top view of a pattern of smooth lines etched in a photoresist layer in an embodiment of the present invention;

[0041] Figure 7 This is a top view of the pattern of the light-emitting surface circuit of the via prepared in an embodiment of the present invention;

[0042] Figure 8 This is a cross-sectional view of the LED chip after an optical encapsulation layer has been prepared on the light-emitting surface in an embodiment of the present invention;

[0043] Figure 9 This is a cross-sectional view of an embodiment of the present invention, wherein the optical encapsulation layer is placed with its surface facing downwards;

[0044] Figure 10 This is a top view of one side of the bottom surface of an embodiment of the present invention, wherein the photoresist layer on the optical packaging layer is etched to form the bottom surface circuitry;

[0045] Figure 11 This is a cross-sectional view of the bottom surface after a solder resist protective layer has been prepared according to an embodiment of the present invention;

[0046] Figure 12 This is a top view of an embodiment of the present invention, wherein cutting lines are marked.

[0047] Figure 13 This is a top view of a single device unit formed after cutting in an embodiment of the present invention. Detailed Implementation

[0048] This section will describe in detail specific embodiments of the present invention. Preferred embodiments of the present invention are shown in the accompanying drawings. The purpose of the drawings is to supplement the textual description with graphics, so that people can intuitively and vividly understand each technical feature and overall technical solution of the present invention, but they should not be construed as limiting the scope of protection of the present invention.

[0049] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., are based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0050] In the description of this invention, "several" means one or more, "more than" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0051] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0052] Example 1

[0053] The following reference Figures 1 to 13 A fan-out packaging structure for a micro LED light-emitting device is presented, including at least one device unit 100. (Refer to...) Figure 12 The micro LED light-emitting device fan-out package structure includes four device units 100, which are cut into four independent device units 100 according to the cutting lines in the figure.

[0054] The device unit 100 includes at least one LED chip 110, a first encapsulation layer 121, a via 122, a double-sided circuit layer, an optical encapsulation layer 123, and a solder resist layer 124.

[0055] LED chip 110 has a light-emitting surface, a light-emitting bottom surface, and multiple side surfaces, at least one of the LED chips 110 being a vertical structure chip 112. Furthermore, the remaining LED chips 110 are configured as horizontal structure chips 111, with both the positive and negative electrodes of the horizontal structure chip 111 located on the bottom surface of the device unit 100. The bottom surface of the device unit 100 can be referenced... Figure 11 The directions shown are for illustrative purposes. Specifically, in the LED chip 110, if the chip architecture is a vertical structure, both the light-emitting surface and the bottom surface opposite to the light-emitting surface of the LED chip 110 have electrodes; if the chip architecture is a standard structure, both electrodes of the LED chip 110 are located on one side of the light-emitting surface; if the chip architecture is a flip-chip structure, both electrodes of the LED chip 110 are located on one side of the bottom surface opposite to the light-emitting surface. In this embodiment, one each of red, green, and blue LED light-emitting chips is used to form the device unit 100. The red light chip uses a vertical structure chip, while the green and blue light chips use flip-chip chips.

[0056] like Figure 9 As shown, the first encapsulation layer 121 covers the side of the LED chip and exposes the light-emitting surface and electrodes of the LED chip, thereby embedding the LED chip 110 in the first encapsulation layer 121. The upper and lower surfaces of the first encapsulation layer 121 are flush with the light-emitting surface and the bottom surface of the light-emitting surface of the LED chip 110, respectively.

[0057] For reference Figure 10 Via 122 is a fully metallized via or a partial via after cutting a fully metallized via.

[0058] The double-sided circuit layer includes a light-emitting surface circuit 131 and a bottom surface circuit 132. The light-emitting surface side of the first encapsulation layer 121 has metallized circuits to form the light-emitting surface circuit 131, and the light-emitting side of the first encapsulation layer 121 has metallized circuits to form the bottom surface circuit 132. The light-emitting surface electrode of the vertical structure chip 112 is connected to the light-emitting surface circuit and led to the light-emitting bottom surface through the metallized via 122. The bottom surface electrode of the other LED chips 110, which has the same polarity as the light-emitting surface electrode, is connected to the first pad. The bottom surface electrode of the vertical structure chip 112 and the bottom surface electrode of the other LED chips 110, which has the opposite polarity to the light-emitting surface electrode, are respectively connected to the second pad through the bottom surface circuit 132.

[0059] An optical encapsulation layer 123 is fabricated on the surface of the light-emitting surface circuit 131. A solder resist layer 124 is fabricated on the surface of the non-pad area of ​​the bottom surface circuit 132.

[0060] Understandably, in a fan-out package based on a double-sided circuit layer, the light-emitting electrode of the vertical structure chip 112 is connected to the light-emitting circuit 131 and led to the bottom surface opposite to the light-emitting surface through a metallized via 122. It can be connected to the first pad with the bottom electrode of the lateral structure chip that has the same polarity as the light-emitting electrode. The bottom electrode of the vertical structure chip and the bottom electrode of the lateral structure chip that has the opposite polarity to the light-emitting electrode are respectively connected to the second pad through the bottom circuit 132. The lateral structure chip can be a conventional structure chip or a flip-chip chip. This fan-out package structure is compatible with the packaging of vertical structure chips, conventional structure chips and flip-chip chips.

[0061] Reference Figure 12 The micro LED light-emitting device fan-out package structure includes four device units 100, which are cut into four independent device units 100 according to the cutting lines in the figure.

[0062] There are at least two device units 100, and each device unit 100 is arranged together. Adjacent device units 100 share a via 122. A complete via is located at the intersection of adjacent device units 100. A partial via formed by cutting the complete via is the via 122 of device unit 100. In this embodiment, the fan-out packaging structure of the micro LED light-emitting device includes four device units 100. Relative to the fan-out packaging structure of the micro LED light-emitting device, the via is a metallized complete via; relative to device unit 100, the via is a partial via formed by cutting the complete via. The via 122 is located on the first encapsulation layer 121, either internally or at the edge. Relative to the fan-out packaging structure of the micro LED light-emitting device, the via 122 is located internally in the first encapsulation layer 121; relative to device unit 100, it is located at the edge of the first encapsulation layer 121. Of course, in other embodiments, the position of the via can be adjusted adaptively. In this embodiment, only one via is needed, and after cutting the fan-out packaging structure of the micro LED light-emitting device, four device units 100 are formed, while each individual device unit 100 still has a via structure.

[0063] In LED fan-out packaging, current packaging structures use a method of packaging one device unit 100 with one device, failing to propose a packaging structure that can simultaneously package multiple device units 100, thus hindering further miniaturization of pixel pitch. In this embodiment of the invention, each device unit 100 uses only a portion of a via cut from a complete via for electrical connection, which can reduce pixel pitch and significantly reduce the number of vias, lowering the packaging cost of the device. This facilitates reducing the size of the packaged device, increasing the pixel density of the display device, and ultimately improving the display effect.

[0064] The following reference Figures 1 to 13A method for fabricating a fan-out packaging structure for a micro LED light-emitting device is presented, comprising the following steps:

[0065] S1, at least one LED chip 110 is disposed on the support substrate 201, and the LED chip 110 is covered with encapsulation material to form a first encapsulation layer 121. The light-emitting surface of the LED chip 110 is exposed by mechanical processing, composite processing or special processing, so that the light-emitting surface of the LED chip 110 and the surface of the first encapsulation layer 121 are on the same plane.

[0066] Specifically, refer to Figure 1 As shown, a support substrate 201 is provided, which is one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate.

[0067] Reference Figure 2 As shown, a releasable adhesive layer 202 is provided, which is mainly used to temporarily fix the LED chip on the support substrate 201. Subsequently, the releasable adhesive layer 202 can lose its adhesiveness through thermal separation technology or light separation technology, so that the first encapsulation layer 121 with embedded LED chip can be separated from the support substrate 201. The releasable adhesive layer is one of light release film and thermal release film.

[0068] Reference Figure 3 As shown, the LED chips 110 are arranged in an array on the releasable adhesive layer 202 with the light-emitting side facing down.

[0069] Reference Figure 4 As shown, LED chips 110, arrayed and fixed on a releasable adhesive layer 202, are encapsulated to form a first encapsulation layer 121. The first encapsulation layer covers the four sides of the LED chips and the top surface facing away from the support substrate 201. Specifically, the material of the first encapsulation layer includes one or more of epoxy molding compound, silicone, polyimide, ceramic, and metal materials; the encapsulation method includes one or more of transfer molding, vacuum film pressing, spin coating, injection molding, and blade coating. In this embodiment, epoxy molding compound is encapsulated using a transfer molding method, which is highly efficient, low-cost, and easily yields a first encapsulation layer with controllable size and a smooth surface.

[0070] Reference Figure 5 As shown, for the LED chip covered by the first encapsulation layer 121, this embodiment uses chemical mechanical polishing or laser decapsulation to thin the upper surface of the first encapsulation layer until the upper surface of the first encapsulation layer is flush with the light-emitting surface of the LED.

[0071] S2, a photoresist layer is coated on the upper surface of the first encapsulation layer 121, and a light-emitting surface line 131 is etched on the photoresist layer; vias are prepared in the chip-free area or edge position of the first encapsulation layer 121; the light-emitting surface line 131 has an overlapping or connected area with the light-emitting surface electrode and via of the LED chip 110.

[0072] The photoresist used is either a positive or negative photoresist, and the coating method is either spin coating or blade coating. The method of forming the circuit pattern on the photoresist layer includes photomask exposure and laser direct writing. In this embodiment, the preferred method is to form the circuit pattern on the positive photoresist using photomask exposure, thereby preparing the light-emitting circuit 131.

[0073] Reference Figure 6 As shown, the pattern of the light-emitting surface line 131 formed by the photoresist layer on the first encapsulation layer 121 is shown. The multiple lines in the light-emitting surface line 131 overlap with the light-emitting surface electrode of the LED chip 110 in different areas, and finally converge near the edge of multiple device units. The light-emitting surface line 131 connects the light-emitting surface electrodes of the vertical structure chips of multiple device units together.

[0074] Reference Figure 7 As shown, via 122 is located at the edge of multiple device units and has an overlapping or connected area with the light-emitting surface line 131. Via 122 penetrates the first encapsulation layer and its shape is not limited to round holes, square holes, etc. The drilling method includes mechanical drilling or laser drilling.

[0075] In step S2, the position of via 122 is selected according to the structural arrangement of the device unit. The position detection system identifies the position of the electrode on the bottom surface of the LED chip. The computer determines the edge and automatically plans the drilling path based on the positional relationship between each LED chip 110 and each device unit 100. Mechanical drilling equipment or laser drilling equipment prepares the via according to the drilling path. Each device unit can contain one complete via, or multiple device units can share one complete via, that is, each device unit only uses a portion cut from a complete via for electrical connection. In this example, multiple device units share one via, so the via is arranged at the edge of multiple device units. Each device unit after cutting uses a portion of the via for electrical connection. Compared with the traditional packaging structure where one device unit uses one complete via, the number of vias can be significantly reduced, reducing the packaging cost of the device unit. In addition, the reduction in via density can effectively reduce the size of the packaged device, increase the pixel density of the display device, and thus improve the display effect.

[0076] In this process, the fabrication of the light-emitting surface circuit pattern and the fabrication of the via structure are not sequential. However, it is necessary to ensure that the via and the light-emitting surface circuit pattern have overlapping or connected areas. In this embodiment, it is preferable to fabricate the light-emitting surface circuit first and then the via. This is because the light-emitting surface circuit is fabricated using a mask exposure method, so the position of the light-emitting surface circuit cannot be adjusted according to the mask pattern. However, the position of the via can be adjusted by the position detection system according to the actual position of the chip and the circuit pattern, which can reduce the requirements for the positional accuracy of the circuit fabrication and ensure that the via and the circuit pattern have overlapping or connected areas.

[0077] S3, the structure of the light-emitting surface line 131 and the via 122 is metallized, and the light-emitting surface line is electrically connected through the metallized via 122.

[0078] Specifically, the metallization preparation methods include one or more of magnetron sputtering, evaporation, electroplating, electroless plating, printing, and etching. The interior of the light-emitting surface lines and vias is a conductive layer, primarily composed of at least one of a metal and a conductive polymer, preferably one or more of gold, silver, copper, titanium, and nickel, or an alloy of at least two of these metals. In this embodiment, metallization of the light-emitting surface lines and vias is achieved simultaneously through electroless plating followed by electroplating. The light-emitting surface electrodes of the vertical structure chip are connected to the metallized vias via the light-emitting surface lines.

[0079] S4, an optical encapsulation layer 123 is fabricated on the surface of the light-emitting surface line 131. The optical encapsulation layer 123 may be a single-layer or multi-layer structure.

[0080] Reference Figure 8 As shown, a material with specific optical properties is coated and cured on the first encapsulation layer on one side of the light-emitting surface of the LED chip. The coating method includes spin coating and blade coating, and the curing method includes thermal curing, ultraviolet curing, and electrocuring. The optical encapsulation layer 123 can be fabricated into a single-layer or multi-layer structure, and the optical encapsulation layer 123 has one or more of the following functions: optical transmittance, spectral conversion, optical scattering, and water and oxygen isolation.

[0081] S5, the support substrate is separated from the first encapsulation layer 121, and the LED device is flipped so that the bottom surface of the LED chip 110 is transferred to another support substrate.

[0082] Reference Figure 9 As shown, the separation method between the support substrate 201 and the first encapsulation layer includes one of thermal separation and optical separation. In this embodiment, thermal separation is used to make the releasable adhesive layer 202 lose its adhesiveness. The advantage of this method is that it does not require the use of a transparent support substrate.

[0083] S6, a bottom surface circuit 132 containing pads is prepared on the light-emitting bottom surface and metallized. The bottom surface circuit 132 has an overlapping or connected area with the bottom surface electrode and pad of the LED chip.

[0084] Reference Figure 10 As shown, on the side of the device unit opposite the bottom surface, a photoresist layer is coated on the other end face of the first encapsulation layer. Bottom surface lines 132 are formed on the photoresist layer using mask exposure or laser direct writing. The pattern of bottom surface lines 132 overlaps with or is connected to the bottom electrodes and vias of the LED chip. The bottom surface lines 132 are then metallized. The pattern of the bottom surface lines includes circuit connection patterns and device pad patterns. The bottom surface lines overlap with the bottom electrodes of the LED chip and are connected to the corresponding pads. The pad patterns are part of the bottom surface lines, and the circuit connection patterns and device pad patterns are fabricated simultaneously.

[0085] Specifically, the bottom surface circuit connects the bottom surface electrode, which has the same polarity as the light-emitting surface electrode of the vertical structure chip, to the via and has an overlapping or connected portion with the via, and leads it out to a complete first pad.

[0086] The packaging method of this invention uses metallized vias to bring out all electrodes with the same polarity as the light-emitting surface electrodes of the vertical structure chip to an independent first pad, making it compatible with both vertical and horizontal structure chips. Specifically, for the bottom surface electrodes with different polarities than the light-emitting surface electrodes of the vertical structure chip, they are connected one-to-one to the second pad via bottom surface circuitry. Controlling the on / off state of these pads allows for the control of each LED chip in the device unit.

[0087] S7, a solder resist layer 124 is prepared on the surface of the non-pad area of ​​the bottom line 132.

[0088] Reference Figure 11 As shown, the solder mask 124 is located in the non-pad area of ​​the bottom surface circuit. It is mainly used to protect the exposed bottom surface circuit on the first encapsulation layer on the side opposite to the light emission point, and to prevent water and oxygen corrosion. The bottom surface circuit outside the exposed non-pad area serves as the pad of the device unit. The material of the solder mask is liquid photosensitive solder mask coating or dry photosensitive solder mask protective film. The preparation method includes one of the following: adhesive method, screen printing method, spraying method, tape coating method and stencil coating method.

[0089] Optionally, a thickening process can be used in the pad area for subsequent display device mounting processes.

[0090] If the micro LED light-emitting device fan-out packaging structure includes at least device unit 100, then it also includes step S8, that is, using a dicing machine to cut according to the cutting marks to prepare independent device units.

[0091] Reference Figure 12 As shown, the dicing path is parallel to the device unit outline and passes through the center of the via. The dashed line in the figure represents the dicing line. The light-emitting surface circuitry and the bottom surface circuitry are distributed on the device unit away from the dicing line. The cut-off independent device units are as follows: Figure 13 As shown.

[0092] Example 2

[0093] The fabrication method for the fan-out package structure of a micro LED light-emitting device can also be based on double-sided laser direct writing. The fabrication method for the fan-out package structure of a micro LED light-emitting device based on double-sided laser direct writing, used to fabricate the aforementioned fan-out package structure, includes the following steps:

[0094] S1, at least one LED chip 110 is disposed on the support substrate 201, and the LED chip 110 is covered with encapsulation material to form a first encapsulation layer. The light-emitting surface of the LED chip 110 is exposed by mechanical processing, composite processing or special processing, so that the light-emitting surface of the LED chip 110 and the surface of the first encapsulation layer 121 are on the same plane.

[0095] S2, vias are fabricated in chip-free areas or at the edges of the first encapsulation layer 121.

[0096] S3, the temporary release layer of the first encapsulation layer 121 with embedded LED chip is peeled off, and it is fixed to the glass substrate with a laser-cured conductive medium on the surface using double-sided adhesive tape. The double-sided adhesive tape is attached around the glass substrate, and the thickness of the double-sided adhesive tape itself creates a gap between the glass substrate and the first encapsulation layer. The gap is filled with laser-cured conductive medium.

[0097] S4, a photoresist layer is uniformly coated on the surface of the first encapsulation layer and its exposed chip electrodes. Machine vision is used to identify and locate the position of the electrodes on the upper surface of the chip. According to the identification result, two opposing laser generators are turned on simultaneously. One laser emitter is incident from the upper surface of the first encapsulation layer, and the other laser emitter is incident from the lower surface of the glass substrate. The laser is scanned according to the line adjusted after the chip electrode position is identified. The laser incident from the upper surface of the first encapsulation layer is used to expose the photoresist layer, forming the light surface line 131 and the bottom surface line 132 on the photoresist layer.

[0098] S5, the laser exposure area on the upper surface of the first packaging layer 121 and the interior of the via are metallized to realize the electrical connection between the light-emitting electrode of the LED chip and the via and pad, and then the excess photoresist is removed.

[0099] S6, an optical encapsulation layer 123 is prepared on the surface of the light-emitting surface line 131.

[0100] S7. Peel the molding layer off the glass substrate, remove excess laser-cured conductive medium, and flip the LED device so that the optical encapsulation layer surface is facing down on a flat work platform.

[0101] S8, a solder resist layer 124 is prepared on the surface of the non-pad area of ​​the bottom line 132.

[0102] The significant difference between this preparation method and Example 1 is that a glass substrate is introduced, and the simultaneous preparation of the light-emitting surface circuit and the bottom surface circuit is achieved through double-sided laser direct writing. This differs from the separate preparation of the double-sided circuit in Example 1, which can improve production efficiency.

[0103] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention.

Claims

1. A fan-out packaging structure for a micro LED light-emitting device, characterized in that: Includes at least one device unit, the device unit comprising At least one LED chip, the LED chip having a light-emitting surface, a light-emitting bottom surface and multiple side surfaces, and at least one of the LED chips being a vertical structure chip; The first encapsulation layer covers the side of the LED chip and exposes the light-emitting surface and electrodes of the LED chip, thereby embedding the LED chip in the first encapsulation layer. The upper and lower surfaces of the first encapsulation layer are flush with the light-emitting surface and the bottom surface of the light-emitting surface of the LED chip, respectively. The via is a fully metallized via or a partial via cut from a fully metallized via; the via is disposed on the first encapsulation layer, either in an internal or edge location. A double-sided circuit layer includes light-emitting surface circuits and bottom surface circuits. The light-emitting surface side of the first encapsulation layer has metallized circuits to form the light-emitting surface circuits, and the light-emitting opposite bottom surface side of the first encapsulation layer has metallized circuits to form the bottom surface circuits. The light-emitting surface electrode of the vertical structure chip is connected to the light-emitting surface circuits and led to the light-emitting opposite bottom surface through the metallized vias. The bottom surface electrodes of the other LED chips with the same polarity as the light-emitting surface electrodes are connected to the first pad. The bottom surface electrodes of the vertical structure chip and the bottom surface electrodes of the other LED chips with the opposite polarity to the light-emitting surface electrodes are respectively connected to the second pads one by one through the bottom surface circuits. An optical encapsulation layer is formed on the surface of the light-emitting surface circuit; as well as A solder resist protective layer is prepared on the surface of the non-pad area of ​​the bottom circuit.

2. The micro LED light-emitting device fan-out packaging structure according to claim 1, characterized in that: The remaining LED chips are designed as horizontal structure chips, with both the positive and negative electrodes located on the bottom surface of the device unit.

3. The micro LED light-emitting device fan-out packaging structure according to claim 1 or 2, characterized in that: The device unit is at least two, and each device unit is arranged together. Adjacent device units share a via. The complete via is set at the intersection of adjacent device units. The partial via formed by cutting the complete via is the via of the device unit.

4. A method for fabricating a fan-out packaging structure for a micro LED light-emitting device, characterized in that, The process for preparing the fan-out packaging structure of the micro LED light-emitting device according to any one of claims 1 to 3 includes the following steps: S1, at least one LED chip is placed on a support substrate, and the LED chip is covered with encapsulation material to form a first encapsulation layer. The light-emitting surface of the LED chip is exposed by mechanical processing, composite processing or special processing, so that the light-emitting surface of the LED chip and the surface of the first encapsulation layer are on the same plane. S2, a photoresist layer is coated on the upper surface of the first encapsulation layer, and a light-emitting surface line is etched on the photoresist layer; vias are prepared in the chip-free area or edge position of the first encapsulation layer; the light-emitting surface line has an overlapping or connected area with the light-emitting surface electrode of the LED chip and the via; S3, the structure of the light-emitting surface line and the via is metallized, and the light-emitting surface line is electrically connected through the metallized via; S4, an optical encapsulation layer is prepared on the surface of the light-emitting surface line; S5, separate the support substrate from the first encapsulation layer, and flip the LED device so that the bottom surface of the LED chip is facing up and transferred to another support substrate; S6, Prepare a bottom surface circuit including pads on the light-emitting bottom surface and metallize it, wherein the bottom surface circuit has an overlapping or connected area with the bottom surface electrode and pads of the LED chip. S7, the solder resist protective layer is prepared on the surface of the non-pad area of ​​the bottom circuit.

5. The method for fabricating the fan-out packaging structure of the micro LED light-emitting device according to claim 4, characterized in that: The device unit is at least two, and the process also includes step S8, which involves using a dicing machine to cut the device unit according to the cutting marks to prepare an independent device unit.

6. The method for preparing the fan-out packaging structure of the micro LED light-emitting device according to claim 4, characterized in that: In step S2, the position of the via is selected according to the structural arrangement of the device unit. The position detection system identifies the position of the electrode on the bottom surface of the LED chip. The computer determines the edge and automatically plans the drilling path according to the positional relationship between each LED chip and each device unit. The drilling method includes one of mechanical drilling or laser drilling. The mechanical drilling equipment or laser drilling equipment prepares the via according to the drilling path.

7. The method for fabricating the fan-out packaging structure of the micro LED light-emitting device according to claim 4, characterized in that: In step S7, the solder resist protective layer is located in the non-pad area of ​​the bottom surface circuit, and the bottom surface circuit outside the exposed non-pad area serves as the pad; the material of the solder resist protective layer is liquid photosensitive solder resist coating or dry photosensitive solder resist protective film, and the preparation method is one of the following: adhesive method, screen printing method, spraying method, tape coating method, and stencil coating method.

8. The method for fabricating the fan-out packaging structure of the micro LED light-emitting device according to claim 4, characterized in that: In step S1, the material of the first encapsulation layer includes one or more of epoxy molding compound, silicone, polyimide, ceramic, and metal materials; the encapsulation method includes one or more of transfer molding, vacuum film pressing, spin coating, injection molding, and blade coating.

9. The method for preparing the fan-out packaging structure of the micro LED light-emitting device according to claim 4, characterized in that: In step S2, the via is a through hole that penetrates the first encapsulation layer; in step S4, the optical encapsulation layer is a single-layer or multi-layer structure.

10. A method for fabricating a fan-out packaging structure for a micro LED light-emitting device, used to fabricate the fan-out packaging structure for a micro LED light-emitting device as described in any one of claims 1 to 3, characterized in that, Includes the following steps: S1, at least one LED chip is placed on a support substrate, and the LED chip is covered with encapsulation material to form a first encapsulation layer. The light-emitting surface of the LED chip is exposed by mechanical processing, composite processing or special processing, so that the light-emitting surface of the LED chip and the surface of the first encapsulation layer are on the same plane. S2, prepare vias in the chip-free area or edge position of the first encapsulation layer; S3, peel off the temporary release layer of the first encapsulation layer of the embedded LED chip, and fix it to the glass substrate with a layer of laser-cured conductive medium on the surface using double-sided adhesive tape. The double-sided adhesive tape is attached around the glass substrate, and the thickness of the double-sided adhesive tape itself creates a gap between the glass substrate and the first encapsulation layer. The gap is filled with laser-cured conductive medium. S4, a photoresist layer is uniformly coated on the surface of the first encapsulation layer and on its exposed chip electrodes. Machine vision is used to identify and locate the position of the electrodes on the upper surface of the chip. Based on the identification result, two opposing laser emitters are turned on simultaneously. One laser emitter is incident from the upper surface of the first encapsulation layer, and the other laser emitter is incident from the lower surface of the glass substrate. The laser is scanned according to the line adjusted after the chip electrode position is identified. The laser incident from the upper surface of the first encapsulation layer is used to expose the photoresist layer, forming the light surface line and the bottom surface line on the photoresist layer. S5, the laser exposure area on the upper surface of the first encapsulation layer and the interior of the via are metallized to achieve electrical connection between the light-emitting electrode of the LED chip and the via and the pad, and then the excess photoresist is removed; S6, an optical encapsulation layer is prepared on the surface of the light-emitting surface line; S7. Peel the molding layer off the glass substrate, remove excess laser-cured conductive medium, and flip the LED device so that the optical encapsulation layer surface is facing down on a flat work platform. S8, the solder resist layer is prepared on the surface of the non-pad area of ​​the bottom circuit.

Images