A digital hardware circuit description method, apparatus, device and storage medium

Abstract

The application discloses a digital hardware circuit description method and device, equipment and storage medium, and relates to the technical field of digital integrated circuit design. The method comprises the following steps: defining corresponding function modules for a preset hardware description language according to a function standard realized by the preset hardware description language; performing module packaging on the function modules to obtain packaged modules; calling the packaged modules when code is designed, and performing module disassembly on the packaged modules, so that the code files obtained after the disassembly are used to describe the digital hardware circuit. According to the technical scheme, the large amount of code packaging is converted into the modules with fixed functions, and the code transplantation is changed into module calling. Therefore, the code transplantation time is greatly shortened. Meanwhile, because the packaged modules are invariable, the error rate of the code transplantation can be effectively reduced.

Description

Technical Field

[0001] This invention relates to the field of digital integrated circuit design technology, and in particular to a digital hardware circuit description method, apparatus, device, and storage medium. Background Technology

[0002] Schematic diagrams and Hardware Description Languages ​​(HDLs) are two of the most commonly used methods for describing digital hardware circuits. Schematic diagrams offer the most direct approach, retrieving necessary components from a component library and drawing the schematic. While intuitive, this method is inefficient, difficult to maintain, and hinders modular construction and reuse. HDLs, designed using text-based description languages, offer better portability, versatility, and ease of modularization, making them widely used in work and study. However, when describing digital hardware circuits using HDLs, the design is implemented through code, which is less intuitive; for complex functions, the required logic code is substantial, leading to long development cycles. Although HDLs are highly portable, errors often occur during code porting.

[0003] Therefore, how to provide a solution to the above-mentioned technical problems is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] In view of this, the purpose of this invention is to provide a digital hardware circuit description method, apparatus, device, and storage medium, mainly addressing the limitations of existing solutions by combining the advantages of schematic diagrams and hardware description languages, which can effectively shorten the design cycle and reduce the design defect rate. The specific solution is as follows:

[0005] In a first aspect, this application discloses a method for describing digital hardware circuits, including:

[0006] Based on the functional standards implemented by the preset hardware description language, define corresponding functional modules for the preset hardware description language;

[0007] The functional modules are then encapsulated to obtain the encapsulated modules;

[0008] When designing the code, the encapsulation module is called and the encapsulation module is disassembled so that the digital hardware circuit can be described by the code file obtained after disassembly.

[0009] Optionally, the step of defining corresponding functional modules for the preset hardware description language based on the functional standards implemented by the preset hardware description language includes:

[0010] The preset hardware description language is functionally analyzed according to preset functional analysis rules in order to determine the target functions implemented by the preset hardware description language.

[0011] Count and record the number of functions implemented by the target function;

[0012] Determine the current quantity of the functions, and based on the current quantity and the correspondence between the preset quantity of functions and the preset function standards, determine the function standards implemented by the preset hardware description language;

[0013] If the functional standard implemented by the preset hardware description language is for implementing basic logic units, then the preset hardware description language is defined as a basic logic unit module.

[0014] If the functional standard implemented by the preset hardware description language is used to implement functional requirements, then based on the functional requirements, a target logical basic unit module matching the functional requirement module is determined from the logical basic unit modules, and the target logical basic unit module is encapsulated as the functional requirement module.

[0015] Optionally, the step of encapsulating the functional modules to obtain encapsulated modules includes:

[0016] If the functional standard implemented by the preset hardware description language is used to implement the basic logical unit, then the first code file corresponding to the basic logical unit is obtained;

[0017] The first code file is compiled using a first preset compilation method to obtain a first marker corresponding to the code text in the first code file;

[0018] The first token is recursively parsed layer by layer into a first abstract syntax tree with a preset structure, and then the module is encapsulated according to the node type in the first abstract syntax tree to obtain the encapsulated module.

[0019] Optionally, the step of encapsulating the functional modules to obtain encapsulated modules includes:

[0020] If the functional standard implemented by the preset hardware description language is used to implement the functional requirements, then obtain the second code file corresponding to the functional requirements;

[0021] The second code file is compiled using the second preset compilation method to obtain a second marker corresponding to the code text in the second code file;

[0022] The second token is recursively parsed layer by layer into a second abstract syntax tree with a preset structure, and then module encapsulation is performed according to the node type in the second abstract syntax tree to obtain the encapsulated module.

[0023] Optionally, the step of encapsulating the functional modules to obtain encapsulated modules includes:

[0024] Obtain the root node, operation class node, and parameter class node from the first abstract syntax tree and / or the second abstract syntax tree;

[0025] The root node is defined as the output interface of the encapsulation module, the operation class node is defined as the module name of the encapsulation module, and the parameter class node is defined as the input interface of the encapsulation module.

[0026] Optionally, the code file is compiled using a preset compilation method to obtain markers corresponding to the code text in the code file, including:

[0027] Lexical analysis of the code text in the code file is performed using symbolic notation to obtain the tokens corresponding to the code text in the code file.

[0028] Optionally, during code design, the process of calling the encapsulation module and disassembling the encapsulation module to describe the digital hardware circuit using the resulting code file includes:

[0029] The encapsulation module is called during code design.

[0030] The encapsulation module is converted into a third abstract syntax tree with a preset structure;

[0031] The third abstract syntax tree is split to obtain several third tokens corresponding to the code text in the code file;

[0032] The code file is determined based on the third identifier so that the digital hardware circuit can be described using the code file.

[0033] Secondly, this application discloses a digital hardware circuit description apparatus, comprising:

[0034] The module definition unit is used to define corresponding functional modules for the preset hardware description language according to the functional standards implemented by the preset hardware description language.

[0035] A module encapsulation unit is used to encapsulate the functional modules to obtain encapsulated modules;

[0036] The module calling unit is used to call the encapsulation module during code design and to disassemble the encapsulation module so that the digital hardware circuit can be described by the code file obtained after disassembly.

[0037] Thirdly, this application discloses an electronic device, which includes a processor and a memory; wherein the memory is used to store a computer program, which is loaded and executed by the processor to implement the digital hardware circuit description method as described above.

[0038] Fourthly, this application discloses a computer-readable storage medium for storing a computer program; wherein the computer program, when executed by a processor, implements the digital hardware circuit description method as described above.

[0039] This application provides a method for describing digital hardware circuits, comprising: defining corresponding functional modules for a preset hardware description language based on a functional standard implemented by the preset hardware description language; encapsulating the functional modules to obtain encapsulated modules; and during code design, calling the encapsulated modules and disassembling the encapsulated modules so as to describe the digital hardware circuits using the code files obtained after disassembly.

[0040] The beneficial technical effects of this invention are as follows: Leveraging the intuitive advantages of schematic diagrams in describing digital hardware circuits, a bridge is built between logic code and concrete functional modules, enabling conversion between them. By combining the advantages of schematic diagrams and hardware description languages, large amounts of code related to a pre-defined hardware description language are encapsulated and transformed into modules with fixed functions. In this way, code porting becomes module calling, significantly reducing porting time. Furthermore, because the encapsulated modules are internally immutable, the error rate during code porting is effectively reduced. Additionally, the mutual conversion between code and modules effectively shortens the design cycle and reduces the design defect rate.

[0041] Furthermore, the digital hardware circuit description device, equipment, and storage medium provided in this application correspond to the aforementioned digital hardware circuit description method and have the same effect. Attached Figure Description

[0042] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0043] Figure 1 This is a flowchart of a digital hardware circuit description method disclosed in this application;

[0044] Figure 2 This is a specific module encapsulation flowchart disclosed in this application;

[0045] Figure 3This is a schematic diagram of a basic logic unit module disclosed in this application;

[0046] Figure 4 This is a schematic diagram of a basic unit module for if-else logic disclosed in this application;

[0047] Figure 5 This is a schematic diagram of the basic structure of a specific syntax tree disclosed in this application;

[0048] Figure 6 This is a schematic diagram of the basic structure of a specific syntax tree disclosed in this application;

[0049] Figure 7 This is a schematic diagram of a specific module encapsulation disclosed in this application;

[0050] Figure 8 This is a specific module encapsulation flowchart disclosed in this application;

[0051] Figure 9 This is a schematic diagram illustrating the mutual conversion between code and functional modules disclosed in this application;

[0052] Figure 10 This is a flowchart of a specific digital hardware circuit description method disclosed in this application;

[0053] Figure 11 This is a flowchart of a specific digital hardware circuit description method disclosed in this application;

[0054] Figure 12 This is a flowchart of a specific digital hardware circuit description method disclosed in this application;

[0055] Figure 13 This is a schematic diagram of the structure of a digital hardware circuit description device disclosed in this application;

[0056] Figure 14 This is a structural diagram of an electronic device disclosed in this application. Detailed Implementation

[0057] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0058] Currently, schematic diagrams and HDL (HDL) are two of the most commonly used methods for describing digital hardware circuits. Schematic diagrams are the most direct method, retrieving the necessary components from a component library and drawing the schematic. While intuitive, this method is inefficient, difficult to maintain, and not conducive to module construction and reuse. HDL, using a text-based description language, offers better portability, versatility, and ease of module partitioning, and is widely used in work and study.

[0059] Taking a Field Programmable Gate Array (FPGA) as an example, an FPGA is a chip whose internal structure can be modified using a Hardware Description Language (HDL). Specifically, FPGAs are programmed using HDL, which is then compiled, synthesized, and placed and routed using Electronic Design Automation (EDA) tools, resulting in a programmable file. This file is then loaded into the FPGA device, changing the internal interconnections to achieve the desired functionality. The current design flow for FPGAs generally includes function definition / requirements verification, device selection, design output, functional simulation, synthesis optimization, placement and routing, board-level verification, and chip programming. Most of this work can be accomplished using EDA software developed by software vendors, with engineers primarily focusing on code writing and checking. However, for complex functions, the required logic code is substantial, leading to long development cycles. While HDLs are highly portable, errors can easily occur during code porting, and the fact that HDL designs are implemented through code is not intuitive.

[0060] To address this, this application provides a digital hardware circuit description scheme that combines the advantages of schematic diagrams and hardware description languages ​​to overcome the limitations of existing schemes, effectively shortening the design cycle and reducing the design defect rate.

[0061] This invention discloses a digital hardware circuit description method, see [link to relevant documentation]. Figure 1 As shown, the method includes:

[0062] Step S11: Define corresponding functional modules for the preset hardware description language according to the functional standards implemented by the preset hardware description language.

[0063] In this embodiment, the functional standard implemented by the preset hardware description language represents the complexity of the functions implemented by the statement code. If the code can implement a basic and simple logical function, it means that the preset hardware description language corresponds to a simple basic syntax; if the code can implement a complex logical function, it means that the preset hardware description language corresponds to a syntax with complex requirements. That is, the distinction between a preset hardware description language that is a simple basic syntax and one that corresponds to complex requirements is made based on its functional standard. If it implements a single function, such as simple logic like summing parameters or judging the size between parameters, then the functional standard implemented by the preset hardware description language is for implementing basic logical units. If it implements more than one function, such as both summing parameters and performing other logical operations on the parameters, then the functional standard implemented by the preset hardware description language is for implementing functional requirements. Furthermore, after determining the functional standard corresponding to the preset hardware description language, corresponding functional modules are defined for the preset hardware description language according to different functional standards.

[0064] Step S12: The functional modules are encapsulated to obtain the encapsulated modules.

[0065] In this embodiment, different functional modules correspond to different functional standards. The functional modules are encapsulated according to the functional standards, so that a large amount of code can be encapsulated and transformed into encapsulated modules with fixed functions. In this way, when the code is ported, the code porting work is transformed into module calls, which greatly reduces the code porting time.

[0066] In this embodiment, the process of encapsulating the module involves first splitting the code file into an Abstract Syntax Tree (AST), and then encapsulating it according to the structure of the AST. In one specific implementation, such as... Figure 2 As shown, for a functional module used to implement a basic logical unit, the step of encapsulating the functional module to obtain an encapsulated module includes:

[0067] Step S1211: If the functional standard implemented by the preset hardware description language is used to implement the basic logic unit, then obtain the first code file corresponding to the basic logic unit.

[0068] In this embodiment, the system operation flow is described in detail using Verilog basic syntax as an example of the preset hardware description language. If Verilog is used to implement the basic logic unit, it means that it belongs to a simple basic syntax, and the function implemented is often a simple logical operation, such as summation, comparison, etc. Therefore, if the functional standard implemented by the preset hardware description language is to implement the basic logic unit, then a first code file corresponding to the basic logic unit is obtained, and this first code file is the basic simple syntax content describing the basic logic unit.

[0069] For example, such as Figure 3 The diagram shows the basic logic unit module, which can implement the basic function of ANDing parameter logic. Its corresponding first code file is assign A = B&C; (e.g.) Figure 4 The image shows the basic unit module of if-else logic, and its corresponding first code file is if(D)A=B else A=C.

[0070] Step S1212: Compile the first code file using the first preset compilation method to obtain a first marker corresponding to the code text in the first code file.

[0071] In this embodiment of the application, if the functional standard implemented by the preset hardware description language is for implementing the basic logical unit, then the first code file is compiled using a first preset compilation method. Specifically, the first preset compilation method mainly uses symbol tagging to perform lexical analysis on the input code text to obtain a first token corresponding to the code text in the first code file.

[0072] Step S1213: The first token is recursively parsed layer by layer into a first abstract syntax tree with a preset structure, and the module is encapsulated according to the node type in the first abstract syntax tree to obtain the encapsulated module.

[0073] In this embodiment, the obtained first token is recursively converted into a first abstract syntax tree. The basic structure of the syntax tree adopts a tree-root structure, such as... Figure 5 As shown, the root of the first abstract syntax tree corresponds to the function "a+b" that implements the basic logical unit, that is, summing a and b. The first identifiers obtained after compilation are "a, b, +", therefore, each branch node connected by the root corresponds to a first identifier. For example... Figure 6 As shown, the root of the first abstract syntax tree corresponds to the function c / d that implements the basic logical unit, that is, the quotient of c and d. The first identifiers obtained after compilation are "c", "d", and " / ", therefore, each branch node connected by the root corresponds to a first identifier. Further, as... Figure 7 The diagram shown illustrates a specific example of encapsulating a module based on a+b.

[0074] As can be seen, each branch node connected by the root corresponds to either a parameter or an operation. Therefore, by encapsulating modules according to the node types in the first abstract syntax tree, we can obtain encapsulated modules. That is, by defining the operation interface of the encapsulated modules according to different node types, we obtain the final encapsulated modules.

[0075] In another specific implementation, such as Figure 8 As shown, for a functional module used to implement functional requirements, the step of encapsulating the functional module to obtain an encapsulated module includes:

[0076] Step S1221: If the functional standard implemented by the preset hardware description language is used to implement the functional requirements, then obtain the second code file corresponding to the functional requirements.

[0077] In this embodiment, the default hardware description language still uses Verilog basic syntax as an example to describe the system operation flow in detail. If Verilog is used to implement the functional requirements, it means that it belongs to a complex basic syntax, and the function implemented is often not a simple logical operation, but a functional requirement, such as implementing a signal delay function, summing and then quotienting parameters, etc. Therefore, if the functional standard implemented by the default hardware description language is to implement the functional requirements, then a second code file corresponding to the functional requirements is obtained, and this second code file is the basic simple syntax content describing the functional requirements.

[0078] For example, such as Figure 9 The diagram shows the code for implementing the signal delay function (specific implementation code omitted) and the mutual conversion between the code and the functional module. By encapsulating it in the same way, a functional module can also be obtained. Figure 9 The content on the left is the second code file corresponding to the aforementioned functional requirements.

[0079] Step S1222: Compile the second code file using the second preset compilation method to obtain a second marker corresponding to the code text in the second code file.

[0080] In this embodiment, if the functional standard implemented by the preset hardware description language is for fulfilling functional requirements, then the second code file is compiled using a second preset compilation method. Specifically, the second preset compilation method also performs lexical analysis on the input code text using a symbol tagging method to obtain a second token (TOKEN) corresponding to the code text in the second code file.

[0081] Step S1223: The second token is recursively parsed layer by layer into a second abstract syntax tree with a preset structure, and the module is encapsulated according to the node type in the second abstract syntax tree to obtain the encapsulated module.

[0082] In this embodiment, the obtained second token is recursively converted into a second abstract syntax tree. The basic structure of the syntax tree also adopts a tree-root structure. If the functional standard implemented by the preset hardware description language is for fulfilling functional requirements, then during the conversion into an abstract syntax tree, a node under the root of one syntax tree can also serve as the root of another syntax tree. For example... Figure 6 As shown, the root of the second abstract syntax tree corresponds to the function c / d that implements the basic logical unit, that is, the quotient of c and d. The second markers obtained after compilation are "c", "d", and " / ", which, as a node c in the syntax tree c / d, can be the root of another syntax tree a+b. Therefore, second markers such as "a", "b", and "+" can also be derived from the node c.

[0083] Similarly, as can be seen, in the final generated second abstract syntax tree, each branch node connected by the root corresponds to either a parameter or an operation. Therefore, by encapsulating modules according to the node types in the second abstract syntax tree, encapsulated modules can also be obtained. That is, by defining the operation interface of the encapsulated module according to different node types, the final encapsulated module is obtained.

[0084] It should be noted that during the module encapsulation process, the code that implements specific functions can be encapsulated line by line into basic logical unit modules. Alternatively, this code can be defined as a functional requirement module with known functionality but unknown implementation method, based on the function and interface definitions.

[0085] Step S13: When designing the code, call the encapsulation module and disassemble the encapsulation module so that the digital hardware circuit can be described by the code file obtained after disassembly.

[0086] In this embodiment, because a large amount of code is encapsulated and transformed into functionally fixed modules that are immutable internally, not only is the error rate of code porting effectively reduced, but also, during code design, the encapsulated modules can be directly called, and then disassembled. That is, the digital hardware circuit can be described using the code files obtained after disassembly. Furthermore, it should be noted that after encapsulating the modules, when designing the code, one can also choose to directly call the encapsulated modules and connect the various modules directly with line segments, which can greatly simplify the code design work.

[0087] This application provides a digital hardware circuit description method, comprising: defining corresponding functional modules for a preset hardware description language based on functional standards implemented by the preset hardware description language; encapsulating the functional modules to obtain encapsulated modules; and during code design, calling the encapsulated modules and disassembling the encapsulated modules to describe the digital hardware circuit using the code files obtained after disassembly. The beneficial technical effects of this invention are: leveraging the intuitive advantages of schematic diagrams in describing digital hardware circuits, a bridge is built between logic code and concrete functional modules that can be converted. Combining the advantages of schematic diagrams and hardware description languages ​​allows the large volume of code related to the preset hardware description language to be encapsulated and converted into modules with fixed functions. In this way, code porting work is transformed into module calls, greatly reducing the time required for code porting. Simultaneously, because the encapsulated modules are internally immutable, the error rate of code porting can be effectively reduced. Furthermore, through the mutual conversion between code and modules, the design cycle can be effectively shortened and the design defect rate reduced.

[0088] In one specific implementation, see Figure 10 As shown, the step of defining corresponding functional modules for the preset hardware description language based on the functional standards implemented by the preset hardware description language includes:

[0089] Step S21: Perform functional analysis on the preset hardware description language according to the preset functional analysis rules to determine the target function implemented by the preset hardware description language.

[0090] It is understandable that the preset hardware description language is designed using a text-based description language, and after being compiled by software such as electronic design automation (EDA), it can achieve certain target functions. Therefore, by using preset functional analysis rules to perform functional analysis on the preset hardware description language, the functions that the preset hardware description language can achieve can be determined. This function can be a single requirement defined by simple logical statements, or it can be multiple requirements composed of a combination of multiple simple statements. The target functions implemented by the preset hardware description language are determined through one or more functional requirements.

[0091] Step S22: Count and record the number of functions implemented by the target function.

[0092] In this embodiment of the application, the number of functions implemented by the target function is counted and recorded. In this way, the functional standard implemented by the preset hardware description language is further determined based on the number of functions implemented by the target function.

[0093] Step S23: Determine the current quantity scale of the number of functions, and determine the function standard implemented by the preset hardware description language based on the current quantity scale and the correspondence between the preset number of functions and the preset function standard.

[0094] In this embodiment, since the functional standard implemented by the preset hardware description language represents the complexity of the functions implemented by the statement code, if the code can implement a basic and simple logical function, it means that the preset hardware description language corresponds to a simple basic syntax; if the code can implement a complex logical function, it means that the preset hardware description language corresponds to a syntax for complex requirements. That is, the distinction between a preset hardware description language that is a simple basic syntax and one that corresponds to complex requirements is made based on its functional standard. If it implements a single function, such as simple logic like summing parameters or judging the size between parameters, then the functional standard implemented by the preset hardware description language is determined to be for implementing basic logical units. If it implements multiple functions, such as complex logic like combining multiple logical operations to implement a requirement, then the functional standard implemented by the preset hardware description language is determined to be for implementing functional requirements.

[0095] Step S24: If the functional standard implemented by the preset hardware description language is for implementing basic logic units, then the preset hardware description language is defined as a basic logic unit module.

[0096] In the embodiments of this application, such as Figure 7 The image shows an example of defining a simple, pre-defined hardware description language used to implement basic logic units as a logic unit module. Modular encapsulation involves defining the `expr` branch of the syntax tree (i.e., the nodes representing parameter classes) as the module input interface, the `op` branch (i.e., the nodes representing operation classes) as the module name, and the root as the module's output interface.

[0097] Step S25: If the functional standard implemented by the preset hardware description language is used to implement functional requirements, then based on the functional requirements, a target logical basic unit module matching the functional requirement module is determined from the logical basic unit modules, and the target logical basic unit module is encapsulated as the functional requirement module.

[0098] In the embodiments of this application, such as Figure 9 The image shows an example of defining a complex hardware description language (HMR) used to implement functional requirements as a functional requirement module. The final result is... Figure 9 The module on the right is a functional module that can fulfill a complex requirement, namely, a delayed operation.

[0099] As can be seen, by leveraging the intuitive representation of schematic diagrams, a bridge can be built between logic code and concrete modules, enabling transformation. Large amounts of code are encapsulated and transformed into functionally fixed modules, converting code porting into module calls. This significantly reduces code porting time. Furthermore, because the encapsulated modules are immutable, the error rate during code porting is effectively reduced.

[0100] This invention discloses a specific method for describing digital hardware circuits, see [link to relevant documentation]. Figure 11 As shown, the method includes:

[0101] Step S31: Define corresponding functional modules for the preset hardware description language according to the functional standards implemented by the preset hardware description language.

[0102] For a more detailed description of the process of step S31, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0103] Step S32: Obtain the root node, operation class node, and parameter class node from the first abstract syntax tree and / or the second abstract syntax tree.

[0104] In this embodiment, during module encapsulation, the input code text is first lexically analyzed using symbolic notation to obtain TOKEN tokens. Then, the obtained TOKEN tokens are recursively converted into an abstract syntax tree. The abstract syntax tree used to implement the basic logical units is the first abstract syntax tree, and the abstract syntax tree used to implement the functional requirements is the second abstract syntax tree. The root node, operation class node, and parameter class node in the first abstract syntax tree and / or the second abstract syntax tree are obtained.

[0105] Understandably, a "tree" represents the operators and parameters of a syntax. The "root" represents the basic syntax composed of operators and parameters. The root node generally represents a specific function implemented by the default hardware description language; the operation nodes represent how logical operations are performed between parameters; and the parameter class nodes indicate which parameters participated in the logical operations.

[0106] Step S33: Define the root node as the output interface of the encapsulation module, define the operation class node as the module name of the encapsulation module, and define the parameter class node as the input interface of the encapsulation module.

[0107] In this embodiment, modular encapsulation involves defining the `expr` branch of the syntax tree (i.e., parameter nodes) as the module input interface; the `op` branch (i.e., operation nodes) as the module name; and the root node as the module output interface. It should be noted that the "root" of a syntax tree structure can also serve as the "tree" of the next syntax tree. The `TOKEN` token is recursively parsed layer by layer, ultimately transforming into a two-level tree-root structure, i.e., a root plus several branches.

[0108] Step S34: When designing the code, call the encapsulation module and disassemble the encapsulation module so that the digital hardware circuit can be described by the code file obtained after disassembly.

[0109] For a more detailed explanation of step S34, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0110] As can be seen, in this embodiment, the main difference between the encapsulation of the basic logical unit module and the encapsulation of the functional requirement module lies in the different syntax trees used for encapsulation. The basic logical unit module encapsulates the syntax tree obtained from the initial transformation, while the functional requirement module encapsulates the syntax tree obtained by summarizing all the syntax trees.

[0111] This invention discloses a specific method for describing digital hardware circuits, see [link to relevant documentation]. Figure 12 As shown, the method includes:

[0112] Step S41: Define corresponding functional modules for the preset hardware description language according to the functional standards implemented by the preset hardware description language.

[0113] Step S42: The functional module is encapsulated to obtain an encapsulated module.

[0114] For a more detailed explanation of step S34, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0115] Step S43: When designing the code, call the encapsulation module; convert the encapsulation module into a third abstract syntax tree with a preset structure; split the third abstract syntax tree to obtain several third markers corresponding to the code text in the code file; determine the code file based on the third markers so as to describe the digital hardware circuit through the code file.

[0116] In this embodiment, during code design, the encapsulation module is called, and then the encapsulation module is disassembled. The basic idea of ​​module disassembly is the reverse operation of module encapsulation. Specifically, the module is first converted into a syntax tree structure, and then the syntax tree is split into TOKEN tokens. Finally, it is converted into a code file.

[0117] As can be seen, when designing code, one can directly call pre-packaged modules, break them down, and achieve mutual conversion between modules and code, which can effectively shorten the design cycle and reduce the design defect rate. Alternatively, one can choose to directly call pre-packaged modules and connect the various modules directly with lines, which can greatly simplify the code design work.

[0118] Accordingly, embodiments of this application also disclose a digital hardware circuit description device, see [link to relevant documentation]. Figure 13 As shown, the device includes:

[0119] Module definition unit 11 is used to define corresponding functional modules for the preset hardware description language according to the functional standards implemented by the preset hardware description language;

[0120] The module encapsulation unit 12 is used to encapsulate the functional module to obtain an encapsulated module;

[0121] The module calling unit 13 is used to call the encapsulation module during code design and to disassemble the encapsulation module so that the digital hardware circuit can be described by the code file obtained after disassembly.

[0122] For more detailed information on the working process of each of the above modules, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0123] Therefore, the above-described solution in this embodiment includes: defining corresponding functional modules for the preset hardware description language based on the functional standards implemented by the preset hardware description language; encapsulating the functional modules to obtain encapsulated modules; and during code design, calling the encapsulated modules and disassembling the encapsulated modules to describe the digital hardware circuit through the code files obtained after disassembly. The beneficial technical effects of this invention are: leveraging the intuitive advantages of schematic diagrams in describing digital hardware circuits, a bridge that can be converted between logic code and concrete functional modules is built. Combining the advantages of schematic diagrams and hardware description languages ​​allows the large volume of code related to the preset hardware description language to be encapsulated and converted into modules with fixed functions. In this way, code porting work is transformed into module calls, greatly reducing the time required for code porting. Simultaneously, because the encapsulated modules are internally immutable, the error rate of code porting can be effectively reduced. Furthermore, through the mutual conversion between code and modules, the design cycle can be effectively shortened and the design defect rate reduced.

[0124] Furthermore, embodiments of this application also disclose an electronic device, Figure 14 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content of the diagram should not be construed as limiting the scope of this application.

[0125] Figure 14 This is a schematic diagram of the structure of an electronic device 20 provided in an embodiment of this application. Specifically, the electronic device 20 may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the digital hardware circuit description method disclosed in any of the foregoing embodiments. Alternatively, the electronic device 20 in this embodiment may specifically be a computer.

[0126] Specifically, the steps for implementing the method described above for the digital hardware circuit when the computer program is loaded and executed by the processor 21 are as follows:

[0127] Step S11: Define corresponding functional modules for the preset hardware description language according to the functional standards implemented by the preset hardware description language;

[0128] In this embodiment, the functional standard implemented by the preset hardware description language represents the complexity of the functions implemented by the statement code. If the code can implement a basic and simple logical function, it means that the preset hardware description language corresponds to a simple basic syntax; if the code can implement a complex logical function, it means that the preset hardware description language corresponds to a syntax with complex requirements. That is, the distinction between a preset hardware description language that is a simple basic syntax and one that corresponds to complex requirements is made based on its functional standard. If it implements a single function, such as simple logic like summing parameters or judging the size between parameters, then the functional standard implemented by the preset hardware description language is for implementing basic logical units. If it implements more than one function, such as both summing parameters and performing other logical operations on the parameters, then the functional standard implemented by the preset hardware description language is for implementing functional requirements. Furthermore, after determining the functional standard corresponding to the preset hardware description language, corresponding functional modules are defined for the preset hardware description language according to different functional standards.

[0129] Step S12: The functional modules are encapsulated to obtain the encapsulated modules.

[0130] In this embodiment, different functional modules correspond to different functional standards. The functional modules are encapsulated according to the functional standards, so that a large amount of code can be encapsulated and transformed into encapsulated modules with fixed functions. In this way, when the code is ported, the code porting work is transformed into module calls, which greatly reduces the code porting time.

[0131] In this embodiment, the process of encapsulating the module involves first splitting the code file into an abstract syntax tree, and then encapsulating it according to the structure of the abstract syntax tree. In one specific implementation, such as... Figure 2 As shown, for a functional module used to implement a basic logical unit, the step of encapsulating the functional module to obtain an encapsulated module includes:

[0132] Step S1211: If the functional standard implemented by the preset hardware description language is used to implement the basic logic unit, then obtain the first code file corresponding to the basic logic unit.

[0133] In this embodiment, the system operation flow is described in detail using Verilog basic syntax as an example of the preset hardware description language. If Verilog is used to implement the basic logic unit, it means that it belongs to a simple basic syntax, and the function implemented is often a simple logical operation, such as summation, comparison, etc. Therefore, if the functional standard implemented by the preset hardware description language is to implement the basic logic unit, then a first code file corresponding to the basic logic unit is obtained, and this first code file is the basic simple syntax content describing the basic logic unit.

[0134] Step S1212: Compile the first code file using the first preset compilation method to obtain a first marker corresponding to the code text in the first code file.

[0135] In this embodiment of the application, if the functional standard implemented by the preset hardware description language is for implementing the basic logical unit, then the first code file is compiled using a first preset compilation method. Specifically, the first preset compilation method mainly uses symbol tagging to perform lexical analysis on the input code text to obtain a first token corresponding to the code text in the first code file.

[0136] Step S1213: The first token is recursively parsed layer by layer into a first abstract syntax tree with a preset structure, and the module is encapsulated according to the node type in the first abstract syntax tree to obtain the encapsulated module.

[0137] In this embodiment, the obtained first token is recursively converted into a first abstract syntax tree. The basic structure of the syntax tree adopts a tree-root structure, such as... Figure 5 As shown, the root of the first abstract syntax tree corresponds to the function "a+b" that implements the basic logical unit, that is, summing a and b. The first identifiers obtained after compilation are "a, b, +", therefore, each branch node connected by the root corresponds to a first identifier. For example... Figure 6 As shown, the root of the first abstract syntax tree corresponds to the function c / d that implements the basic logical unit, that is, the quotient of c and d. The first identifiers obtained after compilation are "c", "d", and " / ", therefore, each branch node connected by the root corresponds to a first identifier. Further, as... Figure 7 The diagram shown illustrates a specific example of encapsulating a module based on a+b.

[0138] As can be seen, each branch node connected by the root corresponds to either a parameter or an operation. Therefore, by encapsulating modules according to the node types in the first abstract syntax tree, we can obtain encapsulated modules. That is, by defining the operation interface of the encapsulated modules according to different node types, we obtain the final encapsulated modules.

[0139] In another specific implementation, such as Figure 8 As shown, for a functional module used to implement functional requirements, the step of encapsulating the functional module to obtain an encapsulated module includes:

[0140] Step S1221: If the functional standard implemented by the preset hardware description language is used to implement the functional requirements, then obtain the second code file corresponding to the functional requirements.

[0141] In this embodiment, the default hardware description language still uses Verilog basic syntax as an example to describe the system operation flow in detail. If Verilog is used to implement the functional requirements, it means that it belongs to a complex basic syntax, and the function implemented is often not a simple logical operation, but a functional requirement, such as implementing a signal delay function, summing and then quotienting parameters, etc. Therefore, if the functional standard implemented by the default hardware description language is to implement the functional requirements, then a second code file corresponding to the functional requirements is obtained, and this second code file is the basic simple syntax content describing the functional requirements.

[0142] Step S1222: Compile the second code file using the second preset compilation method to obtain a second marker corresponding to the code text in the second code file.

[0143] In this embodiment, if the functional standard implemented by the preset hardware description language is for fulfilling functional requirements, then the second code file is compiled using a second preset compilation method. Specifically, the second preset compilation method also performs lexical analysis on the input code text using a symbol tagging method to obtain a second token (TOKEN) corresponding to the code text in the second code file.

[0144] Step S1223: The second token is recursively parsed layer by layer into a second abstract syntax tree with a preset structure, and the module is encapsulated according to the node type in the second abstract syntax tree to obtain the encapsulated module.

[0145] In this embodiment, the obtained second token is recursively converted into a second abstract syntax tree. The basic structure of the syntax tree also adopts a tree-root structure. If the functional standard implemented by the preset hardware description language is for fulfilling functional requirements, then during the conversion into an abstract syntax tree, a node under the root of one syntax tree can also serve as the root of another syntax tree. For example... Figure 6 As shown, the root of the second abstract syntax tree corresponds to the function c / d that implements the basic logical unit, that is, the quotient of c and d. The second markers obtained after compilation are "c", "d", and " / ", which, as a node c in the syntax tree c / d, can be the root of another syntax tree a+b. Therefore, second markers such as "a", "b", and "+" can also be derived from the node c.

[0146] Similarly, as can be seen, in the final generated second abstract syntax tree, each branch node connected by the root corresponds to either a parameter or an operation. Therefore, by encapsulating modules according to the node types in the second abstract syntax tree, encapsulated modules can also be obtained. That is, by defining the operation interface of the encapsulated module according to different node types, the final encapsulated module is obtained.

[0147] It should be noted that during the module encapsulation process, the code that implements specific functions can be encapsulated line by line into basic logical unit modules. Alternatively, this code can be defined as a functional requirement module with known functionality but unknown implementation method, based on the function and interface definitions.

[0148] Step S13: When designing the code, call the encapsulation module and disassemble the encapsulation module so that the digital hardware circuit can be described by the code file obtained after disassembly.

[0149] In this embodiment, because a large amount of code is encapsulated and transformed into functionally fixed modules that are immutable internally, it not only effectively reduces the error rate of code porting, but also allows for direct invocation of the encapsulated modules during code design. These modules can then be disassembled, allowing the digital hardware circuit to be described using the resulting code files. Furthermore, it should be noted that after encapsulating the modules, code design can also directly call the encapsulated modules, connecting them directly with line segments, which greatly simplifies the code design process.

[0150] As a preferred embodiment, defining corresponding functional modules for the preset hardware description language based on the functional standards implemented by the preset hardware description language includes:

[0151] The preset hardware description language is functionally analyzed according to preset functional analysis rules in order to determine the target functions implemented by the preset hardware description language.

[0152] Count and record the number of functions implemented by the target function;

[0153] Determine the current quantity of the functions, and based on the current quantity and the correspondence between the preset quantity of functions and the preset function standards, determine the function standards implemented by the preset hardware description language;

[0154] If the functional standard implemented by the preset hardware description language is for implementing basic logic units, then the preset hardware description language is defined as a basic logic unit module.

[0155] If the functional standard implemented by the preset hardware description language is used to implement functional requirements, then based on the functional requirements, a target logical basic unit module matching the functional requirement module is determined from the logical basic unit modules, and the target logical basic unit module is encapsulated as the functional requirement module.

[0156] In a preferred embodiment, the step of encapsulating the functional modules to obtain an encapsulated module includes:

[0157] If the functional standard implemented by the preset hardware description language is used to implement the basic logical unit, then the first code file corresponding to the basic logical unit is obtained;

[0158] The first code file is compiled using a first preset compilation method to obtain a first marker corresponding to the code text in the first code file;

[0159] The first token is recursively parsed layer by layer into a first abstract syntax tree with a preset structure, and then the module is encapsulated according to the node type in the first abstract syntax tree to obtain the encapsulated module.

[0160] In a preferred embodiment, the step of encapsulating the functional modules to obtain an encapsulated module includes:

[0161] If the functional standard implemented by the preset hardware description language is used to implement the functional requirements, then obtain the second code file corresponding to the functional requirements;

[0162] The second code file is compiled using the second preset compilation method to obtain a second marker corresponding to the code text in the second code file;

[0163] The second token is recursively parsed layer by layer into a second abstract syntax tree with a preset structure, and then module encapsulation is performed according to the node type in the second abstract syntax tree to obtain the encapsulated module.

[0164] In a preferred embodiment, the step of encapsulating the functional modules to obtain an encapsulated module includes:

[0165] Obtain the root node, operation class node, and parameter class node from the first abstract syntax tree and / or the second abstract syntax tree;

[0166] The root node is defined as the output interface of the encapsulation module, the operation class node is defined as the module name of the encapsulation module, and the parameter class node is defined as the input interface of the encapsulation module.

[0167] In a preferred embodiment, the code file is compiled using a preset compilation method to obtain markers corresponding to the code text in the code file, including:

[0168] Lexical analysis of the code text in the code file is performed using symbolic notation to obtain the tokens corresponding to the code text in the code file.

[0169] In a preferred embodiment, the step of calling the encapsulation module and disassembling the encapsulation module during code design, so as to describe the digital hardware circuit through the code file obtained after disassembly, includes:

[0170] The encapsulation module is called during code design.

[0171] The encapsulation module is converted into a third abstract syntax tree with a preset structure;

[0172] The third abstract syntax tree is split to obtain several third tokens corresponding to the code text in the code file;

[0173] The code file is determined based on the third identifier so that the digital hardware circuit can be described using the code file.

[0174] In this embodiment, the power supply 23 is used to provide operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0175] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk, or optical disk, etc. The resources stored on it can include an operating system 221, computer programs 222, and data 223, etc. The data 223 can include various types of data. The storage method can be temporary storage or permanent storage.

[0176] The operating system 221 is used to manage and control the various hardware devices on the electronic device 20 and the computer program 222, which may be Windows Server, Netware, Unix, Linux, etc. In addition to including a computer program capable of performing the digital hardware circuit description method executed by the electronic device 20 as disclosed in any of the foregoing embodiments, the computer program 222 may further include a computer program capable of performing other specific tasks.

[0177] Furthermore, this application also discloses a computer-readable storage medium, which includes random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, magnetic disks, optical disks, or any other form of storage medium known in the art. The computer program, when executed by a processor, implements the aforementioned digital hardware circuit description method.

[0178] Specifically, the steps for implementing the aforementioned digital hardware circuit description method when the computer program is executed by the processor are as follows:

[0179] Step S11: Define corresponding functional modules for the preset hardware description language according to the functional standards implemented by the preset hardware description language;

[0180] In this embodiment, the functional standard implemented by the preset hardware description language represents the complexity of the functions implemented by the statement code. If the code can implement a basic and simple logical function, it means that the preset hardware description language corresponds to a simple basic syntax; if the code can implement a complex logical function, it means that the preset hardware description language corresponds to a syntax with complex requirements. That is, the distinction between a preset hardware description language that is a simple basic syntax and one that corresponds to complex requirements is made based on its functional standard. If it implements a single function, such as simple logic like summing parameters or judging the size between parameters, then the functional standard implemented by the preset hardware description language is for implementing basic logical units. If it implements more than one function, such as both summing parameters and performing other logical operations on the parameters, then the functional standard implemented by the preset hardware description language is for implementing functional requirements. Furthermore, after determining the functional standard corresponding to the preset hardware description language, corresponding functional modules are defined for the preset hardware description language according to different functional standards.

[0181] Step S12: The functional modules are encapsulated to obtain the encapsulated modules.

[0182] In this embodiment, different functional modules correspond to different functional standards. The functional modules are encapsulated according to the functional standards, so that a large amount of code can be encapsulated and transformed into encapsulated modules with fixed functions. In this way, when the code is ported, the code porting work is transformed into module calls, which greatly reduces the code porting time.

[0183] In this embodiment, the process of encapsulating the module involves first splitting the code file into an abstract syntax tree, and then encapsulating it according to the structure of the abstract syntax tree. In one specific implementation, such as... Figure 2As shown, for a functional module used to implement a basic logical unit, the step of encapsulating the functional module to obtain an encapsulated module includes:

[0184] Step S1211: If the functional standard implemented by the preset hardware description language is used to implement the basic logic unit, then obtain the first code file corresponding to the basic logic unit.

[0185] In this embodiment, the system operation flow is described in detail using Verilog basic syntax as an example of the preset hardware description language. If Verilog is used to implement the basic logic unit, it means that it belongs to a simple basic syntax, and the function implemented is often a simple logical operation, such as summation, comparison, etc. Therefore, if the functional standard implemented by the preset hardware description language is to implement the basic logic unit, then a first code file corresponding to the basic logic unit is obtained, and this first code file is the basic simple syntax content describing the basic logic unit.

[0186] Step S1212: Compile the first code file using the first preset compilation method to obtain a first marker corresponding to the code text in the first code file.

[0187] In this embodiment of the application, if the functional standard implemented by the preset hardware description language is for implementing the basic logical unit, then the first code file is compiled using a first preset compilation method. Specifically, the first preset compilation method mainly uses symbol tagging to perform lexical analysis on the input code text to obtain a first token corresponding to the code text in the first code file.

[0188] Step S1213: The first token is recursively parsed layer by layer into a first abstract syntax tree with a preset structure, and the module is encapsulated according to the node type in the first abstract syntax tree to obtain the encapsulated module.

[0189] In this embodiment, the obtained first token is recursively converted into a first abstract syntax tree. The basic structure of the syntax tree adopts a tree-root structure, such as... Figure 5 As shown, the root of the first abstract syntax tree corresponds to the function "a+b" that implements the basic logical unit, that is, summing a and b. The first identifiers obtained after compilation are "a, b, +", therefore, each branch node connected by the root corresponds to a first identifier. For example... Figure 6 As shown, the root of the first abstract syntax tree corresponds to the function c / d that implements the basic logical unit, that is, the quotient of c and d. The first identifiers obtained after compilation are "c", "d", and " / ", therefore, each branch node connected by the root corresponds to a first identifier. Further, as... Figure 7 The diagram shown illustrates a specific example of encapsulating a module based on a+b.

[0190] As can be seen, each branch node connected by the root corresponds to either a parameter or an operation. Therefore, by encapsulating modules according to the node types in the first abstract syntax tree, we can obtain encapsulated modules. That is, by defining the operation interface of the encapsulated modules according to different node types, we obtain the final encapsulated modules.

[0191] In another specific implementation, such as Figure 8 As shown, for a functional module used to implement functional requirements, the step of encapsulating the functional module to obtain an encapsulated module includes:

[0192] Step S1221: If the functional standard implemented by the preset hardware description language is used to implement the functional requirements, then obtain the second code file corresponding to the functional requirements.

[0193] In this embodiment, the default hardware description language still uses Verilog basic syntax as an example to describe the system operation flow in detail. If Verilog is used to implement the functional requirements, it means that it belongs to a complex basic syntax, and the function implemented is often not a simple logical operation, but a functional requirement, such as implementing a signal delay function, summing and then quotienting parameters, etc. Therefore, if the functional standard implemented by the default hardware description language is to implement the functional requirements, then a second code file corresponding to the functional requirements is obtained, and this second code file is the basic simple syntax content describing the functional requirements.

[0194] Step S1222: Compile the second code file using the second preset compilation method to obtain a second marker corresponding to the code text in the second code file.

[0195] In this embodiment, if the functional standard implemented by the preset hardware description language is for fulfilling functional requirements, then the second code file is compiled using a second preset compilation method. Specifically, the second preset compilation method also performs lexical analysis on the input code text using a symbol tagging method to obtain a second token (TOKEN) corresponding to the code text in the second code file.

[0196] Step S1223: The second token is recursively parsed layer by layer into a second abstract syntax tree with a preset structure, and the module is encapsulated according to the node type in the second abstract syntax tree to obtain the encapsulated module.

[0197] In this embodiment, the obtained second token is recursively converted into a second abstract syntax tree. The basic structure of the syntax tree also adopts a tree-root structure. If the functional standard implemented by the preset hardware description language is for fulfilling functional requirements, then during the conversion into an abstract syntax tree, a node under the root of one syntax tree can also serve as the root of another syntax tree. For example... Figure 6 As shown, the root of the second abstract syntax tree corresponds to the function c / d that implements the basic logical unit, that is, the quotient of c and d. The second markers obtained after compilation are "c", "d", and " / ", which, as a node c in the syntax tree c / d, can be the root of another syntax tree a+b. Therefore, second markers such as "a", "b", and "+" can also be derived from the node c.

[0198] Similarly, as can be seen, in the final generated second abstract syntax tree, each branch node connected by the root corresponds to either a parameter or an operation. Therefore, by encapsulating modules according to the node types in the second abstract syntax tree, encapsulated modules can also be obtained. That is, by defining the operation interface of the encapsulated module according to different node types, the final encapsulated module is obtained.

[0199] It should be noted that during the module encapsulation process, the code that implements specific functions can be encapsulated line by line into basic logical unit modules. Alternatively, this code can be defined as a functional requirement module with known functionality but unknown implementation method, based on the function and interface definitions.

[0200] Step S13: When designing the code, call the encapsulation module and disassemble the encapsulation module so that the digital hardware circuit can be described by the code file obtained after disassembly.

[0201] In this embodiment, because a large amount of code is encapsulated and transformed into functionally fixed modules that are immutable internally, not only is the error rate of code porting effectively reduced, but also, during code design, the encapsulated modules can be directly called, and then disassembled. That is, the digital hardware circuit can be described using the code files obtained after disassembly. Furthermore, it should be noted that after encapsulating the modules, when designing the code, one can also choose to directly call the encapsulated modules and connect the various modules directly with line segments, which can greatly simplify the code design work.

[0202] As a preferred embodiment, defining corresponding functional modules for the preset hardware description language based on the functional standards implemented by the preset hardware description language includes:

[0203] The preset hardware description language is functionally analyzed according to preset functional analysis rules in order to determine the target functions implemented by the preset hardware description language.

[0204] Count and record the number of functions implemented by the target function;

[0205] Determine the current quantity of the functions, and based on the current quantity and the correspondence between the preset quantity of functions and the preset function standards, determine the function standards implemented by the preset hardware description language;

[0206] If the functional standard implemented by the preset hardware description language is for implementing basic logic units, then the preset hardware description language is defined as a basic logic unit module.

[0207] If the functional standard implemented by the preset hardware description language is used to implement functional requirements, then based on the functional requirements, a target logical basic unit module matching the functional requirement module is determined from the logical basic unit modules, and the target logical basic unit module is encapsulated as the functional requirement module.

[0208] In a preferred embodiment, the step of encapsulating the functional modules to obtain an encapsulated module includes:

[0209] If the functional standard implemented by the preset hardware description language is used to implement the basic logical unit, then the first code file corresponding to the basic logical unit is obtained;

[0210] The first code file is compiled using a first preset compilation method to obtain a first marker corresponding to the code text in the first code file;

[0211] The first token is recursively parsed layer by layer into a first abstract syntax tree with a preset structure, and then the module is encapsulated according to the node type in the first abstract syntax tree to obtain the encapsulated module.

[0212] In a preferred embodiment, the step of encapsulating the functional modules to obtain an encapsulated module includes:

[0213] If the functional standard implemented by the preset hardware description language is used to implement the functional requirements, then obtain the second code file corresponding to the functional requirements;

[0214] The second code file is compiled using the second preset compilation method to obtain a second marker corresponding to the code text in the second code file;

[0215] The second token is recursively parsed layer by layer into a second abstract syntax tree with a preset structure, and then module encapsulation is performed according to the node type in the second abstract syntax tree to obtain the encapsulated module.

[0216] In a preferred embodiment, the step of encapsulating the functional modules to obtain an encapsulated module includes:

[0217] Obtain the root node, operation class node, and parameter class node from the first abstract syntax tree and / or the second abstract syntax tree;

[0218] The root node is defined as the output interface of the encapsulation module, the operation class node is defined as the module name of the encapsulation module, and the parameter class node is defined as the input interface of the encapsulation module.

[0219] In a preferred embodiment, the code file is compiled using a preset compilation method to obtain markers corresponding to the code text in the code file, including:

[0220] Lexical analysis of the code text in the code file is performed using symbolic notation to obtain the tokens corresponding to the code text in the code file.

[0221] In a preferred embodiment, the step of calling the encapsulation module and disassembling the encapsulation module during code design, so as to describe the digital hardware circuit through the code file obtained after disassembly, includes:

[0222] The encapsulation module is called during code design.

[0223] The encapsulation module is converted into a third abstract syntax tree with a preset structure;

[0224] The third abstract syntax tree is split to obtain several third tokens corresponding to the code text in the code file;

[0225] The code file is determined based on the third identifier so that the digital hardware circuit can be described using the code file.

[0226] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0227] The steps of the digital hardware circuit description or algorithm described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0228] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0229] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0230] The present invention has provided a detailed description of a digital hardware circuit description method, apparatus, device, and storage medium. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for describing digital hardware circuits, characterized in that, include: Based on the functional standards implemented by the preset hardware description language, define corresponding functional modules for the preset hardware description language; The functional modules are then encapsulated to obtain the encapsulated modules; When designing the code, the encapsulation module is called and the encapsulation module is disassembled so that the digital hardware circuit can be described by the code file obtained after disassembly. The functional standard implemented according to the preset hardware description language, defining corresponding functional modules for the preset hardware description language, includes: The preset hardware description language is functionally analyzed according to preset functional analysis rules to determine the target functions implemented by the preset hardware description language. Count and record the number of functions implemented by the target function; Determine the current quantity of the functions, and based on the current quantity and the correspondence between the preset quantity of functions and the preset function standards, determine the function standards implemented by the preset hardware description language; If the functional standard implemented by the preset hardware description language is for implementing basic logic units, then the preset hardware description language is defined as a basic logic unit module. If the functional standard implemented by the preset hardware description language is used to implement functional requirements, then based on the functional requirements, a target logical basic unit module matching the functional requirement module is determined from the logical basic unit module, and the target logical basic unit module is encapsulated as the functional requirement module. The step of encapsulating the functional modules to obtain encapsulated modules includes: If the functional standard implemented by the preset hardware description language is used to implement the basic logical unit, then the first code file corresponding to the basic logical unit is obtained; The first code file is compiled using a first preset compilation method to obtain a first marker corresponding to the code text in the first code file; The first token is recursively parsed layer by layer into a first abstract syntax tree with a preset structure, and then the module is encapsulated according to the node type in the first abstract syntax tree to obtain the encapsulated module. If the functional standard implemented by the preset hardware description language is used to implement the functional requirements, then obtain the second code file corresponding to the functional requirements; The second code file is compiled using the second preset compilation method to obtain a second marker corresponding to the code text in the second code file; The second token is recursively parsed layer by layer into a second abstract syntax tree with a preset structure, and then module encapsulation is performed according to the node type in the second abstract syntax tree to obtain the encapsulated module.

2. The digital hardware circuit description method according to claim 1, characterized in that, The step of encapsulating the functional modules to obtain encapsulated modules includes: Obtain the root node, operation class node, and parameter class node from the first abstract syntax tree and / or the second abstract syntax tree; The root node is defined as the output interface of the encapsulation module, the operation class node is defined as the module name of the encapsulation module, and the parameter class node is defined as the input interface of the encapsulation module.

3. The digital hardware circuit description method according to claim 1, characterized in that, The code file is compiled using a preset compilation method to obtain markers corresponding to the code text in the code file, including: Lexical analysis of the code text in the code file is performed using symbolic notation to obtain the tokens corresponding to the code text in the code file.

4. The digital hardware circuit description method according to claim 1, characterized in that, The process of calling the encapsulation module during code design and disassembling the encapsulation module to describe the digital hardware circuit using the resulting code file includes: The encapsulation module is called during code design. The encapsulation module is converted into a third abstract syntax tree with a preset structure; The third abstract syntax tree is split to obtain several third tokens corresponding to the code text in the code file; The code file is determined based on the third identifier so that the digital hardware circuit can be described using the code file.

5. A digital hardware circuit description device, characterized in that, include: The module definition unit is used to define corresponding functional modules for the preset hardware description language according to the functional standards implemented by the preset hardware description language. A module encapsulation unit is used to encapsulate the functional modules to obtain encapsulated modules; The module calling unit is used to call the encapsulation module during code design and to disassemble the encapsulation module so that the digital hardware circuit can be described by the code file obtained after disassembly. The module definition unit is specifically used for: The preset hardware description language is functionally analyzed according to preset functional analysis rules to determine the target functions implemented by the preset hardware description language. Count and record the number of functions implemented by the target function; Determine the current quantity of the functions, and based on the current quantity and the correspondence between the preset quantity of functions and the preset function standards, determine the function standards implemented by the preset hardware description language; If the functional standard implemented by the preset hardware description language is for implementing basic logic units, then the preset hardware description language is defined as a basic logic unit module. If the functional standard implemented by the preset hardware description language is used to implement functional requirements, then based on the functional requirements, a target logical basic unit module matching the functional requirement module is determined from the logical basic unit module, and the target logical basic unit module is encapsulated as the functional requirement module. The module encapsulation unit is specifically used for: If the functional standard implemented by the preset hardware description language is used to implement the basic logical unit, then the first code file corresponding to the basic logical unit is obtained; The first code file is compiled using a first preset compilation method to obtain a first marker corresponding to the code text in the first code file; The first token is recursively parsed layer by layer into a first abstract syntax tree with a preset structure, and then the module is encapsulated according to the node type in the first abstract syntax tree to obtain the encapsulated module. If the functional standard implemented by the preset hardware description language is used to implement the functional requirements, then obtain the second code file corresponding to the functional requirements; The second code file is compiled using the second preset compilation method to obtain a second marker corresponding to the code text in the second code file; The second token is recursively parsed layer by layer into a second abstract syntax tree with a preset structure, and then module encapsulation is performed according to the node type in the second abstract syntax tree to obtain the encapsulated module.

6. An electronic device, characterized in that, The electronic device includes a processor and a memory; wherein the memory is used to store a computer program, which is loaded and executed by the processor to implement the digital hardware circuit description method as described in any one of claims 1 to 4.

7. A computer-readable storage medium, characterized in that, Used to store computer programs; wherein the computer programs, when executed by a processor, implement the digital hardware circuit description method as described in any one of claims 1 to 4.

Images