Die seal ring structure
Patent Information
- Application Number
- CN202210128113.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-02-11
- Publication Date
- 2026-10-23
- Estimated Expiration
- 2042-02-11
Smart Images

Figure CN116631954B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a bare sheet sealing ring structure, and more particularly to a bare sheet sealing ring structure having a comb-like portion. Background Technology
[0002] Die seal rings are typically formed between the dicing track and the integrated circuit on each die on a wafer. They are formed by alternately stacking multiple dielectric layers and multiple metal layers, with the metal layers interconnected through vias passing through the dielectric layers. During the wafer dicing process, the die seal ring prevents stress cracking that occurs from the dicing track to the integrated circuit. Furthermore, the die seal ring prevents moisture penetration and chemical damage, such as the diffusion of acids, alkalis, or contaminants. With current semiconductor technology, structures such as dual seal rings have been developed to address more severe cracking problems. However, due to the increasing demand for miniaturization and enhanced functionality of semiconductor devices, more effective solutions to cracking remain a significant challenge in this field. Summary of the Invention
[0003] One embodiment of the present invention discloses a bare die sealing ring structure, which mainly includes a metal interconnect structure disposed on a substrate. The metal interconnect structure further includes an inter-metal dielectric layer disposed on the substrate and a first metal layer disposed within the inter-metal dielectric layer. More specifically, the first side of the first metal layer includes a comb-like portion in a top view, the second side of the first metal layer includes a straight line, the third side of the first metal layer includes a straight line, and the fourth side of the first metal layer includes a straight line. Attached Figure Description
[0004] Figure 1 This is a top view of a semiconductor device according to an embodiment of the present invention;
[0005] Figure 2 for Figure 1 Enlarged top view of the bare die sealing ring;
[0006] Figure 3 for Figure 2 A schematic cross-section along the tangent AA';
[0007] Figure 4 for Figure 2 A schematic cross-sectional view along the tangent BB'.
[0008] Figure 5 This is a top view of a bare die sealing ring according to an embodiment of the present invention;
[0009] Figure 6 for Figure 5A schematic diagram of cross-sections along tangents CC', DD', and EE'.
[0010] Figure 7 This is a top view of a bare die sealing ring according to an embodiment of the present invention;
[0011] Figure 8 for Figure 7 A schematic diagram of the cross-section along the tangents FF' and GG'.
[0012] Explanation of main component symbols
[0013] 12: Base
[0014] 14: Nude Film Section
[0015] 16: Sealing ring area
[0016] 18: Bare sheet sealing ring
[0017] 20: Bare plate sealing ring
[0018] 22: Bare plate sealing ring
[0019] 24: Interlayer dielectric layer
[0020] 26: Intermetallic dielectric layer
[0021] 28: Metal interconnects
[0022] 30: Metal interconnects
[0023] 32: Metal interconnects
[0024] 34: Metal interconnects
[0025] 36: Metal interconnects
[0026] 38: Metal interconnects
[0027] 40: Metal interconnects
[0028] 42: First side
[0029] 44: Second side
[0030] 46: Third side
[0031] 48: Fourth side
[0032] 50: Comb-like part
[0033] 52: Main body
[0034] 54: Protrusion
[0035] 56: Groove Detailed Implementation
[0036] Please refer to Figures 1 to 4 , Figure 1 This is a top view of a semiconductor device according to an embodiment of the present invention. Figure 2 for Figure 1 Enlarged top view of the bare die sealing ring. Figure 3 for Figure 2 A schematic diagram of a cross-section along the tangent AA'. Figure 4 Then it is Figure 2 A schematic cross-sectional view along the tangent BB'. (See diagram below.) Figures 1 to 4 As shown, a substrate 12 is first provided, for example, a substrate 12 made of a semiconductor material, wherein the semiconductor material can be selected from the group consisting of silicon, germanium, silicon-germanium composite, silicon carbide, gallium arsenide, etc. The substrate 12 includes a die region 14 or an integrated circuit region and a sealing ring region 16 or a peripheral region surrounding the die region 14, wherein one or more die sealing rings 18 may be disposed in the sealing ring region 16. In this embodiment, the die sealing rings 18 preferably include a die sealing ring 20 disposed in the inner ring and a die sealing ring 22 disposed in the outer ring, both of which surround the die region 14.
[0037] The bare die region 14 on the substrate 12 may contain active (active) devices such as metal-oxide-semiconductor (MOS) transistors, passive (passive) devices, conductive layers, and dielectric layers such as interlayer dielectric (ILD) 24 covering it. More specifically, the substrate 12 may contain planar or non-planar (such as fin structure transistors) MOS transistor devices, wherein the MOS transistor may include a metal gate and source / drain regions, spacers, epitaxial layers, contact hole etch stop layers, and other transistor elements. The interlayer dielectric layer 24 may be disposed on the substrate 12 and cover the MOS transistor, and the interlayer dielectric layer 24 may have multiple contact plugs electrically connecting the gate and / or source / drain regions of the MOS transistor. Since the fabrication processes of planar or non-planar transistors and interlayer dielectric layers are well known in the art, they will not be described in detail here.
[0038] Then, a metal interconnect structure is formed on the interlayer dielectric layer 24 to electrically connect the aforementioned contact plug. The metal interconnect structure may include multiple interlayer dielectric layers 26 and multiple metal interconnects 28, 30, 32, 34, 36, 38, 40, or metal layers embedded in the interlayer dielectric layer 26. It should be noted that although this embodiment uses seven layers of metal interconnects 28, 30, 32, 34, 36, 38, 40 as an example, the number of metal interconnects and the number of layers are not limited to this and can be adjusted according to the manufacturing process requirements. Secondly, each metal interconnect in the metal interconnect structure preferably includes a trench conductor and a via conductor 26. For example, the odd-numbered metal interconnects 28, 32, 36, and 40 include trench conductors, while the even-numbered metal interconnects 30, 34, and 38 include via conductors. Each metal interconnect 28, 30, 32, 34, 36, 38, and 40 is preferably embedded in the intermetallic dielectric layer 26 and electrically connected to each other using a dual damascene fabrication process. Since the dual damascene fabrication process is well-known in the art, it will not be described in detail here. Furthermore, in this example, the metal interconnects 28, 30, 32, 34, 36, 38, and 40 preferably contain copper, and the intermetallic dielectric layer 26 preferably contains silicon oxide, but is not limited to this.
[0039] from Figure 2 From the top view, the bare sheet sealing ring 20 is located on the outer ring, or more specifically... Figure 3 The second layer of metal interconnects 36, counting from the top in the cross-sectional angle, may include first side 42 and second side 44 extending vertically in the Y direction, and third side 46 and fourth side 48 extending horizontally in the X direction. The first side 42 on the left, or the side furthest from the die area 14, includes a comb-shaped portion 50 in plan view. The second side 44 on the right, or near the die area 14, includes a linear line in plan view. The third side 46 above also includes a linear line in plan view, and the fourth side 48 below also includes a linear line in plan view. In other words, the outer die sealing ring 20 has straight edges on the other three sides, except for the first side 42, which is a non-linear edge. Furthermore, the metal interconnects 38 above the metal interconnects 36, formed by the contact hole conductor, preferably extend in the Y direction.
[0040] In detail, from a top-down view, the metal interconnect 36 or comb-shaped portion 50 includes a main body 52, a plurality of protrusions 54 disposed beside the main body 52, and grooves 56 disposed between the protrusions 54. Preferably, the sidewalls of the protrusions 54 are flush with the sidewalls of adjacent protrusions 54 along the Y direction. The protrusions 54 may have different lengths or widths, and the grooves 56 may have the same or different spacing. The different lengths or widths of the protrusions 54 may represent different distances between the edges extending along the Y direction or different distances between the edges extending along the X direction. It should be noted that although this embodiment only forms the comb-shaped portion 50 on the first side 42 of the metal interconnect 36, it is not limited to this. According to other embodiments of the present invention, the comb-shaped portion 50 may be formed on the first side 42 of the metal interconnect 36. Figure 1 The entire bare die sealing ring 18 is formed on one or more sides, including two sides, three sides, or even all four sides. Figure 2 The comb-like portion 50, this variation is also within the scope of the present invention.
[0041] It should also be noted that, Figure 1 Although the example only uses a single-layer metal interconnect 36 made of trench conductors paired with a single-layer metal interconnect 38 made of contact hole conductors above, and the metal interconnect 36 includes a comb-shaped portion 50 when viewed from above, it is not limited to this. According to other embodiments of the present invention, the pattern of the comb-shaped portion 50 can be extended to other layers, especially odd-numbered layers of metal interconnects 28, 32, 36, 40 made of trench conductors. For example, in addition to the comb-shaped portion 50 included in the third layer of metal interconnects 36 from the bottom up in this embodiment when viewed from a top angle, the same comb-shaped portion 50 may also be included in the first layer of metal interconnects 28, the second layer of metal interconnects 32, and / or the fourth layer of metal interconnects 40, depending on the manufacturing process or product requirements. Alternatively, the first side 42 of some metal interconnects 28, 32, 36, and 40 may include the comb-shaped portion 50, but the first side 42 of some metal interconnects 28, 32, 36, and 40 may include a straight line. The positions of the protrusions 54 and grooves 56 of the comb-shaped portion 50 may be the same as or different from the positions of the protrusions 54 and grooves 56 in the metal interconnects 36. These variations are all within the scope of this invention.
[0042] Please continue to refer to Figures 5 to 6 , Figure 5 A top view of a bare die sealing ring according to another embodiment of the present invention is also disclosed. Figure 6 Then it is Figure 5 A schematic cross-sectional view along tangents CC', DD', and EE'. (See diagram below.) Figures 5 to 6As shown, compared to the previous embodiment where the metal interconnects 38 formed by the contact hole conductors all have the same length and the metal interconnects 38 do not overlap the protrusions 54 when viewed from above, in this embodiment the metal interconnects 38 formed by the contact hole conductors overlap the protrusions 54 and the metal interconnects 38 have different lengths. The length of the metal interconnects 38 that partially overlap the protrusions 54 is preferably less than the length of the protrusions 54 extending along the Y direction, while the length of the metal interconnects 38 provided on the main body 52 is greater than the length of the protrusions 54.
[0043] Please continue to refer to Figures 7 to 8 , Figure 7 A top view of a bare die sealing ring according to an embodiment of the present invention is also disclosed. Figure 8 Then it is Figure 7 A schematic cross-sectional view along tangents FF' and GG'. (See diagram below.) Figures 7 to 8 As shown, in this embodiment, the metal interconnects 38 formed by the contact hole conductors also overlap the protrusions 54, and the metal interconnects 38 have different lengths. The length of the metal interconnects 38 partially overlapping the protrusions 54 is preferably less than the length of the protrusions 54 extending along the Y direction, but the length of the metal interconnects 38 partially provided on the main body 52 can be greater than or less than the length of the protrusions 54. For example, in this embodiment, the shortest metal interconnect 38 provided on the main body 52 is preferably less than the length of the protrusions 54 extending along the Y direction and less than or equal to the spacing of the grooves 56 extending along the Y direction.
[0044] In summary, the present invention preferably discloses a die sealing ring disposed on the periphery of a die area or integrated circuit. The die sealing ring comprises multiple intermetallic dielectric layers and multiple metal interconnects embedded within the intermetallic dielectric layers. At least one side of the die sealing ring or the metal interconnects, or preferably the side furthest from the die area, includes a comb-like portion when viewed from a top view. In detail, the comb-like portion may include multiple approximately serrated protrusions and grooves disposed between the protrusions. The edge of the die sealing ring closest to the die area, except for at least one side furthest from the die area which includes the comb-like portion, is preferably a straight edge without any comb-like structure. According to the preferred embodiment of the present invention, forming a comb-like structure at the edge of the die sealing ring can effectively improve the problem of die cracking caused by stress.
[0045] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.
Claims
1. A bare sheet sealing ring structure, characterized in that, Include: A metal interconnect structure, disposed on a substrate, comprising: An intermetallic dielectric layer is disposed on the substrate; and A first metal interconnect is disposed within the inter-metal dielectric layer, wherein a first side of the first metal interconnect includes a comb-like portion when viewed from a top angle. The comb-shaped portion includes a main body, a first protrusion and a second protrusion disposed beside the main body, and a groove disposed between the first protrusion and the second protrusion. The bare die sealing ring structure also includes a second metal interconnect, which is disposed within the intermetallic dielectric layer and on the first metal interconnect, wherein the second metal interconnect at least partially overlaps the first protrusion and the overlap length is less than the extension length of the first protrusion.
2. The bare die sealing ring structure as claimed in claim 1, wherein the second side of the first metal inner line comprises a straight line.
3. The bare die sealing ring structure as claimed in claim 1, wherein the third side of the first metal inner line comprises a straight line.
4. The bare die sealing ring structure as claimed in claim 1, wherein the fourth side of the first metal inner line comprises a straight line.
5. The bare sheet sealing ring structure as claimed in claim 1, wherein the sidewall of the first protrusion is flush with the sidewall of the second protrusion.
6. The bare die sealing ring structure as claimed in claim 1, wherein the second metal interconnect includes a contact hole conductor.
7. The bare die sealing ring structure as claimed in claim 1, wherein the first protrusion and the second protrusion protrude toward the side away from the bare die area.
Citation Information
Patent Citations
Semiconductor device and manufacturing method thereof
US20080157285A1