GaN-based nano-LED structures with electric field enhancement under AC electric field driving conditions
Patent Information
- Application Number
- CN202310639955.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-01
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2043-06-01
AI Technical Summary
尽管GaN基LED的研究已经较为深入,但是传统的LED一般都工作在直流电下,在这种工作模式下也存在着局限性:随着像素尺寸的减小,金属电极难以集成在LED器件上或是难以形成良好的欧姆接触
[0023]本发明提出的纳米柱在量子阱MQW层较细,P型和N型GaN层粗,形成中间细、两端粗的结构。该GaN基纳米柱形状能够提高交流电场环境中,量子阱层内的电场强度,同时增加电流驱动下纳米柱结构中在量子阱区域的电流密度,形成很强的电场增益和电流增益,从而提高器件的发光效率。
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Figure CN116632135B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a GaN-based nano-LED structure with electric field enhancement under AC electric field driving conditions, belonging to the technical field of wide bandgap semiconductor materials and light-emitting devices. Background Technology
[0002] Optoelectronic devices have received widespread attention in research over the past few decades, and have been widely applied in many fields, such as communication storage, display lighting, food safety, and new displays. GaN-based optoelectronic devices have high luminous efficiency, energy-saving and environmentally friendly advantages, small size, and long lifespan, making them highly promising. GaN materials have been extensively studied and used in optoelectronic devices such as light-emitting diodes (LEDs) and lasers (LDs). Although research on GaN-based LEDs is relatively in-depth, traditional LEDs generally operate under direct current (DC), which has limitations: as pixel size decreases, it becomes difficult to integrate metal electrodes onto LED devices or form good ohmic contacts. A novel LED driving technology—alternating current (AC) electric field driving technology—has emerged and received widespread attention in areas where DC-driven nano-LEDs are limited.
[0003] As a potential alternative to DC-driven LEDs, AC electric field driving technology for LEDs has been extensively studied due to its unique advantages and potential application value. Compared to DC-driven light-emitting devices, AC driving has significant advantages in the field of nanoscale light-emitting devices. For example, by changing the direction and frequency of the applied electric field, charge accumulation in the light-emitting device can be effectively prevented, thereby improving luminous efficiency; in AC-driven devices, the insulating dielectric layer can avoid non-radiative recombination of injected charge carriers, thus reducing heat generation. GaN-based LEDs driven by AC electric fields can achieve contactless driving of nanoscale display pixels, and are expected to replace DC driving as a new driving mode for ultra-high resolution displays. Therefore, exploring and realizing AC-driven nano-LED structures with high gain is an urgent problem to be solved. Summary of the Invention
[0004] The purpose of this invention is to provide a GaN-based nanoLED structure with electric field enhancement under AC electric field driving conditions.
[0005] The technical solution adopted in this invention is as follows:
[0006] 1. A GaN-based nano-LED structure with electric field enhancement capability under AC electric field driving conditions, the structure comprising, from bottom to top:
[0007] A substrate;
[0008] A GaN buffer layer disposed on the substrate;
[0009] An n-type GaN layer is disposed on a GaN buffer layer;
[0010] A multi-quantum-well active layer disposed on an n-type GaN layer;
[0011] A p-type GaN layer disposed on a multi-quantum-well active layer;
[0012] The GaN-based nanoLED structure forms a nanopillar structure that penetrates the p-type GaN layer, the multi-quantum-well active layer, the n-type GaN layer, and extends down to the GaN buffer layer. The nanopillars have a diameter of 150–900 nm, a period of 300–1000 nm, and a height of 400–2000 nm. The cross-sectional area of the nanopillar structure is smallest at the multi-quantum-well active layer, gradually increasing towards both ends, forming a columnar structure that is thinner in the middle and thicker at both ends. Generally, as long as the cross-sectional area of the multi-quantum-well active layer is smaller than the area of the p-type GaN layer / n-type GaN layer, the electric field distribution can be altered, resulting in a gain effect.
[0013] Preferably, it further includes an ITO layer, which is disposed above the p-type GaN layer.
[0014] Preferably, it further includes an electrode layer located below the substrate layer.
[0015] Preferably, the substrate is a silicon substrate or a sapphire substrate with a thickness of 300-500 micrometers.
[0016] Preferably, the GaN buffer layer is undoped GaN with a thickness of 1–5 micrometers.
[0017] Preferably, the doping concentration of the n-type GaN layer is 1–500 × 10⁻⁶. 17 cm -2 The thickness is 0.5 to 3 micrometers.
[0018] Preferably, the multi-quantum well active layer is an InGaN / GaN periodic structure with a period number of 3 to 10, the In composition content in the InGaN layer is 0.02 to 0.25, the thickness is 1 to 4 nm, and the GaN layer thickness is 5 to 18 nm.
[0019] Preferably, the doping concentration of the p-type GaN layer is 1 to 50 × 10⁻⁶. 17 cm -2 Thickness 0.1 to 1 micrometer.
[0020] Preferably, the thickness of the ITO layer is 30–300 nanometers.
[0021] Preferably, the electrode layer is a Ti / Au bilayer structure, with a Ti thickness of 2–40 nm and an Au thickness of 10–1000 nm.
[0022] Preferably, the nanopillar has a diameter of 150–900 nm, a period of 300–1000 nm, and a height of 400–2000 nm.
[0023] The nanopillars proposed in this invention are thinner in the quantum well (MQW) layer and thicker in the P-type and N-type GaN layers, forming a structure that is thin in the middle and thick at both ends. This GaN-based nanopillar shape can increase the electric field strength within the quantum well layer in an AC electric field environment, and at the same time increase the current density in the quantum well region of the nanopillar structure under current driving, forming a strong electric field gain and current gain, thereby improving the luminous efficiency of the device. Attached Figure Description
[0024] Figure 1 This is a schematic diagram of a GaN-based nano-LED structure that exhibits electric field enhancement under AC electric field driving conditions.
[0025] Figure 2 This is a schematic diagram of the structure of the blue LED epitaxial wafer used in this invention.
[0026] Figure 3 This is a schematic diagram of the structure obtained in step (2) of Example 1.
[0027] Figure 4 This is a schematic diagram of the structure obtained in step (3) of Example 1.
[0028] Figure 5 This is a schematic diagram of the structure obtained in step (4) of Example 1.
[0029] Figure 6 This is a schematic diagram of the structure obtained in step (5) of Example 1.
[0030] Figure 7 This is a schematic diagram of the structure obtained in step (6) of Example 1.
[0031] Figure 8 This is a schematic diagram of the structure obtained in step (7) of Example 1.
[0032] Figure 9 This is a schematic diagram of the structure obtained in step (8) of Example 1.
[0033] Figure 10 This is a schematic diagram of the structure obtained by step (9) of Example 1.
[0034] Figure 11 This is a schematic diagram of the structure obtained by step (10) of Example 1.
[0035] Figure 12 This is a TEM scan of the GaN-based nanoLED structure with electric field enhancement under AC electric field driving conditions in Example 1.
[0036] Figure 13 The graph shows the relationship between the current, power, and efficiency of the GaN-based nano-LED structure with electric field enhancement under AC electric field driving conditions in Example 1 and the quantum well diameter.
[0037] Figure 14 The value represents the luminous intensity of the GaN-based nano-LED structure in Comparative Example 1.
[0038] Figure 15 The luminous brightness of the GaN-based nano-LED structure with electric field enhancement under AC electric field driving conditions in Example 1 is shown.
[0039] Explanation of reference numerals in the attached figures:
[0040] 1: Substrate; 2: GaN buffer layer; 3: N-GaN layer; 4: Multiple quantum well (MQW) layer; 5: P-GaN layer; 6: ITO layer; 7: SiO2 mask layer; 8: Nanopillar; 9: Photoresist layer; 10: Electrode.
[0041] The specific embodiments of the present invention will be further described below with reference to the accompanying drawings. Detailed Implementation
[0042] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0043] Example 1: A GaN-based nano-LED structure with electric field enhancement under AC electric field driving conditions
[0044] In this embodiment, the substrate material selected and the epitaxial wafer structure are as follows: Figure 2 The diagram shows a standard blue LED epitaxial wafer with a pn structure, comprising a silicon substrate 1; a gallium nitride buffer layer 2 grown on the silicon substrate; an n-type gallium nitride layer 3 grown on the gallium nitride buffer layer; a quantum well active layer 4 grown on the n-type gallium nitride layer; a p-type gallium nitride layer 5 grown on the quantum well active layer; and an ITO layer 6 grown on the p-type gallium nitride layer. Alternatively, a blue LED epitaxial wafer without an ITO layer can be used.
[0045] The specific fabrication method of the high current gain GaN-based LED structure driven by an alternating electric field is as follows:
[0046] (1) Clean the epitaxial wafer of the blue LED. The cleaning process is as follows: put the epitaxial wafer into acetone solution and sonicate for 10-15 minutes, then put it into an ethanol solution water bath for 10-15 minutes, then rinse it with deionized water and blow it dry.
[0047] (2) Figure 3 As shown, plasma-enhanced chemical vapor deposition (PECVD) technology was used to deposit [the material] in In [the environment]. x Ga 1-x A 200nm thick SiO2 mask layer was deposited on the epitaxial wafer of the N / GaN quantum well blue LED. The PECVD growth conditions for SiO2 were as follows: a 5% SiH4 / N2 mixed gas and N2O gas were introduced into the reaction chamber at flow rates of 400sccm and 500sccm, respectively. Under the conditions of pressure of 850mTorr, power of 50W, and temperature of 250℃, SiO2 was deposited on the surface of the epitaxial wafer through the SiH4+O→SiO2(+H2O) reaction for 1 minute and 20 seconds.
[0048] (3) Figure 4 As shown, a layer of photoresist 9 was spin-coated onto the SiO2 mask layer 7 using a spin coater. The photoresist used was AZ5214. The spin coater speed was 600 rpm for 9 s and 4000 rpm for 40 s. After spin coating, the photoresist was baked on a hot plate at 100℃ for 1 min.
[0049] (4) Figure 5 As shown, the periodic pattern was transferred onto the photoresist layer 9. Using a SUSS UV lithography machine, the hard contact exposure mode was selected, and the exposure time was 2.5s. Then, it was placed in the developer for development for 40s. After that, it was rinsed with deionized water and dried.
[0050] (5) Figure 6 As shown, the pattern on the photoresist layer 9 is transferred to the SiO2 mask layer 7, and the SiO2 is etched using a reactive ion etching (RIE) device. CF4 gas is introduced, and the CF4 gas flow rate is controlled at 30 sccm, the reaction pressure in the chamber is 4 Pa, the RF power is set to 120 W, and the time is set to 6 min.
[0051] (6) Figure 7 As shown, the excess ITO layer 6 was removed, and wet etching was performed using ITO etchant. The water bath was heated to 50°C, and the wet etching time was strictly controlled to 3 minutes.
[0052] (7) Figure 8As shown, using an inductively coupled plasma etching (ICP) apparatus, Cl2 and BCl3 are introduced into the reaction chamber. Using a photoresist layer 9 and a SiO2 mask layer 7 as masks, p-type gallium nitride layer 5, quantum well layer 4, and n-type gallium nitride layer 3 are anisotropically etched up to an n-type gallium nitride buffer layer 2, forming a periodically arranged and mutually isolated cylindrical nanoscale mesa structure. The nanopillars 8 are composed of an n-type gallium nitride buffer layer 2, an n-type gallium nitride layer 3, a quantum well layer 4, a p-type gallium nitride layer 5, and an ITO layer 6. The etching conditions are: RF power 100W; ICP power 300W; Cl2 flow rate 48 sccm; BCl3 flow rate 6 sccm; gas pressure 10 mTorr; and etching reaction time 1 min 15 s.
[0053] (8) Figure 9 As shown, the photoresist layer 9 was removed by ultrasonic cleaning with acetone, ethanol and deionized water for 5 minutes in sequence. After removing the excess photoresist, it was immersed in BOE solution for 3 minutes, cleaned with deionized water and dried to remove the SiO2 mask layer 7.
[0054] (9) such as Figure 10 As shown, the sidewalls of the formed nanopillars were modified using a wet etching method to create the desired nanopillar structure that is thin in the middle and thick at both ends. The solution used was a 1:1 volume ratio diluted KOH solution or a 1:1 volume ratio diluted NaOH solution for wet etching, followed by heating in an 80°C water bath for 10 minutes. Afterwards, the sidewalls were repaired to repair etching losses using a 1:1 volume ratio diluted H3PO4 solution, heated in an 80°C water bath for 60 minutes. A 1:1 volume ratio diluted KOH solution refers to a 1:1 volume ratio mixture of water and a saturated KOH solution; the rest of the process is the same.
[0055] (10) such as Figure 11 As shown, a single-ended electrode 10 was fabricated. Nickel (Ni) and gold (Au) were sequentially deposited on the substrate 1 using an electron beam evaporation (EBE) apparatus, with thicknesses of 10 nm and 50 nm, respectively.
[0056] The GaN-based nano-LED structure with electric field enhancement was photographed using a TEM (FEI Tecnai F20 TEM). The images are shown below. Figure 12 As shown.
[0057] The relationship between current, power, and efficiency of GaN-based nano-LED structures with electric field enhancement effects and quantum well diameter was calculated using FDTD simulation software. The results are shown below. Figure 13 As shown.
[0058] The luminous intensity of GaN-based nano-LED structures with electric field enhancement under different voltages was tested using an electro-injection method. The results are as follows:Figure 15 As shown.
[0059] Example 2: A GaN-based nano-LED structure with electric field enhancement under AC electric field driving conditions
[0060] In this embodiment, the epitaxial wafer structure selected for the substrate material is a standard blue LED epitaxial wafer with a pn structure, including a sapphire substrate; a gallium nitride buffer layer grown on a silicon substrate; an n-type gallium nitride layer grown on the gallium nitride buffer layer; a quantum well active layer grown on the n-type gallium nitride layer; a p-type gallium nitride layer grown on the quantum well active layer; and an ITO layer grown on the p-type gallium nitride layer.
[0061] The specific fabrication method of the high current gain GaN-based LED structure driven by an alternating electric field is as follows:
[0062] (1) The blue LED epitaxial wafer is cleaned by immersing it in acetone solution and sonicating it for 10-15 minutes, then immersing it in ethanol solution water bath for 10-15 minutes, rinsing it with deionized water, and then drying it.
[0063] (2) Plasma-enhanced chemical vapor deposition (PECVD) technology was used to deposit... x Ga 1-x A 200nm thick SiO2 mask layer was deposited on the epitaxial wafer of the N / GaN quantum well blue LED. The PECVD growth conditions for SiO2 were as follows: a 5% SiH4 / N2 mixed gas and N2O gas were introduced into the reaction chamber at flow rates of 100sccm and 450sccm, respectively. Under the conditions of 300mTorr pressure, 10W power and 350℃, SiO2 was deposited on the surface of the epitaxial wafer through the SiH4+O→SiO2(+H2O) reaction for 9 minutes and 30 seconds.
[0064] (3) A layer of photoresist was spin-coated on the SiO2 mask layer using a spin coater. The photoresist used was AZ6130. The spin coater speed was 500 rpm for 6 seconds and 2000 rpm for 40 seconds. After spin coating, the photoresist was baked on a hot plate at 110°C for 4 minutes.
[0065] (4) Transfer the periodic pattern onto the photoresist layer. Use a SUSS UV lithography machine and select the hard contact exposure mode. The exposure time is 2s. Then, place it in the developer solution for development. The development time is controlled at 40s. Then rinse with deionized water and blow dry.
[0066] (5) Transfer the pattern on the photoresist layer to the SiO2 mask layer, etch the SiO2 mask layer using a reactive ion etching (RIE) device, introduce CF4 gas, control the CF4 gas flow rate to 30 sccm, control the reaction pressure in the chamber to 4 Pa, set the RF power to 120 W, and set the time to 6 min.
[0067] (6) Remove the excess ITO layer and perform wet etching using ITO etching solution. Heat in a 50°C water bath and strictly control the wet etching time to 3 minutes.
[0068] (7) Using an inductively coupled plasma etching (ICP) apparatus, Cl2 and BCl3 were introduced into the reaction chamber. Using photoresist layer 8 and SiO2 mask layer as masks, p-type gallium nitride layers, quantum well layers, and n-type gallium nitride layers were anisotropically etched down to an n-type gallium nitride buffer layer, forming a periodically arranged and mutually isolated cylindrical nanoscale mesa structure. The etching conditions were: RF power 100W; ICP power 300W; Cl2 flow rate 48 sccm; BCl3 flow rate 6 sccm; gas pressure 10 mTorr; and etching reaction time 2 min.
[0069] (8) Clean the photoresist layer by ultrasonic cleaning with acetone, ethanol and deionized water for 5 minutes in sequence. After removing the excess photoresist, immerse it in BOE solution for 3 minutes, clean it with deionized water, and blow it dry to remove the SiO2 mask layer.
[0070] (9) The sidewalls of the formed nanopillars were modified by wet etching to form the desired nanopillar structure that is thin in the middle and thick at both ends. The solution used was a 1:1 volume diluted KOH solution or a 1:1 diluted NaOH solution for wet etching, and the solution was heated in a water bath at 80°C for 8 min. Afterwards, the sidewalls were repaired to repair the etching loss. The solution used was diluted H3PO4, and the solution was heated in a water bath at 80°C for 45 min.
[0071] (10) Fabrication of single-ended electrodes. Nickel (Ni) and gold (Au) were sequentially deposited under the substrate using an electron beam evaporation (EBE) apparatus, with thicknesses of 10 nm and 50 nm, respectively.
[0072] Comparative Example 1: GaN-based nano-LED structure without electric field enhancement under AC electric field driving conditions
[0073] In this comparative example, the epitaxial wafer structure selected for the substrate material is a standard blue LED epitaxial wafer with a pn structure, including a sapphire substrate; a gallium nitride buffer layer grown on a silicon substrate; an n-type gallium nitride layer grown on the gallium nitride buffer layer; a quantum well active layer grown on the n-type gallium nitride layer; a p-type gallium nitride layer grown on the quantum well active layer; and an ITO layer grown on the p-type gallium nitride layer.
[0074] The specific preparation method for this comparative example is as follows:
[0075] (1) The blue LED epitaxial wafer is cleaned by immersing it in acetone solution and sonicating it for 10-15 minutes, then immersing it in ethanol solution water bath for 10-15 minutes, rinsing it with deionized water, and then drying it.
[0076] (2) Plasma-enhanced chemical vapor deposition (PECVD) technology was used to deposit... x Ga 1-x A 200nm thick SiO2 mask layer was deposited on the epitaxial wafer of the N / GaN quantum well blue LED. The PECVD growth conditions for SiO2 were as follows: a 5% SiH4 / N2 mixed gas and N2O gas were introduced into the reaction chamber at flow rates of 100sccm and 450sccm, respectively. Under the conditions of 300mTorr pressure, 10W power and 350℃, SiO2 was deposited on the surface of the epitaxial wafer through the SiH4+O→SiO2(+H2O) reaction for 9 minutes and 30 seconds.
[0077] (3) A layer of photoresist was spin-coated on the SiO2 mask layer using a spin coater. The photoresist used was AZ6130. The spin coater speed was 500 rpm for 6 seconds and 2000 rpm for 40 seconds. After spin coating, the photoresist was baked on a hot plate at 110°C for 4 minutes.
[0078] (4) Transfer the periodic pattern onto the photoresist layer. Use a SUSS UV lithography machine and select the hard contact exposure mode. The exposure time is 2s. Then, place it in the developer solution for development. The development time is controlled at 40s. Then rinse with deionized water and blow dry.
[0079] (5) Transfer the pattern on the photoresist layer to the SiO2 mask layer, etch the SiO2 mask layer using a reactive ion etching (RIE) device, introduce CF4 gas, control the CF4 gas flow rate to 30 sccm, control the reaction pressure in the chamber to 4 Pa, set the RF power to 120 W, and set the time to 6 min.
[0080] (6) Remove the excess ITO layer and perform wet etching using ITO etching solution. Heat in a 50°C water bath and strictly control the wet etching time to 3 minutes.
[0081] (7) Using an inductively coupled plasma etching (ICP) apparatus, Cl2 and BCl3 were introduced into the reaction chamber. Using photoresist layer 8 and SiO2 mask layer as masks, p-type gallium nitride layers, quantum well layers, and n-type gallium nitride layers were anisotropically etched down to an n-type gallium nitride buffer layer, forming a periodically arranged and mutually isolated cylindrical nanoscale mesa structure. The etching conditions were: RF power 100W; ICP power 300W; Cl2 flow rate 48 sccm; BCl3 flow rate 6 sccm; gas pressure 10 mTorr; and etching reaction time 2 min.
[0082] (8) Clean the photoresist layer by ultrasonic cleaning with acetone, ethanol and deionized water for 5 minutes in sequence. After removing the excess photoresist, immerse it in BOE solution for 3 minutes, clean it with deionized water, and blow it dry to remove the SiO2 mask layer.
[0083] (9) Fabrication of single-ended electrodes. Nickel (Ni) and gold (Au) were sequentially deposited under the substrate using an electron beam evaporation (EBE) apparatus, with thicknesses of 10 nm and 50 nm, respectively.
[0084] The luminous intensity of the GaN-based nano-LED structures without electric field enhancement at different voltages, prepared in this comparative example, was tested using an electro-injection method. The results are as follows: Figure 14 As shown.
[0085] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.
Claims
1. A GaN-based nano-LED structure with electric field enhancement capability under AC electric field driving conditions, the structure comprising, from bottom to top: A substrate; A GaN buffer layer disposed on the substrate; An n-type GaN layer is disposed on a GaN buffer layer; A multi-quantum-well active layer disposed on an n-type GaN layer; A p-type GaN layer disposed on a multi-quantum-well active layer; The characteristic feature is that the GaN-based nano-LED structure forms a p-type GaN layer, a multi-quantum-well active layer, an n-type GaN layer, and a nano-pillar structure extending to the GaN buffer layer. The cross-sectional area of the nano-pillar structure is the smallest in the multi-quantum-well active layer, and gradually increases towards both ends of the nano-pillar, forming a columnar structure that is thin in the middle and thick at both ends.
2. The GaN-based nano-LED structure according to claim 1, characterized in that: It also includes an ITO layer, which is disposed above the p-type GaN layer, and the thickness of the ITO layer is 30~300 nanometers.
3. The GaN-based nano-LED structure according to claim 1, characterized in that: It also includes an electrode layer located below the substrate layer.
4. The GaN-based nano-LED structure according to any one of claims 1-3, characterized in that: The substrate is a silicon substrate or a sapphire substrate with a thickness of 300-500 micrometers.
5. The GaN-based nano-LED structure according to any one of claims 1-3, characterized in that: The GaN buffer layer is made of undoped GaN with a thickness of 1 to 5 micrometers.
6. The GaN-based nano-LED structure according to any one of claims 1-3, characterized in that: The doping concentration of the n-type GaN layer is 1~500×10⁻⁶. 17 cm -3 The thickness is 0.5 to 3 micrometers.
7. The GaN-based nano-LED structure according to any one of claims 1-3, characterized in that: The active layer of the multi-quantum well is an InGaN / GaN periodic structure with a period number of 3 to 10. The In content in the InGaN layer is 0.02 to 0.25, the thickness is 1 to 4 nm, and the thickness of the GaN layer is 5 to 18 nm.
8. The GaN-based nano-LED structure according to any one of claims 1-3, characterized in that: The doping concentration of the p-type GaN layer is 1~50×10⁻⁶. 17 cm -3 Thickness 0.1~1 micrometer.
9. The GaN-based nano-LED structure according to claim 3, characterized in that: The electrode layer is a Ti / Au bilayer structure, with a Ti thickness of 2~40nm and an Au thickness of 10~1000nm.
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