Fault-tolerant chip stack structure, control method and three-dimensional integrated circuit of coarse-grained reconfigurable array three-dimensional integrated circuit

Abstract

The application discloses a fault-tolerant chip stack structure of a coarse-grained reconfigurable array three-dimensional integrated circuit, a control method and the three-dimensional integrated circuit.The fault-tolerant chip stack structure comprises a plurality of PE blocks, the PE blocks comprise working PE units and redundant PE units, and the number of the redundant PE units equipped in each PE block is determined according to the scale of the working PE units; input signals are connected to the working PE units and the redundant PE units through a multiplexer, the outputs of the PE units are connected to the multiplexer, and output signals are output through the multiplexer.The structure can route the signals of the failed working PE units to the redundant PE units, thereby ensuring the normal work of the chip, greatly improving the yield of the coarse-grained reconfigurable array three-dimensional integrated circuit, reducing the manufacturing cost of the coarse-grained reconfigurable array three-dimensional integrated circuit and improving the reliability of the coarse-grained reconfigurable array three-dimensional integrated circuit.

Description

Technical Field

[0001] This invention relates to the field of semiconductor chip technology, and in particular to a fault-tolerant chip stack-up structure, control method, and three-dimensional integrated circuit of a coarse-grained reconfigurable array. Background Technology

[0002] Coarse-grained reconfigurable array integrated circuits (RCA) offer greater flexibility than application-specific integrated circuits (ASICs) and are commonly used in computationally intensive applications. In the post-Moore's Law era, semiconductor integrated circuits are limited by transistor size and cost-effectiveness. To overcome these limitations, three-dimensional integrated circuit (3D IC) technology emerged. Coarse-grained RCAs utilize 3D IC technology to integrate small-scale circuits into large-scale coarse-grained reconfigurable circuits through chip stacking. Compared to coarse-grained RCAs designed using ASIC technology, 3D IC-based coarse-grained RCAs are smaller in area and lower in cost.

[0003] Coarse-grained reconfigurable array 3D integrated circuits (3D ICs) stack and integrate multiple processing elements (PEs) through through silicon vias (TSVs). The TSVs, which are vertically distributed between the stacked layers, replace the long interconnects of 2D integrated circuits, greatly shortening the interconnect length between PEs of different stacks. This reduces the latency and power consumption of 3D ICs and improves their performance. Figure 1 An example of a coarse-grained reconfigurable array 3D integrated circuit is given. The example chip includes a first chip stack and a second chip stack. In actual designs, the chip may contain two or more chip stacks. Multiple through-silicon via (TSV) structures are configured between the first and second chip stacks for data interaction between PE cells.

[0004] However, during the manufacturing and use of coarse-grained reconfigurable array 3D ICs, some PEs may be defective or fail. Defective PEs are very likely to fail quickly during chip use. Without corresponding fault-tolerant structures and methods, the failure of some PEs will lead to the failure of the entire coarse-grained reconfigurable array 3D IC. Summary of the Invention

[0005] The technical problem to be solved by this invention is how to provide a fault-tolerant chip stack structure that can improve the yield and reliability of coarse-grained reconfigurable array 3D integrated circuits and reduce the manufacturing cost of 3D integrated circuits.

[0006] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: a fault-tolerant chip stack-up structure of a coarse-grained reconfigurable array three-dimensional integrated circuit, comprising: a PE block, an input control multiplexer, an output control multiplexer, and a fault-tolerant control module, wherein the PE block includes a plurality of working PE units and a plurality of redundant PE units. The input port of the input control multiplexer is connected to the input signal, the selection signal input port of the input control multiplexer is connected to the selection signal output terminal of the fault-tolerant control module, and the output port of the input control multiplexer is connected to the input terminals of the working PE unit and the redundant PE unit. The input port of the output control multiplexer is connected to the output of the working PE unit and the redundant PE unit. The selection signal input port of the output control multiplexer is connected to the selection signal output of the fault-tolerant control module. The output of the output control multiplexer is connected to the TSV. The fault-tolerant control module controls the input control multiplexer and the output control multiplexer to replace the failed working PE unit with a redundant PE unit.

[0007] A further technical solution is as follows: the input control multiplexer is used to route the input signals of the working or redundant PE units. The input port is connected to the input signal of the working PE unit, the selection signal port is connected to the selection signal output port of the fault-tolerant control module, and the output port is connected to the input port of the corresponding working or redundant PE unit. The fault-tolerant control module controls the selection signal of the input control multiplexer to control the transmission path of the input signal, disconnects the connection between the failed working PE unit and the input signal, and routes the input signal to the redundant PE unit.

[0008] The output control multiplexer is used to route the output signals of the working or redundant PE units. The input port is connected to the output port of the working or redundant PE unit, the selection signal port is connected to the selection signal output port of the fault-tolerant control module, and the output port is connected to the corresponding TSV. The fault-tolerant control module controls the selection signal of the output control multiplexer to control the transmission path of the output signal, disconnects the output port of the failed PE unit from the output signal, and connects the output port of the redundant PE unit to the output signal.

[0009] A further technical solution is as follows: the fault-tolerant control module includes a non-volatile memory unit, a failed PE unit detection module, and an input / output fault-tolerant module; the failed PE unit detection module is used for detecting and marking failed working PE units, including a PE unit input signal input port, a PE unit output signal input port, an address port (ADDR), a data port (DATA), and a read / write enable port (WR); the PE unit input signal input port is connected to the PE unit input signal, the PE unit output signal input port is connected to the PE unit output signal, and the address port, data port, and read / write enable port are respectively connected to the address port, data port, and read / write enable port of the non-volatile memory unit; the failed PE unit detection module determines whether the working PE unit is a failed PE unit by detecting the input and output signals of the working PE unit. If the working PE unit does not output a signal after inputting a signal, it is determined that the working PE unit has failed, and the failure information of the working PE unit is written to the corresponding bit in the non-volatile memory module, that is, the corresponding bit is written to 0; The non-volatile memory unit is used to store the status of the working PE unit, including a data port, an address port, and a read / write enable port, and is connected to the input / output fault tolerance module and the failed PE unit detection module. One bit records the status information of a working PE unit; a bit of 1 indicates that the working PE unit is normal, and a bit of 0 indicates that the working PE unit has failed. The fault tolerance control module identifies the failed working PE unit based on the working PE unit status information stored in the non-volatile memory unit, and disconnects the signal connected to the failed working PE unit by generating a selection signal for the corresponding multiplexer, and connects the disconnected signal to the redundant PE unit. The input / output fault-tolerant module includes a selection signal output port, an address port, a data port, and a read / write enable port. The selection signal output port is connected to the selection signal input ports of the input control multiplexer and the output control multiplexer. The address port, data port, and read / write enable port are respectively connected to the address port, data port, and read / write enable port of the non-volatile memory unit. The input / output fault-tolerant module controls the signal transmission path based on the working PE unit status information stored in the non-volatile memory unit, that is, disconnecting the signal connected to the failed working PE unit and connecting the disconnected signal to the redundant PE unit.

[0010] A further technical solution is as follows: the input / output fault-tolerant module includes a PE status information reading unit, a decision unit, and an output unit. The PE status information reading unit and the decision unit are bidirectionally connected. The PE status information reading unit is connected to the address port (ADDR), data port (DATA), and read / write enable port (WR) of the non-volatile memory unit. The decision unit and the output unit are bidirectionally connected. The output unit is connected to the input control multiplexer and the output control multiplexer. The PE status information reading unit reads the working PE unit status information stored in the non-volatile memory unit in real time. The decision unit identifies the failed working PE unit based on the working PE status information read by the PE status information reading unit. The output unit generates the selection signal of the multiplexer based on the failed working PE unit identified by the decision unit and outputs it to the multiplexer. Then, the multiplexer routes the input / output signals connected to the failed working PE unit to the redundant PE unit to achieve the purpose of fault tolerance for failed PE units.

[0011] A further technical solution is as follows: the stacked structure includes three PE blocks, each PE block including three working PE units and one redundant PE unit. The redundant PE unit is placed on the front or rear side of the PE block. In each PE block, input signal IN_1 is connected to port 2 of the two-way selector MUX1 and port 1 of the two-way selector MUX2; input signal IN_2 is connected to port 1 of the two-way selector MUX2 and port 1 of the two-way selector MUX3; input signal IN_3 is connected to port 2 of the two-way selector MUX3 and port 1 of the two-way selector MUX4; the output port of the two-way selector MUX1 is connected to the input port of the working PE1 unit; the output port of the two-way selector MUX2 is connected to the input port of the working PE2 unit; the output port of the two-way selector MUX3 is connected to the input port of the working PE3 unit; and the output port of the two-way selector MUX4 is connected to the redundant PE unit. The input port of PE1 unit is connected to port 1 of the two-way selector MUX5. The output port of the working PE2 unit is connected to port 2 of the two-way selector MUX5 and port 1 of the two-way selector MUX6. The output port of the working PE3 unit is connected to port 2 of the two-way selector MUX6 and port 1 of the two-way selector MUX7. The output port of the redundant R_PE1 unit is connected to port 2 of the two-way selector MUX7. The output port of the two-way selector MUX5 is connected as output signal OUT_1 to the first TSV. The output port of the two-way selector MUX6 is connected as output signal OUT_2 to the second TSV. The output port of the two-way selector MUX7 is connected as output signal OUT_3 to the third TSV. The selection signals of all two-way selectors and the input and output signals of all PE units are connected to the selection signal output terminal of the fault-tolerant control module.

[0012] A further technical solution is as follows: the stacked structure includes three PE blocks, each PE block including three working PE units and one redundant PE unit. The redundant PE unit is placed on the front or rear side of the PE block. The input signal IN_1 is divided into two paths: the first path is connected to the signal input terminal of the working PE1 unit, and the second path is connected to input port 1 of the four-way selector MUX1; the input signal IN_2 is divided into two paths: the first path is connected to the signal input terminal of the working PE2 unit, and the second path is connected to input port 2 of the four-way selector MUX1; the input signal IN_3 is divided into two paths: the first path is connected to the signal input terminal of the working PE3 unit, and the second path is connected to the four-way selector MUX1. Input port 3 of MUX1 is connected; the output port of the four-way selector MUX1 is connected to the redundant R_PE unit; the output signal of the working PE1 unit is connected to input port 1 of the two-way selector MUX2, the output signal of the working PE2 unit is connected to input port 1 of the two-way selector MUX3, the output signal of the working PE3 unit is connected to input port 1 of the two-way selector MUX4, and the output signals of the redundant R_PE unit are connected to ports 2 of the two-way selectors MUX2, MUX3, and MUX4 respectively; the selection signal input terminal of the selector is connected to the selection signal output terminal of the fault-tolerant control module. After the working PE1 unit fails, the fault-tolerant control module generates the selection signals of the corresponding selectors. The selection signal of the four-way selector MUX1 is 00, which connects the input signal IN_1 to the redundant R_PE unit. The selection signal of the two-way selector MUX2 is 1, which disconnects the output port of the working PE1 unit from the output signal OUT_1 and connects the output port of the redundant R_PE unit to the output signal OUT_1.

[0013] This invention also discloses a control method for the fault-tolerant chip stack-up structure of a coarse-grained reconfigurable array three-dimensional integrated circuit: When no failed working PE unit appears in the PE block, the PE block works normally, the selection signal of the two-way selector MUX1 is 0, and the selection signal of the two-way selector MUX5 is 1. At this time, the input signal IN_1 is input to the working PE1 unit through the two-way selector MUX1, and the output signal of the working PE1 unit is output to the first TSV through the two-way selector MUX5; the selection signal of the two-way selector MUX2 is 1, and the selection signal of the two-way selector MUX6 is 0. At this time, the input signal... IN_2 is input to the working PE2 unit via a two-way selector MUX2. The output signal of the working PE2 unit is output as OUT_2 via a two-way selector MUX6 to the second TVS. The two-way selector MUX3 selects a signal of 1, and the two-way selector MUX7 selects a signal of 0. At this time, the input signal IN_3 is input to the working PE3 unit via a two-way selector MUX3. The output signal of the working PE3 unit is output as OUT_3 via a two-way selector MUX7 to the third TVS. The two-way selector MUX4 selects a signal of 0, indicating that the redundant R_PE1 unit has no input or output signals and is in an idle state. When the working PE1 unit fails for some reason, the fault-tolerant control module's fault-tolerant PE unit detection module detects that the working PE1 unit has no output signal after receiving the input signal. The fault-tolerant control module then determines that the working PE1 unit is a faulty PE unit, writes the failure information into the non-volatile memory unit, and changes the corresponding bit of the working PE1 unit to 0. Subsequently, the input-output fault-tolerant module of the fault-tolerant control module reads that the corresponding bit of the working PE1 unit in the non-volatile memory unit is 0. The decision unit then determines that the working PE1 unit is a faulty working PE unit and passes the decision result to the output unit of the input-output fault-tolerant module. The output unit generates a selection signal for the two-way selector based on the decision result, and routes the input signal of the working PE1 unit to the redundant R_PE unit.

[0014] A further technical solution is as follows: after the failed PE unit detects the failure of the working PE1 unit, it marks the working PE1 unit by modifying the bit information corresponding to the working PE1 unit in the non-volatile memory unit. Then, the input / output fault-tolerant module recognizes the failure information of the working PE1 unit and generates the selection signal of the two-way selector based on the information. Change the selection signal of the two-way selector MUX1 to 0 and the selection signal of the two-way selector MUX5 to 1, and disconnect the connection between the working PE1 unit and the input signal IN_1 and the working PE1 unit and the output signal OUT_1 respectively. Change the selection signal of the two-way selector MUX2 to 0, and change the selection signal of the two-way selector MUX6 to 1. Disconnect the working PE2 unit from the input signal IN_2 and the working PE2 unit from the output signal OUT_2 respectively. At the same time, connect the input signal IN_1 to the working PE2 unit and connect the output of the working PE2 unit to the output signal OUT_1. Change the selection signal of the two-way selector MUX3 to 0, and change the selection signal of the two-way selector MUX7 to 1. Disconnect the working PE3 unit from the input signal IN_3 and the working PE3 unit from the output signal OUT_3 respectively. At the same time, connect the input signal IN_2 to the working PE3 unit and connect the output of the working PE3 unit to the output signal OUT_2. The selection signal of the two-way selector MUX4 is changed to 1, the input signal IN_3 is connected to the redundant R_PE1 unit, and the output of the redundant R_PE1 unit is connected to the output signal OUT_3.

[0015] A further technical solution is as follows: When the working PE3 unit fails, the fault-tolerant control module detects and marks the failed working PE unit. Since the working PE3 unit is adjacent to the redundant R_PE1 unit, the signal passing through the working PE3 unit can be directly routed to the redundant R_PE1 unit. Based on the identified failed PE unit information, the fault-tolerant control module generates selection signals for the two-way selector. The selection signal of the two-way selector MUX3 is changed to 0, and the selection signal of the two-way selector MUX7 is changed to 1. The connection between the working PE3 unit and the input signal IN_3 and the working PE3 unit and the output signal OUT_3 are disconnected respectively. The selection signal of the two-way selector MUX4 is changed to 1. The input signal IN_3 is connected to the redundant R_PE1 unit, and the output of the redundant R_PE1 unit is connected to the output signal OUT_3.

[0016] The present invention also discloses a coarse-grained reconfigurable array three-dimensional integrated circuit, comprising two or more fault-tolerant chip stacked structures, wherein the two fault-tolerant chip stacked structures are connected together by a number of TSVs (through silicon vias) to achieve chip stacking integration.

[0017] The beneficial effects of adopting the above technical solution are as follows: each PE block in the fault-tolerant chip stack structure is equipped with one or more redundant PE units. If a failed PE unit appears in the PE block, the signal of the failed PE unit is routed to the redundant PE unit. By setting redundant PE units, the normal use of the coarse-grained reconfigurable array 3D integrated circuit can be guaranteed when a failed PE unit appears, solving the problem of the entire coarse-grained reconfigurable array 3D integrated circuit failing due to a failed PE unit. This improves the yield and reliability of the coarse-grained reconfigurable array 3D integrated circuit and reduces the manufacturing cost of the 3D integrated circuit. Attached Figure Description

[0018] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0019] Figure 1 This is a schematic diagram of a conventional coarse-grained reconfigurable array three-dimensional integrated circuit structure in the prior art; Figure 2 This is a schematic diagram illustrating a coarse-grained reconfigurable array three-dimensional integrated circuit according to an embodiment of the present invention; Figure 3A yes Figure 2 A top view of the fault-tolerant chip stack-up structure; Figure 3B yes Figure 2 Block diagram of the fault-tolerant chip stack-up structure; Figure 4 This is a block diagram of the fault-tolerant control module in the fault-tolerant chip stack-up structure. Figure 5 This is a functional diagram of the failed PE unit detection module in the fault-tolerant chip stacked structure after the PE unit fails. Figure 6 This is an embodiment of the present invention. Figure 4 The principle block diagram of the input / output fault-tolerant module described above; Figure 7 This is a schematic diagram of a fault-tolerant chip stack-up structure without any failed PE units. Figure 8 This is a schematic diagram of the fault-tolerant function when the working PE1 unit in the fault-tolerant chip stack-up structure fails; Figure 9 This is a flowchart of the fault tolerance method when the working PE1 unit in the fault-tolerant chip stack-up structure fails; Figure 10 This is a schematic diagram of the fault-tolerant function after the working PE3 unit in the fault-tolerant chip stack-up structure fails; Figure 11 This is a schematic diagram of another fault-tolerant chip stacked structure in an embodiment of the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0021] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0022] In general, this invention discloses a fault-tolerant chip stack-up structure for a coarse-grained reconfigurable array three-dimensional integrated circuit, comprising: a PE block, an input control multiplexer, an output control multiplexer, and a fault-tolerant control module. The PE block includes several working PE units and several redundant PE units. The input port of the input control multiplexer is connected to the input signal, the selection signal input port of the input control multiplexer is connected to the selection signal output terminal of the fault-tolerant control module, and the output port of the input control multiplexer is connected to the input terminals of the working PE unit and the redundant PE unit. The input port of the output control multiplexer is connected to the output of the working PE unit and the redundant PE unit. The selection signal input port of the output control multiplexer is connected to the selection signal output of the fault-tolerant control module. The output of the output control multiplexer is connected to the TSV. The fault-tolerant control module detects whether the working PE unit has failed, marks the failed working PE unit, and controls the multiplexer by selecting a signal to route the signal transmission path of the failed working PE unit to the redundant PE unit, thereby achieving the purpose of fault tolerance for failed working PE units and ensuring the normal operation of the coarse-grained reconfigurable array 3D integrated circuit.

[0023] from Figure 1 It is known that in conventional coarse-grained reconfigurable array 3D integrated circuits, each chip stack only contains a working PE (Programmable Component) cell. Due to issues such as loose PE cell mounting and uneven stress during 3D integrated circuit manufacturing, which can damage the chip structure, this PE cell is prone to failure, ultimately leading to the failure of the entire coarse-grained reconfigurable array 3D integrated circuit. To address this problem, fault-tolerant structures are designed in coarse-grained reconfigurable array 3D integrated circuits, such as... Figure 2 As shown, placing a certain proportion of redundant PE cells in each chip stack can effectively compensate for failed PE cells, improve the chip's fault tolerance, manufacturing yield and reliability, and reduce the chip's manufacturing cost.

[0024] In this invention, the fault-tolerant chip stack-up structure is first divided into several PE blocks according to the scale of the coarse-grained reconfigurable array 3D integrated circuit. Each PE block contains several working PE units and several redundant PE units. Working and redundant PE units are placed proportionally within each PE block. Redundant PE units can be placed in the middle of the working PE units to shorten the fault-tolerant path and ensure timely data transmission. Alternatively, the redundant PE units can be placed in front of or behind the working PE units. A higher number of redundant PE units results in better fault tolerance, but excessive redundant PE units lead to a larger chip area and higher cost. Therefore, the number of redundant PE units needs to be determined by balancing these two factors based on the actual situation.

[0025] The following is based on Figure 3A , Figure 3B Taking this as an example, we will provide a more detailed explanation of the fault-tolerant chip stack-up structure. From... Figure 3A As can be seen from the diagram, this embodiment divides the PE unit in the fault-tolerant chip stack-up structure into 3 PE blocks. Each PE block includes 3 working PE units and 1 redundant PE unit, with the redundant PE unit placed at the bottom of the PE block. Figure 3B As can be seen, input signal IN_1 is connected to input port 2 of the two-way selector MUX1 and input port 1 of the two-way selector MUX2; input signal IN_2 is connected to input port 1 of the two-way selector MUX2 and input port 1 of the two-way selector MUX3; input signal IN_3 is connected to input port 2 of the two-way selector MUX3 and input port 1 of the two-way selector MUX4; the output port of two-way selector MUX1 is connected to the input port of working PE1 unit; the output port of two-way selector MUX2 is connected to the input port of working PE2 unit; the output port of two-way selector MUX3 is connected to the input port of working PE3 unit; and the output port of two-way selector MUX4 is connected to the input port of redundant R_PE1 unit; the output port of working PE1 unit... Connect port 1 of the two-way selector MUX5. Connect the output port of the working PE2 unit to input port 2 of MUX5 and input port 1 of the two-way selector MUX6. Connect the output port of the working PE3 unit to input port 2 of the two-way selector MUX6 and input port 1 of the two-way selector MUX7. Connect the output port of the redundant R_PE1 unit to input port 2 of the two-way selector MUX7. Connect the output signal OUT_1 of the output port of the two-way selector MUX5 to TSV. Connect the output signal OUT_2 of the output port of the two-way selector MUX6 to TSV. Connect the output signal OUT_3 of the output port of the two-way selector MUX7 to TSV. Connect the selection signals of all two-way selectors and the input and output signals of all PE units to the fault-tolerant control module.

[0026] In this invention, the fault-tolerant control module mainly performs tasks such as failure detection of the working PE unit and routing of signal transmission paths, for example... Figure 4 As shown, the fault-tolerant control module mainly includes a failure PE detection module, an input / output fault-tolerant module, and a non-volatile storage unit. Figure 6 As shown, the failed working PE unit detection module determines whether the working PE unit is a failed PE unit by detecting the input and output signals of the working PE unit. If the working PE unit does not output a signal after inputting a signal, it is determined that the working PE unit has failed, and the failure information of the working PE unit is written into the corresponding bit in the non-volatile memory module, that is, the corresponding bit is written to 0.

[0027] The non-volatile memory unit stores failure information of the working PE unit. One bit records the status information of a working PE unit; a bit of 1 indicates the working PE unit is normal, and a bit of 0 indicates the working PE unit has failed. For example... Figure 6 As shown, the input / output fault-tolerant module includes a PE status information reading unit, a decision unit, and an output unit. The PE status information reading unit is connected to a non-volatile memory unit. It reads the failure information of the working PE unit in the PE block from the non-volatile memory unit, identifies the failed working PE unit based on the read failure information, and sends the identification result to the output unit. The output unit generates selection signals for the two-way selectors and outputs them to the two-way selectors in the PE block. The selection signals control the transmission paths of the input and output signals, disconnecting the signal transmission path of the failed working PE unit and connecting the signal transmission path of the redundant PE unit, thereby achieving the purpose of shielding the failed working PE unit.

[0028] In this embodiment of the invention, the fault-tolerant chip stack-up structure of the coarse-grained reconfigurable array three-dimensional integrated circuit manages the PE (Programmable Element) cells and controls the two-way selector through a fault-tolerant control module. The two-way selector controls the transmission path of the input and output signals. When no failed PE cell appears in the PE block, the PE block operates normally, and the signal transmission path is as follows: Figure 7 As shown. At this time, the selection signal of the two-way selector MUX1 is 0, and the selection signal of the two-way selector MUX5 is 1, indicating that the input signal IN_1 is input to PE1 through MUX1, and the output signal of PE1 is output to OUT_1 through MUX5; the selection signal of MUX2 is 1, and the selection signal of MUX6 is 0, indicating that the input signal IN_2 is input to PE2 through MUX2, and the output signal of PE2 is output to OUT_2 through MUX6; the selection signal of MUX3 is 1, and the selection signal of MUX7 is 0, indicating that the signal IN_3 is input to PE3 through MUX3, and the output signal of PE3 is output to OUT_3 through MUX7; the selection signal of MUX4 is 0, indicating that R_PE1 has no input or output signal and is in an idle state.

[0029] When a failed working PE cell appears in the PE block, the fault-tolerant structure can promptly play a fault-tolerant role. Figure 8 Taking this as an example, we will provide a more detailed explanation of the fault-tolerant structure and control method, starting from... Figure 8 As can be seen, the PE block has three input signals IN_1, IN_2, and IN_3, and three output signals OUT_1, OUT_2, and OUT_3, corresponding to the working PE1, PE2, and PE3 units, respectively. The PE block also includes one redundant PE unit, seven two-way selectors, and a fault-tolerant control module. When the working PE1 unit fails for some reason, the fault-tolerant control module's failed PE unit detection module detects that the working PE1 unit has no output signal after receiving the input signal. The failed PE unit detection module then determines that the working PE1 unit is a failed PE unit, writes the failure information into the non-volatile memory unit, and changes the corresponding bit of the working PE1 unit to 0. Subsequently, the input / output fault-tolerant module of the fault-tolerant control module reads that the corresponding bit of the working PE1 unit in the non-volatile memory unit is 0. The decision unit then determines that the working PE1 unit is a failed PE unit and passes the decision result to the output unit of the input / output fault-tolerant module. The output unit generates the selection signal of the two-way selector based on the decision result, routing the input signal of the working PE1 unit to the redundant R_PE unit.

[0030] Figure 9A detailed flowchart of a fault-tolerant control method is presented. After the failed PE unit detects the failure of the working PE1 unit, it marks the working PE1 unit by modifying the corresponding bit information in the non-volatile memory. Subsequently, the input / output fault-tolerant module identifies the failure information of the working PE1 unit and generates selection signals for the two-way selector based on this information. The selection signal of the two-way selector MUX1 is changed to 0, and the selection signal of the two-way selector MUX5 is changed to 1, disconnecting the working PE1 unit from the input signal IN_1 and the output signal OUT_1, respectively. The selection signal of the two-way selector MUX2 is changed to 0, and the selection signal of the two-way selector MUX6 is changed to 1, disconnecting the working PE2 unit from the input signal IN_2 and the output signal OUT_2, respectively. At the same time, the input signal IN_1 is connected to the working PE2 unit, and the output of the working PE2 unit is connected to the output signal OUT_1. The selection signal is changed to 0, and the selection signal of the two-way selector MUX7 is changed to 1. The connection between the working PE3 unit and the input signal IN_3, and the working PE3 unit and the output signal OUT_3 are disconnected respectively. At the same time, the input signal IN_2 is connected to the working PE3 unit, and the output of the working PE3 unit is connected to the output signal OUT_2. The selection signal of the two-way selector MUX4 is changed to 1, the input signal IN_3 is connected to the redundant R_PE1 unit, and the output of the redundant R_PE1 unit is connected to the output signal OUT_3. Through the cooperation of the fault-tolerant control module and the two-way selector, the fault-tolerant function of the chip is realized.

[0031] Figure 10 The data transmission path after the failure of the working PE3 unit is presented. Upon failure of the working PE3 unit, the fault-tolerant control module detects and marks the failed working PE3 unit. Since the working PE3 unit is adjacent to the redundant R_PE1 unit, the signal passing through the working PE3 unit can be directly routed to the fault-tolerant R_PE1 unit. Based on the identified failed PE3 unit information, the fault-tolerant control module generates selection signals for the two-way selector. The selection signal of the two-way selector MUX3 is changed to 0, and the selection signal of the two-way selector MUX7 is changed to 1, respectively disconnecting the working PE3 unit from the input signal IN_3 and from the output signal OUT_3. The selection signal of the two-way selector MUX4 is changed to 1, connecting the input signal IN_3 to the redundant R_PE1 unit, and connecting the output of the redundant R_PE1 unit to the output signal OUT_3. Through the above control operations, when the working PE3 unit fails, the fault-tolerant structure can successfully shield the failed unit, ensuring the normal operation of the chip.

[0032] Figure 11Another fault-tolerant chip stack-up structure is presented. As shown in the figure, input signal IN_1 is connected to the working PE1 unit and port 1 of the four-way selector MUX1; input signal IN_2 is connected to the working PE2 unit and port 2 of the four-way selector MUX1; input signal IN_3 is connected to the working PE3 unit and port 3 of the four-way selector MUX1; the output port of the four-way selector MUX1 is connected to the redundant R_PE unit; the output signal of the working PE1 unit is connected to port 1 of the two-way selector MUX2; the output signal of the working PE2 unit is connected to port 1 of the two-way selector MUX3; the output signal of the working PE3 unit is connected to port 1 of the two-way selector MUX4; the output signal of the redundant R_PE unit is connected to port 2 of MUX2, MUX3, and MUX4; the selection signals of all selectors are connected to the fault-tolerant control module. In this embodiment, when the working PE1 unit fails, the fault-tolerant control module generates the selection signal of the corresponding selector. The selection signal of MUX1 is 00, which connects the input signal IN_1 to the redundant R_PE unit. The selection signal of MUX2 is 1, which disconnects the output port of the working PE1 unit from the output signal OUT_1, and connects the output port of the redundant R_PE unit to the output signal OUT_1.

[0033] The fault-tolerant chip stack-up structure and control method for coarse-grained reconfigurable array three-dimensional integrated circuits disclosed in this invention can promptly disconnect the failed working PE unit and connect a redundant PE unit when the working PE unit fails. This allows the input signal originally transmitted to the failed working PE unit to be routed to the redundant PE unit through the fault-tolerant structure, achieving fault tolerance. The structure and method disclosed in this invention can achieve fault tolerance for failed PE units, thus improving chip yield, reducing chip manufacturing costs, and increasing chip reliability.

Claims

1. A fault-tolerant chip stack-up structure for a coarse-grained reconfigurable array three-dimensional integrated circuit, characterized in that... include: The system includes a PE block, an input control multiplexer, an output control multiplexer, and a fault-tolerant control module. The PE block comprises several working PE units and several redundant PE units. The input port of the input control multiplexer is connected to the input signal, the selection signal input port of the input control multiplexer is connected to the selection signal output terminal of the fault-tolerant control module, and the output port of the input control multiplexer is connected to the input terminals of the working PE unit and the redundant PE unit. The input port of the output control multiplexer is connected to the output of the working PE unit and the redundant PE unit. The selection signal input port of the output control multiplexer is connected to the selection signal output of the fault-tolerant control module. The output of the output control multiplexer is connected to the TSV. The fault-tolerant control module controls the input control multiplexer and the output control multiplexer so that the failed working PE unit is replaced by a redundant PE unit. The input control multiplexer is used to route the input signals of the working or redundant PE units. The input port is connected to the input signal of the working PE unit, the selection signal port is connected to the selection signal output port of the fault-tolerant control module, and the output port is connected to the input port of the corresponding working or redundant PE unit. The fault-tolerant control module controls the selection signal of the input control multiplexer to control the transmission path of the input signal, disconnects the failed working PE unit from the input signal, and routes the input signal to the redundant PE unit. The output control multiplexer is used to route the output signals of the working or redundant PE units. The input port is connected to the output port of the working or redundant PE unit, the selection signal port is connected to the selection signal output port of the fault-tolerant control module, and the output port is connected to the corresponding TSV. The fault-tolerant control module controls the selection signal of the output control multiplexer to control the transmission path of the output signal, disconnects the output port of the failed PE unit from the output signal, and connects the output port of the redundant PE unit to the output signal.

2. The fault-tolerant chip stack-up structure of the coarse-grained reconfigurable array three-dimensional integrated circuit as described in claim 1, characterized in that: The fault-tolerant control module includes a non-volatile storage unit, a failed PE unit detection module, and an input / output fault-tolerant module. The failed PE unit detection module is used for detecting and marking failed working PE units. It includes a PE unit input signal input port, a PE unit output signal input port, an address port, a data port, and a read / write enable port. The PE unit input signal input port is connected to the PE unit input signal, and the PE unit output signal input port is connected to the PE unit output signal. The address port, data port, and read / write enable port are respectively connected to the address port, data port, and read / write enable port of the non-volatile memory unit. The failed PE unit detection module determines whether a working PE unit is a failed PE unit by detecting its input and output signals. If the working PE unit does not output a signal after receiving an input signal, it is determined that the working PE unit is failed, and the failure information of the working PE unit is written to the corresponding bit in the non-volatile memory unit, i.e., the corresponding bit is written to 0. The non-volatile storage unit is used to store the status of the working PE unit, including a data port, an address port and a read / write enable port, and is connected to the input / output fault tolerance module and the failed PE unit detection module; 1 bit records the status information of a working PE unit, where 1 indicates that the working PE unit is normal and 0 indicates that the working PE unit has failed. The fault-tolerant control module identifies the failed working PE unit based on the working PE unit status information stored in the non-volatile memory unit, and disconnects the signal connected to the failed working PE unit by generating the selection signal of the corresponding multiplexer, and connects the disconnected signal to the redundant PE unit. The input / output fault-tolerant module includes a selection signal output port, an address port, a data port, and a read / write enable port. The selection signal output port is connected to the selection signal input ports of the input control multiplexer and the output control multiplexer. The address port, data port, and read / write enable port are respectively connected to the address port, data port, and read / write enable port of the non-volatile memory unit. The input / output fault-tolerant module controls the signal transmission path based on the working PE unit status information stored in the non-volatile memory unit, that is, disconnecting the signal connected to the failed working PE unit and connecting the disconnected signal to the redundant PE unit.

3. The fault-tolerant chip stack-up structure of the coarse-grained reconfigurable array three-dimensional integrated circuit as described in claim 2, characterized in that: The input / output fault-tolerant module includes a PE status information reading unit, a decision unit, and an output unit. The PE status information reading unit and the decision unit are bidirectionally connected. The PE status information reading unit is connected to the address port, data port, and read / write enable port of the non-volatile memory unit. The decision unit and the output unit are bidirectionally connected. The output unit is connected to the input control multiplexer and the output control multiplexer. The PE status information reading unit reads the status information of the working PE units stored in the non-volatile memory unit in real time. The decision unit identifies the failed working PE units based on the working PE status information read by the PE status information reading unit. The output unit generates the selection signal of the multiplexer based on the failed working PE units identified by the decision unit and outputs it to the multiplexer. Then, the multiplexer routes the input / output signals connected to the failed working PE units to redundant PE units to achieve fault tolerance for failed PE units.

4. The fault-tolerant chip stack-up structure of the coarse-grained reconfigurable array three-dimensional integrated circuit as described in claim 1, characterized in that: The stacked structure includes three PE blocks, each PE block including three working PE units and one redundant PE unit. The redundant PE unit is placed on the front or rear side of the PE block. In each PE block, input signal IN_1 is connected to port 2 of 2-way selector MUX1 and port 1 of 2-way selector MUX2, input signal IN_2 is connected to port 1 of 2-way selector MUX2 and port 1 of 2-way selector MUX3, and input signal IN_3 is connected to port 2 of 2-way selector MUX3 and port 1 of 2-way selector MUX4. The output port of 2-way selector MUX1 is connected to the input port of working PE1 unit, the output port of 2-way selector MUX2 is connected to the input port of working PE2 unit, the output port of 2-way selector MUX3 is connected to the input port of working PE3 unit, and the output port of 2-way selector MUX4 is connected to the input port of redundant R_PE1 unit. The output port of the working PE1 unit is connected to port 1 of the two-way selector MUX5; the output port of the working PE2 unit is connected to port 2 of the two-way selector MUX5 and port 1 of the two-way selector MUX6; the output port of the working PE3 unit is connected to port 2 of the two-way selector MUX6 and port 1 of the two-way selector MUX7; the output port of the redundant R_PE1 unit is connected to port 2 of the two-way selector MUX7; the output port of the two-way selector MUX5 is connected as output signal OUT_1 to the first TSV; the output port of the two-way selector MUX6 is connected as output signal OUT_2 to the second TSV; and the output port of the two-way selector MUX7 is connected as output signal OUT_3 to the third TSV; the selection signals of all two-way selectors are connected to the selection signal output terminal of the fault-tolerant control module; and the input and output signals of all PE units are connected to the detection terminal of the fault-tolerant control module.

5. The fault-tolerant chip stack-up structure of the coarse-grained reconfigurable array three-dimensional integrated circuit as described in claim 1, characterized in that: The stacked structure includes three PE blocks, each PE block comprising three working PE units and one redundant PE unit. The redundant PE unit is placed on the front or rear side of the PE block. Input signal IN_1 is split into two paths: the first path connects to the signal input terminal of the working PE1 unit, and the second path connects to input port 1 of the four-way selector MUX1; input signal IN_2 is split into two paths: the first path connects to the signal input terminal of the working PE2 unit, and the second path connects to input port 2 of the four-way selector MUX1; input signal IN_3 is split into two paths: the first path connects to the signal input terminal of the working PE3 unit, and the second path connects to input port 2 of the four-way selector MUX1. Input port 3 is connected; the output port of the four-way selector MUX1 is connected to the redundant R_PE unit; the output signal of the working PE1 unit is connected to input port 1 of the two-way selector MUX2, the output signal of the working PE2 unit is connected to input port 1 of the two-way selector MUX3, the output signal of the working PE3 unit is connected to input port 1 of the two-way selector MUX4, and the output signals of the redundant R_PE unit are connected to ports 2 of the two-way selectors MUX2, MUX3, and MUX4 respectively; the selection signal input terminal of the selector is connected to the selection signal output terminal of the fault-tolerant control module. After the working PE1 unit fails, the fault-tolerant control module generates the selection signals of the corresponding selectors. The selection signal of the four-way selector MUX1 is 00, which connects the input signal IN_1 to the redundant R_PE unit. The selection signal of the two-way selector MUX2 is 1, which disconnects the output port of the working PE1 unit from the output signal OUT_1 and connects the output port of the redundant R_PE unit to the output signal OUT_1.

6. A control method for the fault-tolerant chip stack-up structure of a coarse-grained reconfigurable array three-dimensional integrated circuit as described in claim 4, characterized in that: When no failed working PE unit appears in the PE block, the PE block operates normally. The selection signal of the two-way selector MUX1 is 0, and the selection signal of the two-way selector MUX5 is 1. At this time, the input signal IN_1 is input to the working PE1 unit via the two-way selector MUX1, and the output signal of the working PE1 unit is output as the OUT_1 signal to the first TSV via the two-way selector MUX5. The selection signal of the two-way selector MUX2 is 1, and the selection signal of the two-way selector MUX6 is 0. At this time, the input signal IN_2 is input to the working PE1 unit via the two-way selector MUX2. In PE2 unit, the output signal of the working PE2 unit is output as OUT_2 via the two-way selector MUX6 to the second TSV; the selection signal of the two-way selector MUX3 is 1, and the selection signal of the two-way selector MUX7 is 0. At this time, the input signal IN_3 is input to the working PE3 unit via the two-way selector MUX3, and the output signal of the working PE3 unit is output as OUT_3 via the two-way selector MUX7 to the third TSV; the selection signal of the two-way selector MUX4 is 0, indicating that the redundant R_PE1 unit has no input or output signals and is in an idle state; When the working PE1 unit fails for some reason, the fault-tolerant control module's fault-tolerant PE unit detection module detects that the working PE1 unit has no output signal after receiving the input signal. The fault-tolerant control module then determines that the working PE1 unit is a faulty PE unit, writes the failure information into the non-volatile memory unit, and changes the corresponding bit of the working PE1 unit to 0. Subsequently, the input-output fault-tolerant module of the fault-tolerant control module reads that the corresponding bit of the working PE1 unit in the non-volatile memory unit is 0. The decision unit then determines that the working PE1 unit is a faulty working PE unit and passes the decision result to the output unit of the input-output fault-tolerant module. The output unit generates a selection signal for the two-way selector based on the decision result, and routes the input signal of the working PE1 unit to the redundant R_PE unit.

7. The control method for the fault-tolerant chip stack-up structure of a coarse-grained reconfigurable array three-dimensional integrated circuit as described in claim 6, characterized in that: After the failed PE unit detects the failure of the working PE1 unit, it marks the working PE1 unit by modifying the bit information corresponding to the working PE1 unit in the non-volatile memory unit. Then, the input / output fault-tolerant module recognizes the failure information of the working PE1 unit and generates the selection signal of the two-way selector based on the information. Change the selection signal of the two-way selector MUX1 to 0 and the selection signal of the two-way selector MUX5 to 1, and disconnect the connection between the working PE1 unit and the input signal IN_1 and the working PE1 unit and the output signal OUT_1 respectively. Change the selection signal of the two-way selector MUX2 to 0, and change the selection signal of the two-way selector MUX6 to 1. Disconnect the working PE2 unit from the input signal IN_2 and the working PE2 unit from the output signal OUT_2 respectively. At the same time, connect the input signal IN_1 to the working PE2 unit and connect the output of the working PE2 unit to the output signal OUT_1. Change the selection signal of the two-way selector MUX3 to 0, and change the selection signal of the two-way selector MUX7 to 1. Disconnect the working PE3 unit from the input signal IN_3 and the working PE3 unit from the output signal OUT_3 respectively. At the same time, connect the input signal IN_2 to the working PE3 unit and connect the output of the working PE3 unit to the output signal OUT_2. The selection signal of the two-way selector MUX4 is changed to 1, the input signal IN_3 is connected to the redundant R_PE1 unit, and the output of the redundant R_PE1 unit is connected to the output signal OUT_3.

8. The control method for the fault-tolerant chip stack-up structure of a coarse-grained reconfigurable array three-dimensional integrated circuit as described in claim 6, characterized in that: When the working PE3 unit fails, the fault-tolerant control module detects and marks the failed working PE unit. Since the working PE3 unit is adjacent to the redundant R_PE1 unit, the signal passing through the working PE3 unit can be directly routed to the redundant R_PE1 unit. Based on the identified failed PE unit information, the fault-tolerant control module generates selection signals for the two-way selector. The selection signal of the two-way selector MUX3 is changed to 0, and the selection signal of the two-way selector MUX7 is changed to 1. The connection between the working PE3 unit and the input signal IN_3 and the working PE3 unit and the output signal OUT_3 are disconnected respectively. The selection signal of the two-way selector MUX4 is changed to 1. The input signal IN_3 is connected to the redundant R_PE1 unit, and the output of the redundant R_PE1 unit is connected to the output signal OUT_3.

9. A coarse-grained reconfigurable array three-dimensional integrated circuit, characterized in that: It includes two or more fault-tolerant chip stack-up structures as described in any one of claims 1-5, wherein the two fault-tolerant chip stack-up structures are connected together by a number of TSVs to achieve chip stacking integration.

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