Chip packaging method and packaging structure

Abstract

The chip packaging method and packaging structure provided by the embodiments of the present disclosure include the following steps: providing a substrate and fixing a first chip on a central region of a first surface of the substrate; providing a first metal carrier plate and a second metal carrier plate respectively, and the second metal carrier plate is provided with a plurality of conductive support structures; fixing the first metal carrier plate on a side of the first chip away from the substrate, and fixing the second metal carrier plate on an edge region of the first surface of the substrate through the conductive support structures; wherein the first metal carrier plate is flush with the second metal carrier plate, and there is a gap between the first metal carrier plate and the second metal carrier plate; fixing a second chip on a second surface of the substrate; and forming plastic encapsulation layers on the first surface and the second surface of the substrate through a one-time plastic encapsulation process. The first metal carrier plate and the second metal carrier plate and the conductive support structures play a bearing role on the substrate when the second chip is attached to the second surface of the substrate and when the substrate is cut after the double-sided attachment of the substrate is completed.

Description

Technical Field

[0001] This disclosure pertains to the field of semiconductor packaging technology, specifically relating to a chip packaging method and packaging structure. Background Technology

[0002] Currently, in semiconductor packaging, double-sided molding typically involves two molding processes: first molding the front side of the substrate, then molding the back side. This sequential molding leads to severe warping of the package structure. Furthermore, the strip-shaped adapter plate / molding layer mounted on the back side of the substrate results in poor overall heat dissipation. In existing single-stage double-sided molding processes, the difference in chip height on the front side creates a lack of support during back-side mounting, making mounting difficult. The lack of support during back-side mounting and subsequent cutting after double-sided mounting makes cutting difficult and prone to chip damage.

[0003] To address the aforementioned issues, it is necessary to propose a chip packaging method and structure that is rationally designed and effectively solves these problems. Summary of the Invention

[0004] The present disclosure aims to at least solve one of the technical problems existing in the prior art, and to provide a chip packaging method and packaging structure.

[0005] One aspect of this disclosure provides a chip packaging method, the method comprising:

[0006] A substrate is provided, and a first chip is fixed to the central region of the first surface of the substrate;

[0007] A first metal support plate and a second metal support plate are provided respectively, wherein the second metal support plate is provided with multiple conductive support structures;

[0008] The first metal carrier plate is fixed to the side of the first chip facing away from the substrate, and the second metal carrier plate is fixed to the edge region of the first surface of the substrate through the conductive support structure; wherein...

[0009] The first metal support plate is flush with the second metal support plate, and there is a gap between the first metal support plate and the second metal support plate;

[0010] The second chip is fixed to the second surface of the substrate;

[0011] A molding process is used to form molding layers on the first and second surfaces of the substrate, respectively, and the molding layers encapsulate the second chip, the first metal carrier plate, and the second metal carrier plate.

[0012] Optionally, after fixing the first chip to the central region of the first surface of the substrate, the method further includes:

[0013] A solder metal layer is formed on the side of the first chip that is away from the substrate.

[0014] Optionally, fixing the first metal carrier plate to the side of the first chip facing away from the substrate includes:

[0015] The first metal carrier plate is fixed to the side of the first chip away from the substrate by means of the welding metal layer.

[0016] Optionally, fixing the first chip to the first surface of the substrate includes:

[0017] The first chip is flip-chip mounted on the central region of the first surface of the substrate;

[0018] An underfill layer is formed between the first chip and the first surface of the substrate.

[0019] Optionally, fixing the second metal carrier plate to the edge region of the first surface of the substrate via the conductive support structure includes:

[0020] The second metal carrier plate is fixed to the edge region of the first surface of the substrate by means of the conductive support structure through a hot-press reflow process.

[0021] Optionally, after forming molding layers on the first and second surfaces of the substrate through a single molding process, the method further includes:

[0022] If the outer edge region of the second metal carrier plate is the second metal carrier plate, then a shielding layer is formed around the second chip.

[0023] Optionally, after forming molding layers on the first and second surfaces of the substrate through a single molding process, the method further includes:

[0024] If the outer edge region of the second metal bearing plate is the molding layer, then a shielding layer is formed around the molding layer.

[0025] Optionally, after forming molding layers on the first and second surfaces of the substrate through a single molding process, the method further includes:

[0026] A signal lead-out layer is formed on the side of the first metal support plate and the second metal support plate opposite to the substrate.

[0027] Optionally, the conductive support structure is a metal conductive pillar or a solder ball.

[0028] Another aspect of this disclosure provides a chip packaging structure, which is formed by packaging using the packaging method described above.

[0029] The chip packaging method and packaging structure of this disclosure include a packaging method in which a first chip is fixed to a first surface of a substrate, a first metal carrier plate is fixed to the side of the first chip away from the substrate, and a second metal carrier plate is fixed to the edge area of ​​the first surface of the substrate through a conductive support structure. In this way, when a second chip is mounted on the second surface of the substrate, the first metal carrier plate, the second metal carrier plate, and the conductive support structure play a good supporting role for the substrate, and the chip mounting on the second surface of the substrate can be well realized.

[0030] In addition, when the substrate is cut after double-sided mounting, the first metal carrier plate, the second metal carrier plate, and the conductive support structure provide good support for the substrate, which reduces the cutting difficulty and does not damage the chip.

[0031] The packaging method of this disclosure uses a single molding process to form molding layers on the first and second surfaces of the substrate, thereby reducing the warpage of the packaging structure and increasing the yield of the packaging structure.

[0032] In addition, during the molding process, the first metal carrier plate, the second metal carrier plate, and multiple conductive support structures play a supporting role for the substrate, ensuring the stability of the substrate during the molding process. The multiple conductive support structures strengthen the connection between the second metal carrier plate and the substrate, thereby preventing the first and second chips from being damaged by the molding material and improving the yield of the molded product.

[0033] The packaging method of this embodiment fixes the first metal carrier plate to the first chip and can also dissipate heat from the first chip. Attached Figure Description

[0034] Figure 1 This is a schematic flowchart of a chip packaging method according to one embodiment of the present disclosure;

[0035] Figures 2-8 This is a schematic diagram of a chip packaging process according to another embodiment of this disclosure;

[0036] Figure 9 This is a schematic diagram of a chip packaging structure according to another embodiment of the present disclosure;

[0037] Figure 10 This is a schematic diagram of a chip packaging structure according to another embodiment of the present disclosure. Detailed Implementation

[0038] To enable those skilled in the art to better understand the technical solutions of the embodiments of this disclosure, the embodiments of this disclosure will be further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0039] like Figure 1 As shown, one aspect of this disclosure provides a chip packaging method S100, the method S100 including:

[0040] S110. Provide a substrate and fix the first chip to the central region of the first surface of the substrate.

[0041] like Figure 2 and Figure 3 As shown, a substrate 110 is provided, and a first chip 120 is fixed to the central region of the first surface of the substrate 110.

[0042] It should be understood that the first surface of the substrate 110 can be either the front or the back surface of the substrate 110, and can be selected according to actual needs. In this embodiment, the first surface of the substrate 110 is used as the back surface of the substrate 110, and the second surface of the substrate 110 is used as the front surface of the substrate 110 for illustrative purposes. That is, the first chip 120 is fixed to the central region of the back surface of the substrate 110.

[0043] In this embodiment, fixing the first chip 120 to the central region of the first surface of the substrate 110 specifically includes:

[0044] like Figure 3 As shown, firstly, the first chip 120 is flip-chip mounted onto the central region of the first surface of the substrate 110. Specifically, the first chip 120 is flip-chip mounted onto the central region of the back side of the substrate 110 via conductive bumps 121.

[0045] It should be noted that there is no specific limitation on the method by which the first chip 120 is fixed to the back of the substrate 110. In addition to the flip-chip method in this embodiment, upright mounting and other methods can also be used, and the choice can be made according to actual needs.

[0046] It should be noted that this embodiment does not specifically limit the number of the first chip 120, which can be one, two or more, and can be selected according to actual needs.

[0047] Secondly, such as Figure 3 As shown, an underfill layer 122 is formed between the first chip 120 and the first surface of the substrate 110. The underfill layer 122 can better fix the first chip 120 to the back side of the substrate 110.

[0048] For example, after fixing the first chip to the central region of the first surface of the substrate, the method further includes:

[0049] A solder metal layer is formed on the side of the first chip that is away from the substrate.

[0050] like Figure 4 As shown, a solder metal layer 123 is formed on the side of the first chip 120 facing away from the substrate 110. In this embodiment, the solder metal layer 123 is made of a thermal interface material, preferably, it is made of indium.

[0051] S120. A first metal support plate and a second metal support plate are provided respectively, wherein the second metal support plate is provided with multiple conductive support structures.

[0052] like Figure 4 As shown, a first metal support plate 130 and a second metal support plate 140 are provided, wherein a plurality of conductive support structures 150 are pre-set on the second metal support plate 140. The plurality of conductive support structures 150 serve both as supports and as electrical connections.

[0053] It should be noted that in this embodiment, both the first metal support plate 130 and the second metal support plate 140 are made of copper plates, but other metal materials can also be used. This embodiment does not make any specific limitations.

[0054] It should be further noted that the conductive support structure 150 can be made of copper pillars or solder balls. Preferably, the conductive support structure 150 can be made of copper pillars or solder balls. As shown in the figure, in this embodiment, the conductive support structure 150 is made of copper pillars.

[0055] S130. The first metal carrier plate is fixed to the side of the first chip facing away from the substrate, and the second metal carrier plate is fixed to the edge region of the first surface of the substrate through the conductive support structure; wherein...

[0056] The first metal support plate is flush with the second metal support plate, and there is a gap between the first metal support plate and the second metal support plate.

[0057] Specifically, such as Figure 4 As shown, a first metal carrier plate 130 is fixed to the side of the first chip 120 facing away from the substrate 110, and a second metal carrier plate 140 is fixed to the edge region of the first surface of the substrate 110 via a conductive support structure 150. The first metal carrier plate 130 and the second metal carrier plate 140 are flush, so that when the first metal carrier plate 130 and the second metal carrier plate 140 are flipped over and the chip is mounted on the second surface of the substrate 110, the first metal carrier plate 130, the second metal carrier plate 140, and the conductive support structure 150 provide support for the substrate 110.

[0058] like Figure 4 As shown, there is a gap between the first metal carrier plate 130 and the second metal carrier plate 140. That is, the first metal carrier plate 130 and the second metal carrier plate 140 are not connected together, but have a gap. In this way, when the signal of the package structure is finally led out through the first metal carrier plate 130 and the second metal carrier plate 140, it will not cause a short circuit.

[0059] For example, fixing the first metal carrier plate to the side of the first chip away from the substrate specifically includes:

[0060] The first metal carrier plate 130 is fixed to the side of the first chip 120 away from the substrate 110 by means of welding metal layer 123 using hot pressing reflow process.

[0061] For example, fixing the second metal carrier plate to the edge region of the first surface of the substrate via the conductive support structure includes:

[0062] like Figure 4 As shown, a hot-press reflow process is used to fix the conductive support structure 150 to the edge region of the back side of the substrate 110 through the conductive bumps 121, so as to fix the second metal carrier plate 140 to the back side of the substrate 110.

[0063] S140. Fix the second chip to the second surface of the substrate.

[0064] like Figure 5 As shown, after fixing the second metal carrier plate 140 to the substrate 110, the first metal carrier plate 130 and the second metal carrier plate 140 are flipped over, and the second chip 160 is fixed to the front side of the substrate 110, thus completing the double-sided chip mounting of the substrate 110.

[0065] In other words, such as Figure 5 As shown, the first metal carrier plate 130 and the second metal carrier plate 140 serve as supports at the bottom, and then a plurality of second chips 160 are fixed to the front side of the substrate 110.

[0066] In this embodiment, the height of the multiple second chips 160 is not specifically limited; the heights of the multiple second chips 160 can be the same or different, and this embodiment does not impose a specific limitation. Furthermore, the number of second chips 160 is not specifically limited in this embodiment and can be selected according to actual needs.

[0067] S150. Through a single molding process, molding layers are formed on the first and second surfaces of the substrate, respectively, and the molding layers encapsulate the second chip, the first metal carrier plate, and the second metal carrier plate.

[0068] Specifically, such as Figure 6 As shown, after mounting the substrate 110 on both sides, a molding process is performed to form a molding layer 170 on the first and second surfaces of the substrate 110, respectively. The molding layer 170 encapsulates the second chip 160, the first metal carrier plate 130, and the second metal carrier plate 140.

[0069] Specifically, the structure to be molded after the chip is mounted is placed into a molding die, that is, the first metal carrier plate 130 and the second metal carrier plate 140 are placed in the molding die as the bottom, molding compound is injected, and through a single molding process, molding layers 170 are formed on the back and front sides of the substrate 110, respectively. The molding layers 170 encapsulate the second chip 160 and the first metal carrier plate 130 and the second metal carrier plate 140. The molding layers 170 protect the substrate 110, the first chip 120, the first metal carrier plate 130, the second metal carrier plate 140, the multiple conductive support structures 150, and the second chip 160.

[0070] The molding layer 170 is formed only on the side of the first metal support plate 130 and the second metal support plate 140 facing the substrate 110 and in the gap between them. The molding layer 170 is not formed on the side of the first metal support plate 130 and the second metal support plate 140 away from the substrate 110.

[0071] After molding the structure to be molded to form the molding layer 170, the entire substrate 110 is cut to form an independent package.

[0072] In the above embodiments, the first metal carrier plate 130, the second metal carrier plate 140 and the multiple conductive support structures 150 can play a good supporting role for the substrate 110 during the double-sided mounting and cutting process after molding, which can reduce the cutting difficulty and prevent damage to the chip.

[0073] In the above embodiments, a single molding process is used to form molding layers 170 on the first and second surfaces of the substrate 110, which can reduce the warpage of the package structure and increase the yield of the package structure. In addition, during the molding process, the substrate 110 needs to withstand the impact of the molding compound. The first metal carrier plate 130, the second metal carrier plate 140, and multiple conductive support structures 150 support the substrate 110, ensuring the stability of the substrate 110 during the molding process. The multiple conductive support structures 150 strengthen the connection between the second metal carrier plate 140 and the substrate 110, thereby preventing the first chip 120 and the second chip 160 from being damaged by the impact of the molding compound and improving the yield of the molded product.

[0074] For example, after forming molding layers on the first and second surfaces of the substrate through a single molding process, the method further includes:

[0075] like Figure 7 As shown, if the outer edge region of the second metal carrier plate 140 is the second metal carrier plate 140, then a shielding layer 180 is formed around the second chip 160. The shielding layer 180 can prevent the second chip 160 from being subjected to electromagnetic interference.

[0076] Because the bottom edge of the package structure is the second metal carrier plate 140, that is, the bottom edge of the package structure is a metal layer, if a shielding layer 180 is formed around the entire package structure, the contact between the shielding layer 180 and the metal layer at the bottom edge of the package structure will cause a short circuit. Therefore, a shielding layer 180 is formed around each second chip 160.

[0077] The steps for forming the shielding layer 180 in the encapsulation structure can be as follows:

[0078] A through-groove is formed on the molding compound layer 170 surrounding the second chip 160 using a molding compound perforation process. A metal layer is deposited in the through-groove using processes such as sputtering, thereby forming a shielding layer 180 surrounding the second chip 160.

[0079] For example, after forming molding layers on the first and second surfaces of the substrate through a single molding process, the method further includes:

[0080] like Figure 8 As shown, if the outer edge region of the second metal carrier plate 140 is a molding compound 170, then a shielding layer 180 is formed around the molding compound 170. The shielding layer 180 can prevent the entire encapsulation structure from being subjected to electromagnetic interference.

[0081] Because the bottom edge of the package structure is a molding layer 170, which means that the bottom edge of the package structure is a molding material and not a metal material, a shielding layer 180 is formed around the molding layer 170. The contact between the shielding layer 180 and the bottom edge of the package structure is the molding layer 170 will not cause a short circuit.

[0082] The specific steps for forming a shielding layer 180 around the packaging structure can be as follows:

[0083] A through-groove is formed around the plastic encapsulation layer 170 using a plastic encapsulation material perforation process. A metal layer is deposited in the through-groove using processes such as sputtering, thereby forming a shielding layer 180 around the plastic encapsulation layer 170. In other words, a shielding layer 180 is formed around the entire encapsulation structure, leaving only one side with the first metal carrier plate 130 and the second metal carrier plate 140 exposed for signal output.

[0084] After forming molding layers on the first and second surfaces of the substrate through a single molding process, the method further includes:

[0085] A signal lead-out layer (not shown) is formed on the side of the first metal carrier plate 130 and the second metal carrier plate 140 facing away from the substrate 110 to lead out the signals of the system-in-package structure. In this embodiment, a tin layer may be applied to the side of the first metal carrier plate 130 and the second metal carrier plate 140 facing away from the substrate 110 to lead out the signals of the package structure. The specific structure of the signal lead-out layer is not specifically limited in this embodiment and can be selected according to the actual situation. For example, the signal lead-out layer may be solder balls, etc.

[0086] In this embodiment, after the first metal carrier plate 130 and the second metal carrier plate 140 form a signal lead-out layer on the side away from the substrate 110, the entire package structure can be mounted on a square flat leadless package or on a PCB circuit board, and the signal of the package structure can be led out through the signal lead-out layer.

[0087] In the above embodiments, since a molding layer 170 is formed on the side of the first metal carrier plate 130 and the second metal carrier plate 140 facing the substrate 110 and in the gap between them, when a signal lead-out layer is formed on the side of the first metal carrier plate 130 and the second metal carrier plate 140 away from the substrate 110, the first metal carrier plate 130 and the second metal carrier plate 140 on both sides of the gap can avoid short circuit due to the connection of the signal lead-out layer, thus ensuring the performance of the packaging structure.

[0088] The chip packaging method of this disclosure involves fixing a first chip to a first surface of a substrate, fixing a first metal carrier plate to the side of the first chip away from the substrate, and fixing a second metal carrier plate to the edge region of the first surface of the substrate via a conductive support structure. When mounting a second chip on the second surface of the substrate, the first and second metal carrier plates, along with the conductive support structure, provide excellent support for the substrate, enabling successful chip mounting on the second surface. Furthermore, when cutting the substrate after double-sided mounting, the first and second metal carrier plates, along with the conductive support structure, provide excellent support, reducing cutting difficulty and preventing chip damage. The packaging method of this disclosure uses a single molding process to form molding layers on both the first and second surfaces of the substrate, reducing warpage of the packaging structure and increasing its yield. Fixing the first metal carrier plate to the first chip also helps dissipate heat from the first chip.

[0089] like Figure 9 and Figure 10As shown, another aspect of this disclosure provides a chip packaging structure 100, which is formed by packaging using the packaging method S100 described above. The specific steps of the packaging method S100 have been described in detail above and will not be repeated here.

[0090] like Figure 9 and Figure 10 As shown, the chip packaging structure 100 includes a substrate 110, a first chip 120 disposed on a first surface of the substrate 110, a second chip 160 disposed on a second surface of the substrate 110, a first metal carrier plate 130 disposed on the side of the first chip 120 facing away from the substrate 110, a second metal carrier plate electrically connected to the first surface of the substrate 110 through a plurality of conductive support structures 150, and a molding compound layer 170. The first metal carrier plate 130 and the second metal carrier plate 140 are flush, and a gap exists between the first metal carrier plate 130 and the second metal carrier plate 140.

[0091] It should be noted that in this embodiment, both the first metal support plate 130 and the second metal support plate 140 are made of copper plates, but other metal materials can also be used. This embodiment does not make any specific limitations.

[0092] It should be further noted that the conductive support structure 150 can be made of copper pillars or solder balls; preferably, the conductive support structure 150 can be made of copper pillars or solder balls. For example... Figure 4 As shown, in this embodiment, the conductive support structure 150 is made of copper pillars.

[0093] like Figure 9 and Figure 10 As shown, a molding compound 170 is provided on the first and second surfaces of the substrate 110, and the molding compound 170 encapsulates the second chip 160, the first metal carrier plate 130, and the second metal carrier plate 140. The molding compound 170 protects the substrate 110, the first chip 120, the second chip 160, the first metal carrier plate 130, the second metal carrier plate 140, and the multiple conductive support structures 150.

[0094] Specifically, a molding process is used to form molding layers 170 on the first and second surfaces of the substrate 110, which reduces the warpage of the packaging structure 100 and increases the yield of the packaging structure 100.

[0095] It should be understood that the first surface of the substrate 110 can be either the front or the back surface of the substrate 110, and can be selected according to actual needs. In this embodiment, the first surface of the substrate 110 is used as the back surface of the substrate 110, and the second surface of the substrate 110 is used as the front surface of the substrate 110 for illustrative purposes. That is, the first chip 120 is fixed to the back surface of the substrate 110.

[0096] For example, such as Figure 9 and Figure 10 As shown in this embodiment, the first chip 120 is flip-mounted onto the back side of the substrate 110 via conductive bumps 121. An underfill layer 122 is disposed between the first chip 120 and the substrate 110. The underfill layer 122 can better fix the first chip 120 to the back side of the substrate 110.

[0097] For example, such as Figure 9 and Figure 10 As shown, the packaging structure 100 further includes a solder metal layer 123, which is sandwiched between the first chip 120 and the first metal carrier plate 130. In this embodiment, the solder metal layer 123 is made of a thermal interface material; preferably, the solder metal layer 123 is made of indium.

[0098] like Figure 9 and Figure 10 As shown, the encapsulation structure 100 also includes a shielding layer 180, such as... Figure 9 As shown, if the edge region of the second metal carrier plate 140 is the second metal carrier plate 140, then the shielding layer 180 surrounds the periphery of the second chip 160. Figure 10 As shown, if the edge region of the second metal carrier plate 140 is the molding layer 170, then the shielding layer 180 is disposed on the periphery of the entire encapsulation structure 100, with only the side of the first metal carrier plate 130 and the second metal carrier plate 140 exposed away from the substrate 110.

[0099] A signal lead-out layer (not shown in the figure) is provided on the side of the first metal carrier plate 130 and the second metal carrier plate 140 away from the substrate 110 to lead out the signals of the system-in-package structure.

[0100] In this embodiment, the signal lead-out layer can be a tin layer or a solder ball, etc. This embodiment does not make specific limitations and can be limited according to the actual situation.

[0101] In this embodiment, after the first metal carrier plate 130 and the second metal carrier plate 140 form a signal lead-out layer on the side away from the substrate 110, the entire package structure can be mounted on a square flat leadless package or on a PCB circuit board, and the signal of the package structure can be led out through the signal lead-out layer.

[0102] In the chip packaging structure of this embodiment, the first metal carrier plate, the second metal carrier plate, and multiple conductive support structures provide excellent support for the substrate when the second chip is mounted on the second surface of the substrate, enabling effective chip mounting on the second surface of the substrate. Furthermore, when the substrate is cut after double-sided mounting, the first metal carrier plate, the second metal carrier plate, and the multiple conductive support structures provide excellent support for the substrate, reducing the cutting difficulty and preventing damage to the chip. A single molding process is used to form molding layers on both the first and second surfaces of the substrate, reducing warpage of the packaging structure and increasing its yield. Placing the first metal carrier plate on the side of the first chip away from the substrate also helps dissipate heat from the first chip.

[0103] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of the embodiments of this disclosure, and the embodiments of this disclosure are not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the embodiments of this disclosure, and these modifications and improvements are also considered to be within the protection scope of the embodiments of this disclosure.

Claims

1. A chip packaging method, characterized in that, The method includes: A substrate is provided, and a first chip is fixed to the central region of the first surface of the substrate; A first metal support plate and a second metal support plate are provided respectively, wherein the second metal support plate is provided with multiple conductive support structures; The first metal carrier plate is fixed to the side of the first chip facing away from the substrate, and the second metal carrier plate is fixed to the edge region of the first surface of the substrate through the conductive support structure; wherein... The first metal support plate is flush with the second metal support plate, and there is a gap between the first metal support plate and the second metal support plate; The second chip is fixed to the second surface of the substrate; A molding process is used to form molding layers on the first and second surfaces of the substrate, respectively. These molding layers encapsulate the second chip, the first metal carrier plate, and the second metal carrier plate. When the second chip is mounted on the second surface of the substrate and the substrate is cut after double-sided mounting, the first metal carrier plate, the second metal carrier plate, and the conductive support structure support the substrate.

2. The method according to claim 1, characterized in that, After fixing the first chip to the central region of the first surface of the substrate, the method further includes: A solder metal layer is formed on the side of the first chip that is away from the substrate.

3. The method according to claim 2, characterized in that, The step of fixing the first metal carrier plate to the side of the first chip away from the substrate includes: The first metal carrier plate is fixed to the side of the first chip away from the substrate by means of the welding metal layer.

4. The method according to any one of claims 1 to 3, characterized in that, The step of fixing the first chip to the first surface of the substrate includes: The first chip is flip-chip mounted on the central region of the first surface of the substrate; An underfill layer is formed between the first chip and the first surface of the substrate.

5. The method according to any one of claims 1 to 3, characterized in that, The step of fixing the second metal carrier plate to the edge region of the first surface of the substrate through the conductive support structure includes: The second metal carrier plate is fixed to the edge region of the first surface of the substrate by means of the conductive support structure through a hot-press reflow process.

6. The method according to any one of claims 1 to 3, characterized in that, After forming molding layers on the first and second surfaces of the substrate through a single molding process, the method further includes: If the outer edge region of the second metal carrier plate is the second metal carrier plate, then a shielding layer is formed around the second chip.

7. The method according to any one of claims 1 to 3, characterized in that, After forming molding layers on the first and second surfaces of the substrate through a single molding process, the method further includes: If the outer edge region of the second metal bearing plate is the molding layer, then a shielding layer is formed around the molding layer.

8. The method according to any one of claims 1 to 3, characterized in that, After forming molding layers on the first and second surfaces of the substrate through a single molding process, the method further includes: A signal lead-out layer is formed on the side of the first metal support plate and the second metal support plate opposite to the substrate.

9. The method according to any one of claims 1 to 3, characterized in that, The conductive support structure is a metal conductive pillar or a solder ball.

10. A chip packaging structure, formed by packaging using the packaging method according to any one of claims 1 to 9.

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