Circuit board structure
Patent Information
- Application Number
- CN202210940047.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2022-07-08
- Filing Date
- 2022-08-05
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2042-08-05
AI Technical Summary
因此在同轴穿孔的两端会有阻抗不匹配且会出现电磁干扰(electromagneticinterference,EMI)屏蔽缺口,进而影响高频信号完整性
[0026]基于上述,在本发明的电路板结构的设计中,第一导电通孔电性连接至第一外部线路层与第二外部线路层而定义出信号路径,而第一外部线路层、第二导电通孔、第一线路层、外层导电层及第二外部线路层定义出接地路径,且接地路径环绕信号路径。借此,可形成良好的高频高速信号回路,且后续在集成电路与天线的应用上,亦可解决同一平面信号干扰的问题,可降低信号能量损失及减少噪声干扰,进而可提升信号传输可靠度。
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Figure CN116647977B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a substrate structure, and more particularly to a circuit board structure. Background Technology
[0002] In existing circuit boards, coaxial via designs require one or more insulating layers between the inner and outer conductor layers for insulation. These insulating layers are formed through lamination. Consequently, impedance mismatch and electromagnetic interference (EMI) shielding gaps appear at the ends of the coaxial via, affecting high-frequency signal integrity. Furthermore, in coaxial via designs, the two ends of the signal path and the two ends of the ground path are located on different planes, and noise interference cannot be reduced. Summary of the Invention
[0003] This invention relates to a circuit board structure that can effectively reduce noise interference and provide better signal integrity.
[0004] According to an embodiment of the present invention, a circuit board structure includes a substrate, a first add-in structure layer, a first external circuit layer, a second external circuit layer, at least one first conductive via, and a plurality of second conductive vias. The substrate has at least one first opening and includes a core layer, a first inner circuit layer, a second inner circuit layer, an inner conductive layer, a first dielectric layer, a second dielectric layer, a third dielectric layer, a first circuit layer, a second circuit layer, and an outer conductive layer. The first inner circuit layer and the second inner circuit layer are disposed on opposite sides of the core layer. The core layer has a plurality of second openings, and the inner conductive layers cover the inner walls of the second openings and connect the first inner circuit layer and the second inner circuit layer. The first dielectric layer covers the first inner circuit layer and is located between the first inner circuit layer and the first circuit layer. The second dielectric layer covers the second inner circuit layer and is located between the second inner circuit layer and the second circuit layer. The first opening is located between the second openings and penetrates the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer, and the second dielectric layer. An outer conductive layer covers the inner wall of the first opening and connects the first wiring layer, the first inner wiring layer, the second inner wiring layer, and the second wiring layer. A third dielectric layer fills the first opening. A first add-on structure layer is disposed on the first wiring layer. A first outer wiring layer is disposed on the first add-on structure layer. A second outer wiring layer is disposed on the second wiring layer and a portion of the third dielectric layer. A first conductive via penetrates the first add-on structure layer and the third dielectric layer, and electrically connects the first outer wiring layer and the second outer wiring layer, thus defining a signal path. A second conductive via surrounds the first conductive via and penetrates the first add-on structure layer, the first wiring layer, the first dielectric layer, the first inner wiring layer, the core layer, the second inner wiring layer, the second dielectric layer, and the second wiring layer, and electrically connects the first outer wiring layer, the first wiring layer, the first inner wiring layer, the second inner wiring layer, and the second wiring layer. The first outer wiring layer, the second conductive via, the first wiring layer, the outer conductive layer, and the second outer wiring layer define a first ground path, and the first ground path surrounds the signal path.
[0005] In the circuit board structure according to an embodiment of the present invention, the first added layer structure layer includes a fourth dielectric layer, a third circuit layer, a fifth dielectric layer, and a fourth circuit layer. The fourth dielectric layer is disposed on the first circuit layer and the third dielectric layer. The third circuit layer is disposed on the fourth dielectric layer, and the fifth dielectric layer is disposed on the third circuit layer and the fourth dielectric layer. The fourth circuit layer is disposed on the fifth dielectric layer, and the first external circuit layer is disposed on the fourth circuit layer.
[0006] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes a second add-in structure layer disposed on the second circuit layer and a portion of the third dielectric layer, and the second external circuit layer is located on the second add-in structure layer.
[0007] In the circuit board structure according to an embodiment of the present invention, the first augmentation layer further includes at least one first conductive blind via, which penetrates the fifth dielectric layer and the fourth circuit layer and electrically connects the first external circuit layer, the fourth circuit layer, and the third circuit layer. The second augmentation layer further includes at least one second conductive blind via, which penetrates the second augmentation layer and electrically connects the second external circuit layer and the second circuit layer.
[0008] In the circuit board structure according to an embodiment of the present invention, the first add-on structure layer further includes at least one first conductive blind via, which penetrates the fifth dielectric layer and the fourth dielectric layer and electrically connects the first external circuit layer and the first circuit layer. The second add-on structure layer further includes at least one second conductive blind via, which penetrates the second add-on structure layer and electrically connects the second external circuit layer and the second circuit layer.
[0009] In the circuit board structure according to an embodiment of the present invention, the substrate further has at least one third opening that penetrates the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer, the second dielectric layer and the second circuit layer, and connects the fourth dielectric layer and the second outer circuit layer.
[0010] In the circuit board structure according to an embodiment of the present invention, the first added layer further includes at least one first conductive blind via, which penetrates the fifth dielectric layer and the fourth circuit layer and electrically connects the first external circuit layer, the fourth circuit layer and the third circuit layer.
[0011] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes at least one pad disposed in the fourth dielectric layer of the first additive layer and connected to the first conductive via.
[0012] In the circuit board structure according to an embodiment of the present invention, a gap is formed between the outer conductive layer, the second dielectric layer and the second circuit layer, and the third dielectric layer fills the gap.
[0013] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes a via filling material to at least fill the second conductive via.
[0014] In the circuit board structure according to an embodiment of the present invention, the above-mentioned filling material also fills the first conductive via.
[0015] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes a first cover layer and a second cover layer. The first cover layer covers a first external circuit layer. The second cover layer covers a second external circuit layer, wherein the first cover layer and the second cover layer respectively cover both ends of the via filling material.
[0016] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes a first cover layer and a second cover layer. The first cover layer covers a first external circuit layer. The second cover layer covers a second external circuit layer, wherein the first cover layer and the second cover layer respectively cover both ends of the filling material filling the first conductive via and expose both ends of the filling material located in the second conductive via.
[0017] In the circuit board structure according to an embodiment of the present invention, the first conductive via includes two first conductive vias.
[0018] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes a via filling material to at least fill the second conductive via.
[0019] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes a first cover layer and a second cover layer. The first cover layer covers a first external circuit layer. The second cover layer covers a second external circuit layer, wherein the first cover layer and the second cover layer at least respectively cover both ends of the via filling material filling the first conductive via.
[0020] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes a third conductive via, which penetrates the first add-on layer, the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer, the second dielectric layer, and the second circuit layer, and electrically connects the first outer circuit layer, the first circuit layer, the first inner circuit layer, the second inner circuit layer, and the second circuit layer. The third conductive via is located between the first conductive vias, and the first outer circuit layer, the third conductive via, the first circuit layer, the outer conductive layer, and the second outer circuit layer define a second ground path, while the signal path is located between the first ground path and the second ground path.
[0021] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes a hole-filling material, which at least fills the second conductive via and the third conductive via.
[0022] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes a first cover layer and a second cover layer. The first cover layer covers a first external circuit layer. The second cover layer covers a second external circuit layer, wherein the first cover layer and the second cover layer at least respectively cover both ends of the via filling material filling the first conductive via.
[0023] In the circuit board structure according to an embodiment of the present invention, the first external circuit layer includes a first signal line and a first ground line. The second external circuit layer includes a second signal line and a second ground line. The first signal line, the first conductive via, and the second signal line define a signal path. The first ground line, each second conductive via, the first circuit layer, the outer conductive layer, and the second ground line define a first ground path.
[0024] In the circuit board structure according to an embodiment of the present invention, the circuit board structure further includes: a via filling material that at least fills the second conductive via. The first add-on structure layer includes a fourth dielectric layer, a third circuit layer, a fifth dielectric layer, and a fourth circuit layer. The fourth dielectric layer is disposed on the first circuit layer and the third dielectric layer. The third circuit layer is disposed on the fourth dielectric layer, and the fifth dielectric layer is disposed on the third circuit layer and the fourth dielectric layer. The fourth circuit layer is disposed on the fifth dielectric layer, and the first external circuit layer is disposed on the fourth circuit layer. The first and second sides of the via filling material, which are opposite each other, have a height difference with the first surface of the fifth dielectric layer and the second surface of the second dielectric layer, respectively, and the height difference ranges from greater than -30 micrometers to less than 30 micrometers.
[0025] In the circuit board structure according to an embodiment of the present invention, the aforementioned third dielectric layer is recessed between the surface of the first circuit layer and the surface of the second circuit layer, and there is a height difference between the surface of the third dielectric layer and the surface of the second circuit layer, wherein the height difference ranges from greater than -30 micrometers to equal to 0 micrometers.
[0026] Based on the above, in the circuit board structure design of this invention, the first conductive via is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path, while the first external circuit layer, the second conductive via, the first circuit layer, the outer conductive layer, and the second external circuit layer define a ground path, and the ground path surrounds the signal path. This forms a good high-frequency, high-speed signal loop, and in subsequent applications in integrated circuits and antennas, it can also solve the problem of signal interference on the same plane, reduce signal energy loss and noise interference, thereby improving signal transmission reliability. Attached Figure Description
[0027] Figure 1A This is a cross-sectional schematic diagram of a circuit board structure according to an embodiment of the present invention;
[0028] Figure 1B yes Figure 1A A partial bottom view of the circuit board structure;
[0029] Figure 2A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0030] Figure 2Byes Figure 2A A partial bottom view of the circuit board structure;
[0031] Figure 3A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0032] Figure 3B yes Figure 3A A partial bottom view of the circuit board structure;
[0033] Figure 4A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0034] Figure 4B yes Figure 4A A partial bottom view of the circuit board structure;
[0035] Figure 5A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0036] Figure 5B yes Figure 5A A partial bottom view of the circuit board structure;
[0037] Figure 6A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0038] Figure 6B yes Figure 6A A partial bottom view of the circuit board structure;
[0039] Figure 7A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0040] Figure 7B yes Figure 7A A partial bottom view of the circuit board structure;
[0041] Figure 8A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0042] Figure 8B yes Figure 8A A partial bottom view of the circuit board structure;
[0043] Figure 9 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0044] Figure 10 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0045] Figure 11 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0046] Figure 12 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0047] Figure 13 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0048] Figure 14 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0049] Figure 15A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0050] Figure 15B yes Figure 15A A partial bottom view of the circuit board structure;
[0051] Figure 16 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0052] Figure 17 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0053] Figure 18 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0054] Figure 19 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0055] Figure 20 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0056] Figure 21 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0057] Figure 22 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0058] Figure 23 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0059] Figure 24 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0060] Figure 25AThis is a top view schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0061] Figure 25B It is along Figure 25A A schematic diagram of the cross section of line AA;
[0062] Figure 25C It is along Figure 25A A schematic cross-sectional view of line BB;
[0063] Figure 26 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0064] Figure 27A This is a top view schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0065] Figure 27B It is along Figure 27A A schematic cross-sectional view of line CC;
[0066] Figure 27C It is along Figure 27A A schematic diagram of the cross section of line DD;
[0067] Figure 28A This is a top view schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0068] Figure 28B It is along Figure 28A A schematic cross-sectional view of line EE;
[0069] Figure 29 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0070] Figure 30 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0071] Figure 31 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0072] Figure 32 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0073] Figure 33 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0074] Figure 34 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0075] Figure 35This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention;
[0076] Figure 36 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention.
[0077] Explanation of reference numerals in the attached figures
[0078] 100a, 100b, 100c, 100d, 100e, 100f, 100g, 100h, 100i, 100j, 100k, 100m, 100q, 100r, 100s, 100t, 100u, 100v, 100w, 100x, 100y, 100z, 200a, 200b, 200c, 200d, 200e, 200f, 200g, 200h, 200i, 200j, 200k: Circuit board structure;
[0079] 110a, 210a, 210a', 210b: Substrate;
[0080] 111, 211: Core layer;
[0081] 112a, 212a: First inner layer circuitry;
[0082] 112b, 212b: Second inner circuit layer;
[0083] 113a: Inner conductive layer;
[0084] 113b, 213b: outer conductive layer;
[0085] 114, 214: First dielectric layer;
[0086] 115, 215: Second dielectric layer;
[0087] 215a: Second surface;
[0088] 116, 216: Third dielectric layer;
[0089] 117, 217: First line layer;
[0090] 118, 218: Second line layer;
[0091] 120a, 120i, 120n, 120p, 220a, 220d, 220e: First add-on structure layers;
[0092] 122, 222: Fourth dielectric layer;
[0093] 124, 224: Third line layer;
[0094] 125, 127, 225, 227: First conductive blind via;
[0095] 126, 226: Fifth dielectric layer;
[0096] 226a: First surface;
[0097] 128, 228: Fourth line layer;
[0098] 130a, 130q, 130v: First external circuit layer;
[0099] 132a, 132q, 132v: First signal line;
[0100] 134a, 134q, 134v: First grounding line;
[0101] 140a, 140c, 140q, 140v: Second external circuit layer;
[0102] 142a, 142q, 142v: Second signal lines;
[0103] 144a, 144c, 144q, 144v: Second grounding line;
[0104] 150a, 150b: First conductive vias;
[0105] 160: Second conductive via;
[0106] 165, 167: Filling material;
[0107] 168: First side;
[0108] 169: Second side;
[0109] 170, 172: First cover layer;
[0110] 175, 177: Second cover layer;
[0111] 180j, 180k, 180m, 180n, 280c, 280d, 280e: Second layer of added structure;
[0112] 182, 282: Sixth dielectric layer;
[0113] 184, 284: Fifth line layer;
[0114] 185, 285: Second conductive blind via;
[0115] 186: Seventh dielectric layer;
[0116] 188: Sixth line layer;
[0117] 190: Third conductive via;
[0118] 216a, 216b, 217a, 218a: Surface;
[0119] 219: The third opening;
[0120] C: Gap;
[0121] D1, D2: Height difference;
[0122] H1: First opening;
[0123] H2: Second opening;
[0124] L11, L21, L31, L41: Signal paths;
[0125] L12, L13, L14, L15, L22, L32, L33, L42: Grounding paths;
[0126] T1, T2, T3: Through holes;
[0127] M: Conductive material;
[0128] P: Connector. Detailed Implementation
[0129] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.
[0130] Figure 1A This is a cross-sectional schematic diagram of a circuit board structure according to an embodiment of the present invention. Figure 1B yes Figure 1A A partial bottom view of the circuit board structure. Please also refer to... Figure 1A and Figure 1BIn this embodiment, the circuit board structure 100a includes a substrate 110a, a first add-on structure layer 120a, a first external circuit layer 130a, a second external circuit layer 140a, at least one first conductive via 150a, and a plurality of second conductive vias 160. The substrate 110a has at least one first opening H1 and includes a core layer 111, a first inner circuit layer 112a, a second inner circuit layer 112b, an inner conductive layer 113a, an outer conductive layer 113b, a first dielectric layer 114, a second dielectric layer 115, a third dielectric layer 116, a first circuit layer 117, and a second circuit layer 118. The first inner circuit layer 112a and the second inner circuit layer 112b are disposed on opposite sides of the core layer 111. The core layer 111 has multiple second openings H2, and the inner conductive layer 113a covers the inner wall of the second openings H2 and structurally and electrically connects the first inner circuit layer 112a and the second inner circuit layer 112b. A first dielectric layer 114 covers the first inner circuit layer 112a and is located between the first inner circuit layer 112a and the first circuit layer 117. A second dielectric layer 115 covers the second inner circuit layer 112b and is located between the second inner circuit layer 112b and the second circuit layer 118. The first dielectric layer 114 and the second dielectric layer 115 fill the second openings H2 and are connected to each other. A first opening H1 is located between the second openings H2 and penetrates the first circuit layer 117, the first dielectric layer 114, the first inner circuit layer 112a, the core layer 111, the second inner circuit layer 112b, and the second dielectric layer 115. The outer conductive layer 113b covers the inner wall of the first opening H1 and structurally and electrically connects the first circuit layer 117, the first inner circuit layer 112a, the second inner circuit layer 112b, and the second circuit layer 118. The third dielectric layer 116 fills the first opening H1 and is flush with the first circuit layer 117 and the second circuit layer 118, meaning there is no height difference. In one embodiment, the first dielectric layer 114, the second dielectric layer 115, and the third dielectric layer 116 are preferably made of high-frequency, high-speed materials, and the dielectric constant of the third dielectric layer 116 should take impedance matching into account. The dielectric loss of the third dielectric layer 116 is greater than 0 and less than 0.1; the lower the dielectric loss, the higher the signal quality transmitted.
[0131] Please refer to this again. Figure 1AIn this embodiment, the first add-on structure layer 120a is disposed on the first circuit layer 117. Here, the first add-on structure layer 120a includes a fourth dielectric layer 122, a third circuit layer 124, a fifth dielectric layer 126, and a fourth circuit layer 128. The fourth dielectric layer 122 is disposed on the first circuit layer 117 and the third dielectric layer 116. The third circuit layer 124 is disposed on the fourth dielectric layer 122, and the fifth dielectric layer 126 is disposed on both the third circuit layer 124 and the fourth dielectric layer 122. The fourth circuit layer 128 is disposed on the fifth dielectric layer 126, and the first external circuit layer 130a is disposed on the fourth circuit layer 128 of the first add-on structure layer 120a. The second external circuit layer 140a is disposed on the second circuit layer 118 and a portion of the third dielectric layer 116. The first conductive via 150a penetrates the first add-on structure layer 120a and the third dielectric layer 116, and electrically connects the first external circuit layer 130a and the second external circuit layer 140a, thus defining a signal path L11. The first conductive via 150a includes a through-hole T1 and a conductive material M, wherein the through-hole T1 penetrates the first add-on structure layer 120a and the third dielectric layer 116, and the conductive material M covers the inner wall of the through-hole T1 and electrically connects the first external circuit layer 130a and the second external circuit layer 140a. The second conductive via 160 surrounds the first conductive via 150a and penetrates the first add-on structure layer 120a, the first circuit layer 117, the first dielectric layer 114, the first inner circuit layer 112a, the core layer 111, the second inner circuit layer 112b, the second dielectric layer 115, and the second circuit layer 118, and is electrically connected to the first outer circuit layer 130a, the first circuit layer 117, the first inner circuit layer 112a, the second inner circuit layer 112b, and the second circuit layer 118. The second conductive via 160 includes a through-hole T2 and a conductive material M. The through-hole T2 penetrates the first add-on structure layer 120a, the first circuit layer 117, the first dielectric layer 114, the first inner circuit layer 112a, the core layer 111, the second inner circuit layer 112b, the second dielectric layer 115, and the second circuit layer 118. The conductive material M covers the inner wall of the through-hole T2. The first outer circuit layer 130a, the fourth circuit layer 128, the third circuit layer 124, the first circuit layer 117, the first inner circuit layer 112a, the second inner circuit layer 112b, and the second circuit layer 118 are connected. The first outer circuit layer 130a, the second conductive via 160, the first circuit layer 117, the outer conductive layer 113b, and the second outer circuit layer 140a define a ground path L12 (i.e., the first ground path), and the ground path L12 surrounds the signal path L11. It should be noted that, according to Ampere's right-hand rule, the magnetic force generated by the grounding path L12 preferably passes through the outer conductive layer 113b, such as... Figure 1A As shown.
[0132] Furthermore, in this embodiment, the first external circuit layer 130a includes a first signal line 132a and a first ground line 134a. The second external circuit layer 140a includes a second signal line 142a and a second ground line 144a. The first signal line 132a, the first conductive via 150a, and the second signal line 142a define a signal path L11. The first ground line 134a, each second conductive via 160, the first circuit layer 117, the outer conductive layer 113b, and the second ground line 144a define a ground path L12. Here, the circuit board structure 100a is designed as a ground / signal / ground (GSG). Because the signal path L11 is surrounded and enclosed by the ground path L12, a good high-frequency, high-speed loop can be formed.
[0133] In short, in this embodiment, the signal path L11 defined by the first signal line 132a, the first conductive via 150a, and the second signal line 142a is surrounded by a grounding path L12 defined by the first ground line 134a, each of the second conductive vias 160, the first circuit layer 117, the outer conductive layer 113b, and the second ground line 144a. That is, a well-sealed grounding path L12 is provided around the signal path L11, which can transmit high-frequency and high-speed signals such as 5G, thereby forming a good high-frequency and high-speed loop, resulting in better signal integrity for the circuit board structure 100a of this embodiment. Here, high frequency refers to a frequency greater than 1 GHz; and high speed refers to a data transmission speed greater than 100 Mbps. Furthermore, it is generally known that high-frequency circuits emphasize the speed and quality of signal transmission, and the main factors affecting these two aspects are the electrical characteristics of the transmission material, namely the dielectric constant (Dk) and dielectric loss (Df). By reducing the dielectric constant and dielectric loss of the substrate, signal propagation delay time can be effectively shortened, and signal transmission rate can be increased while signal transmission loss can be reduced. Furthermore, the first conductive via 150a, the outer conductive layer 113b of the substrate 110a, and the third dielectric layer 116 define a high-frequency, high-speed special through-via. At any cross-section of this special through-via, high-frequency, high-speed signals generate a return signal through the first conductive via 150a and its corresponding outer conductive layer 113b, forming a high-frequency, high-speed equivalent circuit on that cross-section. Compared to the prior art's layer-addition method using laminated insulating layers to block the internal and external conductor layers of coaxial vias, the fabrication method of the circuit board structure 100a in this embodiment avoids impedance mismatch that could affect the integrity of high-frequency signals. Furthermore, since this embodiment does not use the layer-addition method of laminating insulating layers to increase the number of circuit board layers, it does not use the stacked via design to connect adjacent structural layers. Therefore, in addition to overcoming the energy loss of vias, it can also avoid the problem of poor thermal stress reliability of stacked vias.
[0134] It must be noted that the following embodiments use the component reference numerals and some content from the foregoing embodiments, with the same reference numerals used to represent the same or similar components, and descriptions of the same technical content omitted. For explanations of the omitted parts, please refer to the foregoing embodiments; these will not be repeated in the following embodiments.
[0135] Figure 2A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 2B yes Figure 2A A partial bottom view of the circuit board structure. Please also refer to... Figure 1A , Figure 1B , Figure 2A as well as Figure 2B The circuit board structure 100b in this embodiment is similar to the circuit board structure 100a described above. The difference is that in this embodiment, in order to achieve impedance matching, the first conductive via 150b may not be located in the middle, but rather on one side (such as the right side), that is, it is set in a staggered manner.
[0136] Figure 3A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 3B yes Figure 3A A partial bottom view of the circuit board structure. Please also refer to... Figure 1A , Figure 1B , Figure 3A as well as Figure 3B The circuit board structure 100c of this embodiment is similar to the circuit board structure 100a described above, except that in this embodiment, the second external circuit layer 140c, which is connected to the outer conductive layer 113b, extends and covers the third dielectric layer 116, and does not protrude (overhang) onto the third dielectric layer 116, instead of being flush with the outer conductive layer 113b. Therefore, compared to Figure 1A The second grounding line 144a and the second grounding line 144c in this embodiment have a larger contact area, which can improve the bonding force between them and the electronic components.
[0137] Figure 4A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 4B yes Figure 4A A partial bottom view of the circuit board structure. Please also refer to... Figure 1A , Figure 1B , Figure 4A as well as Figure 4B The circuit board structure 100d in this embodiment is similar to the circuit board structure 100a described above, except that in this embodiment, the circuit board structure 100d further includes a via-filling material 165, wherein the via-filling material 165 fills the second conductive via 160, and the opposite sides of the via-filling material 165 can be aligned with the first external circuit layer 130a and the second external circuit layer 140a, respectively. Here, the first conductive via 150a is not filled with via-filling material 165. Here, the material of the via-filling material 165 is, for example, resin, which can be regarded as a via-filling agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.
[0138] Figure 5A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 5B yes Figure 5AA partial bottom view of the circuit board structure. Please also refer to... Figure 1A , Figure 1B , Figure 5A as well as Figure 5B The circuit board structure 100e of this embodiment is similar to the circuit board structure 100a described above, except that in this embodiment, the circuit board structure 100e further includes a via-filling material 165, wherein the via-filling material 165 fills the first conductive via 150a and the second conductive via 160, and the opposite sides of the via-filling material 165 can be aligned with the first external circuit layer 130a and the second external circuit layer 140a, respectively. Here, the material of the via-filling material 165 is, for example, resin, which can be regarded as a via-filling agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.
[0139] Figure 6A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 6B yes Figure 6A A partial bottom view of the circuit board structure. Please also refer to... Figure 5A , Figure 5B , Figure 6A as well as Figure 6B The circuit board structure 100f in this embodiment is similar to the circuit board structure 100e described above, except that in this embodiment, the circuit board structure 100f further includes a first cover layer 170 and a second cover layer 175. The first cover layer 170 covers the first external circuit layer 130a. The second cover layer 175 covers the second external circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover the opposite ends of the via filling material 165. Here, the material of the first cover layer 170 and the second cover layer 175 may be, for example, copper, but is not limited thereto.
[0140] Figure 7A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 7B yes Figure 7A A partial bottom view of the circuit board structure. Please also refer to... Figure 5A , Figure 5B , Figure 7A as well as Figure 7BThe circuit board structure 100g of this embodiment is similar to the circuit board structure 100e described above, except that in this embodiment, the circuit board structure 100g further includes a first cover layer 172 and a second cover layer 177. The first cover layer 172 covers the first external circuit layer 130a, and the second cover layer 177 covers the second external circuit layer 140a. The first cover layer 172 and the second cover layer 177 respectively cover the opposite ends of the filling material 165 filling the first conductive via 150a, and expose the opposite ends of the filling material 165 located in the second conductive via 160. Here, the material of the first cover layer 172 and the material of the second cover layer 177 may be, for example, copper, but are not limited thereto.
[0141] Figure 8A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 8B yes Figure 8A A partial bottom view of the circuit board structure. Please also refer to... Figure 1A , Figure 1B , Figure 8A as well as Figure 8B The circuit board structure 100h in this embodiment is similar to the circuit board structure 100a described above. The difference is that in this embodiment, a gap C is formed between the outer conductive layer 113b, the second dielectric layer 115, and the second circuit layer 118, and the third dielectric layer 116 fills the gap C. Since this embodiment removes part of the outer conductive layer 113b at the edge of the ground layer hole and fills it with the third dielectric layer 116, the conductive layer circuits that are subsequently processed can fan out through the gap C to extend the wiring, which means that the second signal line 142a is extended. This increases the contact area when the circuit board structure 100h is subsequently connected to electronic components, and it will not short-circuit with the second ground line 144a.
[0142] Figure 9 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 1A as well as Figure 9 The circuit board structure 100i in this embodiment is similar to the circuit board structure 100a described above. The difference between the two is that in this embodiment, the first add-on structure layer 120i includes a fourth dielectric layer 122 and a third circuit layer 124 disposed on the fourth dielectric layer 122, while the first external circuit layer 130a is directly disposed on the third circuit layer 124.
[0143] Figure 10 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 9 as well as Figure 10The circuit board structure 100j in this embodiment is similar to the circuit board structure 100i described above. The difference is that in this embodiment, the circuit board structure 100j further includes a second add-on structure layer 180j, which is disposed on the second circuit layer 118 and part of the third dielectric layer 116. The second add-on structure layer 180j includes a sixth dielectric layer 182 and a fifth circuit layer 184 disposed on the sixth dielectric layer 182, while the second external circuit layer 140a is located on the fifth circuit layer 184.
[0144] Figure 11 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 1A as well as Figure 11 The circuit board structure 100k in this embodiment is similar to the circuit board structure 100a described above. The difference is that in this embodiment, the circuit board structure 100k further includes a second add-on structure layer 180k, which is disposed on the second circuit layer 118 and part of the third dielectric layer 116. The second add-on structure layer 180k includes a sixth dielectric layer 182 and a fifth circuit layer 184 disposed on the sixth dielectric layer 182, while the second external circuit layer 140a is located on the fifth circuit layer 184.
[0145] Figure 12 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 11 as well as Figure 12 The circuit board structure 100m in this embodiment is similar to the circuit board structure 100k described above, except that in this embodiment, the second add-on layer 180m includes a sixth dielectric layer 182, a fifth circuit layer 184, a seventh dielectric layer 186, and a sixth circuit layer 188. The sixth dielectric layer 182 is disposed on the second circuit layer 118 and the third dielectric layer 116. The fifth circuit layer 184 is disposed on the sixth dielectric layer 182, and the seventh dielectric layer 186 is disposed on both the fifth circuit layer 184 and the sixth dielectric layer 182. The sixth circuit layer 188 is disposed on the seventh dielectric layer 186, and the second external circuit layer 140a is disposed on the sixth circuit layer 188.
[0146] Figure 13 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. To achieve impedance matching, the grounding line can be laid out using either through-hole or blind via designs. Please also refer to... Figure 11 as well as Figure 13The circuit board structure 100n of this embodiment is similar to the circuit board structure 100k described above. The difference is that in this embodiment, the first add-on structure layer 120n further includes at least one first conductive blind via 125, wherein the first conductive blind via 125 penetrates the fourth circuit layer 128 and the fifth dielectric layer 126 and is electrically connected to the first external circuit layer 130a, the fourth circuit layer 128, and the third circuit layer 124. The second add-on structure layer 180n further includes at least one second conductive blind via 185, wherein the second conductive blind via 185 penetrates the fifth circuit layer 184 and the sixth dielectric layer 182 and is electrically connected to the second external circuit layer 140a, the fifth circuit layer 184, and the second circuit layer 118.
[0147] Figure 14 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 13 as well as Figure 14 The circuit board structure 100p in this embodiment is similar to the circuit board structure 100n described above. The difference is that in this embodiment, the first conductive blind via 127 of the first added layer structure layer 120p is the first line layer 117 that penetrates the fourth line layer 128, the fifth dielectric layer 126 and the fourth dielectric layer 122 and is electrically connected to the first external line layer 130a, the fourth line layer 128 and the substrate 110a.
[0148] Figure 15A This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 15B yes Figure 15A A partial bottom view of the circuit board structure. Please also refer to... Figure 1A , Figure 1B , Figure 15A as well as Figure 15B The circuit board structure 100q in this embodiment is similar to the circuit board structure 100a described above, except that in this embodiment, the circuit board structure 100q includes two first conductive vias 150a. A first signal line 132q, the two first conductive vias 150a, and a second signal line 142q define two signal paths L21. A first ground line 134q, each second conductive via 160, a first circuit layer 117, an outer conductive layer 113b, and a second ground line 144q define a ground path L22. Here, the circuit board structure 100q is a ground / signal / signal / ground (GSSG) design. Because the two signal paths L21 are surrounded and enclosed by the ground path L22, a good high-frequency, high-speed loop can be formed.
[0149] Figure 16 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 15A as well as Figure 16The circuit board structure 100r in this embodiment is similar to the circuit board structure 100q described above, except that in this embodiment, the circuit board structure 100r further includes a via-filling material 165, wherein the via-filling material 165 fills the second conductive via 160, and the opposite sides of the via-filling material 165 can be aligned with the first external circuit layer 130q and the second external circuit layer 140q, respectively. Here, the two first conductive vias 150a are not filled with via-filling material 165. Here, the material of the via-filling material 165 is, for example, resin, which can be regarded as a via-filling agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.
[0150] Figure 17 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 15A as well as Figure 17 The circuit board structure 100s of this embodiment is similar to the circuit board structure 100q described above. The difference is that in this embodiment, the circuit board structure 100s further includes a via-filling material 165, which fills the two first conductive vias 150a and the second conductive via 160. The opposite sides of the via-filling material 165 can be aligned with the first external circuit layer 130q and the second external circuit layer 140q, respectively. Here, the material of the via-filling material 165 is, for example, resin, which can be considered a via-filling agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.
[0151] Figure 18 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 17 as well as Figure 18 The circuit board structure 100t in this embodiment is similar to the circuit board structure 100s described above, except that in this embodiment, the circuit board structure 100t further includes a first cover layer 170 and a second cover layer 175. The first cover layer 170 covers the first external circuit layer 130q. The second cover layer 175 covers the second external circuit layer 140q, wherein the first cover layer 170 and the second cover layer 175 respectively cover the opposite ends of the via filling material 165. Here, the material of the first cover layer 170 and the second cover layer 175 may be, for example, copper, but is not limited thereto.
[0152] Figure 19 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 17 as well as Figure 19The circuit board structure 100u in this embodiment is similar to the circuit board structure 100s described above, except that in this embodiment, the circuit board structure 100u further includes a first cover layer 172 and a second cover layer 177. The first cover layer 172 covers the first external circuit layer 130q, and the second cover layer 177 covers the second external circuit layer 140q. The first cover layer 172 and the second cover layer 177 respectively cover the opposite ends of the filling material 165 filling the two first conductive vias 150a, and expose the opposite ends of the filling material 165 located in the second conductive via 160. Here, the material of the first cover layer 172 and the material of the second cover layer 177 may be, for example, copper, but are not limited thereto.
[0153] Figure 20 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 15A as well as Figure 20 The circuit board structure 100v in this embodiment is similar to the circuit board structure 100q described above. The difference is that in this embodiment, the circuit board structure 100v also includes a third conductive via 190, which penetrates the first add-on structure layer 120a, the first circuit layer 117, the first dielectric layer 114, the first inner circuit layer 112a, the core layer 111, the second inner circuit layer 112b, the second dielectric layer 115, and the second circuit layer 118, and is structurally and electrically connected to the first outer circuit layer 130v, the fourth circuit layer 128, the third circuit layer 124, the first circuit layer 117, the first inner circuit layer 112a, the second inner circuit layer 112b, the second circuit layer 118, and the second outer circuit layer 140v. Here, the third conductive via 190 is located between the first conductive vias 150a, and the first signal line 132v, the third conductive via 190, the first line layer 117, the outer conductive layer 113b, and the second signal line 144v define a ground path L33 (i.e., the second ground path), while the signal path L31 is located between the ground path L32 and the ground path L33. The signal path L31 defined by the first signal line 132v, the first conductive via 150a, and the second signal line 142v is surrounded and enclosed by the ground path L32 defined by the first ground line 134v, the second conductive via 160, the first line layer 117, the outer conductive layer 113b, and the second ground line 144q, and the ground path L33 defined by the first ground line 134v, the third conductive via 190, the first line layer 117, the outer conductive layer 113b, and the second ground line 144q, thus forming a good high-frequency, high-speed loop. Here, the circuit board structure is designed with 100V ground / signal / ground / signal / ground (GSGSG).
[0154] Figure 21This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 20 as well as Figure 21 The circuit board structure 100w in this embodiment is similar to the circuit board structure 100v described above. The difference is that in this embodiment, the circuit board structure 100w also includes a via-filling material 165, which fills the second conductive via 160 and the third conductive via 190. The opposite sides of the via-filling material 165 can be aligned with the first external circuit layer 130v and the second external circuit layer 140v, respectively. Here, the first conductive via 150a is not filled with via-filling material 165. The material of the via-filling material 165 is, for example, resin, which can be considered a via-filling agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.
[0155] Figure 22 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 20 as well as Figure 22 The circuit board structure 100x in this embodiment is similar to the circuit board structure 100v described above. The difference is that in this embodiment, the circuit board structure 100x further includes a via-filling material 165, which fills the first conductive via 150a, the second conductive via 160, and the third conductive via 190. The opposite sides of the via-filling material 165 can be aligned with the first external circuit layer 130v and the second external circuit layer 140v, respectively. Here, the material of the via-filling material 165 is, for example, resin, which can be considered a via-filling agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.
[0156] Figure 23 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 22 as well as Figure 23 The circuit board structure 100y in this embodiment is similar to the circuit board structure 100x described above, except that in this embodiment, the circuit board structure 100y further includes a first cover layer 170 and a second cover layer 175. The first cover layer 170 covers the first external circuit layer 130v. The second cover layer 175 covers the second external circuit layer 140v, wherein the first cover layer 170 and the second cover layer 175 respectively cover the opposite ends of the via filling material 165. Here, the material of the first cover layer 170 and the second cover layer 175 may be, for example, copper, but is not limited thereto.
[0157] Figure 24 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 22 as well as Figure 24The circuit board structure 100z in this embodiment is similar to the circuit board structure 100x described above, except that in this embodiment, the circuit board structure 100z further includes a first cover layer 172 and a second cover layer 177. The first cover layer 172 covers the first external circuit layer 130v, while the second cover layer 177 covers the second external circuit layer 140v. The first cover layer 172 and the second cover layer 177 respectively cover the opposite ends of the filling material 165 filling the first conductive via 150a, and expose the opposite ends of the filling material 165 located in the second conductive via 160. Here, the material of the first cover layer 172 and the material of the second cover layer 177 may be, for example, copper, but are not limited thereto.
[0158] Figure 25A This is a top view schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 25B It is along Figure 25A A schematic diagram of the cross section of line AA. Figure 25C It is along Figure 25A A cross-sectional view of line BB. Please refer to the following simultaneously. Figure 6A , Figure 25A as well as Figure 25B The circuit board structure 200a of this embodiment is similar to the circuit board structure 100f described above, except that in this embodiment, the substrate 210a also has a third opening 219, which penetrates the first circuit layer 217, the first dielectric layer 214, the first inner circuit layer 212a, the core layer 211, the second inner circuit layer 212b, the second dielectric layer 215, and the second circuit layer 218, and connects the fourth dielectric layer 222 and the second outer circuit layer 140a. Furthermore, please refer to... Figure 25C In this embodiment, the first add-on structure layer 220a further includes at least one first conductive blind via 225. The first conductive blind via 225 penetrates the fourth circuit layer 228 and the fifth dielectric layer 226 and electrically connects the first external circuit layer 130a, the fourth circuit layer 228, and the third circuit layer 224, achieving impedance matching. Furthermore, the first ground line 134a, the first conductive blind via 225, and the third circuit layer 224 define a ground path L13, which surrounds the first signal line 132a, forming a closed loop and thus creating a good high-frequency, high-speed circuit. Here, one side of the circuit board structure 200a has a fan-out design.
[0159] Figure 26 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please refer to the following simultaneously: Figure 25C as well as Figure 26The circuit board structure 200b of this embodiment is similar to the circuit board structure 200a described above, except that in this embodiment, the substrate 210b also has multiple third openings 219, wherein the second ground line 144a, the outer conductive layer 213b, and the second internal circuit layer 212b define a ground path L14, and the ground path L14 surrounds the second signal line 142a, forming a closed enclosure, thus forming a good high-frequency, high-speed loop. Here, both sides of the circuit board structure 200b are fan-out designs.
[0160] Figure 27A This is a top view schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 27B It is along Figure 27A A cross-sectional schematic diagram of line CC. Figure 27C It is along Figure 27A A cross-sectional view of line DD. Please refer to the diagram below. Figure 11 , Figure 27A as well as Figure 27B The circuit board structure 200c of this embodiment is similar to the circuit board structure 100f described above, except that in this embodiment, the circuit board structure 200c further includes a via material 165, a first cover layer 170, and a second cover layer 175. The via material 165 fills the first conductive via 150a and the second conductive via 160, and the opposite sides of the via material 165 can be aligned with the first external circuit layer 130a and the second external circuit layer 140a, respectively. Here, the material of the via material 165 is, for example, resin, which can be regarded as a via plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first external circuit layer 130a. The second cover layer 175 covers the second external circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover the opposite ends of the via material 165. Here, the materials of the first cover layer 170 and the second cover layer 175 can be, for example, copper, but are not limited to this. Furthermore, please refer to... Figure 27C The first grounding line 134a, the first conductive blind via 225, and the third line layer 224 define a grounding path L13, which surrounds the first signal line 132a in a closed loop, thus forming a good high-frequency, high-speed loop. Furthermore, the second add-on structure layer 280c includes at least one second conductive blind via 285, which penetrates the fifth line layer 284 and the sixth dielectric layer 282 and is electrically connected to the second external line layer 140a, the fifth line layer 284, and the second line layer 118. The second grounding line 144a, the second conductive blind via 285, and the second line layer 118 define a grounding path L15, which surrounds the second signal line 142a in a closed loop, thus forming a good high-frequency, high-speed loop.
[0161] Figure 28A This is a top view schematic diagram of a circuit board structure according to another embodiment of the present invention. Figure 28B It is along Figure 28A A cross-sectional view of the grounding line EE. To achieve impedance matching, the grounding line can be laid out using either through-hole or blind via designs. Please also refer to... Figure 27B , Figure 28A as well as Figure 28B The circuit board structure 200d in this embodiment is similar to the circuit board structure 200c described above, except that in this embodiment, the first add-on structure layer 220d further includes at least one first conductive blind via 225, wherein the first conductive blind via 225 penetrates the fourth circuit layer 228 and the fifth dielectric layer 226 and is electrically connected to the first external circuit layer 130a, the fourth circuit layer 228, and the third circuit layer 224. The second add-on structure layer 280d further includes at least one second conductive blind via 285, wherein the second conductive blind via 285 penetrates the fifth circuit layer 284 and the sixth dielectric layer 282 and is electrically connected to the second external circuit layer 140a, the fifth circuit layer 284, and the second circuit layer 118.
[0162] Figure 29 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 28B as well as Figure 29 The circuit board structure 200e in this embodiment is similar to the circuit board structure 200d described above, except that in this embodiment, the first conductive blind via 227 of the first add-on layer 220e penetrates the fourth circuit layer 228, the fifth dielectric layer 226, and the fourth dielectric layer 222, and is electrically connected to the first external circuit layer 130a, the fourth circuit layer 228, and the first circuit layer 117. The first signal line 132a, the first conductive via 150a, and the second signal line 142a define the signal path L41. The first ground line 134a, the first conductive blind via 227, the first circuit layer 117, the outer conductive layer 113b, the second circuit layer 118, the second conductive blind via 285, and the second ground line 144a define the ground path L42. Since the signal path L41 is surrounded by the ground path L42 and is enclosed, a good high-frequency, high-speed loop can be formed.
[0163] Figure 30 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 6A as well as Figure 30The circuit board structure 200f in this embodiment is similar to the circuit board structure 100f described above. The difference is that in this embodiment, the circuit board structure 200f further includes at least one pad P, which is disposed within the fourth dielectric layer 122 and connected to the first conductive via 150a to achieve impedance matching. Here, the pad P can be considered as an internal signal line pattern.
[0164] Figure 31 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 8A as well as Figure 31 The circuit board structure 200g of this embodiment is similar to the circuit board structure 100h described above, except that in this embodiment, the circuit board structure 200g further includes a via-filling material 165, a first cover layer 170, and a second cover layer 175. The via-filling material 165 fills the first conductive via 150a and the second conductive via 160, and the opposite sides of the via-filling material 165 can be aligned with the first external circuit layer 130a and the second external circuit layer 140a, respectively. Here, the material of the via-filling material 165 is, for example, resin, which can be considered a via-filling agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first external circuit layer 130a. The second cover layer 175 covers the second external circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover the opposite ends of the via-filling material 165. Here, the materials of the first cover layer 170 and the second cover layer 175 may be, for example, copper, but are not limited thereto. Furthermore, the circuit board structure 200g of this embodiment also includes at least one pad P, disposed within the fourth dielectric layer 122 and connected to the first conductive via 150a, to achieve impedance matching. Here, the pad P can be considered as an internal signal line pattern.
[0165] Figure 32 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 11 as well as Figure 32The circuit board structure 200h in this embodiment is similar to the circuit board structure 100k described above, except that in this embodiment, the circuit board structure 200h further includes a via material 165, a first cover layer 170, and a second cover layer 175. The via material 165 fills the first conductive via 150a and the second conductive via 160, and the opposite sides of the via material 165 can be aligned with the first external circuit layer 130a and the second external circuit layer 140a, respectively. Here, the material of the via material 165 is, for example, resin, which can be regarded as a via plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first external circuit layer 130a. The second cover layer 175 covers the second external circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover the opposite ends of the via material 165. Here, the materials of the first cover layer 170 and the second cover layer 175 may be, for example, copper, but are not limited thereto. Furthermore, the circuit board structure 200h of this embodiment also includes at least one pad P, disposed within the fourth dielectric layer 122 and connected to the first conductive via 150a, to achieve impedance matching. Here, the pad P can be considered as an internal signal line pattern.
[0166] Figure 33 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 13 as well as Figure 33 The circuit board structure 200i of this embodiment is similar to the circuit board structure 100n described above, except that in this embodiment, the circuit board structure 200i further includes a via material 165, a first cover layer 170, and a second cover layer 175. The via material 165 fills the first conductive via 150a and the second conductive via 160, and the opposite sides of the via material 165 can be aligned with the first external circuit layer 130a and the second external circuit layer 140a, respectively. Here, the material of the via material 165 is, for example, resin, which can be regarded as a via plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first external circuit layer 130a. The second cover layer 175 covers the second external circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover the opposite ends of the via material 165. Here, the materials of the first cover layer 170 and the second cover layer 175 may be, for example, copper, but are not limited thereto. Furthermore, the circuit board structure 200i of this embodiment also includes at least one pad P disposed within the fourth dielectric layer 122 and connected to the first conductive via 150a, thereby achieving impedance matching. Here, the pad P can be considered as an internal signal line pattern.
[0167] Figure 34 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 14 as well as Figure 34 The circuit board structure 200j in this embodiment is similar to the circuit board structure 100p described above, except that in this embodiment, the circuit board structure 200j further includes a via material 165, a first cover layer 170, and a second cover layer 175. The via material 165 fills the first conductive via 150a and the second conductive via 160, and the opposite sides of the via material 165 can be aligned with the first external circuit layer 130a and the second external circuit layer 140a, respectively. Here, the material of the via material 165 is, for example, resin, which can be regarded as a via plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first external circuit layer 130a. The second cover layer 175 covers the second external circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover the opposite ends of the via material 165. Here, the materials of the first cover layer 170 and the second cover layer 175 may be, for example, copper, but are not limited thereto. Furthermore, the circuit board structure 200j of this embodiment also includes at least one pad P, disposed within the fourth dielectric layer 122 and connected to the first conductive via 150a, to achieve impedance matching. Here, the pad P can be considered as an internal signal line pattern.
[0168] Figure 35 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 12 as well as Figure 35 The circuit board structure 200k in this embodiment is similar to the circuit board structure 100m described above, except that in this embodiment, the circuit board structure 200k further includes a via material 165, a first cover layer 170, and a second cover layer 175. The via material 165 fills the first conductive via 150a and the second conductive via 160a, and the opposite sides of the via material 165 can be aligned with the first external circuit layer 130a and the second external circuit layer 140a, respectively. Here, the material of the via material 165 is, for example, resin, which can be regarded as a via plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first external circuit layer 130a. The second cover layer 175 covers the second external circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover the opposite ends of the via material 165. Here, the materials of the first cover layer 170 and the second cover layer 175 may be, for example, copper, but are not limited thereto. Furthermore, the circuit board structure 200k of this embodiment also includes at least one pad P disposed within the fourth dielectric layer 122 and connected to the first conductive via 150a, thereby achieving impedance matching. Here, the pad P can be considered as an internal signal line pattern.
[0169] It should be noted that, in order to achieve impedance matching, surface signal line patterns (such as...) can be designed. Figure 1A , Figure 15A , Figure 20 ), internal signal circuit patterns (such as Figures 30 to 35 The displacement of the pad P and the coaxial through hole (e.g.) Figure 2A The misalignment of the vias or the layout of the grounding vias and / or blind vias (e.g., misalignment of the vias) or the layout of the grounding vias and / or blind vias. Figure 1A , Figure 13 or Figure 14 To achieve this.
[0170] Figure 36 This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention. Please also refer to... Figure 25B as well as Figure 36 The circuit board structure 200m of this embodiment is similar to the circuit board structure 200a described above. The difference lies in the following: In this embodiment, the first side 168 and the second side 169 of the filler material 167, which are opposite to each other, have a height difference D1 with the first surface 226a of the fifth dielectric layer 226 and the second surface 215a of the second dielectric layer 215, respectively. The height difference D1 ranges, for example, from greater than -30 micrometers to less than +30 micrometers. Here, the first side 168 of the filler material 167 is higher than the first surface 226a of the fifth dielectric layer 226, that is, the first side 168 of the filler material 167 protrudes from the first surface 226a of the fifth dielectric layer 226, and the height difference D1 is +30 micrometers; while the second side 169 of the filler material 167 is higher than the second surface 215a of the second dielectric layer 215, that is, the second side 169 of the filler material 167 is recessed into the second surface 215a of the second dielectric layer 215, and the height difference is -30 micrometers. Furthermore, in this embodiment, the two opposing surfaces 216a and 216b of the third dielectric layer 216 of the substrate 210a' are respectively lower than the surface 217a of the first circuit layer 217 and higher than the surface 218a of the second circuit layer 218. That is, the third dielectric layer 216 is recessed between the first circuit layer 217 and the second circuit layer 218, wherein there is a height difference D2 between the surface 216b of the third dielectric layer 216 and the surface 218a of the second circuit layer 218, and this height difference D2 is, for example, greater than -30 micrometers to equal to 0 micrometers. Here, because the third dielectric layer 216 is recessed in the second circuit layer 218, the height difference D2 is -30 micrometers. If the third dielectric layer 216 is flush with the second circuit layer 218, the height difference is 0 micrometers. Therefore, the circuit board structure 200m of this embodiment can have better electrical performance.
[0171] In summary, in the circuit board structure design of this invention, the first conductive via is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path, while the first external circuit layer, the second conductive via, the first circuit layer, the outer conductive layer, and the second external circuit layer define a ground path, and the ground path surrounds the signal path. This forms a good high-frequency, high-speed signal loop, and in subsequent applications in integrated circuits and antennas, it can also solve the problem of signal interference on the same plane, reduce signal energy loss and noise interference, thereby improving signal transmission reliability.
[0172] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A circuit board structure, characterized in that, include: A substrate having at least one first opening and including a core layer, a first inner circuit layer, a second inner circuit layer, an inner conductive layer, a first dielectric layer, a second dielectric layer, a third dielectric layer, a first circuit layer, a second circuit layer, and an outer conductive layer. The first inner circuit layer and the second inner circuit layer are disposed on opposite sides of the core layer. The core layer has a plurality of second openings, and the inner conductive layer covers the inner walls of the plurality of second openings and connects the first inner circuit layer and the second inner circuit layer. The first dielectric layer covers the first inner circuit layer and is located between the first inner circuit layer and the outer conductive layer. Between the first circuit layers, the second dielectric layer covers the second inner circuit layer and is located between the second inner circuit layer and the second circuit layer. The at least one first opening is located between the plurality of second openings and penetrates the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer and the second dielectric layer. The outer conductive layer covers the inner wall of the at least one first opening and connects the first circuit layer, the first inner circuit layer, the second inner circuit layer and the second circuit layer. The third dielectric layer fills the at least one first opening. The first add-in structure layer is disposed on the first circuit layer; The first external circuit layer is disposed on the first add-in structure layer; A second external circuit layer is disposed on the second circuit layer and a portion of the third dielectric layer; At least one first conductive via penetrates the first add-on structure layer and the third dielectric layer, and electrically connects the first external circuit layer and the second external circuit layer, thereby defining a signal path; as well as Multiple second conductive vias surround the at least one first conductive via and penetrate the first add-on structure layer, the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer, the second dielectric layer, and the second circuit layer, and are electrically connected to the first outer circuit layer, the first circuit layer, the first inner circuit layer, the second inner circuit layer, and the second circuit layer. The first outer circuit layer, the second conductive vias, the first circuit layer, the outer conductive layer, and the second outer circuit layer define a first ground path, and the first ground path surrounds the signal path.
2. The circuit board structure according to claim 1, characterized in that, The first add-in structure layer includes a fourth dielectric layer, a third circuit layer, a fifth dielectric layer, and a fourth circuit layer. The fourth dielectric layer is disposed on the first circuit layer and the third dielectric layer, the third circuit layer is disposed on the fourth dielectric layer, the fifth dielectric layer is disposed on the third circuit layer and the fourth dielectric layer, and the fourth circuit layer is disposed on the fifth dielectric layer. The first external circuit layer is disposed on the fourth circuit layer.
3. The circuit board structure according to claim 2, characterized in that, Also includes: The second add-in structure layer is disposed on the second circuit layer and a portion of the third dielectric layer, while the second external circuit layer is located on the second add-in structure layer.
4. The circuit board structure according to claim 3, characterized in that, The first augmentation layer further includes at least one first conductive blind via, which penetrates the fifth dielectric layer and the fourth circuit layer and is electrically connected to the first external circuit layer, the fourth circuit layer and the third circuit layer. The second augmentation layer further includes at least one second conductive blind via, which penetrates the second augmentation layer and is electrically connected to the second external circuit layer and the second circuit layer.
5. The circuit board structure according to claim 3, characterized in that, The first add-in structure layer further includes at least one first conductive blind via, which penetrates the fifth dielectric layer and the fourth dielectric layer and electrically connects the first external circuit layer and the first circuit layer. The second add-in structure layer further includes at least one second conductive blind via, which penetrates the second add-in structure layer and electrically connects the second external circuit layer and the second circuit layer.
6. The circuit board structure according to claim 2, characterized in that, The substrate also has at least one third opening that penetrates the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer, the second dielectric layer, and the second circuit layer, and connects the fourth dielectric layer and the second outer circuit layer.
7. The circuit board structure according to claim 6, characterized in that, The first added layer structure also includes at least one first conductive blind via, which penetrates the fifth dielectric layer and the fourth circuit layer and electrically connects the first external circuit layer, the fourth circuit layer and the third circuit layer.
8. The circuit board structure according to claim 2, characterized in that, Also includes: At least one pad is disposed within the fourth dielectric layer of the first augmentation structure layer and connected to the at least one first conductive via.
9. The circuit board structure according to claim 1, characterized in that, A gap is formed between the outer conductive layer, the second dielectric layer and the second circuit layer, and the third dielectric layer fills the gap.
10. The circuit board structure according to claim 1, characterized in that, Also includes: The filling material is used to fill at least all of the plurality of second conductive vias.
11. The circuit board structure according to claim 10, characterized in that, The filling material also fills the at least one first conductive via.
12. The circuit board structure according to claim 11, characterized in that, Also includes: A first cover layer, covering the first outer circuit layer; as well as A second cover layer covers the second external circuit layer, wherein the first cover layer and the second cover layer respectively cover both ends of the via filling material.
13. The circuit board structure according to claim 11, characterized in that, Also includes: A first cover layer, covering the first outer circuit layer; as well as A second cover layer covers the second external circuit layer, wherein the first cover layer and the second cover layer respectively cover both ends of the filling material that fills the at least one first conductive via, and expose both ends of the filling material located in the plurality of second conductive vias.
14. The circuit board structure according to claim 1, characterized in that, The at least one first conductive via includes two first conductive vias.
15. The circuit board structure according to claim 14, characterized in that, Also includes: The filling material is used to fill at least all of the plurality of second conductive vias.
16. The circuit board structure according to claim 15, characterized in that, Also includes: A first cover layer, covering the first outer circuit layer; as well as A second cover layer covers the second external circuit layer, wherein the first cover layer and the second cover layer at least cover both ends of the via filling material that fills the plurality of first conductive vias.
17. The circuit board structure according to claim 14, characterized in that, Also includes: The third conductive via penetrates the first add-on structure layer, the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer, the second dielectric layer, and the second circuit layer, and is electrically connected to the first outer circuit layer, the first circuit layer, the first inner circuit layer, the second inner circuit layer, and the second circuit layer. The third conductive via is located between the plurality of first conductive vias, and the first outer circuit layer, the third conductive via, the first circuit layer, the outer conductive layer, and the second outer circuit layer define a second ground path, while the signal path is located between the first ground path and the second ground path.
18. The circuit board structure according to claim 17, characterized in that, Also includes: The filling material fills at least the plurality of second conductive vias and the third conductive via.
19. The circuit board structure according to claim 18, characterized in that, Also includes: A first cover layer, covering the first outer circuit layer; as well as A second cover layer covers the second external circuit layer, wherein the first cover layer and the second cover layer at least cover both ends of the via filling material that fills the plurality of first conductive vias.
20. The circuit board structure according to claim 1, characterized in that, The first external circuit layer includes a first signal line and a first ground line, while the second external circuit layer includes a second signal line and a second ground line. The first signal line, the at least one first conductive via, and the second signal line define the signal path. The first ground line, each of the plurality of second conductive vias, the first circuit layer, the outer conductive layer, and the second ground line define the first ground path.
21. The circuit board structure according to claim 1, characterized in that, Also includes: The via-filling material at least fills the plurality of second conductive vias, wherein the first add-on structure layer includes a fourth dielectric layer, a third circuit layer, a fifth dielectric layer, and a fourth circuit layer. The fourth dielectric layer is disposed on the first circuit layer and the third dielectric layer, the third circuit layer is disposed on the fourth dielectric layer, and the fifth dielectric layer is disposed on the third circuit layer and the fourth dielectric layer, and the fourth circuit layer is disposed on the fifth dielectric layer. The first external circuit layer is disposed on the fourth circuit layer. The first and second sides of the via-filling material, which are opposite to each other, have a height difference with the first surface of the fifth dielectric layer and the second surface of the second dielectric layer, respectively. The height difference ranges from greater than -30 micrometers to less than +30 micrometers.
22. The circuit board structure according to claim 1, characterized in that, The third dielectric layer is recessed between the surface of the first circuit layer and the surface of the second circuit layer, and there is a height difference between the surface of the third dielectric layer and the surface of the second circuit layer, wherein the height difference ranges from greater than -30 micrometers to equal to 0 micrometers.
Citation Information
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