A cross-module high-speed data stream continuous playback processing method

Abstract

The application discloses a kind of high-speed data stream continuous playback processing methods across module, setting storage module and playback module, sequentially complete the cross-module automatic continuous transmission of data stream to be played back, data stream deframing, data caching and data playback restoration.For realizing cross-module data stream continuous transmission, the mechanism of signal line interaction between storage module and playback module and data tail mark is used to complete cross-module continuous data stream transmission control, and cross-module data stream continuous transmission can be realized.The data type in data stream can be deframed, and the sampling rate parameter determines the speed of reading out the data to be restored in the cache area, and affects the writing speed of the data to be restored in the cache area and the transmission speed of the data stream in high-speed transmission port.The playback speed is automatically matched by step-by-step feedback.

Description

Technical Field

[0001] This invention belongs to the field of data stream playback processing technology, specifically relating to a cross-module high-speed data stream continuous playback processing method. Background Technology

[0002] High-speed continuous data stream playback is a key technology in the field of data stream playback. With the increasing volume of data acquisition, data stream playback services need to handle increasingly higher data stream rates. Ensuring high-speed transmission and continuous playback of large-capacity data streams has become a pressing issue. Simultaneously, to continuously play back data streams from multiple storage modules and guarantee the continuity of the restored data, a reliable interaction mechanism needs to be designed. Furthermore, when dealing with multi-format and multi-rate data streams, it is necessary to analyze the parameter characteristics of the frame data stream, such as the sampling rate, and automatically match the playback data stream rate based on these characteristics.

[0003] The overall block diagram of existing data stream playback processing technology is as follows: Figure 1 The system utilizes a high-speed transmission port to transmit data from the storage module back to the main control unit, where it is then buffered. This buffering, often implemented using a FIFO, addresses the data buffering issue while simultaneously handling cross-clock domain processing. Next, the data stream is read from the buffer, and data reconstruction is performed based on the sampling rate. Finally, the data is played back from the DA converter. Current technologies often employ large-capacity FLASH memory, FLASH arrays, on-board disk arrays, or large-capacity CF cards for data stream storage. However, when faced with capacity expansion or the need for multiple storage modules in the system, no effective control mechanism is provided to ensure continuous playback of high-speed, high-capacity data streams. Furthermore, FLASH or CF card storage has limited capacity, and it cannot automatically match the playback data stream rate to meet the demands of multi-format, multi-rate data stream playback. Summary of the Invention

[0004] In view of the above-mentioned technical problems in the prior art, the present invention proposes a cross-module high-speed data stream continuous playback processing method, which is reasonably designed, overcomes the shortcomings of the prior art, and has good effect.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] A cross-module high-speed data stream continuous playback processing method is provided, which includes a storage module and a playback module. The storage module includes four storage units 1 to 4. The playback module is configured with a buffer FIFO_x, where x is 0, 1, 2, 3 and 4. The four storage units are respectively connected to buffers FIFO_1 to FIFO_4 through two communication signal lines. Buffers FIFO_1 to FIFO_4 are all connected to buffer FIFO_0.

[0007] The method includes the following steps:

[0008] S1. The data stream to be played back is automatically and continuously transmitted from the storage module to the playback module. The data stream transmission between each storage unit and the playback module is realized through the AURORA high-speed transmission port. The data stream file includes multiple files. Each file consists of a file header and M data segments. Each data segment consists of a data segment header and N data blocks. Each data block consists of a data block header and Q data to be restored.

[0009] S2. Data stream deframe: When all data segments and all data blocks in each data segment of a data stream file have been deframed, the deframe of one file is completed. The deframed data is obtained, the sampling rate and the data to be restored. Continue to deframe the next file.

[0010] S3. Cache the data to be restored in DDR4, and write the data type and sampling rate into the register for later use;

[0011] S4. The speed of DDR4 data reading is controlled by the sampling rate and data type. It automatically matches the restoration of data with different formats and sampling rates, and finally realizes data playback through DA output.

[0012] Further, step S1 includes the following sub-steps:

[0013] S1.1 When the system is powered on, the host computer controls the storage unit 1 to enter the working state as an online module. When the storage unit 1 receives the first rising edge of the signal 11 from FIFO_1, it enters the data stream transmission state. When the buffer depth reaches 3 / 4 of the depth of the corresponding buffer, the signal 11 returns to zero and the data stream transmission stops. When the amount of data is less than 1 / 4 of the depth of the corresponding buffer, the signal 11 is set to 1 and the data stream transmission continues.

[0014] S1.2 When the data stream in storage unit 1 has been completely transmitted, control signal 10 is reset to zero and then set to 1. At the same time, a data tail 1 is inserted into the data stream, with a value of 512 bits that can be set. When the playback module receives the rising edge of the signal transmitted from signal 10 in storage unit 1, it starts searching for data tail 1. When data tail 1 is received, it means that the data stream of storage unit 1 has been completely transmitted to the buffer FIFO_1.

[0015] S1.3 The host computer sequentially controls storage units 2 to 4 to enter the working state as online modules, and transmits all the data streams in storage units 2 to 4 to buffers FIFO_2 to FIFO_4. Finally, FIFO_1 to FIFO_4 transmit the data to FIFO_0.

[0016] Furthermore, each AURORA has 8 lanes, with a single lane transmission speed of 8Gb / s, and the overall transmission efficiency can achieve a data stream transmission rate of no less than 54.4Gb / s.

[0017] Further, step S2 includes the following sub-steps:

[0018] S2.1 In idle state, start recognizing header data after one clock cycle. If header data is not recognized, stay in the header data recognition state.

[0019] S2.2 When header data is detected, determine the header data type status; if the detected header data is a file header, start deframing the file header and store the file header data.

[0020] S2.3. Start recognizing header data again, recognize the first data segment header, deframe the data segment header, and extract the data sampling rate and data type from the data segment header;

[0021] S2.4 Continue to identify the header data, identify the first data block header, and extract the data block length from the data block header;

[0022] S2.5. Starting from the data block header, Q data frames to be restored can be sequentially deframed from the data block.

[0023] S2.6 Continue to identify the header data, identify the header of the second data block, complete the deframe operation of the header of the second data block and the data to be restored, until the deframe of all N data blocks is completed, that is, the deframe of the first data segment is completed;

[0024] S2.7 Continue to identify the header data, identify the second data segment header, complete the deframe of all data blocks in the second data segment header, until the deframe of all data blocks in all M data segments in all single files is completed, thus completing the deframe of one file in the current data stream.

[0025] S2.8 Continue to decode the next file and return to S2.2 to continue execution.

[0026] Furthermore, in step S3, DDR4 operates with a higher priority for reading data than for writing data, and writes data during idle periods of reading data to supplement new data; at the same time, it ensures that the data written for frame de-framing is one address segment longer than the data read out.

[0027] Furthermore, the DDR4 user mode uses 1333 / 4MHz, and the user data processing width is 512 bits.

[0028] In step S4, the sampling rate of the data to be restored, which has a sampling rate lower than that of the DA input data, is increased by using an interpolation filter. Finally, the data with a unified sampling rate is output through the DA.

[0029] Furthermore, the maximum sampling rate of the data to be restored is 200 MSPS, with 8 parallel channels, a maximum data bit width of 32 bits per channel, and a maximum data rate of 51.2 Gb / s.

[0030] The beneficial technical effects of this invention are as follows:

[0031] 1) Continuous cross-module data playback: In scenarios requiring expanded playback data volume, multiple storage modules can be configured. An effective mechanism is designed to complete the continuous transmission control of cross-module data streams, enabling continuous cross-module data playback.

[0032] 2) Automatic matching of data stream playback rate: This method can automatically complete the deframe of data streams with multiple formats and sampling rates. Different data formats and sampling rates require different amounts of data to restore, which in turn determines the read speed of the data to be restored in the buffer and feeds back to the data write speed of the buffer and the data stream transmission speed of the high-speed transmission port, thereby realizing automatic matching of the playback data stream rate. Attached Figure Description

[0033] Figure 1 This is a block diagram illustrating the principle of existing data stream playback processing methods.

[0034] Figure 2 This is a block diagram illustrating the principle of the high-speed data stream continuous playback processing method proposed in this invention.

[0035] Figure 3 This invention provides a schematic diagram of the data flow transmission principle between the storage module and the playback module;

[0036] Figure 4 This is a diagram of the file format in the data stream proposed in this invention;

[0037] Figure 5 This is a schematic diagram of the data stream deframe principle proposed in this invention; Detailed Implementation

[0038] A cross-module high-speed data stream continuous playback processing method is provided, which sets up a storage module and a playback module. The storage module includes four storage units 1 to 4. The playback module is configured with a buffer FIFO_x, where x is 0, 1, 2, 3 and 4. The four storage units are respectively connected to buffers FIFO_1 to FIFO_4 through two communication signal lines x0 and x1, which are responsible for switching storage units and signal interaction between storage units and playback units. Buffers FIFO_1 to FIFO_4 are all connected to buffer FIFO_0.

[0039] like Figure 2 As shown, the method includes the following steps:

[0040] S1. The data stream to be played back is automatically and continuously transmitted from the storage module to the playback module, such as... Figure 4 As shown, the data stream includes multiple files. Each file consists of a file header and M data segments. Each data segment consists of a data segment header and N data blocks. Each data block consists of a data block header and Q data to be restored. The data stream transmission between the storage module and the playback module is achieved through the AURORA high-speed transmission port. A single AURORA has a total of 8 lanes, and the transmission speed of a single lane is 8Gb / s. Considering the transmission efficiency, a data stream transmission speed of at least 54.4Gb / s can be guaranteed.

[0041] Step S1 includes the following sub-steps:

[0042] S1.1 When the system is powered on, the host computer controls the storage unit 1 to enter the working state as an online module. When the storage unit 1 receives the first rising edge of the signal 11 from FIFO_1, it enters the data stream transmission state. When the buffer depth reaches 3 / 4 of the depth of the corresponding buffer, the signal 11 returns to zero and the data stream transmission stops. When the amount of data is less than 1 / 4 of the depth of the corresponding buffer, the signal 11 is set to 1 and the data stream transmission continues.

[0043] S1.2 When the data stream in storage unit 1 has been completely transmitted, the control signal 10 from storage unit 1 is reset to zero and then set to 1. At the same time, a data tail 1 is inserted into the data, such as... Figure 3 As shown, the value is a configurable data with a width of 512 bits; after the playback module receives the rising edge of signal 10, it begins searching for data tail 1. When data tail 1 is received, it indicates that the entire data stream of storage unit 1 has been transmitted to the buffer FIFO_1, as shown. Figure 4 As shown;

[0044] S1.3. When storage unit 2 receives the first rising edge of signal 21, data transmission begins. Signal 21 monitors the amount of data in FIFO_2. When the buffer depth reaches 3 / 4 of the depth of FIFO_2, signal 21 returns to zero, stopping data transmission. When the buffer depth is less than 1 / 4 of the depth of FIFO_2, signal 21 is set to 1, and data transmission continues. When all the data in storage unit 2 has been transmitted, signal 20 from storage unit 2 is reset to 1 after returning to zero, and a data tail 2 is inserted into the data stream with the same value as data tail 1. When the playback module receives the rising edge of signal 20, it begins searching for data tail 2. When data tail 2 is received, it indicates that all the data in storage unit 2 has been transmitted to buffer FIFO_2. The host computer sequentially controls storage units 3 and 4 to enter the working state as online modules, transmitting all the data in storage units 3 and 4 to buffers FIFO_3 to FIFO_4. The values ​​of data tail 3 and data tail 4 are the same as data tail 1. Finally, FIFO_1 to FIFO_4 transmit the data stream to FIFO_0.

[0045] S2. Data stream deframe: When all data segments and all data blocks in each data segment of a data stream file have been deframed, the deframe of one file is completed. The data type, sampling rate and data to be restored are parsed, and the deframe of the next file continues.

[0046] like Figure 5 As shown, step S2 includes the following sub-steps:

[0047] S2.1 In idle state, start recognizing header data after one clock cycle. If header data is not recognized, stay in the header data recognition state.

[0048] S2.2 When header data is detected, determine the header data type status; if the detected header data is a file header, start deframing the file header and store the file header data.

[0049] S2.3. Start recognizing header data again. Recognize the first data segment header, deframe the data segment header, extract parameters such as data sampling rate and data type from the data segment header, and store the data deframed from the data segment header.

[0050] S2.4 Continue to identify the header data. Once the first data block header is identified, the data block length is deframed from the data block header and the data block header length data is stored.

[0051] S2.5. Starting from the data block header, Q data frames to be restored can be sequentially deframed from the data block.

[0052] S2.6 Continue to identify the header data, identify the header of the second data block, complete the deframe operation of the header of the second data block and the data to be restored, until the deframe of all N data blocks is completed, that is, the deframe of the first data segment is completed;

[0053] S2.7 Continue to identify the header data, identify the second data segment header, complete the deframe of all data blocks in the second data segment header, until the deframe of all data blocks in all M data segments in all single files is completed, thus completing the deframe of one file in the current data stream.

[0054] S2.8 Continue to decode the next file and return to S2.2 to continue execution.

[0055] S3. The data to be restored is cached in DDR4, and the data type and sampling rate are written to the register for later use. Data caching is completed using a single DDR4. The DDR4 user clock is 1333 / 4MHz, and the user data processing width is 512b. Combined with the data processing efficiency, a data processing speed of greater than 64Gb / s can be guaranteed.

[0056] DDR4 prioritizes read data over write data, writing data during idle periods to replenish new data. Simultaneously, it ensures that the data written to DDR4 after frame de-framing is at least one address segment larger than the data read. In this embodiment, the amount of data in the cache is the amount of data from different sampling rate data streams within 150 milliseconds. This ensures that the switching process of the storage module is completed within 100 milliseconds, guaranteeing sufficient data to maintain the continuity of the restored data.

[0057] S4. The speed of DDR4 data readout is controlled by sampling rate and data type. Automatic matching of playback rates for data streams with different formats and sampling rates is achieved through step-by-step feedback control. Data to be restored with a sampling rate lower than the DA input sampling rate is improved using an interpolation filter. Finally, data with a unified sampling rate is output through the DA. The maximum sampling rate of the data to be restored is 200 MSPS, with 8 parallel channels and a maximum single-channel data bit width of 32 bits. The maximum data rate of the data to be restored is 51.2 Gb / s.

[0058] Of course, the above description is not intended to limit the present invention, and the present invention is not limited to the examples given above. Any changes, modifications, additions or substitutions made by those skilled in the art within the scope of the present invention should also fall within the protection scope of the present invention.

Claims

1. A method for continuous playback processing of high-speed data streams across modules, characterized in that, The system includes a storage module and a playback module. The storage module includes four storage units 1 to 4. The playback module is configured with a buffer FIFO_x, where x is 0, 1, 2, 3, and 4. The four storage units are connected to buffers FIFO_1 to FIFO_4 via two communication signal lines. Buffers FIFO_1 to FIFO_4 are all connected to buffer FIFO_0. The method includes the following steps: S1. The data stream to be played back is automatically and continuously transmitted from the storage module to the playback module. The data stream transmission between each storage unit and the playback module is realized through the AURORA high-speed transmission port. The data stream includes multiple files. Each file consists of a file header and M data segments. Each data segment consists of a data segment header and N data blocks. Each data block consists of a data block header and Q data to be restored. S2. Data stream deframe: When all data segments and all data blocks in each data segment of a data stream file have been deframed, the deframe of one file is completed. The deframed data is obtained, the sampling rate and the data to be restored. Continue to deframe the next file. S3. Cache the data to be restored in DDR4, and write the data type and sampling rate into the register for later use; S4. The speed of DDR4 data reading is controlled by the data type and sampling rate, and the data of different formats and sampling rates is automatically matched for restoration. Finally, the data is played back through DA output. Step S1 includes the following sub-steps: S1.1 When the system is powered on, the host computer controls the storage unit 1 to enter the working state as an online module. When the storage unit 1 receives the first rising edge of the signal 11 from FIFO_1, it enters the data stream transmission state. When the buffer depth reaches 3 / 4 of the depth of the corresponding buffer, the signal 11 returns to zero and the data stream transmission stops. When the amount of data is less than 1 / 4 of the depth of the corresponding buffer, the signal 11 is set to 1 and the data stream transmission continues. S1.2 When the data stream in storage unit 1 has been completely transmitted, control signal 10 is reset to zero and then set to 1. At the same time, a data tail 1 is inserted into the data stream, with a value of 512 bits that can be set. When the playback module receives the rising edge of the signal transmitted from signal 10 in storage unit 1, it starts searching for data tail 1. When data tail 1 is received, it means that the data stream of storage unit 1 has been completely transmitted to the buffer FIFO_1. S1.3 The host computer sequentially controls storage units 2~4 to enter the working state as online modules, and transmits all the data streams in storage units 2~4 to buffers FIFO_2~FIFO_4. Finally, FIFO_1~FIFO_4 transmit the data to FIFO_0.

2. The method for continuous playback processing of high-speed data streams across modules according to claim 1, characterized in that, Each AURORA has 8 lanes, with a single lane transmission speed of 8Gb / s. The overall transmission efficiency can achieve a data stream transmission rate of no less than 54.4Gb / s.

3. The method for continuous playback processing of high-speed data streams across modules according to claim 1, characterized in that, Step S2 includes the following sub-steps: S2.1 In idle state, start recognizing header data after one clock cycle. If header data is not recognized, stay in the header data recognition state. S2.2 When header data is detected, determine the header data type status; if the detected header data is a file header, start deframing the file header and store the file header data. S2.

3. Start recognizing header data again, recognize the first data segment header, deframe the data segment header, and extract the data sampling rate and data type from the data segment header; S2.4 Continue to identify the header data, identify the first data block header, and extract the data block length from the data block header; S2.

5. Starting from the data block header, Q data frames to be restored can be sequentially deframed from the data block. S2.6 Continue to identify the header data, identify the header of the second data block, complete the deframe operation of the header of the second data block and the data to be restored, until the deframe of all N data blocks is completed, that is, the deframe of the first data segment is completed; S2.7 Continue to identify the header data, identify the second data segment header, complete the deframe of all data blocks in the second data segment header, until the deframe of all data blocks in all M data segments in all single files is completed, thus completing the deframe of one file in the current data stream; S2.8 Continue to decode the next file and return to S2.2 to continue execution.

4. The method for continuous playback processing of high-speed data streams across modules according to claim 1, characterized in that, In step S3, DDR4 operates with a higher priority for reading data than for writing data. During idle periods of reading data, data is written to supplement new data; at the same time, the data written for frame de-framing is kept to have one more address segment than the data read.

5. The method for continuous playback processing of high-speed data streams across modules according to claim 4, characterized in that, The DDR4 user clock uses 1333 / 4MHz, and the user data processing width is 512 bits.

6. The method for continuous playback processing of high-speed data streams across modules according to claim 4, characterized in that, In step S4, the sampling rate of the data to be restored, which has a sampling rate lower than that of the DA input data, is increased by using an interpolation filter. Finally, the data with a unified sampling rate is output through the DA.

7. The method for continuous playback processing of high-speed data streams across modules according to claim 3, characterized in that, The maximum sampling rate of the data to be restored is 200 MSPS, with 8 parallel channels and a maximum data bit width of 32 bits per channel. The maximum data rate of the data to be restored is 51.2 Gb / s.

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