Modulation method of cascade H-bridge inverter

Abstract

The application discloses a kind of cascade H bridge inverter modulation methods, comprising the following steps: S1, deduce four-module cascade H bridge inverter leakage current expression, obtain the relationship between leakage current excitation source and each module parasitic capacitance voltage in four-module cascade H bridge inverter, and then obtain the switch combination that leakage current excitation source is equal under each module output level;S2, calculate the output of each module in four-module cascade H bridge inverter under switch combination, and according to the output, the output level of four-module cascade H bridge inverter is divided into balanced level and unbalanced level;S3, calculate the output of each module in cascade H bridge inverter when unbalanced level works, and then adjust carrier frequency when balanced level works, control the output of each module in cascade H bridge inverter;S4, the output of each module in cascade H bridge inverter is mapped to switch combination, and the real-time switch signal of each module power switch in cascade H bridge inverter is obtained, and the inverter modulation is completed.

Description

Technical Field

[0001] This invention belongs to the field of modulation technology for cascaded H-bridge inverters, and specifically relates to a modulation method for cascaded H-bridge inverters. Background Technology

[0002] Non-isolated cascaded H-bridge (CHB) multilevel inverters, lacking transformer isolation, allow parasitic capacitance to create a loop between the photovoltaic panels and the grid, resulting in ground leakage current. This leakage current can cause electromagnetic interference, affecting grid-connected current quality and even endangering equipment and personnel safety. Therefore, countries worldwide have imposed relevant restrictions on photovoltaic safety standards. my country's NB / T 32004-2018 "Technical Specification for Photovoltaic Grid-Connected Inverters" (issued in 2018), Germany's Low Voltage Grid Connection Directive DIN VDE 0126-1-1, and IEC 62109-2, among other relevant standards, all clearly stipulate these requirements.

[0003] Domestic and international scholars have conducted extensive research on leakage current suppression through various approaches, including modulation, control, and hardware modification, achieving promising results. However, these studies are often based on the ideal condition of equal DC-side voltage and parasitic capacitance. In practical engineering, due to inconsistent modulation strategies, the load on each cascaded module is often unbalanced, leading to significant differences in module parameters over long-term operation. Research on power balancing of cascaded modules is also considered an important aspect of promoting the industrialization of cascaded inverters; however, research that comprehensively considers leakage current suppression and module power balancing has not yet been reported. Summary of the Invention

[0004] To address the aforementioned shortcomings in the existing technology, the present invention provides a modulation method for a cascaded H-bridge inverter that solves the problems of leakage current suppression and power balancing in a four-module cascaded H-bridge inverter.

[0005] To achieve the above-mentioned objectives, the technical solution adopted by this invention is: a modulation method for a cascaded H-bridge inverter, comprising the following steps:

[0006] S1. Derive the expression for the leakage current of the four-module cascaded H-bridge inverter, obtain the relationship between the leakage current excitation source and the parasitic capacitor voltage of each module in the four-module cascaded H-bridge inverter, and then obtain the switching combination with the same leakage current excitation source under the output level of each module.

[0007] S2. Calculate the output of each module in the four-module cascaded H-bridge inverter under the switch combination, and divide the output level of the four-module cascaded H-bridge inverter into balanced level and unbalanced level according to the output.

[0008] S3. Calculate the output of each module in the cascaded H-bridge inverter when operating at an unbalanced level, and then adjust the carrier frequency to control the output of each module in the cascaded H-bridge inverter when operating at an balanced level.

[0009] S4. Map the output of each module in the cascaded H-bridge inverter to the switch combination to obtain the real-time switching signal of the power switch of each module in the cascaded H-bridge inverter, and complete the modulation of the cascaded H-bridge inverter.

[0010] Specifically, each module in the four-module cascaded H-bridge inverter is a first to a fourth H-bridge module.

[0011] Furthermore: In S1, the leakage current i of the four-module cascaded H-bridge inverter g The specific expression is as follows:

[0012] i g =C PV1 *dU c1 / dt+C PV2 *dU c2 / dt+C PV3 *dU c3 / dt+C PV4 *dU c4 / dt

[0013] In the formula, U c1 U c2 U c3 and U c4 These represent the parasitic capacitance voltages of the first to fourth H-bridge modules, respectively.

[0014] The specific relationship between the leakage current excitation source and the parasitic capacitor voltage of each module in the four-module cascaded H-bridge inverter is as follows:

[0015] The parasitic capacitance voltages of the first to fourth H-bridge modules serve as the leakage current excitation source.

[0016] Further: In S1, the method for obtaining the switch combination with equal leakage current excitation sources at the output levels of each module is specifically as follows:

[0017] The parasitic capacitance voltages of the first to fourth H-bridge modules of the cascaded H-bridge inverter are calculated based on the maximum positive and maximum negative output switching combinations. Then, all switching combinations of the cascaded H-bridge inverter under different output levels are screened according to the calculation results of the parasitic capacitance voltage sums. The switching combinations with equal calculation results of parasitic capacitance voltage sums are selected as the switching combinations with equal leakage current excitation sources under the output levels of each module.

[0018] The expression for the sum of the parasitic capacitance voltages of the first to fourth H-bridge modules is as follows:

[0019] Uc1 +U c2 +U c3 +U c4 =(-2S) a1 +S b1 -S a2 -S b3 +S a4 -2S b4 )*U dc -2U grid

[0020] In the formula, S a1 S is the switch signal on the A-bridge arm of the first H-bridge module. b1 S is the switch signal on the B-arm of the first H-bridge module. a2 S is the switch signal on the A-bridge arm of the second H-bridge module. b3 For the switch signal on the B-arm of the third H-bridge module, S a4 S is the switch signal on the A-bridge arm of the fourth H-bridge module. b4 For the switch signal on the B-arm of the fourth H-bridge module, U dc U represents the DC-side voltage of the first to fourth H-bridge modules. grid This is the grid voltage.

[0021] Further: In S2, the method for calculating the output of any module in the four-module cascaded H-bridge inverter under the switch combination is as follows:

[0022] Subtract the switch signals on bridge arm A and bridge arm B of the module to obtain the output of the module.

[0023] Further: In S2, the equalization level includes a positive half-cycle equalization level and a negative half-cycle equalization level;

[0024] The positive half-cycle equalization level includes: +4U dc +2U dc and +1U dc The negative half-cycle equalization level includes: +4U dc -2U dc and -1U dc ;

[0025] The unbalanced level includes the positive half-cycle unbalanced level and the negative half-cycle unbalanced level;

[0026] The specific positive half-cycle unbalanced level is: +3U dc The negative half-cycle unbalanced level is specifically -3U. dc , among which, U dc This refers to the DC-side voltage of the first to fourth H-bridge modules.

[0027] Furthermore: In S3, the method for calculating the output of each module in the cascaded H-bridge inverter when operating at an unbalanced level is as follows:

[0028] Calculate the unbalanced level of the positive half-cycle +3U dc With equalization level +4U dc During the switching process, the output of the first to fourth H-bridge modules, and the calculation of the positive half-cycle unbalanced level +3U. dc With equalization level +2U dc During the switching process, the first to fourth H-bridge modules output power.

[0029] Furthermore: the calculation of the positive half-cycle unbalanced level +3U dc With equalization level +4U dc The specific expressions for the output of the first to fourth H-bridge modules during the switching process are as follows:

[0030]

[0031] In the formula, M is the modulation index, and M∈[0,1], ω is the grid angular frequency, α3 represents the angle of the modulating wave greater than 3, and α3=arctan(3 / (4M)). To ensure the output of the first H-bridge module when the modulation wave during the positive half-cycle is α3~π / 2, To ensure the output of the second H-bridge module when the modulation wave during the positive half-cycle is α3~π / 2, To ensure the output of the third H-bridge module when the modulation wave during the positive half-cycle is α3~π / 2, The fourth H-bridge module outputs power when the modulation wave during the positive half-cycle is α3~π / 2;

[0032] The calculation of the positive half-cycle unbalanced level +3U dc With equalization level +2U dc The specific expressions for the output of the first to fourth H-bridge modules during the switching process are as follows:

[0033]

[0034] In the formula, α2 represents the angle of the modulated wave greater than 2. In the above switching process, α2=arctan(2 / (4M)), To ensure the output of the first H-bridge module when the modulation wave during the positive half-cycle is α2 to α3, To ensure the output of the second H-bridge module when the modulation wave during the positive half-cycle is α2 to α3, To ensure the output of the third H-bridge module when the modulation wave during the positive half-cycle is α2 to α3, The fourth H-bridge module outputs power when the modulation wave during the positive half-cycle is α2 to α3.

[0035] Further: In S3, the method of adjusting the carrier frequency and controlling the output of each module in the cascaded H-bridge inverter during equalization level operation includes the following sub-steps:

[0036] SA1, Set the adjusted carrier frequency, established at the equalization level +U dc With equalization level +2U dc The output expressions of the first to fourth H-bridge modules during the switching process;

[0037] SA2, via equalization level +U dc With equalization level +2U dc During the switching process, when the output of the first to fourth H-bridge modules is combined with the unbalanced level, the output of each module in the cascaded H-bridge inverter is calculated, and the value of the adjusted carrier frequency is determined.

[0038] SA3, Calculate the equalization level +U based on the adjusted carrier frequency value. dc With equalization level +2U dc During the switching process, the first to fourth H-bridge modules output power.

[0039] Further: In SA1, the carrier frequency before adjustment is f s The adjusted carrier frequency is set to kf s At the equalization level +U dc With equalization level +2U dc The output expressions of the first to fourth H-bridge modules during the switching process are as follows:

[0040]

[0041]

[0042] In the formula, α1 represents the angle at which the modulating wave equals 1, and in the above switching process, α2 = arctan(1 / (4M)), k is the adjustment coefficient. To ensure the output of the first H-bridge module when the modulation wave during the positive half-cycle is α1 to α2, To ensure the output of the second H-bridge module when the modulation wave during the positive half-cycle is α1 to α2, To ensure the output of the third H-bridge module when the modulation wave during the positive half-cycle is α1 to α2, The fourth H-bridge module outputs power when the modulation wave during the positive half-cycle is α1 to α2; To ensure the output of the first H-bridge module when the modulation wave during the positive half-cycle is 0 to α1, To ensure the output of the second H-bridge module when the modulation wave during the positive half-cycle is 0 to α1, To ensure the output of the third H-bridge module when the modulation wave during the positive half-cycle is 0 to α1, The fourth H-bridge module outputs power when the modulation wave during the positive half-cycle is 0 to α1;

[0043] In the SA2, through the equalization level +U dc With equalization level +2U dc During the switching process, when the output of the first to fourth H-bridge modules is operating at an unbalanced level, the specific expression for the output of each module in the cascaded H-bridge inverter is as follows:

[0044] T m1(α3～π / 2) +T m1(α2～α3) +T m1(α1～α2) +T m1(0～α1) =T m2(α3～π / 2) +T m2(α2～α3) +T m2(α1～α2) +T m2(0～α1) .

[0045] Furthermore: S4 specifically refers to:

[0046] By mapping the output of each module in the cascaded H-bridge inverter to a switching combination that satisfies the parasitic capacitor voltage and is constant, the real-time switching signals of the power switches of each module in the cascaded H-bridge inverter are obtained, thus completing the modulation of the cascaded H-bridge inverter.

[0047] The beneficial effects of this invention are as follows:

[0048] (1) The present invention provides a modulation method for a cascaded H-bridge inverter, which finds the relationship between the leakage current excitation source and the parasitic capacitor voltage of each module, thereby obtaining the switch combination with equal leakage current excitation source under each output level. According to the output of different modules under each switch combination, the output level of the cascaded H-bridge inverter is divided into balanced level and unbalanced level. By adjusting the carrier frequency, each module outputs power according to a set ratio to compensate for the uneven output of each module when operating at the unbalanced level, and finally achieves power balance of each module.

[0049] (2) This invention achieves power equalization and leakage current suppression of the first to fourth H-bridge modules by adjusting the carrier frequency, thus solving the problem of leakage current suppression and power balance of the four-module H-bridge cascaded inverter. Attached Figure Description

[0050] Figure 1 This is a flowchart of a modulation method for a cascaded H-bridge inverter according to the present invention.

[0051] Figure 2 The photovoltaic and cascaded topology of the four-module cascaded H-bridge inverter of the present invention.

[0052] Figure 3 This is a simplified equivalent model of the cascaded H-bridge inverter of this invention.

[0053] Figure 4 This is a schematic diagram of power equalization and modulation wave generation according to the present invention.

[0054] Figure 5This is a waveform diagram of the parasitic capacitance voltage of the present invention.

[0055] Figure 6 This is a waveform diagram of the DC side current of the two H-bridges in this invention. Detailed Implementation

[0056] The specific embodiments of the present invention are described below to enable those skilled in the art to understand the present invention. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the present invention as defined and determined by the appended claims. All inventions utilizing the concept of the present invention are protected.

[0057] Example 1:

[0058] like Figure 1 As shown, in one embodiment of the present invention, a modulation method for a cascaded H-bridge inverter includes the following steps:

[0059] S1. Derive the expression for the leakage current of the four-module cascaded H-bridge inverter, obtain the relationship between the leakage current excitation source and the parasitic capacitor voltage of each module in the four-module cascaded H-bridge inverter, and then obtain the switching combination with the same leakage current excitation source under the output level of each module.

[0060] S2. Calculate the output of each module in the four-module cascaded H-bridge inverter under the switch combination, and divide the output level of the four-module cascaded H-bridge inverter into balanced level and unbalanced level according to the output.

[0061] S3. Calculate the output of each module in the cascaded H-bridge inverter when operating at an unbalanced level, and then adjust the carrier frequency to control the output of each module in the cascaded H-bridge inverter when operating at an balanced level.

[0062] S4. Map the output of each module in the cascaded H-bridge inverter to the switch combination to obtain the real-time switching signal of the power switch of each module in the cascaded H-bridge inverter, and complete the modulation of the cascaded H-bridge inverter.

[0063] Specifically, each module in the four-module cascaded H-bridge inverter is a first to a fourth H-bridge module.

[0064] In this embodiment, the photovoltaic and cascaded topology of the four-module cascaded H-bridge inverter are as follows: Figure 2 As shown.

[0065] In S1, the leakage current i of the four-module cascaded H-bridge inverter g The specific expression is as follows:

[0066] i g =C PV1 *dU c1 / dt+C PV2 *dU c2 / dt+C PV3 *dU c3 / dt+C PV4 *dU c4 / dt

[0067] In the formula, U c1 U c2 U c3 and U c4 These represent the parasitic capacitance voltages of the first to fourth H-bridge modules, respectively.

[0068] In this embodiment, the simplified equivalent model of the cascaded H-bridge inverter of the present invention is as follows: Figure 3 As shown.

[0069] The specific relationship between the leakage current excitation source and the parasitic capacitor voltage of each module in the four-module cascaded H-bridge inverter is as follows:

[0070] The parasitic capacitance voltages of the first to fourth H-bridge modules serve as the leakage current excitation source.

[0071] In this embodiment, the method for deriving the relationship between the leakage current excitation source and the parasitic capacitor voltage of each module in the four-module cascaded H-bridge inverter is as follows:

[0072] (1) Assume that the DC side voltages of the first to fourth H-bridge modules are the same, denoted as U. dc1 =U dc2 =U dc2 =U dc4 =U dc ;

[0073] (2) Assume that the parasitic capacitance values ​​of the two H-bridges are the same, denoted as C. PV1 =C PV2 =C PV3 =C PV4 =C PV ;

[0074] (3) Based on the electrical quantity relationship of capacitor components, the leakage current i of the four-module cascaded H-bridge inverter g It can be described as follows:

[0075] i g =C PV1 *dU c1 / dt+C PV2 *dU c2 / dt+C PV3 *dU c3 / dt+C PV4 *dU c4 / dt

[0076] (4) Substituting the fact that the DC side voltages of the first to fourth H-bridge modules are the same and the parasitic capacitance values ​​of the two H-bridges are the same, we obtain the leakage current i of the four-module cascaded H-bridge inverter. g The specific expression is as follows:

[0077] i g =C PV* d(U c1 +U c2 +U c3 +U c4 ) / dt

[0078] In the formula, U c1 U c2 U c3 U c4 The parasitic capacitor voltages of the first to fourth H-bridge modules are respectively represented by ; the parasitic capacitor voltage of , from which the parasitic capacitor voltage of each module in the four-module cascaded H-bridge inverter can be obtained, which is the leakage current excitation source.

[0079] In step S1, the method for obtaining the switch combination with equal leakage current excitation sources at the output levels of each module is as follows:

[0080] The parasitic capacitance voltages of the first to fourth H-bridge modules of the cascaded H-bridge inverter are calculated based on the maximum positive and maximum negative output switching combinations. Then, all switching combinations of the cascaded H-bridge inverter under different output levels are screened according to the calculation results of the parasitic capacitance voltage sums. The switching combinations with equal calculation results of parasitic capacitance voltage sums are selected as the switching combinations with equal leakage current excitation sources under the output levels of each module.

[0081] The expression for the sum of the parasitic capacitance voltages of the first to fourth H-bridge modules is as follows:

[0082] U c1 +U c2 +U c3 +U c4 =(-2S) a1 +S b1 -S a2 -S b3 +S a4 -2S b4 )*U dc -2U grid

[0083] In the formula, S a1 S is the switch signal on the A-bridge arm of the first H-bridge module. b1 S is the switch signal on the B-arm of the first H-bridge module. a2 S is the switch signal on the A-bridge arm of the second H-bridge module. b3 S is the switch signal on the B-arm of the third H-bridge module.a4 For the switch signal on the A-bridge arm of the fourth H-bridge module, S b4 For the switch signal on the B-arm of the fourth H-bridge module, U dc U represents the DC-side voltage of the first to fourth H-bridge modules. grid This is the grid voltage.

[0084] In this embodiment, S an S bn These are the switch signals on the A and B arms of the nth H-bridge module, respectively, where n = 1, ..., 4. A switch signal "1" indicates on and "0" indicates off. The switch signals on the upper and lower arms of the same bridge arm are inverted.

[0085] The switch combination specifically refers to the combination of switch signals on the A-arm and B-arm of the first to fourth H-bridge modules. The expression for the switch combination is: S a1 S b1 S a2 S b2 S a3 S b3 S a4 S b4 ,For example:

[0086] The cascaded H-bridge inverter outputs a maximum positive level of +4U. dc The switching combination is: 10101010, the maximum negative level switching combination for the cascaded H-bridge inverter output is -4U. dc The switch combination is: 01010101.

[0087] In S2, the method for calculating the output of any module in the four-module cascaded H-bridge inverter under the switch combination is as follows:

[0088] Subtract the switch signals on bridge arm A and bridge arm B of the module to obtain the output of the module;

[0089] In this embodiment, the output status m of any module is... n The specific expression is:

[0090] m n =S an -S bn

[0091] m n =0 indicates that the H-bridge module is not generating power, m n =1 indicates that the H-bridge module outputs positive force, m n =-1 indicates that the H-bridge module has a negative output;

[0092] The output levels of the four-module cascaded H-bridge inverter correspond to the output power of each module (m1, m2, m3, m4) as follows:

[0093] Positive half-cycle level: +4U dc (1111), +2U dc (1100, 1010, 0011, 0101, 0110, 1001), +1U dc (1000, 0100, 0010, 0001), +3U dc (1011, 1101);

[0094] Zero level: 0 (0000);

[0095] Negative half-cycle level: -4U dc (-1-1-1-1), -2U dc (-1-100, -10-10, 00-1-1, 0-10-1, 0-1-10, -100-1), -1U dc (-1000, 0-100, 00-10, 000-1), -3U dc (-10-1-1、-1-10-1);

[0096] The equalization level includes a positive half-cycle equalization level and a negative half-cycle equalization level;

[0097] The positive half-cycle equalization level includes: +4U dc +2U dc and +1U dc The negative half-cycle equalization level includes: +4U dc -2U dc and -1U dc ;

[0098] The unbalanced level includes the positive half-cycle unbalanced level and the negative half-cycle unbalanced level;

[0099] The specific positive half-cycle unbalanced level is: +3U dc The negative half-cycle unbalanced level is specifically -3U. dc , among which, U dc This refers to the DC-side voltage of the first to fourth H-bridge modules.

[0100] In this embodiment, only the output of each module in the cascaded H-bridge inverter during the positive half-cycle is derived; during the positive half-cycle, only +3U is generated. dc The voltage level is unbalanced, therefore the uneven output of each module is reflected as +3U. dc to +4U respectively dc +2U dc During the switching process; the positive half-cycle modulation wave is symmetrical about π / 2, so only the range of 0 to π / 2 is analyzed;

[0101] In step S3, the method for calculating the output of each module in the cascaded H-bridge inverter when operating at an unbalanced level is as follows:

[0102] Calculate the unbalanced level of the positive half-cycle +3U dc With equalization level +4U dc During the switching process, the output of the first to fourth H-bridge modules, and the calculation of the positive half-cycle unbalanced level +3U. dc With equalization level +2U dc During the switching process, the first to fourth H-bridge modules output power.

[0103] The calculation of the positive half-cycle unbalanced level +3U dc With equalization level +4U dc The specific expressions for the output of the first to fourth H-bridge modules during the switching process are as follows:

[0104]

[0105] In the formula, M is the modulation index, and M∈[0,1], ω is the grid angular frequency, α3 represents the angle of the modulating wave greater than 3, and α3=arctan(3 / (4M)). To ensure the output of the first H-bridge module when the modulation wave during the positive half-cycle is α3~π / 2, To ensure the output of the second H-bridge module when the modulation wave during the positive half-cycle is α3~π / 2, To ensure the output of the third H-bridge module when the modulation wave during the positive half-cycle is α3~π / 2, The fourth H-bridge module outputs power when the modulation wave during the positive half-cycle is α3~π / 2;

[0106] From the positive half-cycle unbalanced level +3U dc With equalization level +4U dc From the expressions of the output of the first to fourth H-bridge modules during the switching process, we can see that +3U dc (1011, 1101) and +4U dc (1111) Level switching in progress, +4U dc Modules 1-4 output power evenly, +3U dc Modules 1 and 4 output power, while modules 2 and 3 output power alternately.

[0107] The calculation of the positive half-cycle unbalanced level +3U dc With equalization level +2U dc The specific expressions for the output of the first to fourth H-bridge modules during the switching process are as follows:

[0108]

[0109] In the formula, α2 represents the angle of the modulated wave greater than 2. In the above switching process, α2=arctan(2 / (4M)), To ensure the output of the first H-bridge module when the modulation wave during the positive half-cycle is α2 to α3, To ensure the output of the second H-bridge module when the modulation wave during the positive half-cycle is α2 to α3, To ensure the output of the third H-bridge module when the modulation wave during the positive half-cycle is α2 to α3, The fourth H-bridge module outputs power when the modulation wave during the positive half-cycle is α2 to α3.

[0110] From the positive half-cycle unbalanced level +3U dc With equalization level +2U dc From the expressions of the output of the first to fourth H-bridge modules during the switching process, it can be seen that in order to reduce the output level at +3U... dc (1011, 1101) and +2U dc The unbalanced module generated during switching, +2U dc Select the output of each module of (0110).

[0111] In step S3, the method of adjusting the carrier frequency and controlling the output of each module in the cascaded H-bridge inverter during balanced operation includes the following steps:

[0112] SA1, Set the adjusted carrier frequency, established at the equalization level +U dc With equalization level +2U dc The output expressions of the first to fourth H-bridge modules during the switching process;

[0113] SA2, via equalization level +U dc With equalization level +2U dc During the switching process, when the output of the first to fourth H-bridge modules is combined with the unbalanced level, the output of each module in the cascaded H-bridge inverter is calculated, and the value of the adjusted carrier frequency is determined.

[0114] SA3, Calculate the equalization level +U based on the adjusted carrier frequency value. dc With equalization level +2U dc During the switching process, the first to fourth H-bridge modules output power.

[0115] In SA1, the carrier frequency before adjustment is f s The adjusted carrier frequency is set to kf s At the equalization level +U dc With equalization level +2U dc The output expressions of the first to fourth H-bridge modules during the switching process are as follows:

[0116]

[0117]

[0118] In the formula, α1 represents the angle at which the modulating wave equals 1, and in the above switching process, α2 = arctan(1 / (4M)), k is the adjustment coefficient. To ensure the output of the first H-bridge module when the modulation wave during the positive half-cycle is α1 to α2, To ensure the output of the second H-bridge module when the modulation wave during the positive half-cycle is α1 to α2, To ensure the output of the third H-bridge module when the modulation wave during the positive half-cycle is α1 to α2, The fourth H-bridge module outputs power when the modulation wave during the positive half-cycle is α1 to α2; To ensure the output of the first H-bridge module when the modulation wave during the positive half-cycle is 0 to α1, To ensure the output of the second H-bridge module when the modulation wave during the positive half-cycle is 0 to α1, To ensure the output of the third H-bridge module when the modulation wave during the positive half-cycle is 0 to α1, The fourth H-bridge module outputs power when the modulation wave during the positive half-cycle is 0 to α1;

[0119] In this embodiment, +2U dc with +U dc All are balanced levels, consisting of a positive half-cycle unbalanced level +3U. dc With equalization level +4U dc The expressions for the output of the first to fourth H-bridge modules during the switching process and the positive half-cycle unbalanced level +3U dc With equalization level +2U dc From the expressions for the output of the first to fourth H-bridge modules during the switching process, it can be seen that the output of the first and fourth H-bridge modules is the same, and the output of the second and third H-bridge modules is the same. Therefore, at the equalization level +U dc ~+2U dc Select +2U when switching. dc (0110, 1001), +U dc The output of each module (1000, 0100, 0010, 0001) is then used to obtain the output at the balanced level +U. dc With equalization level +2U dc Output expressions of the first to fourth H-bridge modules during the switching process.

[0120] In the SA2, through the equalization level +U dc With equalization level +2U dc During the switching process, when the output of the first to fourth H-bridge modules is operating at an unbalanced level, the specific expression for the output of each module in the cascaded H-bridge inverter is as follows:

[0121] T m1(α3～π / 2) +T m1(α2～α3) +T m1(α1～α2) +T m1(0～α1) =T m2(α3～π / 2) +Tm2(α2～α3) +T m2(α1～α2) +T m2(0～α1) .

[0122] In this embodiment, the combined positive half-cycle unbalanced level +3U dc With equalization level +4U dc The expressions for the output of the first to fourth H-bridge modules during the switching process, and the positive half-cycle unbalanced level +3U. dc With equalization level +2U dc The expressions for the output of the first to fourth H-bridge modules during the switching process and the equalization level +U dc With equalization level +2U dc During the switching process, the output expressions of the first to fourth H-bridge modules satisfy T m1(α3～π / 2) +T m1(α2～α3) +T m1(α1～α2) +T m1(0～α1) =T m2(α3～π / 2) +T m2(α2～α3) +T m2(α1～α2) +T m2(0～α1) Thus, the value of k can be obtained.

[0123] The derivation method for the output of each module in the negative half-cycle cascaded H-bridge inverter is similar to that of the positive half-cycle cascaded H-bridge inverter, so it is omitted.

[0124] Specifically, S4 is:

[0125] By mapping the output of each module in the cascaded H-bridge inverter to a switching combination that satisfies the parasitic capacitor voltage and is constant, the real-time switching signals of the power switches of each module in the cascaded H-bridge inverter are obtained, thus completing the modulation of the cascaded H-bridge inverter.

[0126] The duration of each module is monitored in real time, so the value of k also changes dynamically. When the modulation index M≤2, there are no unbalanced modules in the system, then k=1.

[0127] In this embodiment, the final power equalization and modulation wave generation of the present invention are as follows: Figure 4 As shown.

[0128] Example 2:

[0129] This embodiment focuses on the specific experiment of Embodiment 1:

[0130] To verify the effectiveness of the manufacturing method proposed in this invention, a simulation model was built with the following simulation parameters: U dc =30V, U grid =50V, C PV =50nF, L1=L2=2mH, switching frequency f s =10kHz, modulation index M=0.9, grid-connected voltage switching frequency i grid=5A, and we can calculate k = 0.515.

[0131] In this embodiment, as Figure 5 The parasitic capacitance U of the H-bridge shown c1 U c2 U c3 U c4 , Figure 5 Middle U c1 with U c2 Both contain a large number of high-frequency components, but after superposition, they only contain a 50Hz low-frequency component. This shows that the proposed modulation method effectively suppresses the high-frequency components of parasitic capacitance voltage and frequency.

[0132] like Figure 6 The photovoltaic side current i of the H-bridge 1 shown dc1 H-bridge 2 photovoltaic side current i dc2 H-bridge 3 photovoltaic side current i dc3 H-bridge 4 photovoltaic side current i dc4 , Figure 6 in i dc1 with i dc4 Waveforms are consistent, i dc2 with i dc3 The waveforms are consistent.

[0133] The beneficial effects of this invention are as follows: This invention provides a modulation method for a cascaded H-bridge inverter, which finds the relationship between the leakage current excitation source and the parasitic capacitor voltage of each module, thereby obtaining a switch combination with equal leakage current excitation sources under each output level. Based on the output of different modules under each switch combination, the output level of the cascaded H-bridge inverter is divided into balanced level and unbalanced level. By adjusting the carrier frequency, each module outputs power according to a set ratio to compensate for the uneven power output of each module when operating at the unbalanced level, and finally achieves power balance of each module.

[0134] This invention achieves power equalization and leakage current suppression for the first to fourth H-bridge modules by adjusting the carrier frequency, thus solving the problems of leakage current suppression and power balance in a four-module H-bridge cascaded inverter.

[0135] In the description of this invention, it should be understood that the terms "center," "thickness," "upper," "lower," "horizontal," "top," "bottom," "inner," "outer," and "radial," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying the relative importance or the number of technical features implicitly specified. Therefore, a feature defined by "first," "second," and "third" may explicitly or implicitly include one or more of that feature.

Claims

1. A modulation method for a cascaded H-bridge inverter, characterized in that, Includes the following steps: S1. Derive the expression for the leakage current of the four-module cascaded H-bridge inverter, obtain the relationship between the leakage current excitation source and the parasitic capacitor voltage of each module in the four-module cascaded H-bridge inverter, and then obtain the switching combination with the same leakage current excitation source under the output level of each module. S2. Calculate the output of each module in the four-module cascaded H-bridge inverter under the switch combination, and divide the output level of the four-module cascaded H-bridge inverter into balanced level and unbalanced level according to the output. S3. Calculate the output of each module in the cascaded H-bridge inverter when operating at an unbalanced level, and then adjust the carrier frequency to control the output of each module in the cascaded H-bridge inverter when operating at an balanced level. S4. Map the output of each module in the cascaded H-bridge inverter to the switch combination to obtain the real-time switching signal of the power switch of each module in the cascaded H-bridge inverter, and complete the modulation of the cascaded H-bridge inverter. Specifically, each module in the four-module cascaded H-bridge inverter is a first to a fourth H-bridge module; The method for adjusting the carrier frequency and controlling the output of each module in a cascaded H-bridge inverter during balanced operation includes the following steps: SA1, Set the adjusted carrier frequency, establishing it at the equalization level + U dc With equalization level +2 U dc The output expressions of the first to fourth H-bridge modules during the switching process; SA2, through equalization level + U dc With equalization level +2 U dc During the switching process, when the output of the first to fourth H-bridge modules is combined with the unbalanced level, the output of each module in the cascaded H-bridge inverter is calculated, and the value of the adjusted carrier frequency is determined. SA3, Calculate the equalization level based on the adjusted carrier frequency value. U dc With equalization level +2 U dc During the switching process, the first to fourth H-bridge modules output power.

2. The modulation method for a cascaded H-bridge inverter according to claim 1, characterized in that, In S1, the leakage current of the four-module cascaded H-bridge inverter i g The specific expression is as follows: i g = C PV1* d U c1 / d t+C PV2* d U c2 / d t+C PV3* d U c3 / d t+C PV4* d U c4 / d t In the formula, U c1 、U c2 、U c3 and U c4 These represent the parasitic capacitance voltages of the first to fourth H-bridge modules, respectively. The specific relationship between the leakage current excitation source and the parasitic capacitor voltage of each module in the four-module cascaded H-bridge inverter is as follows: The parasitic capacitance voltages of the first to fourth H-bridge modules serve as the leakage current excitation source.

3. The modulation method for a cascaded H-bridge inverter according to claim 2, characterized in that, In step S1, the method for obtaining the switch combination with equal leakage current excitation sources at the output levels of each module is as follows: The parasitic capacitance voltages of the first to fourth H-bridge modules of the cascaded H-bridge inverter are calculated based on the maximum positive and negative output level of the switch combinations. Then, all switch combinations under different output levels of the cascaded H-bridge inverter are screened according to the calculation results of the parasitic capacitance voltage sums. The switch combinations with equal calculation results of parasitic capacitance voltage sums are selected as the switch combinations with equal leakage current excitation sources under the output levels of each module. The expression for the sum of the parasitic capacitance voltages of the first to fourth H-bridge modules is as follows: U c1 +U c2 +U c3 +U c4 = (-2 S a1 + S b1 - S a2 - S b3 + S a4 -2 S b4 )* U dc -2 U grid In the formula, S a1 This is the switch signal on the A-bridge arm of the first H-bridge module. S b1 This is the switch signal on the B-arm of the first H-bridge module. S a2 This is the switch signal on the A-bridge arm of the second H-bridge module. S b3 This is the switch signal on the B-arm of the third H-bridge module. S a4 This is the switch signal on the A-arm of the fourth H-bridge module. S b4 This is the switch signal on the B-arm of the fourth H-bridge module. U dc This refers to the DC-side voltages of the first to fourth H-bridge modules. U grid This is the grid voltage.

4. The modulation method for a cascaded H-bridge inverter according to claim 1, characterized in that, In S2, the method for calculating the output of any module in the four-module cascaded H-bridge inverter under the switch combination is as follows: Subtract the switch signals on bridge arm A and bridge arm B of the module to obtain the output of the module.

5. The modulation method for a cascaded H-bridge inverter according to claim 4, characterized in that, In S2, the equalization level includes a positive half-cycle equalization level and a negative half-cycle equalization level; The positive half-cycle equalization level includes: +4 U dc +2 U dc and +1 U dc The negative half-cycle equalization level includes: +4 U dc -2 U dc and -1 U dc ; The unbalanced level includes the positive half-cycle unbalanced level and the negative half-cycle unbalanced level; The specific positive half-cycle unbalanced level is: +3 U dc The negative half-cycle unbalanced level is specifically -3. U dc ,in, U dc This refers to the DC-side voltage of the first to fourth H-bridge modules.

6. The modulation method for a cascaded H-bridge inverter according to claim 5, characterized in that, In step S3, the method for calculating the output of each module in the cascaded H-bridge inverter when operating at an unbalanced level is as follows: Calculate the unbalanced level of the positive half-cycle +3 U dc With equalization level +4 U dc During the switching process, the output of the first to fourth H-bridge modules, and the calculation of the positive half-cycle unbalanced level +3 U dc With equalization level +2 U dc During the switching process, the first to fourth H-bridge modules output power.

7. The modulation method for a cascaded H-bridge inverter according to claim 6, characterized in that, The calculation of the positive half-cycle unbalanced level +3 U dc With equalization level +4 U dc The specific expressions for the output of the first to fourth H-bridge modules during the switching process are as follows: In the formula, M In order to adjust the system, and M ∈[0,1], ω The angular frequency of the power grid. α 3 indicates that the angle of the modulated wave is greater than 3, and α 3 = arctan(3 / (4M)), To modulate the wave during the positive half-cycle α The output of the first H-bridge module is between 3 and π / 2. To modulate the wave during the positive half-cycle α The output of the second H-bridge module is between 3 and π / 2. To modulate the wave during the positive half-cycle α The output of the third H-bridge module is between 3 and π / 2. To modulate the wave during the positive half-cycle α The output of the fourth H-bridge module is between 3 and π / 2. The calculation of the positive half-cycle unbalanced level +3 U dc With equalization level +2 U dc The specific expressions for the output of the first to fourth H-bridge modules during the switching process are as follows: In the formula, α 2 indicates that the angle of the modulated wave is greater than 2, during the above switching process. α 2 = arctan(2 / (4M)), To modulate the wave during the positive half-cycle α 2~ α At 3 o'clock, the first H-bridge module outputs power. To modulate the wave during the positive half-cycle α 2~ α At 3 o'clock, the second H-bridge module outputs power. To modulate the wave during the positive half-cycle α 2~ α At 3 o'clock, the third H-bridge module outputs power. To modulate the wave during the positive half-cycle α 2~ α At 3 o'clock, the fourth H-bridge module outputs power.

8. The modulation method for a cascaded H-bridge inverter according to claim 1, characterized in that, In SA1, the carrier frequency before adjustment is f s The adjusted carrier frequency is set to kf s In equalization level + U dc With equalization level +2 U dc The output expressions of the first to fourth H-bridge modules during the switching process are as follows: In the formula, α 1 indicates that the angle of the modulated wave is equal to 1, during the above switching process. α 2 = arctan(1 / (4M)), k To adjust the coefficient, To modulate the wave during the positive half-cycle α 1~ α At 2 o'clock, the first H-bridge module outputs power. To modulate the wave during the positive half-cycle α 1~ α At 2 o'clock, the second H-bridge module outputs power. To modulate the wave during the positive half-cycle α 1~ α At 2 o'clock, the third H-bridge module outputs power. To modulate the wave during the positive half-cycle α 1~ α At 2 o'clock, the fourth H-bridge module outputs power; For the modulated wave to be 0~ during the positive half-cycle α At 1 o'clock, the first H-bridge module outputs power. For the modulated wave to be 0~ during the positive half-cycle α At 1 o'clock, the second H-bridge module outputs power. For the modulated wave to be 0~ during the positive half-cycle α At 1 o'clock, the third H-bridge module outputs power. For the modulated wave to be 0~ during the positive half-cycle α The fourth H-bridge module outputs power at 1 o'clock; In the SA2, by equalizing the level + U dc With equalization level +2 U dc During the switching process, when the output of the first to fourth H-bridge modules is operating at an unbalanced level, the specific expression for the output of each module in the cascaded H-bridge inverter is as follows: 。 9. The modulation method for a cascaded H-bridge inverter according to claim 8, characterized in that, Specifically, S4 is: By mapping the output of each module in the cascaded H-bridge inverter to a switching combination that satisfies the parasitic capacitor voltage and is constant, the real-time switching signals of the power switches of each module in the cascaded H-bridge inverter are obtained, thus completing the modulation of the cascaded H-bridge inverter.

Images